Cong Vu / Mbed 2 deprecated Snake-game-fall2020_C

Snake

Dependencies:   mbed wave_player 4DGL-uLCD-SE MMA8452

SDFileSystem/SDFileSystem.cpp@3:2fe73b263a9a, 2020-11-23 (annotated)

Committer:
congvu
Date:
Mon Nov 23 05:54:49 2020 +0000
Revision:
3:2fe73b263a9a
Parent:
1:10330bce85cb 
ECE2035;

Who changed what in which revision?

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DCchico 1:10330bce85cb 1 /* mbed Microcontroller Library
DCchico 1:10330bce85cb 2 * Copyright (c) 2006-2012 ARM Limited
DCchico 1:10330bce85cb 3 *
DCchico 1:10330bce85cb 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
DCchico 1:10330bce85cb 5 * of this software and associated documentation files (the "Software"), to deal
DCchico 1:10330bce85cb 6 * in the Software without restriction, including without limitation the rights
DCchico 1:10330bce85cb 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
DCchico 1:10330bce85cb 8 * copies of the Software, and to permit persons to whom the Software is
DCchico 1:10330bce85cb 9 * furnished to do so, subject to the following conditions:
DCchico 1:10330bce85cb 10 *
DCchico 1:10330bce85cb 11 * The above copyright notice and this permission notice shall be included in
DCchico 1:10330bce85cb 12 * all copies or substantial portions of the Software.
DCchico 1:10330bce85cb 13 *
DCchico 1:10330bce85cb 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
DCchico 1:10330bce85cb 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
DCchico 1:10330bce85cb 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
DCchico 1:10330bce85cb 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
DCchico 1:10330bce85cb 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
DCchico 1:10330bce85cb 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
DCchico 1:10330bce85cb 20 * SOFTWARE.
DCchico 1:10330bce85cb 21 */
DCchico 1:10330bce85cb 22 /* Introduction
DCchico 1:10330bce85cb 23 * ------------
DCchico 1:10330bce85cb 24 * SD and MMC cards support a number of interfaces, but common to them all
DCchico 1:10330bce85cb 25 * is one based on SPI. This is the one I'm implmenting because it means
DCchico 1:10330bce85cb 26 * it is much more portable even though not so performant, and we already
DCchico 1:10330bce85cb 27 * have the mbed SPI Interface!
DCchico 1:10330bce85cb 28 *
DCchico 1:10330bce85cb 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
DCchico 1:10330bce85cb 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
DCchico 1:10330bce85cb 31 *
DCchico 1:10330bce85cb 32 * SPI Startup
DCchico 1:10330bce85cb 33 * -----------
DCchico 1:10330bce85cb 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
DCchico 1:10330bce85cb 35 * asserting CS low and sending the reset command (CMD0). The card will
DCchico 1:10330bce85cb 36 * respond with a (R1) response.
DCchico 1:10330bce85cb 37 *
DCchico 1:10330bce85cb 38 * CMD8 is optionally sent to determine the voltage range supported, and
DCchico 1:10330bce85cb 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
DCchico 1:10330bce85cb 40 * version 2.x. I'll just ignore this for now.
DCchico 1:10330bce85cb 41 *
DCchico 1:10330bce85cb 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
DCchico 1:10330bce85cb 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
DCchico 1:10330bce85cb 44 *
DCchico 1:10330bce85cb 45 * You should also indicate whether the host supports High Capicity cards,
DCchico 1:10330bce85cb 46 * and check whether the card is high capacity - i'll also ignore this
DCchico 1:10330bce85cb 47 *
DCchico 1:10330bce85cb 48 * SPI Protocol
DCchico 1:10330bce85cb 49 * ------------
DCchico 1:10330bce85cb 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
DCchico 1:10330bce85cb 51 * the host starting every bus transaction by asserting the CS signal low. The
DCchico 1:10330bce85cb 52 * card always responds to commands, data blocks and errors.
DCchico 1:10330bce85cb 53 *
DCchico 1:10330bce85cb 54 * The protocol supports a CRC, but by default it is off (except for the
DCchico 1:10330bce85cb 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
DCchico 1:10330bce85cb 56 * I'll leave the CRC off I think!
DCchico 1:10330bce85cb 57 *
DCchico 1:10330bce85cb 58 * Standard capacity cards have variable data block sizes, whereas High
DCchico 1:10330bce85cb 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
DCchico 1:10330bce85cb 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
DCchico 1:10330bce85cb 61 * This is set with CMD16.
DCchico 1:10330bce85cb 62 *
DCchico 1:10330bce85cb 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
DCchico 1:10330bce85cb 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
DCchico 1:10330bce85cb 65 * the card gets a read command, it responds with a response token, and then
DCchico 1:10330bce85cb 66 * a data token or an error.
DCchico 1:10330bce85cb 67 *
DCchico 1:10330bce85cb 68 * SPI Command Format
DCchico 1:10330bce85cb 69 * ------------------
DCchico 1:10330bce85cb 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
DCchico 1:10330bce85cb 71 *
DCchico 1:10330bce85cb 72 * +---------------+------------+------------+-----------+----------+--------------+
DCchico 1:10330bce85cb 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
DCchico 1:10330bce85cb 74 * +---------------+------------+------------+-----------+----------+--------------+
DCchico 1:10330bce85cb 75 *
DCchico 1:10330bce85cb 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
DCchico 1:10330bce85cb 77 *
DCchico 1:10330bce85cb 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
DCchico 1:10330bce85cb 79 *
DCchico 1:10330bce85cb 80 * SPI Response Format
DCchico 1:10330bce85cb 81 * -------------------
DCchico 1:10330bce85cb 82 * The main response format (R1) is a status byte (normally zero). Key flags:
DCchico 1:10330bce85cb 83 * idle - 1 if the card is in an idle state/initialising
DCchico 1:10330bce85cb 84 * cmd - 1 if an illegal command code was detected
DCchico 1:10330bce85cb 85 *
DCchico 1:10330bce85cb 86 * +-------------------------------------------------+
DCchico 1:10330bce85cb 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
DCchico 1:10330bce85cb 88 * +-------------------------------------------------+
DCchico 1:10330bce85cb 89 *
DCchico 1:10330bce85cb 90 * R1b is the same, except it is followed by a busy signal (zeros) until
DCchico 1:10330bce85cb 91 * the first non-zero byte when it is ready again.
DCchico 1:10330bce85cb 92 *
DCchico 1:10330bce85cb 93 * Data Response Token
DCchico 1:10330bce85cb 94 * -------------------
DCchico 1:10330bce85cb 95 * Every data block written to the card is acknowledged by a byte
DCchico 1:10330bce85cb 96 * response token
DCchico 1:10330bce85cb 97 *
DCchico 1:10330bce85cb 98 * +----------------------+
DCchico 1:10330bce85cb 99 * | xxx | 0 | status | 1 |
DCchico 1:10330bce85cb 100 * +----------------------+
DCchico 1:10330bce85cb 101 * 010 - OK!
DCchico 1:10330bce85cb 102 * 101 - CRC Error
DCchico 1:10330bce85cb 103 * 110 - Write Error
DCchico 1:10330bce85cb 104 *
DCchico 1:10330bce85cb 105 * Single Block Read and Write
DCchico 1:10330bce85cb 106 * ---------------------------
DCchico 1:10330bce85cb 107 *
DCchico 1:10330bce85cb 108 * Block transfers have a byte header, followed by the data, followed
DCchico 1:10330bce85cb 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
DCchico 1:10330bce85cb 110 *
DCchico 1:10330bce85cb 111 * +------+---------+---------+- - - -+---------+-----------+----------+
DCchico 1:10330bce85cb 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
DCchico 1:10330bce85cb 113 * +------+---------+---------+- - - -+---------+-----------+----------+
DCchico 1:10330bce85cb 114 */
DCchico 1:10330bce85cb 115 #include "SDFileSystem.h"
DCchico 1:10330bce85cb 116 #include "mbed_debug.h"
DCchico 1:10330bce85cb 117
DCchico 1:10330bce85cb 118 #define SD_COMMAND_TIMEOUT 5000
DCchico 1:10330bce85cb 119
DCchico 1:10330bce85cb 120 #define SD_DBG 0
DCchico 1:10330bce85cb 121
DCchico 1:10330bce85cb 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
DCchico 1:10330bce85cb 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
DCchico 1:10330bce85cb 124 _cs = 1;
DCchico 1:10330bce85cb 125 }
DCchico 1:10330bce85cb 126
DCchico 1:10330bce85cb 127 #define R1_IDLE_STATE (1 << 0)
DCchico 1:10330bce85cb 128 #define R1_ERASE_RESET (1 << 1)
DCchico 1:10330bce85cb 129 #define R1_ILLEGAL_COMMAND (1 << 2)
DCchico 1:10330bce85cb 130 #define R1_COM_CRC_ERROR (1 << 3)
DCchico 1:10330bce85cb 131 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
DCchico 1:10330bce85cb 132 #define R1_ADDRESS_ERROR (1 << 5)
DCchico 1:10330bce85cb 133 #define R1_PARAMETER_ERROR (1 << 6)
DCchico 1:10330bce85cb 134
DCchico 1:10330bce85cb 135 // Types
DCchico 1:10330bce85cb 136 // - v1.x Standard Capacity
DCchico 1:10330bce85cb 137 // - v2.x Standard Capacity
DCchico 1:10330bce85cb 138 // - v2.x High Capacity
DCchico 1:10330bce85cb 139 // - Not recognised as an SD Card
DCchico 1:10330bce85cb 140 #define SDCARD_FAIL 0
DCchico 1:10330bce85cb 141 #define SDCARD_V1 1
DCchico 1:10330bce85cb 142 #define SDCARD_V2 2
DCchico 1:10330bce85cb 143 #define SDCARD_V2HC 3
DCchico 1:10330bce85cb 144
DCchico 1:10330bce85cb 145 int SDFileSystem::initialise_card() {
DCchico 1:10330bce85cb 146 // Set to 100kHz for initialisation, and clock card with cs = 1
DCchico 1:10330bce85cb 147 _spi.frequency(100000);
DCchico 1:10330bce85cb 148 _cs = 1;
DCchico 1:10330bce85cb 149 for (int i = 0; i < 16; i++) {
DCchico 1:10330bce85cb 150 _spi.write(0xFF);
DCchico 1:10330bce85cb 151 }
DCchico 1:10330bce85cb 152
DCchico 1:10330bce85cb 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
DCchico 1:10330bce85cb 154 if (_cmd(0, 0) != R1_IDLE_STATE) {
DCchico 1:10330bce85cb 155 debug("No disk, or could not put SD card in to SPI idle state\n");
DCchico 1:10330bce85cb 156 return SDCARD_FAIL;
DCchico 1:10330bce85cb 157 }
DCchico 1:10330bce85cb 158
DCchico 1:10330bce85cb 159 // send CMD8 to determine whther it is ver 2.x
DCchico 1:10330bce85cb 160 int r = _cmd8();
DCchico 1:10330bce85cb 161 if (r == R1_IDLE_STATE) {
DCchico 1:10330bce85cb 162 return initialise_card_v2();
DCchico 1:10330bce85cb 163 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
DCchico 1:10330bce85cb 164 return initialise_card_v1();
DCchico 1:10330bce85cb 165 } else {
DCchico 1:10330bce85cb 166 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
DCchico 1:10330bce85cb 167 return SDCARD_FAIL;
DCchico 1:10330bce85cb 168 }
DCchico 1:10330bce85cb 169 }
DCchico 1:10330bce85cb 170
DCchico 1:10330bce85cb 171 int SDFileSystem::initialise_card_v1() {
DCchico 1:10330bce85cb 172 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
DCchico 1:10330bce85cb 173 _cmd(55, 0);
DCchico 1:10330bce85cb 174 if (_cmd(41, 0) == 0) {
DCchico 1:10330bce85cb 175 cdv = 512;
DCchico 1:10330bce85cb 176 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
DCchico 1:10330bce85cb 177 return SDCARD_V1;
DCchico 1:10330bce85cb 178 }
DCchico 1:10330bce85cb 179 }
DCchico 1:10330bce85cb 180
DCchico 1:10330bce85cb 181 debug("Timeout waiting for v1.x card\n");
DCchico 1:10330bce85cb 182 return SDCARD_FAIL;
DCchico 1:10330bce85cb 183 }
DCchico 1:10330bce85cb 184
DCchico 1:10330bce85cb 185 int SDFileSystem::initialise_card_v2() {
DCchico 1:10330bce85cb 186 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
DCchico 1:10330bce85cb 187 wait_ms(50);
DCchico 1:10330bce85cb 188 _cmd58();
DCchico 1:10330bce85cb 189 _cmd(55, 0);
DCchico 1:10330bce85cb 190 if (_cmd(41, 0x40000000) == 0) {
DCchico 1:10330bce85cb 191 _cmd58();
DCchico 1:10330bce85cb 192 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
DCchico 1:10330bce85cb 193 cdv = 1;
DCchico 1:10330bce85cb 194 return SDCARD_V2;
DCchico 1:10330bce85cb 195 }
DCchico 1:10330bce85cb 196 }
DCchico 1:10330bce85cb 197
DCchico 1:10330bce85cb 198 debug("Timeout waiting for v2.x card\n");
DCchico 1:10330bce85cb 199 return SDCARD_FAIL;
DCchico 1:10330bce85cb 200 }
DCchico 1:10330bce85cb 201
DCchico 1:10330bce85cb 202 int SDFileSystem::disk_initialize() {
DCchico 1:10330bce85cb 203 int i = initialise_card();
DCchico 1:10330bce85cb 204 debug_if(SD_DBG, "init card = %d\n", i);
DCchico 1:10330bce85cb 205 _sectors = _sd_sectors();
DCchico 1:10330bce85cb 206
DCchico 1:10330bce85cb 207 // Set block length to 512 (CMD16)
DCchico 1:10330bce85cb 208 if (_cmd(16, 512) != 0) {
DCchico 1:10330bce85cb 209 debug("Set 512-byte block timed out\n");
DCchico 1:10330bce85cb 210 return 1;
DCchico 1:10330bce85cb 211 }
DCchico 1:10330bce85cb 212
DCchico 1:10330bce85cb 213 _spi.frequency(1000000); // Set to 1MHz for data transfer
DCchico 1:10330bce85cb 214 return 0;
DCchico 1:10330bce85cb 215 }
DCchico 1:10330bce85cb 216
DCchico 1:10330bce85cb 217 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
DCchico 1:10330bce85cb 218 // set write address for single block (CMD24)
DCchico 1:10330bce85cb 219 if (_cmd(24, block_number * cdv) != 0) {
DCchico 1:10330bce85cb 220 return 1;
DCchico 1:10330bce85cb 221 }
DCchico 1:10330bce85cb 222
DCchico 1:10330bce85cb 223 // send the data block
DCchico 1:10330bce85cb 224 _write(buffer, 512);
DCchico 1:10330bce85cb 225 return 0;
DCchico 1:10330bce85cb 226 }
DCchico 1:10330bce85cb 227
DCchico 1:10330bce85cb 228 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
DCchico 1:10330bce85cb 229 // set read address for single block (CMD17)
DCchico 1:10330bce85cb 230 if (_cmd(17, block_number * cdv) != 0) {
DCchico 1:10330bce85cb 231 return 1;
DCchico 1:10330bce85cb 232 }
DCchico 1:10330bce85cb 233
DCchico 1:10330bce85cb 234 // receive the data
DCchico 1:10330bce85cb 235 _read(buffer, 512);
DCchico 1:10330bce85cb 236 return 0;
DCchico 1:10330bce85cb 237 }
DCchico 1:10330bce85cb 238
DCchico 1:10330bce85cb 239 int SDFileSystem::disk_status() { return 0; }
DCchico 1:10330bce85cb 240 int SDFileSystem::disk_sync() { return 0; }
DCchico 1:10330bce85cb 241 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
DCchico 1:10330bce85cb 242
DCchico 1:10330bce85cb 243
DCchico 1:10330bce85cb 244 // PRIVATE FUNCTIONS
DCchico 1:10330bce85cb 245 int SDFileSystem::_cmd(int cmd, int arg) {
DCchico 1:10330bce85cb 246 _cs = 0;
DCchico 1:10330bce85cb 247
DCchico 1:10330bce85cb 248 // send a command
DCchico 1:10330bce85cb 249 _spi.write(0x40 | cmd);
DCchico 1:10330bce85cb 250 _spi.write(arg >> 24);
DCchico 1:10330bce85cb 251 _spi.write(arg >> 16);
DCchico 1:10330bce85cb 252 _spi.write(arg >> 8);
DCchico 1:10330bce85cb 253 _spi.write(arg >> 0);
DCchico 1:10330bce85cb 254 _spi.write(0x95);
DCchico 1:10330bce85cb 255
DCchico 1:10330bce85cb 256 // wait for the repsonse (response[7] == 0)
DCchico 1:10330bce85cb 257 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
DCchico 1:10330bce85cb 258 int response = _spi.write(0xFF);
DCchico 1:10330bce85cb 259 if (!(response & 0x80)) {
DCchico 1:10330bce85cb 260 _cs = 1;
DCchico 1:10330bce85cb 261 _spi.write(0xFF);
DCchico 1:10330bce85cb 262 return response;
DCchico 1:10330bce85cb 263 }
DCchico 1:10330bce85cb 264 }
DCchico 1:10330bce85cb 265 _cs = 1;
DCchico 1:10330bce85cb 266 _spi.write(0xFF);
DCchico 1:10330bce85cb 267 return -1; // timeout
DCchico 1:10330bce85cb 268 }
DCchico 1:10330bce85cb 269 int SDFileSystem::_cmdx(int cmd, int arg) {
DCchico 1:10330bce85cb 270 _cs = 0;
DCchico 1:10330bce85cb 271
DCchico 1:10330bce85cb 272 // send a command
DCchico 1:10330bce85cb 273 _spi.write(0x40 | cmd);
DCchico 1:10330bce85cb 274 _spi.write(arg >> 24);
DCchico 1:10330bce85cb 275 _spi.write(arg >> 16);
DCchico 1:10330bce85cb 276 _spi.write(arg >> 8);
DCchico 1:10330bce85cb 277 _spi.write(arg >> 0);
DCchico 1:10330bce85cb 278 _spi.write(0x95);
DCchico 1:10330bce85cb 279
DCchico 1:10330bce85cb 280 // wait for the repsonse (response[7] == 0)
DCchico 1:10330bce85cb 281 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
DCchico 1:10330bce85cb 282 int response = _spi.write(0xFF);
DCchico 1:10330bce85cb 283 if (!(response & 0x80)) {
DCchico 1:10330bce85cb 284 return response;
DCchico 1:10330bce85cb 285 }
DCchico 1:10330bce85cb 286 }
DCchico 1:10330bce85cb 287 _cs = 1;
DCchico 1:10330bce85cb 288 _spi.write(0xFF);
DCchico 1:10330bce85cb 289 return -1; // timeout
DCchico 1:10330bce85cb 290 }
DCchico 1:10330bce85cb 291
DCchico 1:10330bce85cb 292
DCchico 1:10330bce85cb 293 int SDFileSystem::_cmd58() {
DCchico 1:10330bce85cb 294 _cs = 0;
DCchico 1:10330bce85cb 295 int arg = 0;
DCchico 1:10330bce85cb 296
DCchico 1:10330bce85cb 297 // send a command
DCchico 1:10330bce85cb 298 _spi.write(0x40 | 58);
DCchico 1:10330bce85cb 299 _spi.write(arg >> 24);
DCchico 1:10330bce85cb 300 _spi.write(arg >> 16);
DCchico 1:10330bce85cb 301 _spi.write(arg >> 8);
DCchico 1:10330bce85cb 302 _spi.write(arg >> 0);
DCchico 1:10330bce85cb 303 _spi.write(0x95);
DCchico 1:10330bce85cb 304
DCchico 1:10330bce85cb 305 // wait for the repsonse (response[7] == 0)
DCchico 1:10330bce85cb 306 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
DCchico 1:10330bce85cb 307 int response = _spi.write(0xFF);
DCchico 1:10330bce85cb 308 if (!(response & 0x80)) {
DCchico 1:10330bce85cb 309 int ocr = _spi.write(0xFF) << 24;
DCchico 1:10330bce85cb 310 ocr |= _spi.write(0xFF) << 16;
DCchico 1:10330bce85cb 311 ocr |= _spi.write(0xFF) << 8;
DCchico 1:10330bce85cb 312 ocr |= _spi.write(0xFF) << 0;
DCchico 1:10330bce85cb 313 _cs = 1;
DCchico 1:10330bce85cb 314 _spi.write(0xFF);
DCchico 1:10330bce85cb 315 return response;
DCchico 1:10330bce85cb 316 }
DCchico 1:10330bce85cb 317 }
DCchico 1:10330bce85cb 318 _cs = 1;
DCchico 1:10330bce85cb 319 _spi.write(0xFF);
DCchico 1:10330bce85cb 320 return -1; // timeout
DCchico 1:10330bce85cb 321 }
DCchico 1:10330bce85cb 322
DCchico 1:10330bce85cb 323 int SDFileSystem::_cmd8() {
DCchico 1:10330bce85cb 324 _cs = 0;
DCchico 1:10330bce85cb 325
DCchico 1:10330bce85cb 326 // send a command
DCchico 1:10330bce85cb 327 _spi.write(0x40 | 8); // CMD8
DCchico 1:10330bce85cb 328 _spi.write(0x00); // reserved
DCchico 1:10330bce85cb 329 _spi.write(0x00); // reserved
DCchico 1:10330bce85cb 330 _spi.write(0x01); // 3.3v
DCchico 1:10330bce85cb 331 _spi.write(0xAA); // check pattern
DCchico 1:10330bce85cb 332 _spi.write(0x87); // crc
DCchico 1:10330bce85cb 333
DCchico 1:10330bce85cb 334 // wait for the repsonse (response[7] == 0)
DCchico 1:10330bce85cb 335 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
DCchico 1:10330bce85cb 336 char response[5];
DCchico 1:10330bce85cb 337 response[0] = _spi.write(0xFF);
DCchico 1:10330bce85cb 338 if (!(response[0] & 0x80)) {
DCchico 1:10330bce85cb 339 for (int j = 1; j < 5; j++) {
DCchico 1:10330bce85cb 340 response[i] = _spi.write(0xFF);
DCchico 1:10330bce85cb 341 }
DCchico 1:10330bce85cb 342 _cs = 1;
DCchico 1:10330bce85cb 343 _spi.write(0xFF);
DCchico 1:10330bce85cb 344 return response[0];
DCchico 1:10330bce85cb 345 }
DCchico 1:10330bce85cb 346 }
DCchico 1:10330bce85cb 347 _cs = 1;
DCchico 1:10330bce85cb 348 _spi.write(0xFF);
DCchico 1:10330bce85cb 349 return -1; // timeout
DCchico 1:10330bce85cb 350 }
DCchico 1:10330bce85cb 351
DCchico 1:10330bce85cb 352 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
DCchico 1:10330bce85cb 353 _cs = 0;
DCchico 1:10330bce85cb 354
DCchico 1:10330bce85cb 355 // read until start byte (0xFF)
DCchico 1:10330bce85cb 356 while (_spi.write(0xFF) != 0xFE);
DCchico 1:10330bce85cb 357
DCchico 1:10330bce85cb 358 // read data
DCchico 1:10330bce85cb 359 for (int i = 0; i < length; i++) {
DCchico 1:10330bce85cb 360 buffer[i] = _spi.write(0xFF);
DCchico 1:10330bce85cb 361 }
DCchico 1:10330bce85cb 362 _spi.write(0xFF); // checksum
DCchico 1:10330bce85cb 363 _spi.write(0xFF);
DCchico 1:10330bce85cb 364
DCchico 1:10330bce85cb 365 _cs = 1;
DCchico 1:10330bce85cb 366 _spi.write(0xFF);
DCchico 1:10330bce85cb 367 return 0;
DCchico 1:10330bce85cb 368 }
DCchico 1:10330bce85cb 369
DCchico 1:10330bce85cb 370 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
DCchico 1:10330bce85cb 371 _cs = 0;
DCchico 1:10330bce85cb 372
DCchico 1:10330bce85cb 373 // indicate start of block
DCchico 1:10330bce85cb 374 _spi.write(0xFE);
DCchico 1:10330bce85cb 375
DCchico 1:10330bce85cb 376 // write the data
DCchico 1:10330bce85cb 377 for (int i = 0; i < length; i++) {
DCchico 1:10330bce85cb 378 _spi.write(buffer[i]);
DCchico 1:10330bce85cb 379 }
DCchico 1:10330bce85cb 380
DCchico 1:10330bce85cb 381 // write the checksum
DCchico 1:10330bce85cb 382 _spi.write(0xFF);
DCchico 1:10330bce85cb 383 _spi.write(0xFF);
DCchico 1:10330bce85cb 384
DCchico 1:10330bce85cb 385 // check the response token
DCchico 1:10330bce85cb 386 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
DCchico 1:10330bce85cb 387 _cs = 1;
DCchico 1:10330bce85cb 388 _spi.write(0xFF);
DCchico 1:10330bce85cb 389 return 1;
DCchico 1:10330bce85cb 390 }
DCchico 1:10330bce85cb 391
DCchico 1:10330bce85cb 392 // wait for write to finish
DCchico 1:10330bce85cb 393 while (_spi.write(0xFF) == 0);
DCchico 1:10330bce85cb 394
DCchico 1:10330bce85cb 395 _cs = 1;
DCchico 1:10330bce85cb 396 _spi.write(0xFF);
DCchico 1:10330bce85cb 397 return 0;
DCchico 1:10330bce85cb 398 }
DCchico 1:10330bce85cb 399
DCchico 1:10330bce85cb 400 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
DCchico 1:10330bce85cb 401 uint32_t bits = 0;
DCchico 1:10330bce85cb 402 uint32_t size = 1 + msb - lsb;
DCchico 1:10330bce85cb 403 for (int i = 0; i < size; i++) {
DCchico 1:10330bce85cb 404 uint32_t position = lsb + i;
DCchico 1:10330bce85cb 405 uint32_t byte = 15 - (position >> 3);
DCchico 1:10330bce85cb 406 uint32_t bit = position & 0x7;
DCchico 1:10330bce85cb 407 uint32_t value = (data[byte] >> bit) & 1;
DCchico 1:10330bce85cb 408 bits |= value << i;
DCchico 1:10330bce85cb 409 }
DCchico 1:10330bce85cb 410 return bits;
DCchico 1:10330bce85cb 411 }
DCchico 1:10330bce85cb 412
DCchico 1:10330bce85cb 413 uint64_t SDFileSystem::_sd_sectors() {
DCchico 1:10330bce85cb 414 uint32_t c_size, c_size_mult, read_bl_len;
DCchico 1:10330bce85cb 415 uint32_t block_len, mult, blocknr, capacity;
DCchico 1:10330bce85cb 416 uint32_t hc_c_size;
DCchico 1:10330bce85cb 417 uint64_t blocks;
DCchico 1:10330bce85cb 418
DCchico 1:10330bce85cb 419 // CMD9, Response R2 (R1 byte + 16-byte block read)
DCchico 1:10330bce85cb 420 if (_cmdx(9, 0) != 0) {
DCchico 1:10330bce85cb 421 debug("Didn't get a response from the disk\n");
DCchico 1:10330bce85cb 422 return 0;
DCchico 1:10330bce85cb 423 }
DCchico 1:10330bce85cb 424
DCchico 1:10330bce85cb 425 uint8_t csd[16];
DCchico 1:10330bce85cb 426 if (_read(csd, 16) != 0) {
DCchico 1:10330bce85cb 427 debug("Couldn't read csd response from disk\n");
DCchico 1:10330bce85cb 428 return 0;
DCchico 1:10330bce85cb 429 }
DCchico 1:10330bce85cb 430
DCchico 1:10330bce85cb 431 // csd_structure : csd[127:126]
DCchico 1:10330bce85cb 432 // c_size : csd[73:62]
DCchico 1:10330bce85cb 433 // c_size_mult : csd[49:47]
DCchico 1:10330bce85cb 434 // read_bl_len : csd[83:80] - the *maximum* read block length
DCchico 1:10330bce85cb 435
DCchico 1:10330bce85cb 436 int csd_structure = ext_bits(csd, 127, 126);
DCchico 1:10330bce85cb 437
DCchico 1:10330bce85cb 438 switch (csd_structure) {
DCchico 1:10330bce85cb 439 case 0:
DCchico 1:10330bce85cb 440 cdv = 512;
DCchico 1:10330bce85cb 441 c_size = ext_bits(csd, 73, 62);
DCchico 1:10330bce85cb 442 c_size_mult = ext_bits(csd, 49, 47);
DCchico 1:10330bce85cb 443 read_bl_len = ext_bits(csd, 83, 80);
DCchico 1:10330bce85cb 444
DCchico 1:10330bce85cb 445 block_len = 1 << read_bl_len;
DCchico 1:10330bce85cb 446 mult = 1 << (c_size_mult + 2);
DCchico 1:10330bce85cb 447 blocknr = (c_size + 1) * mult;
DCchico 1:10330bce85cb 448 capacity = blocknr * block_len;
DCchico 1:10330bce85cb 449 blocks = capacity / 512;
DCchico 1:10330bce85cb 450 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
DCchico 1:10330bce85cb 451 break;
DCchico 1:10330bce85cb 452
DCchico 1:10330bce85cb 453 case 1:
DCchico 1:10330bce85cb 454 cdv = 1;
DCchico 1:10330bce85cb 455 hc_c_size = ext_bits(csd, 63, 48);
DCchico 1:10330bce85cb 456 blocks = (hc_c_size+1)*1024;
DCchico 1:10330bce85cb 457 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
DCchico 1:10330bce85cb 458 break;
DCchico 1:10330bce85cb 459
DCchico 1:10330bce85cb 460 default:
DCchico 1:10330bce85cb 461 debug("CSD struct unsupported\r\n");
DCchico 1:10330bce85cb 462 return 0;
DCchico 1:10330bce85cb 463 };
DCchico 1:10330bce85cb 464 return blocks;
DCchico 1:10330bce85cb 465 }