Simon Cooksey / mbed-os

Pinned to some recent date

targets/targets.json@0:fb7af294d5d9, 2016-11-17 (annotated)

Committer:
Simon Cooksey
Date:
Thu Nov 17 16:43:53 2016 +0000
Revision:
0:fb7af294d5d9
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Simon Cooksey 0:fb7af294d5d9 1 {
Simon Cooksey 0:fb7af294d5d9 2 "Target": {
Simon Cooksey 0:fb7af294d5d9 3 "core": null,
Simon Cooksey 0:fb7af294d5d9 4 "default_toolchain": "ARM",
Simon Cooksey 0:fb7af294d5d9 5 "supported_toolchains": null,
Simon Cooksey 0:fb7af294d5d9 6 "extra_labels": [],
Simon Cooksey 0:fb7af294d5d9 7 "is_disk_virtual": false,
Simon Cooksey 0:fb7af294d5d9 8 "macros": [],
Simon Cooksey 0:fb7af294d5d9 9 "device_has": [],
Simon Cooksey 0:fb7af294d5d9 10 "features": [],
Simon Cooksey 0:fb7af294d5d9 11 "detect_code": [],
Simon Cooksey 0:fb7af294d5d9 12 "public": false,
Simon Cooksey 0:fb7af294d5d9 13 "default_lib": "std"
Simon Cooksey 0:fb7af294d5d9 14 },
Simon Cooksey 0:fb7af294d5d9 15 "Super_Target": {
Simon Cooksey 0:fb7af294d5d9 16 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 17 "core": "Cortex-M4",
Simon Cooksey 0:fb7af294d5d9 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Simon Cooksey 0:fb7af294d5d9 19 "supported_toolchains": ["ARM"]
Simon Cooksey 0:fb7af294d5d9 20 },
Simon Cooksey 0:fb7af294d5d9 21 "CM4_UARM": {
Simon Cooksey 0:fb7af294d5d9 22 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 23 "core": "Cortex-M4",
Simon Cooksey 0:fb7af294d5d9 24 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 25 "public": false,
Simon Cooksey 0:fb7af294d5d9 26 "supported_toolchains": ["uARM"],
Simon Cooksey 0:fb7af294d5d9 27 "default_lib": "small"
Simon Cooksey 0:fb7af294d5d9 28 },
Simon Cooksey 0:fb7af294d5d9 29 "CM4_ARM": {
Simon Cooksey 0:fb7af294d5d9 30 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 31 "core": "Cortex-M4",
Simon Cooksey 0:fb7af294d5d9 32 "public": false,
Simon Cooksey 0:fb7af294d5d9 33 "supported_toolchains": ["ARM"]
Simon Cooksey 0:fb7af294d5d9 34 },
Simon Cooksey 0:fb7af294d5d9 35 "CM4F_UARM": {
Simon Cooksey 0:fb7af294d5d9 36 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 37 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 38 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 39 "public": false,
Simon Cooksey 0:fb7af294d5d9 40 "supported_toolchains": ["uARM"],
Simon Cooksey 0:fb7af294d5d9 41 "default_lib": "small"
Simon Cooksey 0:fb7af294d5d9 42 },
Simon Cooksey 0:fb7af294d5d9 43 "CM4F_ARM": {
Simon Cooksey 0:fb7af294d5d9 44 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 45 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 46 "public": false,
Simon Cooksey 0:fb7af294d5d9 47 "supported_toolchains": ["ARM"]
Simon Cooksey 0:fb7af294d5d9 48 },
Simon Cooksey 0:fb7af294d5d9 49 "LPCTarget": {
Simon Cooksey 0:fb7af294d5d9 50 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Simon Cooksey 0:fb7af294d5d9 52 "public": false
Simon Cooksey 0:fb7af294d5d9 53 },
Simon Cooksey 0:fb7af294d5d9 54 "LPC11C24": {
Simon Cooksey 0:fb7af294d5d9 55 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 56 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Simon Cooksey 0:fb7af294d5d9 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 60 "device_name": "LPC11C24FBD48/301"
Simon Cooksey 0:fb7af294d5d9 61 },
Simon Cooksey 0:fb7af294d5d9 62 "LPC1114": {
Simon Cooksey 0:fb7af294d5d9 63 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 64 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 65 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Simon Cooksey 0:fb7af294d5d9 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 69 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 70 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 71 "device_name": "LPC1114FN28/102"
Simon Cooksey 0:fb7af294d5d9 72 },
Simon Cooksey 0:fb7af294d5d9 73 "LPC11U24": {
Simon Cooksey 0:fb7af294d5d9 74 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 75 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 76 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Simon Cooksey 0:fb7af294d5d9 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 79 "detect_code": ["1040"],
Simon Cooksey 0:fb7af294d5d9 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 81 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 82 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 83 "device_name": "LPC11U24FBD48/401"
Simon Cooksey 0:fb7af294d5d9 84 },
Simon Cooksey 0:fb7af294d5d9 85 "OC_MBUINO": {
Simon Cooksey 0:fb7af294d5d9 86 "inherits": ["LPC11U24"],
Simon Cooksey 0:fb7af294d5d9 87 "macros": ["TARGET_LPC11U24"],
Simon Cooksey 0:fb7af294d5d9 88 "extra_labels": ["NXP", "LPC11UXX"],
Simon Cooksey 0:fb7af294d5d9 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 90 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 91 },
Simon Cooksey 0:fb7af294d5d9 92 "LPC11U24_301": {
Simon Cooksey 0:fb7af294d5d9 93 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 94 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 95 "extra_labels": ["NXP", "LPC11UXX"],
Simon Cooksey 0:fb7af294d5d9 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 98 "device_name": "LPC11U24FHI33/301"
Simon Cooksey 0:fb7af294d5d9 99 },
Simon Cooksey 0:fb7af294d5d9 100 "LPC11U34_421": {
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Simon Cooksey 0:fb7af294d5d9 102 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 103 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 104 "extra_labels": ["NXP", "LPC11UXX"],
Simon Cooksey 0:fb7af294d5d9 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Simon Cooksey 0:fb7af294d5d9 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 107 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 108 "device_name": "LPC11U34FBD48/311"
Simon Cooksey 0:fb7af294d5d9 109 },
Simon Cooksey 0:fb7af294d5d9 110 "MICRONFCBOARD": {
Simon Cooksey 0:fb7af294d5d9 111 "inherits": ["LPC11U34_421"],
Simon Cooksey 0:fb7af294d5d9 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Simon Cooksey 0:fb7af294d5d9 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Simon Cooksey 0:fb7af294d5d9 114 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 115 "device_name": "LPC11U34FBD48/311"
Simon Cooksey 0:fb7af294d5d9 116 },
Simon Cooksey 0:fb7af294d5d9 117 "LPC11U35_401": {
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Simon Cooksey 0:fb7af294d5d9 119 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 120 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 121 "extra_labels": ["NXP", "LPC11UXX"],
Simon Cooksey 0:fb7af294d5d9 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 124 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 125 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 126 "device_name": "LPC11U35FBD48/401"
Simon Cooksey 0:fb7af294d5d9 127 },
Simon Cooksey 0:fb7af294d5d9 128 "LPC11U35_501": {
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Simon Cooksey 0:fb7af294d5d9 130 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 131 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Simon Cooksey 0:fb7af294d5d9 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 135 "default_lib": "small",
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Simon Cooksey 0:fb7af294d5d9 137 "device_name": "LPC11U35FHI33/501"
Simon Cooksey 0:fb7af294d5d9 138 },
Simon Cooksey 0:fb7af294d5d9 139 "LPC11U35_501_IBDAP": {
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Simon Cooksey 0:fb7af294d5d9 141 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 142 "default_toolchain": "uARM",
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Simon Cooksey 0:fb7af294d5d9 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
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Simon Cooksey 0:fb7af294d5d9 148 },
Simon Cooksey 0:fb7af294d5d9 149 "XADOW_M0": {
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Simon Cooksey 0:fb7af294d5d9 151 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 152 "default_toolchain": "uARM",
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Simon Cooksey 0:fb7af294d5d9 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
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Simon Cooksey 0:fb7af294d5d9 158 "device_name": "LPC11U35FHI33/501"
Simon Cooksey 0:fb7af294d5d9 159 },
Simon Cooksey 0:fb7af294d5d9 160 "LPC11U35_Y5_MBUG": {
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Simon Cooksey 0:fb7af294d5d9 162 "core": "Cortex-M0",
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Simon Cooksey 0:fb7af294d5d9 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 167 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 168 "device_name": "LPC11U35FHI33/501"
Simon Cooksey 0:fb7af294d5d9 169 },
Simon Cooksey 0:fb7af294d5d9 170 "LPC11U37_501": {
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Simon Cooksey 0:fb7af294d5d9 172 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 173 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 174 "extra_labels": ["NXP", "LPC11UXX"],
Simon Cooksey 0:fb7af294d5d9 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 176 "default_lib": "small",
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Simon Cooksey 0:fb7af294d5d9 178 },
Simon Cooksey 0:fb7af294d5d9 179 "LPCCAPPUCCINO": {
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Simon Cooksey 0:fb7af294d5d9 182 "device_name": "LPC11U37FBD64/501"
Simon Cooksey 0:fb7af294d5d9 183 },
Simon Cooksey 0:fb7af294d5d9 184 "ARCH_GPRS": {
Simon Cooksey 0:fb7af294d5d9 185 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 186 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 187 "default_toolchain": "uARM",
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Simon Cooksey 0:fb7af294d5d9 194 "device_name": "LPC11U37FBD64/501"
Simon Cooksey 0:fb7af294d5d9 195 },
Simon Cooksey 0:fb7af294d5d9 196 "LPC11U68": {
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Simon Cooksey 0:fb7af294d5d9 198 "core": "Cortex-M0+",
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Simon Cooksey 0:fb7af294d5d9 207 "device_name": "LPC11U68JBD100"
Simon Cooksey 0:fb7af294d5d9 208 },
Simon Cooksey 0:fb7af294d5d9 209 "LPC1347": {
Simon Cooksey 0:fb7af294d5d9 210 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 211 "core": "Cortex-M3",
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Simon Cooksey 0:fb7af294d5d9 215 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 216 "device_name": "LPC1347FBD48"
Simon Cooksey 0:fb7af294d5d9 217 },
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Simon Cooksey 0:fb7af294d5d9 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 224 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 225 "detect_code": ["1549"],
Simon Cooksey 0:fb7af294d5d9 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 227 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 228 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 229 "device_name": "lpc1549"
Simon Cooksey 0:fb7af294d5d9 230 },
Simon Cooksey 0:fb7af294d5d9 231 "LPC1768": {
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Simon Cooksey 0:fb7af294d5d9 233 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Simon Cooksey 0:fb7af294d5d9 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 236 "detect_code": ["1010"],
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Simon Cooksey 0:fb7af294d5d9 238 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 239 "features": ["LWIP"],
Simon Cooksey 0:fb7af294d5d9 240 "device_name": "LPC1768"
Simon Cooksey 0:fb7af294d5d9 241 },
Simon Cooksey 0:fb7af294d5d9 242 "ARCH_PRO": {
Simon Cooksey 0:fb7af294d5d9 243 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 244 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Simon Cooksey 0:fb7af294d5d9 246 "extra_labels": ["NXP", "LPC176X"],
Simon Cooksey 0:fb7af294d5d9 247 "macros": ["TARGET_LPC1768"],
Simon Cooksey 0:fb7af294d5d9 248 "inherits": ["LPCTarget"],
Simon Cooksey 0:fb7af294d5d9 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 250 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 251 "features": ["LWIP"],
Simon Cooksey 0:fb7af294d5d9 252 "device_name": "LPC1768"
Simon Cooksey 0:fb7af294d5d9 253 },
Simon Cooksey 0:fb7af294d5d9 254 "UBLOX_C027": {
Simon Cooksey 0:fb7af294d5d9 255 "supported_form_factors": ["ARDUINO"],
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Simon Cooksey 0:fb7af294d5d9 1296 "core": "Cortex-M0",
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Simon Cooksey 0:fb7af294d5d9 1316 },
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Simon Cooksey 0:fb7af294d5d9 1326 },
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Simon Cooksey 0:fb7af294d5d9 1331 }
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Simon Cooksey 0:fb7af294d5d9 1334 "post_binary_hook": {
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Simon Cooksey 0:fb7af294d5d9 1339 "features": ["BLE"],
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Simon Cooksey 0:fb7af294d5d9 1366 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
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Simon Cooksey 0:fb7af294d5d9 1368 },
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Simon Cooksey 0:fb7af294d5d9 1371 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
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Simon Cooksey 0:fb7af294d5d9 1377 },
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Simon Cooksey 0:fb7af294d5d9 1382 }
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Simon Cooksey 0:fb7af294d5d9 1385 },
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Simon Cooksey 0:fb7af294d5d9 1388 "public": false
Simon Cooksey 0:fb7af294d5d9 1389 },
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Simon Cooksey 0:fb7af294d5d9 1393 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
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Simon Cooksey 0:fb7af294d5d9 1395 },
Simon Cooksey 0:fb7af294d5d9 1396 "MCU_NRF51_16K_BOOT_S110": {
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Simon Cooksey 0:fb7af294d5d9 1399 },
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Simon Cooksey 0:fb7af294d5d9 1403 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
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Simon Cooksey 0:fb7af294d5d9 1405 },
Simon Cooksey 0:fb7af294d5d9 1406 "MCU_NRF51_16K_OTA_S110": {
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Simon Cooksey 0:fb7af294d5d9 1408 "public": false
Simon Cooksey 0:fb7af294d5d9 1409 },
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Simon Cooksey 0:fb7af294d5d9 1412 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Simon Cooksey 0:fb7af294d5d9 1413 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
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Simon Cooksey 0:fb7af294d5d9 1415 },
Simon Cooksey 0:fb7af294d5d9 1416 "MCU_NRF51_32K_BOOT": {
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Simon Cooksey 0:fb7af294d5d9 1418 "MERGE_BOOTLOADER": true,
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Simon Cooksey 0:fb7af294d5d9 1420 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
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Simon Cooksey 0:fb7af294d5d9 1422 },
Simon Cooksey 0:fb7af294d5d9 1423 "MCU_NRF51_32K_OTA": {
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Simon Cooksey 0:fb7af294d5d9 1426 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Simon Cooksey 0:fb7af294d5d9 1427 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Simon Cooksey 0:fb7af294d5d9 1428 "MERGE_SOFT_DEVICE": false
Simon Cooksey 0:fb7af294d5d9 1429 },
Simon Cooksey 0:fb7af294d5d9 1430 "NRF51822": {
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Simon Cooksey 0:fb7af294d5d9 1699 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Simon Cooksey 0:fb7af294d5d9 1700 "macros": ["CMSDK_CM0plus"],
Simon Cooksey 0:fb7af294d5d9 1701 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Simon Cooksey 0:fb7af294d5d9 1702 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 1703 },
Simon Cooksey 0:fb7af294d5d9 1704 "ARM_MPS2_M1": {
Simon Cooksey 0:fb7af294d5d9 1705 "inherits": ["ARM_MPS2_Target"],
Simon Cooksey 0:fb7af294d5d9 1706 "core": "Cortex-M1",
Simon Cooksey 0:fb7af294d5d9 1707 "supported_toolchains": ["ARM"],
Simon Cooksey 0:fb7af294d5d9 1708 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Simon Cooksey 0:fb7af294d5d9 1709 "macros": ["CMSDK_CM1"],
Simon Cooksey 0:fb7af294d5d9 1710 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Simon Cooksey 0:fb7af294d5d9 1711 },
Simon Cooksey 0:fb7af294d5d9 1712 "ARM_MPS2_M3": {
Simon Cooksey 0:fb7af294d5d9 1713 "inherits": ["ARM_MPS2_Target"],
Simon Cooksey 0:fb7af294d5d9 1714 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1715 "supported_toolchains": ["ARM"],
Simon Cooksey 0:fb7af294d5d9 1716 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Simon Cooksey 0:fb7af294d5d9 1717 "macros": ["CMSDK_CM3"],
Simon Cooksey 0:fb7af294d5d9 1718 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Simon Cooksey 0:fb7af294d5d9 1719 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 1720 },
Simon Cooksey 0:fb7af294d5d9 1721 "ARM_MPS2_M4": {
Simon Cooksey 0:fb7af294d5d9 1722 "inherits": ["ARM_MPS2_Target"],
Simon Cooksey 0:fb7af294d5d9 1723 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 1724 "supported_toolchains": ["ARM"],
Simon Cooksey 0:fb7af294d5d9 1725 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Simon Cooksey 0:fb7af294d5d9 1726 "macros": ["CMSDK_CM4"],
Simon Cooksey 0:fb7af294d5d9 1727 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Simon Cooksey 0:fb7af294d5d9 1728 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 1729 },
Simon Cooksey 0:fb7af294d5d9 1730 "ARM_MPS2_M7": {
Simon Cooksey 0:fb7af294d5d9 1731 "inherits": ["ARM_MPS2_Target"],
Simon Cooksey 0:fb7af294d5d9 1732 "core": "Cortex-M7",
Simon Cooksey 0:fb7af294d5d9 1733 "supported_toolchains": ["ARM"],
Simon Cooksey 0:fb7af294d5d9 1734 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Simon Cooksey 0:fb7af294d5d9 1735 "macros": ["CMSDK_CM7"],
Simon Cooksey 0:fb7af294d5d9 1736 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Simon Cooksey 0:fb7af294d5d9 1737 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 1738 },
Simon Cooksey 0:fb7af294d5d9 1739 "ARM_IOTSS_Target": {
Simon Cooksey 0:fb7af294d5d9 1740 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1741 "public": false,
Simon Cooksey 0:fb7af294d5d9 1742 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Simon Cooksey 0:fb7af294d5d9 1743 },
Simon Cooksey 0:fb7af294d5d9 1744 "ARM_IOTSS_BEID": {
Simon Cooksey 0:fb7af294d5d9 1745 "inherits": ["ARM_IOTSS_Target"],
Simon Cooksey 0:fb7af294d5d9 1746 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1747 "supported_toolchains": ["ARM"],
Simon Cooksey 0:fb7af294d5d9 1748 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Simon Cooksey 0:fb7af294d5d9 1749 "macros": ["CMSDK_BEID"],
Simon Cooksey 0:fb7af294d5d9 1750 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Simon Cooksey 0:fb7af294d5d9 1751 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 1752 },
Simon Cooksey 0:fb7af294d5d9 1753 "ARM_BEETLE_SOC": {
Simon Cooksey 0:fb7af294d5d9 1754 "inherits": ["ARM_IOTSS_Target"],
Simon Cooksey 0:fb7af294d5d9 1755 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1756 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1757 "default_toolchain": "ARM",
Simon Cooksey 0:fb7af294d5d9 1758 "extra_labels": ["ARM_SSG", "BEETLE"],
Simon Cooksey 0:fb7af294d5d9 1759 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Simon Cooksey 0:fb7af294d5d9 1760 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Simon Cooksey 0:fb7af294d5d9 1761 "features": ["BLE"],
Simon Cooksey 0:fb7af294d5d9 1762 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1763 "device_name": "beetle"
Simon Cooksey 0:fb7af294d5d9 1764 },
Simon Cooksey 0:fb7af294d5d9 1765 "RZ_A1H": {
Simon Cooksey 0:fb7af294d5d9 1766 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 1767 "core": "Cortex-A9",
Simon Cooksey 0:fb7af294d5d9 1768 "program_cycle_s": 2,
Simon Cooksey 0:fb7af294d5d9 1769 "extra_labels": ["RENESAS", "MBRZA1H"],
Simon Cooksey 0:fb7af294d5d9 1770 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1771 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1772 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1773 "features": ["LWIP"],
Simon Cooksey 0:fb7af294d5d9 1774 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1775 "device_name": "r7s721001"
Simon Cooksey 0:fb7af294d5d9 1776 },
Simon Cooksey 0:fb7af294d5d9 1777 "VK_RZ_A1H": {
Simon Cooksey 0:fb7af294d5d9 1778 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1779 "core": "Cortex-A9",
Simon Cooksey 0:fb7af294d5d9 1780 "extra_labels": ["RENESAS", "VKRZA1H"],
Simon Cooksey 0:fb7af294d5d9 1781 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1782 "default_toolchain": "ARM",
Simon Cooksey 0:fb7af294d5d9 1783 "program_cycle_s": 2,
Simon Cooksey 0:fb7af294d5d9 1784 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1785 "features": ["LWIP"],
Simon Cooksey 0:fb7af294d5d9 1786 "default_lib": "std",
Simon Cooksey 0:fb7af294d5d9 1787 "release_versions": ["2", "5"]
Simon Cooksey 0:fb7af294d5d9 1788 },
Simon Cooksey 0:fb7af294d5d9 1789 "MAXWSNENV": {
Simon Cooksey 0:fb7af294d5d9 1790 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1791 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1792 "macros": ["__SYSTEM_HFX=24000000"],
Simon Cooksey 0:fb7af294d5d9 1793 "extra_labels": ["Maxim", "MAX32610"],
Simon Cooksey 0:fb7af294d5d9 1794 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Simon Cooksey 0:fb7af294d5d9 1795 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1796 "features": ["BLE"],
Simon Cooksey 0:fb7af294d5d9 1797 "release_versions": ["2", "5"]
Simon Cooksey 0:fb7af294d5d9 1798 },
Simon Cooksey 0:fb7af294d5d9 1799 "MAX32600MBED": {
Simon Cooksey 0:fb7af294d5d9 1800 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1801 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1802 "macros": ["__SYSTEM_HFX=24000000"],
Simon Cooksey 0:fb7af294d5d9 1803 "extra_labels": ["Maxim", "MAX32600"],
Simon Cooksey 0:fb7af294d5d9 1804 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Simon Cooksey 0:fb7af294d5d9 1805 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1806 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1807 "device_name": "max326000x85"
Simon Cooksey 0:fb7af294d5d9 1808 },
Simon Cooksey 0:fb7af294d5d9 1809 "MAX32620HSP": {
Simon Cooksey 0:fb7af294d5d9 1810 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1811 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 1812 "extra_labels": ["Maxim", "MAX32620"],
Simon Cooksey 0:fb7af294d5d9 1813 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Simon Cooksey 0:fb7af294d5d9 1814 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1815 "features": ["BLE"],
Simon Cooksey 0:fb7af294d5d9 1816 "release_versions": ["2", "5"]
Simon Cooksey 0:fb7af294d5d9 1817 },
Simon Cooksey 0:fb7af294d5d9 1818 "EFM32": {
Simon Cooksey 0:fb7af294d5d9 1819 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 1820 "extra_labels": ["Silicon_Labs", "EFM32"],
Simon Cooksey 0:fb7af294d5d9 1821 "public": false
Simon Cooksey 0:fb7af294d5d9 1822 },
Simon Cooksey 0:fb7af294d5d9 1823 "EFM32GG990F1024": {
Simon Cooksey 0:fb7af294d5d9 1824 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 1825 "extra_labels_add": ["EFM32GG", "1024K"],
Simon Cooksey 0:fb7af294d5d9 1826 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1827 "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Simon Cooksey 0:fb7af294d5d9 1828 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1829 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1830 "device_name": "EFM32GG990F1024",
Simon Cooksey 0:fb7af294d5d9 1831 "public": false
Simon Cooksey 0:fb7af294d5d9 1832 },
Simon Cooksey 0:fb7af294d5d9 1833 "EFM32GG_STK3700": {
Simon Cooksey 0:fb7af294d5d9 1834 "inherits": ["EFM32GG990F1024"],
Simon Cooksey 0:fb7af294d5d9 1835 "progen": {"target": "efm32gg-stk"},
Simon Cooksey 0:fb7af294d5d9 1836 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1837 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 1838 "config": {
Simon Cooksey 0:fb7af294d5d9 1839 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1840 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1841 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 1842 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1843 },
Simon Cooksey 0:fb7af294d5d9 1844 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1845 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1846 "value": "48000000",
Simon Cooksey 0:fb7af294d5d9 1847 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1848 },
Simon Cooksey 0:fb7af294d5d9 1849 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1850 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1851 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 1852 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1853 },
Simon Cooksey 0:fb7af294d5d9 1854 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1855 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1856 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 1857 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1858 },
Simon Cooksey 0:fb7af294d5d9 1859 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1860 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 1861 "value": "21000000",
Simon Cooksey 0:fb7af294d5d9 1862 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1863 },
Simon Cooksey 0:fb7af294d5d9 1864 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 1865 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 1866 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Simon Cooksey 0:fb7af294d5d9 1867 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 1868 }
Simon Cooksey 0:fb7af294d5d9 1869 }
Simon Cooksey 0:fb7af294d5d9 1870 },
Simon Cooksey 0:fb7af294d5d9 1871 "EFM32LG990F256": {
Simon Cooksey 0:fb7af294d5d9 1872 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 1873 "extra_labels_add": ["EFM32LG", "256K"],
Simon Cooksey 0:fb7af294d5d9 1874 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 1875 "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Simon Cooksey 0:fb7af294d5d9 1876 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1877 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1878 "device_name": "EFM32LG990F256",
Simon Cooksey 0:fb7af294d5d9 1879 "public": false
Simon Cooksey 0:fb7af294d5d9 1880 },
Simon Cooksey 0:fb7af294d5d9 1881 "EFM32LG_STK3600": {
Simon Cooksey 0:fb7af294d5d9 1882 "inherits": ["EFM32LG990F256"],
Simon Cooksey 0:fb7af294d5d9 1883 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1884 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 1885 "device_name": "EFM32LG990F256",
Simon Cooksey 0:fb7af294d5d9 1886 "config": {
Simon Cooksey 0:fb7af294d5d9 1887 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1888 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1889 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 1890 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1891 },
Simon Cooksey 0:fb7af294d5d9 1892 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1893 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1894 "value": "48000000",
Simon Cooksey 0:fb7af294d5d9 1895 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1896 },
Simon Cooksey 0:fb7af294d5d9 1897 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1898 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1899 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 1900 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1901 },
Simon Cooksey 0:fb7af294d5d9 1902 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1903 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1904 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 1905 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1906 },
Simon Cooksey 0:fb7af294d5d9 1907 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1908 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 1909 "value": "21000000",
Simon Cooksey 0:fb7af294d5d9 1910 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1911 },
Simon Cooksey 0:fb7af294d5d9 1912 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 1913 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 1914 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Simon Cooksey 0:fb7af294d5d9 1915 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 1916 }
Simon Cooksey 0:fb7af294d5d9 1917 }
Simon Cooksey 0:fb7af294d5d9 1918 },
Simon Cooksey 0:fb7af294d5d9 1919 "EFM32WG990F256": {
Simon Cooksey 0:fb7af294d5d9 1920 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 1921 "extra_labels_add": ["EFM32WG", "256K"],
Simon Cooksey 0:fb7af294d5d9 1922 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 1923 "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Simon Cooksey 0:fb7af294d5d9 1924 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1925 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 1926 "device_name": "EFM32WG990F256",
Simon Cooksey 0:fb7af294d5d9 1927 "public": false
Simon Cooksey 0:fb7af294d5d9 1928 },
Simon Cooksey 0:fb7af294d5d9 1929 "EFM32WG_STK3800": {
Simon Cooksey 0:fb7af294d5d9 1930 "inherits": ["EFM32WG990F256"],
Simon Cooksey 0:fb7af294d5d9 1931 "progen": {"target": "efm32wg-stk"},
Simon Cooksey 0:fb7af294d5d9 1932 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1933 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 1934 "config": {
Simon Cooksey 0:fb7af294d5d9 1935 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1936 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1937 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 1938 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1939 },
Simon Cooksey 0:fb7af294d5d9 1940 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1941 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1942 "value": "48000000",
Simon Cooksey 0:fb7af294d5d9 1943 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1944 },
Simon Cooksey 0:fb7af294d5d9 1945 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1946 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1947 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 1948 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1949 },
Simon Cooksey 0:fb7af294d5d9 1950 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1951 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1952 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 1953 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1954 },
Simon Cooksey 0:fb7af294d5d9 1955 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1956 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 1957 "value": "21000000",
Simon Cooksey 0:fb7af294d5d9 1958 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1959 },
Simon Cooksey 0:fb7af294d5d9 1960 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 1961 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 1962 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Simon Cooksey 0:fb7af294d5d9 1963 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 1964 }
Simon Cooksey 0:fb7af294d5d9 1965 }
Simon Cooksey 0:fb7af294d5d9 1966 },
Simon Cooksey 0:fb7af294d5d9 1967 "EFM32ZG222F32": {
Simon Cooksey 0:fb7af294d5d9 1968 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 1969 "extra_labels_add": ["EFM32ZG", "32K"],
Simon Cooksey 0:fb7af294d5d9 1970 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 1971 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 1972 "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Simon Cooksey 0:fb7af294d5d9 1973 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 1974 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 1975 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 1976 "device_name": "EFM32ZG222F32",
Simon Cooksey 0:fb7af294d5d9 1977 "public": false
Simon Cooksey 0:fb7af294d5d9 1978 },
Simon Cooksey 0:fb7af294d5d9 1979 "EFM32ZG_STK3200": {
Simon Cooksey 0:fb7af294d5d9 1980 "inherits": ["EFM32ZG222F32"],
Simon Cooksey 0:fb7af294d5d9 1981 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 1982 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 1983 "config": {
Simon Cooksey 0:fb7af294d5d9 1984 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1985 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1986 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 1987 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1988 },
Simon Cooksey 0:fb7af294d5d9 1989 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 1990 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 1991 "value": "24000000",
Simon Cooksey 0:fb7af294d5d9 1992 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 1993 },
Simon Cooksey 0:fb7af294d5d9 1994 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 1995 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 1996 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 1997 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 1998 },
Simon Cooksey 0:fb7af294d5d9 1999 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2000 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 2001 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 2002 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2003 },
Simon Cooksey 0:fb7af294d5d9 2004 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2005 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 2006 "value": "21000000",
Simon Cooksey 0:fb7af294d5d9 2007 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2008 },
Simon Cooksey 0:fb7af294d5d9 2009 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 2010 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 2011 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Simon Cooksey 0:fb7af294d5d9 2012 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 2013 }
Simon Cooksey 0:fb7af294d5d9 2014 }
Simon Cooksey 0:fb7af294d5d9 2015 },
Simon Cooksey 0:fb7af294d5d9 2016 "EFM32HG322F64": {
Simon Cooksey 0:fb7af294d5d9 2017 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 2018 "extra_labels_add": ["EFM32HG", "64K"],
Simon Cooksey 0:fb7af294d5d9 2019 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 2020 "default_toolchain": "uARM",
Simon Cooksey 0:fb7af294d5d9 2021 "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Simon Cooksey 0:fb7af294d5d9 2022 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2023 "default_lib": "small",
Simon Cooksey 0:fb7af294d5d9 2024 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 2025 "device_name": "EFM32HG322F64",
Simon Cooksey 0:fb7af294d5d9 2026 "public": false
Simon Cooksey 0:fb7af294d5d9 2027 },
Simon Cooksey 0:fb7af294d5d9 2028 "EFM32HG_STK3400": {
Simon Cooksey 0:fb7af294d5d9 2029 "inherits": ["EFM32HG322F64"],
Simon Cooksey 0:fb7af294d5d9 2030 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 2031 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 2032 "config": {
Simon Cooksey 0:fb7af294d5d9 2033 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2034 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 2035 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 2036 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 2037 },
Simon Cooksey 0:fb7af294d5d9 2038 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2039 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 2040 "value": "24000000",
Simon Cooksey 0:fb7af294d5d9 2041 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2042 },
Simon Cooksey 0:fb7af294d5d9 2043 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2044 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 2045 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 2046 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 2047 },
Simon Cooksey 0:fb7af294d5d9 2048 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2049 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 2050 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 2051 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2052 },
Simon Cooksey 0:fb7af294d5d9 2053 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2054 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 2055 "value": "21000000",
Simon Cooksey 0:fb7af294d5d9 2056 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2057 },
Simon Cooksey 0:fb7af294d5d9 2058 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 2059 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 2060 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Simon Cooksey 0:fb7af294d5d9 2061 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 2062 }
Simon Cooksey 0:fb7af294d5d9 2063 }
Simon Cooksey 0:fb7af294d5d9 2064 },
Simon Cooksey 0:fb7af294d5d9 2065 "EFM32PG1B100F256GM32": {
Simon Cooksey 0:fb7af294d5d9 2066 "inherits": ["EFM32"],
Simon Cooksey 0:fb7af294d5d9 2067 "extra_labels_add": ["EFM32PG", "256K"],
Simon Cooksey 0:fb7af294d5d9 2068 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 2069 "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Simon Cooksey 0:fb7af294d5d9 2070 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2071 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 2072 "device_name": "EFM32PG1B100F256GM32",
Simon Cooksey 0:fb7af294d5d9 2073 "public": false
Simon Cooksey 0:fb7af294d5d9 2074 },
Simon Cooksey 0:fb7af294d5d9 2075 "EFM32PG_STK3401": {
Simon Cooksey 0:fb7af294d5d9 2076 "inherits": ["EFM32PG1B100F256GM32"],
Simon Cooksey 0:fb7af294d5d9 2077 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 2078 "forced_reset_timeout": 2,
Simon Cooksey 0:fb7af294d5d9 2079 "config": {
Simon Cooksey 0:fb7af294d5d9 2080 "hf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2081 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Simon Cooksey 0:fb7af294d5d9 2082 "value": "HFXO",
Simon Cooksey 0:fb7af294d5d9 2083 "macro_name": "CORE_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 2084 },
Simon Cooksey 0:fb7af294d5d9 2085 "hfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2086 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 2087 "value": "40000000",
Simon Cooksey 0:fb7af294d5d9 2088 "macro_name": "HFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2089 },
Simon Cooksey 0:fb7af294d5d9 2090 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2091 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Simon Cooksey 0:fb7af294d5d9 2092 "value": "LFXO",
Simon Cooksey 0:fb7af294d5d9 2093 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Simon Cooksey 0:fb7af294d5d9 2094 },
Simon Cooksey 0:fb7af294d5d9 2095 "lfxo_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2096 "help": "Value: External crystal frequency in hertz",
Simon Cooksey 0:fb7af294d5d9 2097 "value": "32768",
Simon Cooksey 0:fb7af294d5d9 2098 "macro_name": "LFXO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2099 },
Simon Cooksey 0:fb7af294d5d9 2100 "hfrco_clock_freq": {
Simon Cooksey 0:fb7af294d5d9 2101 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Simon Cooksey 0:fb7af294d5d9 2102 "value": "32000000",
Simon Cooksey 0:fb7af294d5d9 2103 "macro_name": "HFRCO_FREQUENCY"
Simon Cooksey 0:fb7af294d5d9 2104 },
Simon Cooksey 0:fb7af294d5d9 2105 "hfrco_band_select": {
Simon Cooksey 0:fb7af294d5d9 2106 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
Simon Cooksey 0:fb7af294d5d9 2107 "value": "cmuHFRCOFreq_32M0Hz",
Simon Cooksey 0:fb7af294d5d9 2108 "macro_name": "HFRCO_FREQUENCY_ENUM"
Simon Cooksey 0:fb7af294d5d9 2109 }
Simon Cooksey 0:fb7af294d5d9 2110 }
Simon Cooksey 0:fb7af294d5d9 2111 },
Simon Cooksey 0:fb7af294d5d9 2112 "WIZWIKI_W7500": {
Simon Cooksey 0:fb7af294d5d9 2113 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 2114 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 2115 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Simon Cooksey 0:fb7af294d5d9 2116 "supported_toolchains": ["uARM", "ARM"],
Simon Cooksey 0:fb7af294d5d9 2117 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2118 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 2119 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 2120 },
Simon Cooksey 0:fb7af294d5d9 2121 "WIZWIKI_W7500P": {
Simon Cooksey 0:fb7af294d5d9 2122 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 2123 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 2124 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Simon Cooksey 0:fb7af294d5d9 2125 "supported_toolchains": ["uARM", "ARM"],
Simon Cooksey 0:fb7af294d5d9 2126 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2127 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 2128 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 2129 },
Simon Cooksey 0:fb7af294d5d9 2130 "WIZWIKI_W7500ECO": {
Simon Cooksey 0:fb7af294d5d9 2131 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2132 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 2133 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Simon Cooksey 0:fb7af294d5d9 2134 "supported_toolchains": ["uARM", "ARM"],
Simon Cooksey 0:fb7af294d5d9 2135 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Simon Cooksey 0:fb7af294d5d9 2136 "release_versions": ["2"]
Simon Cooksey 0:fb7af294d5d9 2137 },
Simon Cooksey 0:fb7af294d5d9 2138 "SAMR21G18A": {
Simon Cooksey 0:fb7af294d5d9 2139 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2140 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 2141 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Simon Cooksey 0:fb7af294d5d9 2142 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Simon Cooksey 0:fb7af294d5d9 2143 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Simon Cooksey 0:fb7af294d5d9 2144 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Simon Cooksey 0:fb7af294d5d9 2145 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 2146 "device_name": "ATSAMR21G18A"
Simon Cooksey 0:fb7af294d5d9 2147 },
Simon Cooksey 0:fb7af294d5d9 2148 "SAMD21J18A": {
Simon Cooksey 0:fb7af294d5d9 2149 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2150 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 2151 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Simon Cooksey 0:fb7af294d5d9 2152 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Simon Cooksey 0:fb7af294d5d9 2153 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Simon Cooksey 0:fb7af294d5d9 2154 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Simon Cooksey 0:fb7af294d5d9 2155 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 2156 "device_name" : "ATSAMD21J18A"
Simon Cooksey 0:fb7af294d5d9 2157 },
Simon Cooksey 0:fb7af294d5d9 2158 "SAMD21G18A": {
Simon Cooksey 0:fb7af294d5d9 2159 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2160 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 2161 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Simon Cooksey 0:fb7af294d5d9 2162 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Simon Cooksey 0:fb7af294d5d9 2163 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Simon Cooksey 0:fb7af294d5d9 2164 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Simon Cooksey 0:fb7af294d5d9 2165 "release_versions": ["2"],
Simon Cooksey 0:fb7af294d5d9 2166 "device_name": "ATSAMD21G18A"
Simon Cooksey 0:fb7af294d5d9 2167 },
Simon Cooksey 0:fb7af294d5d9 2168 "SAML21J18A": {
Simon Cooksey 0:fb7af294d5d9 2169 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2170 "core": "Cortex-M0+",
Simon Cooksey 0:fb7af294d5d9 2171 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Simon Cooksey 0:fb7af294d5d9 2172 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Simon Cooksey 0:fb7af294d5d9 2173 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Simon Cooksey 0:fb7af294d5d9 2174 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Simon Cooksey 0:fb7af294d5d9 2175 "device_name": "ATSAML21J18A"
Simon Cooksey 0:fb7af294d5d9 2176 },
Simon Cooksey 0:fb7af294d5d9 2177 "SAMG55J19": {
Simon Cooksey 0:fb7af294d5d9 2178 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2179 "core": "Cortex-M4",
Simon Cooksey 0:fb7af294d5d9 2180 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Simon Cooksey 0:fb7af294d5d9 2181 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Simon Cooksey 0:fb7af294d5d9 2182 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Simon Cooksey 0:fb7af294d5d9 2183 "default_toolchain": "ARM",
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Simon Cooksey 0:fb7af294d5d9 2185 "default_lib": "std",
Simon Cooksey 0:fb7af294d5d9 2186 "device_name": "ATSAMG55J19"
Simon Cooksey 0:fb7af294d5d9 2187 },
Simon Cooksey 0:fb7af294d5d9 2188 "MCU_NRF51_UNIFIED": {
Simon Cooksey 0:fb7af294d5d9 2189 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2190 "core": "Cortex-M0",
Simon Cooksey 0:fb7af294d5d9 2191 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Simon Cooksey 0:fb7af294d5d9 2192 "macros": [
Simon Cooksey 0:fb7af294d5d9 2193 "NRF51",
Simon Cooksey 0:fb7af294d5d9 2194 "TARGET_NRF51822",
Simon Cooksey 0:fb7af294d5d9 2195 "BLE_STACK_SUPPORT_REQD",
Simon Cooksey 0:fb7af294d5d9 2196 "SOFTDEVICE_PRESENT",
Simon Cooksey 0:fb7af294d5d9 2197 "S130",
Simon Cooksey 0:fb7af294d5d9 2198 "TARGET_MCU_NRF51822"
Simon Cooksey 0:fb7af294d5d9 2199 ],
Simon Cooksey 0:fb7af294d5d9 2200 "MERGE_BOOTLOADER": false,
Simon Cooksey 0:fb7af294d5d9 2201 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Simon Cooksey 0:fb7af294d5d9 2202 "OUTPUT_EXT": "hex",
Simon Cooksey 0:fb7af294d5d9 2203 "is_disk_virtual": true,
Simon Cooksey 0:fb7af294d5d9 2204 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2205 "public": false,
Simon Cooksey 0:fb7af294d5d9 2206 "MERGE_SOFT_DEVICE": true,
Simon Cooksey 0:fb7af294d5d9 2207 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Simon Cooksey 0:fb7af294d5d9 2208 {
Simon Cooksey 0:fb7af294d5d9 2209 "boot": "",
Simon Cooksey 0:fb7af294d5d9 2210 "name": "s130_nrf51_2.0.0_softdevice.hex",
Simon Cooksey 0:fb7af294d5d9 2211 "offset": 110592
Simon Cooksey 0:fb7af294d5d9 2212 }
Simon Cooksey 0:fb7af294d5d9 2213 ],
Simon Cooksey 0:fb7af294d5d9 2214 "detect_code": ["1070"],
Simon Cooksey 0:fb7af294d5d9 2215 "post_binary_hook": {
Simon Cooksey 0:fb7af294d5d9 2216 "function": "MCU_NRF51Code.binary_hook",
Simon Cooksey 0:fb7af294d5d9 2217 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Simon Cooksey 0:fb7af294d5d9 2218 },
Simon Cooksey 0:fb7af294d5d9 2219 "program_cycle_s": 6,
Simon Cooksey 0:fb7af294d5d9 2220 "features": ["BLE"],
Simon Cooksey 0:fb7af294d5d9 2221 "config": {
Simon Cooksey 0:fb7af294d5d9 2222 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2223 "value": "NRF_LF_SRC_XTAL",
Simon Cooksey 0:fb7af294d5d9 2224 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Simon Cooksey 0:fb7af294d5d9 2225 },
Simon Cooksey 0:fb7af294d5d9 2226 "uart_hwfc": {
Simon Cooksey 0:fb7af294d5d9 2227 "help": "Value: 1 for enable, 0 for disable",
Simon Cooksey 0:fb7af294d5d9 2228 "value": 1,
Simon Cooksey 0:fb7af294d5d9 2229 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Simon Cooksey 0:fb7af294d5d9 2230 }
Simon Cooksey 0:fb7af294d5d9 2231 },
Simon Cooksey 0:fb7af294d5d9 2232 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Simon Cooksey 0:fb7af294d5d9 2233 },
Simon Cooksey 0:fb7af294d5d9 2234 "MCU_NRF51_32K_UNIFIED": {
Simon Cooksey 0:fb7af294d5d9 2235 "inherits": ["MCU_NRF51_UNIFIED"],
Simon Cooksey 0:fb7af294d5d9 2236 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Simon Cooksey 0:fb7af294d5d9 2237 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Simon Cooksey 0:fb7af294d5d9 2238 "public": false
Simon Cooksey 0:fb7af294d5d9 2239 },
Simon Cooksey 0:fb7af294d5d9 2240 "NRF51_DK": {
Simon Cooksey 0:fb7af294d5d9 2241 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 2242 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Simon Cooksey 0:fb7af294d5d9 2243 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 2244 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 2245 "device_name": "nRF51822_xxAA"
Simon Cooksey 0:fb7af294d5d9 2246 },
Simon Cooksey 0:fb7af294d5d9 2247 "NRF51_DONGLE": {
Simon Cooksey 0:fb7af294d5d9 2248 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Simon Cooksey 0:fb7af294d5d9 2249 "progen": {"target": "nrf51-dongle"},
Simon Cooksey 0:fb7af294d5d9 2250 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 2251 "release_versions": ["2", "5"]
Simon Cooksey 0:fb7af294d5d9 2252 },
Simon Cooksey 0:fb7af294d5d9 2253 "MCU_NRF52": {
Simon Cooksey 0:fb7af294d5d9 2254 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2255 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 2256 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Simon Cooksey 0:fb7af294d5d9 2257 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Simon Cooksey 0:fb7af294d5d9 2258 "OUTPUT_EXT": "hex",
Simon Cooksey 0:fb7af294d5d9 2259 "is_disk_virtual": true,
Simon Cooksey 0:fb7af294d5d9 2260 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2261 "public": false,
Simon Cooksey 0:fb7af294d5d9 2262 "detect_code": ["1101"],
Simon Cooksey 0:fb7af294d5d9 2263 "program_cycle_s": 6,
Simon Cooksey 0:fb7af294d5d9 2264 "MERGE_SOFT_DEVICE": true,
Simon Cooksey 0:fb7af294d5d9 2265 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Simon Cooksey 0:fb7af294d5d9 2266 {
Simon Cooksey 0:fb7af294d5d9 2267 "boot": "",
Simon Cooksey 0:fb7af294d5d9 2268 "name": "s132_nrf52_2.0.0_softdevice.hex",
Simon Cooksey 0:fb7af294d5d9 2269 "offset": 114688
Simon Cooksey 0:fb7af294d5d9 2270 }
Simon Cooksey 0:fb7af294d5d9 2271 ],
Simon Cooksey 0:fb7af294d5d9 2272 "post_binary_hook": {
Simon Cooksey 0:fb7af294d5d9 2273 "function": "MCU_NRF51Code.binary_hook",
Simon Cooksey 0:fb7af294d5d9 2274 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Simon Cooksey 0:fb7af294d5d9 2275 },
Simon Cooksey 0:fb7af294d5d9 2276 "MERGE_BOOTLOADER": false,
Simon Cooksey 0:fb7af294d5d9 2277 "features": ["BLE"],
Simon Cooksey 0:fb7af294d5d9 2278 "config": {
Simon Cooksey 0:fb7af294d5d9 2279 "lf_clock_src": {
Simon Cooksey 0:fb7af294d5d9 2280 "value": "NRF_LF_SRC_XTAL",
Simon Cooksey 0:fb7af294d5d9 2281 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Simon Cooksey 0:fb7af294d5d9 2282 },
Simon Cooksey 0:fb7af294d5d9 2283 "uart_hwfc": {
Simon Cooksey 0:fb7af294d5d9 2284 "help": "Value: 1 for enable, 0 for disable",
Simon Cooksey 0:fb7af294d5d9 2285 "value": 1,
Simon Cooksey 0:fb7af294d5d9 2286 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Simon Cooksey 0:fb7af294d5d9 2287 }
Simon Cooksey 0:fb7af294d5d9 2288 }
Simon Cooksey 0:fb7af294d5d9 2289 },
Simon Cooksey 0:fb7af294d5d9 2290 "NRF52_DK": {
Simon Cooksey 0:fb7af294d5d9 2291 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 2292 "inherits": ["MCU_NRF52"],
Simon Cooksey 0:fb7af294d5d9 2293 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Simon Cooksey 0:fb7af294d5d9 2294 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 2295 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 2296 "device_name": "nRF52832_xxAA"
Simon Cooksey 0:fb7af294d5d9 2297 },
Simon Cooksey 0:fb7af294d5d9 2298 "DELTA_DFBM_NQ620": {
Simon Cooksey 0:fb7af294d5d9 2299 "supported_form_factors": ["ARDUINO"],
Simon Cooksey 0:fb7af294d5d9 2300 "inherits": ["MCU_NRF52"],
Simon Cooksey 0:fb7af294d5d9 2301 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Simon Cooksey 0:fb7af294d5d9 2302 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Simon Cooksey 0:fb7af294d5d9 2303 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 2304 "device_name": "nRF52832_xxAA"
Simon Cooksey 0:fb7af294d5d9 2305 },
Simon Cooksey 0:fb7af294d5d9 2306 "BLUEPILL_F103C8": {
Simon Cooksey 0:fb7af294d5d9 2307 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 2308 "default_toolchain": "GCC_ARM",
Simon Cooksey 0:fb7af294d5d9 2309 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Simon Cooksey 0:fb7af294d5d9 2310 "supported_toolchains": ["GCC_ARM"],
Simon Cooksey 0:fb7af294d5d9 2311 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2312 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Simon Cooksey 0:fb7af294d5d9 2313 },
Simon Cooksey 0:fb7af294d5d9 2314 "NUMAKER_PFM_NUC472": {
Simon Cooksey 0:fb7af294d5d9 2315 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 2316 "default_toolchain": "ARM",
Simon Cooksey 0:fb7af294d5d9 2317 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Simon Cooksey 0:fb7af294d5d9 2318 "is_disk_virtual": true,
Simon Cooksey 0:fb7af294d5d9 2319 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2320 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2321 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG"],
Simon Cooksey 0:fb7af294d5d9 2322 "features": ["LWIP"],
Simon Cooksey 0:fb7af294d5d9 2323 "release_versions": ["5"],
Simon Cooksey 0:fb7af294d5d9 2324 "device_name": "NUC472HI8AE"
Simon Cooksey 0:fb7af294d5d9 2325 },
Simon Cooksey 0:fb7af294d5d9 2326 "NCS36510": {
Simon Cooksey 0:fb7af294d5d9 2327 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2328 "core": "Cortex-M3",
Simon Cooksey 0:fb7af294d5d9 2329 "extra_labels": ["ONSEMI"],
Simon Cooksey 0:fb7af294d5d9 2330 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
Simon Cooksey 0:fb7af294d5d9 2331 "macros": ["REVD", "CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
Simon Cooksey 0:fb7af294d5d9 2332 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2333 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER"],
Simon Cooksey 0:fb7af294d5d9 2334 "device_name": "NCS36510",
Simon Cooksey 0:fb7af294d5d9 2335 "release_versions": ["2", "5"]
Simon Cooksey 0:fb7af294d5d9 2336 },
Simon Cooksey 0:fb7af294d5d9 2337 "NUMAKER_PFM_M453": {
Simon Cooksey 0:fb7af294d5d9 2338 "core": "Cortex-M4F",
Simon Cooksey 0:fb7af294d5d9 2339 "default_toolchain": "ARM",
Simon Cooksey 0:fb7af294d5d9 2340 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
Simon Cooksey 0:fb7af294d5d9 2341 "is_disk_virtual": true,
Simon Cooksey 0:fb7af294d5d9 2342 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Simon Cooksey 0:fb7af294d5d9 2343 "inherits": ["Target"],
Simon Cooksey 0:fb7af294d5d9 2344 "progen": {"target": "numaker-pfm-m453"},
Simon Cooksey 0:fb7af294d5d9 2345 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Simon Cooksey 0:fb7af294d5d9 2346 "release_versions": ["2", "5"],
Simon Cooksey 0:fb7af294d5d9 2347 "device_name": "M453VG6AE"
Simon Cooksey 0:fb7af294d5d9 2348 }
Simon Cooksey 0:fb7af294d5d9 2349 }