Simon Cooksey / mbed-os

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cmsis/core_cmSimd.h@0:fb7af294d5d9, 2016-11-17 (annotated)

Committer:
Simon Cooksey
Date:
Thu Nov 17 16:43:53 2016 +0000
Revision:
0:fb7af294d5d9
Initial commit

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Simon Cooksey 0:fb7af294d5d9 1 /**************************************************************************//**
Simon Cooksey 0:fb7af294d5d9 2 * @file core_cmSimd.h
Simon Cooksey 0:fb7af294d5d9 3 * @brief CMSIS Cortex-M SIMD Header File
Simon Cooksey 0:fb7af294d5d9 4 * @version V4.10
Simon Cooksey 0:fb7af294d5d9 5 * @date 18. March 2015
Simon Cooksey 0:fb7af294d5d9 6 *
Simon Cooksey 0:fb7af294d5d9 7 * @note
Simon Cooksey 0:fb7af294d5d9 8 *
Simon Cooksey 0:fb7af294d5d9 9 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
Simon Cooksey 0:fb7af294d5d9 11
Simon Cooksey 0:fb7af294d5d9 12 All rights reserved.
Simon Cooksey 0:fb7af294d5d9 13 Redistribution and use in source and binary forms, with or without
Simon Cooksey 0:fb7af294d5d9 14 modification, are permitted provided that the following conditions are met:
Simon Cooksey 0:fb7af294d5d9 15 - Redistributions of source code must retain the above copyright
Simon Cooksey 0:fb7af294d5d9 16 notice, this list of conditions and the following disclaimer.
Simon Cooksey 0:fb7af294d5d9 17 - Redistributions in binary form must reproduce the above copyright
Simon Cooksey 0:fb7af294d5d9 18 notice, this list of conditions and the following disclaimer in the
Simon Cooksey 0:fb7af294d5d9 19 documentation and/or other materials provided with the distribution.
Simon Cooksey 0:fb7af294d5d9 20 - Neither the name of ARM nor the names of its contributors may be used
Simon Cooksey 0:fb7af294d5d9 21 to endorse or promote products derived from this software without
Simon Cooksey 0:fb7af294d5d9 22 specific prior written permission.
Simon Cooksey 0:fb7af294d5d9 23 *
Simon Cooksey 0:fb7af294d5d9 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Simon Cooksey 0:fb7af294d5d9 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Simon Cooksey 0:fb7af294d5d9 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Simon Cooksey 0:fb7af294d5d9 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Simon Cooksey 0:fb7af294d5d9 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Simon Cooksey 0:fb7af294d5d9 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Simon Cooksey 0:fb7af294d5d9 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Simon Cooksey 0:fb7af294d5d9 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Simon Cooksey 0:fb7af294d5d9 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Simon Cooksey 0:fb7af294d5d9 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Simon Cooksey 0:fb7af294d5d9 34 POSSIBILITY OF SUCH DAMAGE.
Simon Cooksey 0:fb7af294d5d9 35 ---------------------------------------------------------------------------*/
Simon Cooksey 0:fb7af294d5d9 36
Simon Cooksey 0:fb7af294d5d9 37
Simon Cooksey 0:fb7af294d5d9 38 #if defined ( __ICCARM__ )
Simon Cooksey 0:fb7af294d5d9 39 #pragma system_include /* treat file as system include file for MISRA check */
Simon Cooksey 0:fb7af294d5d9 40 #endif
Simon Cooksey 0:fb7af294d5d9 41
Simon Cooksey 0:fb7af294d5d9 42 #ifndef __CORE_CMSIMD_H
Simon Cooksey 0:fb7af294d5d9 43 #define __CORE_CMSIMD_H
Simon Cooksey 0:fb7af294d5d9 44
Simon Cooksey 0:fb7af294d5d9 45 #ifdef __cplusplus
Simon Cooksey 0:fb7af294d5d9 46 extern "C" {
Simon Cooksey 0:fb7af294d5d9 47 #endif
Simon Cooksey 0:fb7af294d5d9 48
Simon Cooksey 0:fb7af294d5d9 49
Simon Cooksey 0:fb7af294d5d9 50 /*******************************************************************************
Simon Cooksey 0:fb7af294d5d9 51 * Hardware Abstraction Layer
Simon Cooksey 0:fb7af294d5d9 52 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 53
Simon Cooksey 0:fb7af294d5d9 54
Simon Cooksey 0:fb7af294d5d9 55 /* ################### Compiler specific Intrinsics ########################### */
Simon Cooksey 0:fb7af294d5d9 56 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Simon Cooksey 0:fb7af294d5d9 57 Access to dedicated SIMD instructions
Simon Cooksey 0:fb7af294d5d9 58 @{
Simon Cooksey 0:fb7af294d5d9 59 */
Simon Cooksey 0:fb7af294d5d9 60
Simon Cooksey 0:fb7af294d5d9 61 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Simon Cooksey 0:fb7af294d5d9 62 /* ARM armcc specific functions */
Simon Cooksey 0:fb7af294d5d9 63 #define __SADD8 __sadd8
Simon Cooksey 0:fb7af294d5d9 64 #define __QADD8 __qadd8
Simon Cooksey 0:fb7af294d5d9 65 #define __SHADD8 __shadd8
Simon Cooksey 0:fb7af294d5d9 66 #define __UADD8 __uadd8
Simon Cooksey 0:fb7af294d5d9 67 #define __UQADD8 __uqadd8
Simon Cooksey 0:fb7af294d5d9 68 #define __UHADD8 __uhadd8
Simon Cooksey 0:fb7af294d5d9 69 #define __SSUB8 __ssub8
Simon Cooksey 0:fb7af294d5d9 70 #define __QSUB8 __qsub8
Simon Cooksey 0:fb7af294d5d9 71 #define __SHSUB8 __shsub8
Simon Cooksey 0:fb7af294d5d9 72 #define __USUB8 __usub8
Simon Cooksey 0:fb7af294d5d9 73 #define __UQSUB8 __uqsub8
Simon Cooksey 0:fb7af294d5d9 74 #define __UHSUB8 __uhsub8
Simon Cooksey 0:fb7af294d5d9 75 #define __SADD16 __sadd16
Simon Cooksey 0:fb7af294d5d9 76 #define __QADD16 __qadd16
Simon Cooksey 0:fb7af294d5d9 77 #define __SHADD16 __shadd16
Simon Cooksey 0:fb7af294d5d9 78 #define __UADD16 __uadd16
Simon Cooksey 0:fb7af294d5d9 79 #define __UQADD16 __uqadd16
Simon Cooksey 0:fb7af294d5d9 80 #define __UHADD16 __uhadd16
Simon Cooksey 0:fb7af294d5d9 81 #define __SSUB16 __ssub16
Simon Cooksey 0:fb7af294d5d9 82 #define __QSUB16 __qsub16
Simon Cooksey 0:fb7af294d5d9 83 #define __SHSUB16 __shsub16
Simon Cooksey 0:fb7af294d5d9 84 #define __USUB16 __usub16
Simon Cooksey 0:fb7af294d5d9 85 #define __UQSUB16 __uqsub16
Simon Cooksey 0:fb7af294d5d9 86 #define __UHSUB16 __uhsub16
Simon Cooksey 0:fb7af294d5d9 87 #define __SASX __sasx
Simon Cooksey 0:fb7af294d5d9 88 #define __QASX __qasx
Simon Cooksey 0:fb7af294d5d9 89 #define __SHASX __shasx
Simon Cooksey 0:fb7af294d5d9 90 #define __UASX __uasx
Simon Cooksey 0:fb7af294d5d9 91 #define __UQASX __uqasx
Simon Cooksey 0:fb7af294d5d9 92 #define __UHASX __uhasx
Simon Cooksey 0:fb7af294d5d9 93 #define __SSAX __ssax
Simon Cooksey 0:fb7af294d5d9 94 #define __QSAX __qsax
Simon Cooksey 0:fb7af294d5d9 95 #define __SHSAX __shsax
Simon Cooksey 0:fb7af294d5d9 96 #define __USAX __usax
Simon Cooksey 0:fb7af294d5d9 97 #define __UQSAX __uqsax
Simon Cooksey 0:fb7af294d5d9 98 #define __UHSAX __uhsax
Simon Cooksey 0:fb7af294d5d9 99 #define __USAD8 __usad8
Simon Cooksey 0:fb7af294d5d9 100 #define __USADA8 __usada8
Simon Cooksey 0:fb7af294d5d9 101 #define __SSAT16 __ssat16
Simon Cooksey 0:fb7af294d5d9 102 #define __USAT16 __usat16
Simon Cooksey 0:fb7af294d5d9 103 #define __UXTB16 __uxtb16
Simon Cooksey 0:fb7af294d5d9 104 #define __UXTAB16 __uxtab16
Simon Cooksey 0:fb7af294d5d9 105 #define __SXTB16 __sxtb16
Simon Cooksey 0:fb7af294d5d9 106 #define __SXTAB16 __sxtab16
Simon Cooksey 0:fb7af294d5d9 107 #define __SMUAD __smuad
Simon Cooksey 0:fb7af294d5d9 108 #define __SMUADX __smuadx
Simon Cooksey 0:fb7af294d5d9 109 #define __SMLAD __smlad
Simon Cooksey 0:fb7af294d5d9 110 #define __SMLADX __smladx
Simon Cooksey 0:fb7af294d5d9 111 #define __SMLALD __smlald
Simon Cooksey 0:fb7af294d5d9 112 #define __SMLALDX __smlaldx
Simon Cooksey 0:fb7af294d5d9 113 #define __SMUSD __smusd
Simon Cooksey 0:fb7af294d5d9 114 #define __SMUSDX __smusdx
Simon Cooksey 0:fb7af294d5d9 115 #define __SMLSD __smlsd
Simon Cooksey 0:fb7af294d5d9 116 #define __SMLSDX __smlsdx
Simon Cooksey 0:fb7af294d5d9 117 #define __SMLSLD __smlsld
Simon Cooksey 0:fb7af294d5d9 118 #define __SMLSLDX __smlsldx
Simon Cooksey 0:fb7af294d5d9 119 #define __SEL __sel
Simon Cooksey 0:fb7af294d5d9 120 #define __QADD __qadd
Simon Cooksey 0:fb7af294d5d9 121 #define __QSUB __qsub
Simon Cooksey 0:fb7af294d5d9 122
Simon Cooksey 0:fb7af294d5d9 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
Simon Cooksey 0:fb7af294d5d9 124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
Simon Cooksey 0:fb7af294d5d9 125
Simon Cooksey 0:fb7af294d5d9 126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
Simon Cooksey 0:fb7af294d5d9 127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
Simon Cooksey 0:fb7af294d5d9 128
Simon Cooksey 0:fb7af294d5d9 129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
Simon Cooksey 0:fb7af294d5d9 130 ((int64_t)(ARG3) << 32) ) >> 32))
Simon Cooksey 0:fb7af294d5d9 131
Simon Cooksey 0:fb7af294d5d9 132
Simon Cooksey 0:fb7af294d5d9 133 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Simon Cooksey 0:fb7af294d5d9 134 /* GNU gcc specific functions */
Simon Cooksey 0:fb7af294d5d9 135 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 136 {
Simon Cooksey 0:fb7af294d5d9 137 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 138
Simon Cooksey 0:fb7af294d5d9 139 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 140 return(result);
Simon Cooksey 0:fb7af294d5d9 141 }
Simon Cooksey 0:fb7af294d5d9 142
Simon Cooksey 0:fb7af294d5d9 143 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 144 {
Simon Cooksey 0:fb7af294d5d9 145 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 146
Simon Cooksey 0:fb7af294d5d9 147 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 148 return(result);
Simon Cooksey 0:fb7af294d5d9 149 }
Simon Cooksey 0:fb7af294d5d9 150
Simon Cooksey 0:fb7af294d5d9 151 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 152 {
Simon Cooksey 0:fb7af294d5d9 153 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 154
Simon Cooksey 0:fb7af294d5d9 155 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 156 return(result);
Simon Cooksey 0:fb7af294d5d9 157 }
Simon Cooksey 0:fb7af294d5d9 158
Simon Cooksey 0:fb7af294d5d9 159 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 160 {
Simon Cooksey 0:fb7af294d5d9 161 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 162
Simon Cooksey 0:fb7af294d5d9 163 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 164 return(result);
Simon Cooksey 0:fb7af294d5d9 165 }
Simon Cooksey 0:fb7af294d5d9 166
Simon Cooksey 0:fb7af294d5d9 167 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 168 {
Simon Cooksey 0:fb7af294d5d9 169 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 170
Simon Cooksey 0:fb7af294d5d9 171 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 172 return(result);
Simon Cooksey 0:fb7af294d5d9 173 }
Simon Cooksey 0:fb7af294d5d9 174
Simon Cooksey 0:fb7af294d5d9 175 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 176 {
Simon Cooksey 0:fb7af294d5d9 177 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 178
Simon Cooksey 0:fb7af294d5d9 179 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 180 return(result);
Simon Cooksey 0:fb7af294d5d9 181 }
Simon Cooksey 0:fb7af294d5d9 182
Simon Cooksey 0:fb7af294d5d9 183
Simon Cooksey 0:fb7af294d5d9 184 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 185 {
Simon Cooksey 0:fb7af294d5d9 186 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 187
Simon Cooksey 0:fb7af294d5d9 188 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 189 return(result);
Simon Cooksey 0:fb7af294d5d9 190 }
Simon Cooksey 0:fb7af294d5d9 191
Simon Cooksey 0:fb7af294d5d9 192 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 193 {
Simon Cooksey 0:fb7af294d5d9 194 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 195
Simon Cooksey 0:fb7af294d5d9 196 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 197 return(result);
Simon Cooksey 0:fb7af294d5d9 198 }
Simon Cooksey 0:fb7af294d5d9 199
Simon Cooksey 0:fb7af294d5d9 200 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 201 {
Simon Cooksey 0:fb7af294d5d9 202 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 203
Simon Cooksey 0:fb7af294d5d9 204 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 205 return(result);
Simon Cooksey 0:fb7af294d5d9 206 }
Simon Cooksey 0:fb7af294d5d9 207
Simon Cooksey 0:fb7af294d5d9 208 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 209 {
Simon Cooksey 0:fb7af294d5d9 210 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 211
Simon Cooksey 0:fb7af294d5d9 212 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 213 return(result);
Simon Cooksey 0:fb7af294d5d9 214 }
Simon Cooksey 0:fb7af294d5d9 215
Simon Cooksey 0:fb7af294d5d9 216 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 217 {
Simon Cooksey 0:fb7af294d5d9 218 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 219
Simon Cooksey 0:fb7af294d5d9 220 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 221 return(result);
Simon Cooksey 0:fb7af294d5d9 222 }
Simon Cooksey 0:fb7af294d5d9 223
Simon Cooksey 0:fb7af294d5d9 224 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 225 {
Simon Cooksey 0:fb7af294d5d9 226 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 227
Simon Cooksey 0:fb7af294d5d9 228 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 229 return(result);
Simon Cooksey 0:fb7af294d5d9 230 }
Simon Cooksey 0:fb7af294d5d9 231
Simon Cooksey 0:fb7af294d5d9 232
Simon Cooksey 0:fb7af294d5d9 233 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 234 {
Simon Cooksey 0:fb7af294d5d9 235 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 236
Simon Cooksey 0:fb7af294d5d9 237 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 238 return(result);
Simon Cooksey 0:fb7af294d5d9 239 }
Simon Cooksey 0:fb7af294d5d9 240
Simon Cooksey 0:fb7af294d5d9 241 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 242 {
Simon Cooksey 0:fb7af294d5d9 243 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 244
Simon Cooksey 0:fb7af294d5d9 245 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 246 return(result);
Simon Cooksey 0:fb7af294d5d9 247 }
Simon Cooksey 0:fb7af294d5d9 248
Simon Cooksey 0:fb7af294d5d9 249 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 250 {
Simon Cooksey 0:fb7af294d5d9 251 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 252
Simon Cooksey 0:fb7af294d5d9 253 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 254 return(result);
Simon Cooksey 0:fb7af294d5d9 255 }
Simon Cooksey 0:fb7af294d5d9 256
Simon Cooksey 0:fb7af294d5d9 257 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 258 {
Simon Cooksey 0:fb7af294d5d9 259 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 260
Simon Cooksey 0:fb7af294d5d9 261 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 262 return(result);
Simon Cooksey 0:fb7af294d5d9 263 }
Simon Cooksey 0:fb7af294d5d9 264
Simon Cooksey 0:fb7af294d5d9 265 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 266 {
Simon Cooksey 0:fb7af294d5d9 267 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 268
Simon Cooksey 0:fb7af294d5d9 269 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 270 return(result);
Simon Cooksey 0:fb7af294d5d9 271 }
Simon Cooksey 0:fb7af294d5d9 272
Simon Cooksey 0:fb7af294d5d9 273 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 274 {
Simon Cooksey 0:fb7af294d5d9 275 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 276
Simon Cooksey 0:fb7af294d5d9 277 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 278 return(result);
Simon Cooksey 0:fb7af294d5d9 279 }
Simon Cooksey 0:fb7af294d5d9 280
Simon Cooksey 0:fb7af294d5d9 281 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 282 {
Simon Cooksey 0:fb7af294d5d9 283 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 284
Simon Cooksey 0:fb7af294d5d9 285 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 286 return(result);
Simon Cooksey 0:fb7af294d5d9 287 }
Simon Cooksey 0:fb7af294d5d9 288
Simon Cooksey 0:fb7af294d5d9 289 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 290 {
Simon Cooksey 0:fb7af294d5d9 291 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 292
Simon Cooksey 0:fb7af294d5d9 293 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 294 return(result);
Simon Cooksey 0:fb7af294d5d9 295 }
Simon Cooksey 0:fb7af294d5d9 296
Simon Cooksey 0:fb7af294d5d9 297 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 298 {
Simon Cooksey 0:fb7af294d5d9 299 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 300
Simon Cooksey 0:fb7af294d5d9 301 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 302 return(result);
Simon Cooksey 0:fb7af294d5d9 303 }
Simon Cooksey 0:fb7af294d5d9 304
Simon Cooksey 0:fb7af294d5d9 305 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 306 {
Simon Cooksey 0:fb7af294d5d9 307 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 308
Simon Cooksey 0:fb7af294d5d9 309 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 310 return(result);
Simon Cooksey 0:fb7af294d5d9 311 }
Simon Cooksey 0:fb7af294d5d9 312
Simon Cooksey 0:fb7af294d5d9 313 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 314 {
Simon Cooksey 0:fb7af294d5d9 315 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 316
Simon Cooksey 0:fb7af294d5d9 317 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 318 return(result);
Simon Cooksey 0:fb7af294d5d9 319 }
Simon Cooksey 0:fb7af294d5d9 320
Simon Cooksey 0:fb7af294d5d9 321 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 322 {
Simon Cooksey 0:fb7af294d5d9 323 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 324
Simon Cooksey 0:fb7af294d5d9 325 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 326 return(result);
Simon Cooksey 0:fb7af294d5d9 327 }
Simon Cooksey 0:fb7af294d5d9 328
Simon Cooksey 0:fb7af294d5d9 329 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 330 {
Simon Cooksey 0:fb7af294d5d9 331 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 332
Simon Cooksey 0:fb7af294d5d9 333 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 334 return(result);
Simon Cooksey 0:fb7af294d5d9 335 }
Simon Cooksey 0:fb7af294d5d9 336
Simon Cooksey 0:fb7af294d5d9 337 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 338 {
Simon Cooksey 0:fb7af294d5d9 339 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 340
Simon Cooksey 0:fb7af294d5d9 341 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 342 return(result);
Simon Cooksey 0:fb7af294d5d9 343 }
Simon Cooksey 0:fb7af294d5d9 344
Simon Cooksey 0:fb7af294d5d9 345 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 346 {
Simon Cooksey 0:fb7af294d5d9 347 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 348
Simon Cooksey 0:fb7af294d5d9 349 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 350 return(result);
Simon Cooksey 0:fb7af294d5d9 351 }
Simon Cooksey 0:fb7af294d5d9 352
Simon Cooksey 0:fb7af294d5d9 353 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 354 {
Simon Cooksey 0:fb7af294d5d9 355 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 356
Simon Cooksey 0:fb7af294d5d9 357 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 358 return(result);
Simon Cooksey 0:fb7af294d5d9 359 }
Simon Cooksey 0:fb7af294d5d9 360
Simon Cooksey 0:fb7af294d5d9 361 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 362 {
Simon Cooksey 0:fb7af294d5d9 363 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 364
Simon Cooksey 0:fb7af294d5d9 365 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 366 return(result);
Simon Cooksey 0:fb7af294d5d9 367 }
Simon Cooksey 0:fb7af294d5d9 368
Simon Cooksey 0:fb7af294d5d9 369 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 370 {
Simon Cooksey 0:fb7af294d5d9 371 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 372
Simon Cooksey 0:fb7af294d5d9 373 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 374 return(result);
Simon Cooksey 0:fb7af294d5d9 375 }
Simon Cooksey 0:fb7af294d5d9 376
Simon Cooksey 0:fb7af294d5d9 377 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 378 {
Simon Cooksey 0:fb7af294d5d9 379 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 380
Simon Cooksey 0:fb7af294d5d9 381 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 382 return(result);
Simon Cooksey 0:fb7af294d5d9 383 }
Simon Cooksey 0:fb7af294d5d9 384
Simon Cooksey 0:fb7af294d5d9 385 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 386 {
Simon Cooksey 0:fb7af294d5d9 387 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 388
Simon Cooksey 0:fb7af294d5d9 389 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 390 return(result);
Simon Cooksey 0:fb7af294d5d9 391 }
Simon Cooksey 0:fb7af294d5d9 392
Simon Cooksey 0:fb7af294d5d9 393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 394 {
Simon Cooksey 0:fb7af294d5d9 395 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 396
Simon Cooksey 0:fb7af294d5d9 397 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 398 return(result);
Simon Cooksey 0:fb7af294d5d9 399 }
Simon Cooksey 0:fb7af294d5d9 400
Simon Cooksey 0:fb7af294d5d9 401 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 402 {
Simon Cooksey 0:fb7af294d5d9 403 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 404
Simon Cooksey 0:fb7af294d5d9 405 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 406 return(result);
Simon Cooksey 0:fb7af294d5d9 407 }
Simon Cooksey 0:fb7af294d5d9 408
Simon Cooksey 0:fb7af294d5d9 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 410 {
Simon Cooksey 0:fb7af294d5d9 411 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 412
Simon Cooksey 0:fb7af294d5d9 413 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 414 return(result);
Simon Cooksey 0:fb7af294d5d9 415 }
Simon Cooksey 0:fb7af294d5d9 416
Simon Cooksey 0:fb7af294d5d9 417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 418 {
Simon Cooksey 0:fb7af294d5d9 419 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 420
Simon Cooksey 0:fb7af294d5d9 421 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 422 return(result);
Simon Cooksey 0:fb7af294d5d9 423 }
Simon Cooksey 0:fb7af294d5d9 424
Simon Cooksey 0:fb7af294d5d9 425 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 426 {
Simon Cooksey 0:fb7af294d5d9 427 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 428
Simon Cooksey 0:fb7af294d5d9 429 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 430 return(result);
Simon Cooksey 0:fb7af294d5d9 431 }
Simon Cooksey 0:fb7af294d5d9 432
Simon Cooksey 0:fb7af294d5d9 433 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
Simon Cooksey 0:fb7af294d5d9 434 {
Simon Cooksey 0:fb7af294d5d9 435 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 436
Simon Cooksey 0:fb7af294d5d9 437 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 438 return(result);
Simon Cooksey 0:fb7af294d5d9 439 }
Simon Cooksey 0:fb7af294d5d9 440
Simon Cooksey 0:fb7af294d5d9 441 #define __SSAT16(ARG1,ARG2) \
Simon Cooksey 0:fb7af294d5d9 442 ({ \
Simon Cooksey 0:fb7af294d5d9 443 uint32_t __RES, __ARG1 = (ARG1); \
Simon Cooksey 0:fb7af294d5d9 444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Simon Cooksey 0:fb7af294d5d9 445 __RES; \
Simon Cooksey 0:fb7af294d5d9 446 })
Simon Cooksey 0:fb7af294d5d9 447
Simon Cooksey 0:fb7af294d5d9 448 #define __USAT16(ARG1,ARG2) \
Simon Cooksey 0:fb7af294d5d9 449 ({ \
Simon Cooksey 0:fb7af294d5d9 450 uint32_t __RES, __ARG1 = (ARG1); \
Simon Cooksey 0:fb7af294d5d9 451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Simon Cooksey 0:fb7af294d5d9 452 __RES; \
Simon Cooksey 0:fb7af294d5d9 453 })
Simon Cooksey 0:fb7af294d5d9 454
Simon Cooksey 0:fb7af294d5d9 455 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
Simon Cooksey 0:fb7af294d5d9 456 {
Simon Cooksey 0:fb7af294d5d9 457 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 458
Simon Cooksey 0:fb7af294d5d9 459 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
Simon Cooksey 0:fb7af294d5d9 460 return(result);
Simon Cooksey 0:fb7af294d5d9 461 }
Simon Cooksey 0:fb7af294d5d9 462
Simon Cooksey 0:fb7af294d5d9 463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 464 {
Simon Cooksey 0:fb7af294d5d9 465 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 466
Simon Cooksey 0:fb7af294d5d9 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 468 return(result);
Simon Cooksey 0:fb7af294d5d9 469 }
Simon Cooksey 0:fb7af294d5d9 470
Simon Cooksey 0:fb7af294d5d9 471 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
Simon Cooksey 0:fb7af294d5d9 472 {
Simon Cooksey 0:fb7af294d5d9 473 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 474
Simon Cooksey 0:fb7af294d5d9 475 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
Simon Cooksey 0:fb7af294d5d9 476 return(result);
Simon Cooksey 0:fb7af294d5d9 477 }
Simon Cooksey 0:fb7af294d5d9 478
Simon Cooksey 0:fb7af294d5d9 479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 480 {
Simon Cooksey 0:fb7af294d5d9 481 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 482
Simon Cooksey 0:fb7af294d5d9 483 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 484 return(result);
Simon Cooksey 0:fb7af294d5d9 485 }
Simon Cooksey 0:fb7af294d5d9 486
Simon Cooksey 0:fb7af294d5d9 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 488 {
Simon Cooksey 0:fb7af294d5d9 489 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 490
Simon Cooksey 0:fb7af294d5d9 491 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 492 return(result);
Simon Cooksey 0:fb7af294d5d9 493 }
Simon Cooksey 0:fb7af294d5d9 494
Simon Cooksey 0:fb7af294d5d9 495 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 496 {
Simon Cooksey 0:fb7af294d5d9 497 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 498
Simon Cooksey 0:fb7af294d5d9 499 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 500 return(result);
Simon Cooksey 0:fb7af294d5d9 501 }
Simon Cooksey 0:fb7af294d5d9 502
Simon Cooksey 0:fb7af294d5d9 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
Simon Cooksey 0:fb7af294d5d9 504 {
Simon Cooksey 0:fb7af294d5d9 505 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 506
Simon Cooksey 0:fb7af294d5d9 507 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 508 return(result);
Simon Cooksey 0:fb7af294d5d9 509 }
Simon Cooksey 0:fb7af294d5d9 510
Simon Cooksey 0:fb7af294d5d9 511 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
Simon Cooksey 0:fb7af294d5d9 512 {
Simon Cooksey 0:fb7af294d5d9 513 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 514
Simon Cooksey 0:fb7af294d5d9 515 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 516 return(result);
Simon Cooksey 0:fb7af294d5d9 517 }
Simon Cooksey 0:fb7af294d5d9 518
Simon Cooksey 0:fb7af294d5d9 519 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
Simon Cooksey 0:fb7af294d5d9 520 {
Simon Cooksey 0:fb7af294d5d9 521 union llreg_u{
Simon Cooksey 0:fb7af294d5d9 522 uint32_t w32[2];
Simon Cooksey 0:fb7af294d5d9 523 uint64_t w64;
Simon Cooksey 0:fb7af294d5d9 524 } llr;
Simon Cooksey 0:fb7af294d5d9 525 llr.w64 = acc;
Simon Cooksey 0:fb7af294d5d9 526
Simon Cooksey 0:fb7af294d5d9 527 #ifndef __ARMEB__ // Little endian
Simon Cooksey 0:fb7af294d5d9 528 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Simon Cooksey 0:fb7af294d5d9 529 #else // Big endian
Simon Cooksey 0:fb7af294d5d9 530 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Simon Cooksey 0:fb7af294d5d9 531 #endif
Simon Cooksey 0:fb7af294d5d9 532
Simon Cooksey 0:fb7af294d5d9 533 return(llr.w64);
Simon Cooksey 0:fb7af294d5d9 534 }
Simon Cooksey 0:fb7af294d5d9 535
Simon Cooksey 0:fb7af294d5d9 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
Simon Cooksey 0:fb7af294d5d9 537 {
Simon Cooksey 0:fb7af294d5d9 538 union llreg_u{
Simon Cooksey 0:fb7af294d5d9 539 uint32_t w32[2];
Simon Cooksey 0:fb7af294d5d9 540 uint64_t w64;
Simon Cooksey 0:fb7af294d5d9 541 } llr;
Simon Cooksey 0:fb7af294d5d9 542 llr.w64 = acc;
Simon Cooksey 0:fb7af294d5d9 543
Simon Cooksey 0:fb7af294d5d9 544 #ifndef __ARMEB__ // Little endian
Simon Cooksey 0:fb7af294d5d9 545 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Simon Cooksey 0:fb7af294d5d9 546 #else // Big endian
Simon Cooksey 0:fb7af294d5d9 547 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Simon Cooksey 0:fb7af294d5d9 548 #endif
Simon Cooksey 0:fb7af294d5d9 549
Simon Cooksey 0:fb7af294d5d9 550 return(llr.w64);
Simon Cooksey 0:fb7af294d5d9 551 }
Simon Cooksey 0:fb7af294d5d9 552
Simon Cooksey 0:fb7af294d5d9 553 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 554 {
Simon Cooksey 0:fb7af294d5d9 555 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 556
Simon Cooksey 0:fb7af294d5d9 557 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 558 return(result);
Simon Cooksey 0:fb7af294d5d9 559 }
Simon Cooksey 0:fb7af294d5d9 560
Simon Cooksey 0:fb7af294d5d9 561 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 562 {
Simon Cooksey 0:fb7af294d5d9 563 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 564
Simon Cooksey 0:fb7af294d5d9 565 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 566 return(result);
Simon Cooksey 0:fb7af294d5d9 567 }
Simon Cooksey 0:fb7af294d5d9 568
Simon Cooksey 0:fb7af294d5d9 569 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
Simon Cooksey 0:fb7af294d5d9 570 {
Simon Cooksey 0:fb7af294d5d9 571 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 572
Simon Cooksey 0:fb7af294d5d9 573 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 574 return(result);
Simon Cooksey 0:fb7af294d5d9 575 }
Simon Cooksey 0:fb7af294d5d9 576
Simon Cooksey 0:fb7af294d5d9 577 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
Simon Cooksey 0:fb7af294d5d9 578 {
Simon Cooksey 0:fb7af294d5d9 579 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 580
Simon Cooksey 0:fb7af294d5d9 581 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 582 return(result);
Simon Cooksey 0:fb7af294d5d9 583 }
Simon Cooksey 0:fb7af294d5d9 584
Simon Cooksey 0:fb7af294d5d9 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
Simon Cooksey 0:fb7af294d5d9 586 {
Simon Cooksey 0:fb7af294d5d9 587 union llreg_u{
Simon Cooksey 0:fb7af294d5d9 588 uint32_t w32[2];
Simon Cooksey 0:fb7af294d5d9 589 uint64_t w64;
Simon Cooksey 0:fb7af294d5d9 590 } llr;
Simon Cooksey 0:fb7af294d5d9 591 llr.w64 = acc;
Simon Cooksey 0:fb7af294d5d9 592
Simon Cooksey 0:fb7af294d5d9 593 #ifndef __ARMEB__ // Little endian
Simon Cooksey 0:fb7af294d5d9 594 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Simon Cooksey 0:fb7af294d5d9 595 #else // Big endian
Simon Cooksey 0:fb7af294d5d9 596 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Simon Cooksey 0:fb7af294d5d9 597 #endif
Simon Cooksey 0:fb7af294d5d9 598
Simon Cooksey 0:fb7af294d5d9 599 return(llr.w64);
Simon Cooksey 0:fb7af294d5d9 600 }
Simon Cooksey 0:fb7af294d5d9 601
Simon Cooksey 0:fb7af294d5d9 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
Simon Cooksey 0:fb7af294d5d9 603 {
Simon Cooksey 0:fb7af294d5d9 604 union llreg_u{
Simon Cooksey 0:fb7af294d5d9 605 uint32_t w32[2];
Simon Cooksey 0:fb7af294d5d9 606 uint64_t w64;
Simon Cooksey 0:fb7af294d5d9 607 } llr;
Simon Cooksey 0:fb7af294d5d9 608 llr.w64 = acc;
Simon Cooksey 0:fb7af294d5d9 609
Simon Cooksey 0:fb7af294d5d9 610 #ifndef __ARMEB__ // Little endian
Simon Cooksey 0:fb7af294d5d9 611 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Simon Cooksey 0:fb7af294d5d9 612 #else // Big endian
Simon Cooksey 0:fb7af294d5d9 613 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Simon Cooksey 0:fb7af294d5d9 614 #endif
Simon Cooksey 0:fb7af294d5d9 615
Simon Cooksey 0:fb7af294d5d9 616 return(llr.w64);
Simon Cooksey 0:fb7af294d5d9 617 }
Simon Cooksey 0:fb7af294d5d9 618
Simon Cooksey 0:fb7af294d5d9 619 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 620 {
Simon Cooksey 0:fb7af294d5d9 621 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 622
Simon Cooksey 0:fb7af294d5d9 623 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 624 return(result);
Simon Cooksey 0:fb7af294d5d9 625 }
Simon Cooksey 0:fb7af294d5d9 626
Simon Cooksey 0:fb7af294d5d9 627 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 628 {
Simon Cooksey 0:fb7af294d5d9 629 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 630
Simon Cooksey 0:fb7af294d5d9 631 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 632 return(result);
Simon Cooksey 0:fb7af294d5d9 633 }
Simon Cooksey 0:fb7af294d5d9 634
Simon Cooksey 0:fb7af294d5d9 635 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 636 {
Simon Cooksey 0:fb7af294d5d9 637 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 638
Simon Cooksey 0:fb7af294d5d9 639 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Simon Cooksey 0:fb7af294d5d9 640 return(result);
Simon Cooksey 0:fb7af294d5d9 641 }
Simon Cooksey 0:fb7af294d5d9 642
Simon Cooksey 0:fb7af294d5d9 643 #define __PKHBT(ARG1,ARG2,ARG3) \
Simon Cooksey 0:fb7af294d5d9 644 ({ \
Simon Cooksey 0:fb7af294d5d9 645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Simon Cooksey 0:fb7af294d5d9 646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Simon Cooksey 0:fb7af294d5d9 647 __RES; \
Simon Cooksey 0:fb7af294d5d9 648 })
Simon Cooksey 0:fb7af294d5d9 649
Simon Cooksey 0:fb7af294d5d9 650 #define __PKHTB(ARG1,ARG2,ARG3) \
Simon Cooksey 0:fb7af294d5d9 651 ({ \
Simon Cooksey 0:fb7af294d5d9 652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Simon Cooksey 0:fb7af294d5d9 653 if (ARG3 == 0) \
Simon Cooksey 0:fb7af294d5d9 654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
Simon Cooksey 0:fb7af294d5d9 655 else \
Simon Cooksey 0:fb7af294d5d9 656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Simon Cooksey 0:fb7af294d5d9 657 __RES; \
Simon Cooksey 0:fb7af294d5d9 658 })
Simon Cooksey 0:fb7af294d5d9 659
Simon Cooksey 0:fb7af294d5d9 660 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
Simon Cooksey 0:fb7af294d5d9 661 {
Simon Cooksey 0:fb7af294d5d9 662 int32_t result;
Simon Cooksey 0:fb7af294d5d9 663
Simon Cooksey 0:fb7af294d5d9 664 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
Simon Cooksey 0:fb7af294d5d9 665 return(result);
Simon Cooksey 0:fb7af294d5d9 666 }
Simon Cooksey 0:fb7af294d5d9 667
Simon Cooksey 0:fb7af294d5d9 668
Simon Cooksey 0:fb7af294d5d9 669 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Simon Cooksey 0:fb7af294d5d9 670 /* IAR iccarm specific functions */
Simon Cooksey 0:fb7af294d5d9 671 #include <cmsis_iar.h>
Simon Cooksey 0:fb7af294d5d9 672
Simon Cooksey 0:fb7af294d5d9 673
Simon Cooksey 0:fb7af294d5d9 674 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Simon Cooksey 0:fb7af294d5d9 675 /* TI CCS specific functions */
Simon Cooksey 0:fb7af294d5d9 676 #include <cmsis_ccs.h>
Simon Cooksey 0:fb7af294d5d9 677
Simon Cooksey 0:fb7af294d5d9 678
Simon Cooksey 0:fb7af294d5d9 679 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Simon Cooksey 0:fb7af294d5d9 680 /* TASKING carm specific functions */
Simon Cooksey 0:fb7af294d5d9 681 /* not yet supported */
Simon Cooksey 0:fb7af294d5d9 682
Simon Cooksey 0:fb7af294d5d9 683
Simon Cooksey 0:fb7af294d5d9 684 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Simon Cooksey 0:fb7af294d5d9 685 /* Cosmic specific functions */
Simon Cooksey 0:fb7af294d5d9 686 #include <cmsis_csm.h>
Simon Cooksey 0:fb7af294d5d9 687
Simon Cooksey 0:fb7af294d5d9 688 #endif
Simon Cooksey 0:fb7af294d5d9 689
Simon Cooksey 0:fb7af294d5d9 690 /*@} end of group CMSIS_SIMD_intrinsics */
Simon Cooksey 0:fb7af294d5d9 691
Simon Cooksey 0:fb7af294d5d9 692
Simon Cooksey 0:fb7af294d5d9 693 #ifdef __cplusplus
Simon Cooksey 0:fb7af294d5d9 694 }
Simon Cooksey 0:fb7af294d5d9 695 #endif
Simon Cooksey 0:fb7af294d5d9 696
Simon Cooksey 0:fb7af294d5d9 697 #endif /* __CORE_CMSIMD_H */