Simon Cooksey / mbed-os

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cmsis/core_cmInstr.h@0:fb7af294d5d9, 2016-11-17 (annotated)

Committer:
Simon Cooksey
Date:
Thu Nov 17 16:43:53 2016 +0000
Revision:
0:fb7af294d5d9
Initial commit

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Simon Cooksey 0:fb7af294d5d9 1 /**************************************************************************//**
Simon Cooksey 0:fb7af294d5d9 2 * @file core_cmInstr.h
Simon Cooksey 0:fb7af294d5d9 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Simon Cooksey 0:fb7af294d5d9 4 * @version V4.10
Simon Cooksey 0:fb7af294d5d9 5 * @date 18. March 2015
Simon Cooksey 0:fb7af294d5d9 6 *
Simon Cooksey 0:fb7af294d5d9 7 * @note
Simon Cooksey 0:fb7af294d5d9 8 *
Simon Cooksey 0:fb7af294d5d9 9 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
Simon Cooksey 0:fb7af294d5d9 11
Simon Cooksey 0:fb7af294d5d9 12 All rights reserved.
Simon Cooksey 0:fb7af294d5d9 13 Redistribution and use in source and binary forms, with or without
Simon Cooksey 0:fb7af294d5d9 14 modification, are permitted provided that the following conditions are met:
Simon Cooksey 0:fb7af294d5d9 15 - Redistributions of source code must retain the above copyright
Simon Cooksey 0:fb7af294d5d9 16 notice, this list of conditions and the following disclaimer.
Simon Cooksey 0:fb7af294d5d9 17 - Redistributions in binary form must reproduce the above copyright
Simon Cooksey 0:fb7af294d5d9 18 notice, this list of conditions and the following disclaimer in the
Simon Cooksey 0:fb7af294d5d9 19 documentation and/or other materials provided with the distribution.
Simon Cooksey 0:fb7af294d5d9 20 - Neither the name of ARM nor the names of its contributors may be used
Simon Cooksey 0:fb7af294d5d9 21 to endorse or promote products derived from this software without
Simon Cooksey 0:fb7af294d5d9 22 specific prior written permission.
Simon Cooksey 0:fb7af294d5d9 23 *
Simon Cooksey 0:fb7af294d5d9 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Simon Cooksey 0:fb7af294d5d9 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Simon Cooksey 0:fb7af294d5d9 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Simon Cooksey 0:fb7af294d5d9 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Simon Cooksey 0:fb7af294d5d9 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Simon Cooksey 0:fb7af294d5d9 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Simon Cooksey 0:fb7af294d5d9 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Simon Cooksey 0:fb7af294d5d9 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Simon Cooksey 0:fb7af294d5d9 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Simon Cooksey 0:fb7af294d5d9 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Simon Cooksey 0:fb7af294d5d9 34 POSSIBILITY OF SUCH DAMAGE.
Simon Cooksey 0:fb7af294d5d9 35 ---------------------------------------------------------------------------*/
Simon Cooksey 0:fb7af294d5d9 36
Simon Cooksey 0:fb7af294d5d9 37
Simon Cooksey 0:fb7af294d5d9 38 #ifndef __CORE_CMINSTR_H
Simon Cooksey 0:fb7af294d5d9 39 #define __CORE_CMINSTR_H
Simon Cooksey 0:fb7af294d5d9 40
Simon Cooksey 0:fb7af294d5d9 41
Simon Cooksey 0:fb7af294d5d9 42 /* ########################## Core Instruction Access ######################### */
Simon Cooksey 0:fb7af294d5d9 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Simon Cooksey 0:fb7af294d5d9 44 Access to dedicated instructions
Simon Cooksey 0:fb7af294d5d9 45 @{
Simon Cooksey 0:fb7af294d5d9 46 */
Simon Cooksey 0:fb7af294d5d9 47
Simon Cooksey 0:fb7af294d5d9 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Simon Cooksey 0:fb7af294d5d9 49 /* ARM armcc specific functions */
Simon Cooksey 0:fb7af294d5d9 50
Simon Cooksey 0:fb7af294d5d9 51 #if (__ARMCC_VERSION < 400677)
Simon Cooksey 0:fb7af294d5d9 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Simon Cooksey 0:fb7af294d5d9 53 #endif
Simon Cooksey 0:fb7af294d5d9 54
Simon Cooksey 0:fb7af294d5d9 55
Simon Cooksey 0:fb7af294d5d9 56 /** \brief No Operation
Simon Cooksey 0:fb7af294d5d9 57
Simon Cooksey 0:fb7af294d5d9 58 No Operation does nothing. This instruction can be used for code alignment purposes.
Simon Cooksey 0:fb7af294d5d9 59 */
Simon Cooksey 0:fb7af294d5d9 60 #define __NOP __nop
Simon Cooksey 0:fb7af294d5d9 61
Simon Cooksey 0:fb7af294d5d9 62
Simon Cooksey 0:fb7af294d5d9 63 /** \brief Wait For Interrupt
Simon Cooksey 0:fb7af294d5d9 64
Simon Cooksey 0:fb7af294d5d9 65 Wait For Interrupt is a hint instruction that suspends execution
Simon Cooksey 0:fb7af294d5d9 66 until one of a number of events occurs.
Simon Cooksey 0:fb7af294d5d9 67 */
Simon Cooksey 0:fb7af294d5d9 68 #define __WFI __wfi
Simon Cooksey 0:fb7af294d5d9 69
Simon Cooksey 0:fb7af294d5d9 70
Simon Cooksey 0:fb7af294d5d9 71 /** \brief Wait For Event
Simon Cooksey 0:fb7af294d5d9 72
Simon Cooksey 0:fb7af294d5d9 73 Wait For Event is a hint instruction that permits the processor to enter
Simon Cooksey 0:fb7af294d5d9 74 a low-power state until one of a number of events occurs.
Simon Cooksey 0:fb7af294d5d9 75 */
Simon Cooksey 0:fb7af294d5d9 76 #define __WFE __wfe
Simon Cooksey 0:fb7af294d5d9 77
Simon Cooksey 0:fb7af294d5d9 78
Simon Cooksey 0:fb7af294d5d9 79 /** \brief Send Event
Simon Cooksey 0:fb7af294d5d9 80
Simon Cooksey 0:fb7af294d5d9 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Simon Cooksey 0:fb7af294d5d9 82 */
Simon Cooksey 0:fb7af294d5d9 83 #define __SEV __sev
Simon Cooksey 0:fb7af294d5d9 84
Simon Cooksey 0:fb7af294d5d9 85
Simon Cooksey 0:fb7af294d5d9 86 /** \brief Instruction Synchronization Barrier
Simon Cooksey 0:fb7af294d5d9 87
Simon Cooksey 0:fb7af294d5d9 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
Simon Cooksey 0:fb7af294d5d9 89 so that all instructions following the ISB are fetched from cache or
Simon Cooksey 0:fb7af294d5d9 90 memory, after the instruction has been completed.
Simon Cooksey 0:fb7af294d5d9 91 */
Simon Cooksey 0:fb7af294d5d9 92 #define __ISB() do {\
Simon Cooksey 0:fb7af294d5d9 93 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 94 __isb(0xF);\
Simon Cooksey 0:fb7af294d5d9 95 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 96 } while (0)
Simon Cooksey 0:fb7af294d5d9 97
Simon Cooksey 0:fb7af294d5d9 98 /** \brief Data Synchronization Barrier
Simon Cooksey 0:fb7af294d5d9 99
Simon Cooksey 0:fb7af294d5d9 100 This function acts as a special kind of Data Memory Barrier.
Simon Cooksey 0:fb7af294d5d9 101 It completes when all explicit memory accesses before this instruction complete.
Simon Cooksey 0:fb7af294d5d9 102 */
Simon Cooksey 0:fb7af294d5d9 103 #define __DSB() do {\
Simon Cooksey 0:fb7af294d5d9 104 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 105 __dsb(0xF);\
Simon Cooksey 0:fb7af294d5d9 106 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 107 } while (0)
Simon Cooksey 0:fb7af294d5d9 108
Simon Cooksey 0:fb7af294d5d9 109 /** \brief Data Memory Barrier
Simon Cooksey 0:fb7af294d5d9 110
Simon Cooksey 0:fb7af294d5d9 111 This function ensures the apparent order of the explicit memory operations before
Simon Cooksey 0:fb7af294d5d9 112 and after the instruction, without ensuring their completion.
Simon Cooksey 0:fb7af294d5d9 113 */
Simon Cooksey 0:fb7af294d5d9 114 #define __DMB() do {\
Simon Cooksey 0:fb7af294d5d9 115 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 116 __dmb(0xF);\
Simon Cooksey 0:fb7af294d5d9 117 __schedule_barrier();\
Simon Cooksey 0:fb7af294d5d9 118 } while (0)
Simon Cooksey 0:fb7af294d5d9 119
Simon Cooksey 0:fb7af294d5d9 120 /** \brief Reverse byte order (32 bit)
Simon Cooksey 0:fb7af294d5d9 121
Simon Cooksey 0:fb7af294d5d9 122 This function reverses the byte order in integer value.
Simon Cooksey 0:fb7af294d5d9 123
Simon Cooksey 0:fb7af294d5d9 124 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 125 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 126 */
Simon Cooksey 0:fb7af294d5d9 127 #define __REV __rev
Simon Cooksey 0:fb7af294d5d9 128
Simon Cooksey 0:fb7af294d5d9 129
Simon Cooksey 0:fb7af294d5d9 130 /** \brief Reverse byte order (16 bit)
Simon Cooksey 0:fb7af294d5d9 131
Simon Cooksey 0:fb7af294d5d9 132 This function reverses the byte order in two unsigned short values.
Simon Cooksey 0:fb7af294d5d9 133
Simon Cooksey 0:fb7af294d5d9 134 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 135 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 136 */
Simon Cooksey 0:fb7af294d5d9 137 #ifndef __NO_EMBEDDED_ASM
Simon Cooksey 0:fb7af294d5d9 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 139 {
Simon Cooksey 0:fb7af294d5d9 140 rev16 r0, r0
Simon Cooksey 0:fb7af294d5d9 141 bx lr
Simon Cooksey 0:fb7af294d5d9 142 }
Simon Cooksey 0:fb7af294d5d9 143 #endif
Simon Cooksey 0:fb7af294d5d9 144
Simon Cooksey 0:fb7af294d5d9 145 /** \brief Reverse byte order in signed short value
Simon Cooksey 0:fb7af294d5d9 146
Simon Cooksey 0:fb7af294d5d9 147 This function reverses the byte order in a signed short value with sign extension to integer.
Simon Cooksey 0:fb7af294d5d9 148
Simon Cooksey 0:fb7af294d5d9 149 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 150 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 151 */
Simon Cooksey 0:fb7af294d5d9 152 #ifndef __NO_EMBEDDED_ASM
Simon Cooksey 0:fb7af294d5d9 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
Simon Cooksey 0:fb7af294d5d9 154 {
Simon Cooksey 0:fb7af294d5d9 155 revsh r0, r0
Simon Cooksey 0:fb7af294d5d9 156 bx lr
Simon Cooksey 0:fb7af294d5d9 157 }
Simon Cooksey 0:fb7af294d5d9 158 #endif
Simon Cooksey 0:fb7af294d5d9 159
Simon Cooksey 0:fb7af294d5d9 160
Simon Cooksey 0:fb7af294d5d9 161 /** \brief Rotate Right in unsigned value (32 bit)
Simon Cooksey 0:fb7af294d5d9 162
Simon Cooksey 0:fb7af294d5d9 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Simon Cooksey 0:fb7af294d5d9 164
Simon Cooksey 0:fb7af294d5d9 165 \param [in] value Value to rotate
Simon Cooksey 0:fb7af294d5d9 166 \param [in] value Number of Bits to rotate
Simon Cooksey 0:fb7af294d5d9 167 \return Rotated value
Simon Cooksey 0:fb7af294d5d9 168 */
Simon Cooksey 0:fb7af294d5d9 169 #define __ROR __ror
Simon Cooksey 0:fb7af294d5d9 170
Simon Cooksey 0:fb7af294d5d9 171
Simon Cooksey 0:fb7af294d5d9 172 /** \brief Breakpoint
Simon Cooksey 0:fb7af294d5d9 173
Simon Cooksey 0:fb7af294d5d9 174 This function causes the processor to enter Debug state.
Simon Cooksey 0:fb7af294d5d9 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Simon Cooksey 0:fb7af294d5d9 176
Simon Cooksey 0:fb7af294d5d9 177 \param [in] value is ignored by the processor.
Simon Cooksey 0:fb7af294d5d9 178 If required, a debugger can use it to store additional information about the breakpoint.
Simon Cooksey 0:fb7af294d5d9 179 */
Simon Cooksey 0:fb7af294d5d9 180 #define __BKPT(value) __breakpoint(value)
Simon Cooksey 0:fb7af294d5d9 181
Simon Cooksey 0:fb7af294d5d9 182
Simon Cooksey 0:fb7af294d5d9 183 /** \brief Reverse bit order of value
Simon Cooksey 0:fb7af294d5d9 184
Simon Cooksey 0:fb7af294d5d9 185 This function reverses the bit order of the given value.
Simon Cooksey 0:fb7af294d5d9 186
Simon Cooksey 0:fb7af294d5d9 187 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 188 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 189 */
Simon Cooksey 0:fb7af294d5d9 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Simon Cooksey 0:fb7af294d5d9 191 #define __RBIT __rbit
Simon Cooksey 0:fb7af294d5d9 192 #else
Simon Cooksey 0:fb7af294d5d9 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 194 {
Simon Cooksey 0:fb7af294d5d9 195 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
Simon Cooksey 0:fb7af294d5d9 197
Simon Cooksey 0:fb7af294d5d9 198 result = value; // r will be reversed bits of v; first get LSB of v
Simon Cooksey 0:fb7af294d5d9 199 for (value >>= 1; value; value >>= 1)
Simon Cooksey 0:fb7af294d5d9 200 {
Simon Cooksey 0:fb7af294d5d9 201 result <<= 1;
Simon Cooksey 0:fb7af294d5d9 202 result |= value & 1;
Simon Cooksey 0:fb7af294d5d9 203 s--;
Simon Cooksey 0:fb7af294d5d9 204 }
Simon Cooksey 0:fb7af294d5d9 205 result <<= s; // shift when v's highest bits are zero
Simon Cooksey 0:fb7af294d5d9 206 return(result);
Simon Cooksey 0:fb7af294d5d9 207 }
Simon Cooksey 0:fb7af294d5d9 208 #endif
Simon Cooksey 0:fb7af294d5d9 209
Simon Cooksey 0:fb7af294d5d9 210
Simon Cooksey 0:fb7af294d5d9 211 /** \brief Count leading zeros
Simon Cooksey 0:fb7af294d5d9 212
Simon Cooksey 0:fb7af294d5d9 213 This function counts the number of leading zeros of a data value.
Simon Cooksey 0:fb7af294d5d9 214
Simon Cooksey 0:fb7af294d5d9 215 \param [in] value Value to count the leading zeros
Simon Cooksey 0:fb7af294d5d9 216 \return number of leading zeros in value
Simon Cooksey 0:fb7af294d5d9 217 */
Simon Cooksey 0:fb7af294d5d9 218 #define __CLZ __clz
Simon Cooksey 0:fb7af294d5d9 219
Simon Cooksey 0:fb7af294d5d9 220
Simon Cooksey 0:fb7af294d5d9 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Simon Cooksey 0:fb7af294d5d9 222
Simon Cooksey 0:fb7af294d5d9 223 /** \brief LDR Exclusive (8 bit)
Simon Cooksey 0:fb7af294d5d9 224
Simon Cooksey 0:fb7af294d5d9 225 This function executes a exclusive LDR instruction for 8 bit value.
Simon Cooksey 0:fb7af294d5d9 226
Simon Cooksey 0:fb7af294d5d9 227 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 228 \return value of type uint8_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 229 */
Simon Cooksey 0:fb7af294d5d9 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
Simon Cooksey 0:fb7af294d5d9 231
Simon Cooksey 0:fb7af294d5d9 232
Simon Cooksey 0:fb7af294d5d9 233 /** \brief LDR Exclusive (16 bit)
Simon Cooksey 0:fb7af294d5d9 234
Simon Cooksey 0:fb7af294d5d9 235 This function executes a exclusive LDR instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 236
Simon Cooksey 0:fb7af294d5d9 237 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 238 \return value of type uint16_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 239 */
Simon Cooksey 0:fb7af294d5d9 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
Simon Cooksey 0:fb7af294d5d9 241
Simon Cooksey 0:fb7af294d5d9 242
Simon Cooksey 0:fb7af294d5d9 243 /** \brief LDR Exclusive (32 bit)
Simon Cooksey 0:fb7af294d5d9 244
Simon Cooksey 0:fb7af294d5d9 245 This function executes a exclusive LDR instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 246
Simon Cooksey 0:fb7af294d5d9 247 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 248 \return value of type uint32_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 249 */
Simon Cooksey 0:fb7af294d5d9 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
Simon Cooksey 0:fb7af294d5d9 251
Simon Cooksey 0:fb7af294d5d9 252
Simon Cooksey 0:fb7af294d5d9 253 /** \brief STR Exclusive (8 bit)
Simon Cooksey 0:fb7af294d5d9 254
Simon Cooksey 0:fb7af294d5d9 255 This function executes a exclusive STR instruction for 8 bit values.
Simon Cooksey 0:fb7af294d5d9 256
Simon Cooksey 0:fb7af294d5d9 257 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 258 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 259 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 260 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 261 */
Simon Cooksey 0:fb7af294d5d9 262 #define __STREXB(value, ptr) __strex(value, ptr)
Simon Cooksey 0:fb7af294d5d9 263
Simon Cooksey 0:fb7af294d5d9 264
Simon Cooksey 0:fb7af294d5d9 265 /** \brief STR Exclusive (16 bit)
Simon Cooksey 0:fb7af294d5d9 266
Simon Cooksey 0:fb7af294d5d9 267 This function executes a exclusive STR instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 268
Simon Cooksey 0:fb7af294d5d9 269 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 270 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 271 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 272 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 273 */
Simon Cooksey 0:fb7af294d5d9 274 #define __STREXH(value, ptr) __strex(value, ptr)
Simon Cooksey 0:fb7af294d5d9 275
Simon Cooksey 0:fb7af294d5d9 276
Simon Cooksey 0:fb7af294d5d9 277 /** \brief STR Exclusive (32 bit)
Simon Cooksey 0:fb7af294d5d9 278
Simon Cooksey 0:fb7af294d5d9 279 This function executes a exclusive STR instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 280
Simon Cooksey 0:fb7af294d5d9 281 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 282 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 283 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 284 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 285 */
Simon Cooksey 0:fb7af294d5d9 286 #define __STREXW(value, ptr) __strex(value, ptr)
Simon Cooksey 0:fb7af294d5d9 287
Simon Cooksey 0:fb7af294d5d9 288
Simon Cooksey 0:fb7af294d5d9 289 /** \brief Remove the exclusive lock
Simon Cooksey 0:fb7af294d5d9 290
Simon Cooksey 0:fb7af294d5d9 291 This function removes the exclusive lock which is created by LDREX.
Simon Cooksey 0:fb7af294d5d9 292
Simon Cooksey 0:fb7af294d5d9 293 */
Simon Cooksey 0:fb7af294d5d9 294 #define __CLREX __clrex
Simon Cooksey 0:fb7af294d5d9 295
Simon Cooksey 0:fb7af294d5d9 296
Simon Cooksey 0:fb7af294d5d9 297 /** \brief Signed Saturate
Simon Cooksey 0:fb7af294d5d9 298
Simon Cooksey 0:fb7af294d5d9 299 This function saturates a signed value.
Simon Cooksey 0:fb7af294d5d9 300
Simon Cooksey 0:fb7af294d5d9 301 \param [in] value Value to be saturated
Simon Cooksey 0:fb7af294d5d9 302 \param [in] sat Bit position to saturate to (1..32)
Simon Cooksey 0:fb7af294d5d9 303 \return Saturated value
Simon Cooksey 0:fb7af294d5d9 304 */
Simon Cooksey 0:fb7af294d5d9 305 #define __SSAT __ssat
Simon Cooksey 0:fb7af294d5d9 306
Simon Cooksey 0:fb7af294d5d9 307
Simon Cooksey 0:fb7af294d5d9 308 /** \brief Unsigned Saturate
Simon Cooksey 0:fb7af294d5d9 309
Simon Cooksey 0:fb7af294d5d9 310 This function saturates an unsigned value.
Simon Cooksey 0:fb7af294d5d9 311
Simon Cooksey 0:fb7af294d5d9 312 \param [in] value Value to be saturated
Simon Cooksey 0:fb7af294d5d9 313 \param [in] sat Bit position to saturate to (0..31)
Simon Cooksey 0:fb7af294d5d9 314 \return Saturated value
Simon Cooksey 0:fb7af294d5d9 315 */
Simon Cooksey 0:fb7af294d5d9 316 #define __USAT __usat
Simon Cooksey 0:fb7af294d5d9 317
Simon Cooksey 0:fb7af294d5d9 318
Simon Cooksey 0:fb7af294d5d9 319 /** \brief Rotate Right with Extend (32 bit)
Simon Cooksey 0:fb7af294d5d9 320
Simon Cooksey 0:fb7af294d5d9 321 This function moves each bit of a bitstring right by one bit.
Simon Cooksey 0:fb7af294d5d9 322 The carry input is shifted in at the left end of the bitstring.
Simon Cooksey 0:fb7af294d5d9 323
Simon Cooksey 0:fb7af294d5d9 324 \param [in] value Value to rotate
Simon Cooksey 0:fb7af294d5d9 325 \return Rotated value
Simon Cooksey 0:fb7af294d5d9 326 */
Simon Cooksey 0:fb7af294d5d9 327 #ifndef __NO_EMBEDDED_ASM
Simon Cooksey 0:fb7af294d5d9 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 329 {
Simon Cooksey 0:fb7af294d5d9 330 rrx r0, r0
Simon Cooksey 0:fb7af294d5d9 331 bx lr
Simon Cooksey 0:fb7af294d5d9 332 }
Simon Cooksey 0:fb7af294d5d9 333 #endif
Simon Cooksey 0:fb7af294d5d9 334
Simon Cooksey 0:fb7af294d5d9 335
Simon Cooksey 0:fb7af294d5d9 336 /** \brief LDRT Unprivileged (8 bit)
Simon Cooksey 0:fb7af294d5d9 337
Simon Cooksey 0:fb7af294d5d9 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
Simon Cooksey 0:fb7af294d5d9 339
Simon Cooksey 0:fb7af294d5d9 340 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 341 \return value of type uint8_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 342 */
Simon Cooksey 0:fb7af294d5d9 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
Simon Cooksey 0:fb7af294d5d9 344
Simon Cooksey 0:fb7af294d5d9 345
Simon Cooksey 0:fb7af294d5d9 346 /** \brief LDRT Unprivileged (16 bit)
Simon Cooksey 0:fb7af294d5d9 347
Simon Cooksey 0:fb7af294d5d9 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 349
Simon Cooksey 0:fb7af294d5d9 350 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 351 \return value of type uint16_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 352 */
Simon Cooksey 0:fb7af294d5d9 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
Simon Cooksey 0:fb7af294d5d9 354
Simon Cooksey 0:fb7af294d5d9 355
Simon Cooksey 0:fb7af294d5d9 356 /** \brief LDRT Unprivileged (32 bit)
Simon Cooksey 0:fb7af294d5d9 357
Simon Cooksey 0:fb7af294d5d9 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 359
Simon Cooksey 0:fb7af294d5d9 360 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 361 \return value of type uint32_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 362 */
Simon Cooksey 0:fb7af294d5d9 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
Simon Cooksey 0:fb7af294d5d9 364
Simon Cooksey 0:fb7af294d5d9 365
Simon Cooksey 0:fb7af294d5d9 366 /** \brief STRT Unprivileged (8 bit)
Simon Cooksey 0:fb7af294d5d9 367
Simon Cooksey 0:fb7af294d5d9 368 This function executes a Unprivileged STRT instruction for 8 bit values.
Simon Cooksey 0:fb7af294d5d9 369
Simon Cooksey 0:fb7af294d5d9 370 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 371 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 372 */
Simon Cooksey 0:fb7af294d5d9 373 #define __STRBT(value, ptr) __strt(value, ptr)
Simon Cooksey 0:fb7af294d5d9 374
Simon Cooksey 0:fb7af294d5d9 375
Simon Cooksey 0:fb7af294d5d9 376 /** \brief STRT Unprivileged (16 bit)
Simon Cooksey 0:fb7af294d5d9 377
Simon Cooksey 0:fb7af294d5d9 378 This function executes a Unprivileged STRT instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 379
Simon Cooksey 0:fb7af294d5d9 380 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 381 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 382 */
Simon Cooksey 0:fb7af294d5d9 383 #define __STRHT(value, ptr) __strt(value, ptr)
Simon Cooksey 0:fb7af294d5d9 384
Simon Cooksey 0:fb7af294d5d9 385
Simon Cooksey 0:fb7af294d5d9 386 /** \brief STRT Unprivileged (32 bit)
Simon Cooksey 0:fb7af294d5d9 387
Simon Cooksey 0:fb7af294d5d9 388 This function executes a Unprivileged STRT instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 389
Simon Cooksey 0:fb7af294d5d9 390 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 391 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 392 */
Simon Cooksey 0:fb7af294d5d9 393 #define __STRT(value, ptr) __strt(value, ptr)
Simon Cooksey 0:fb7af294d5d9 394
Simon Cooksey 0:fb7af294d5d9 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Simon Cooksey 0:fb7af294d5d9 396
Simon Cooksey 0:fb7af294d5d9 397
Simon Cooksey 0:fb7af294d5d9 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Simon Cooksey 0:fb7af294d5d9 399 /* GNU gcc specific functions */
Simon Cooksey 0:fb7af294d5d9 400
Simon Cooksey 0:fb7af294d5d9 401 /* Define macros for porting to both thumb1 and thumb2.
Simon Cooksey 0:fb7af294d5d9 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
Simon Cooksey 0:fb7af294d5d9 403 * Otherwise, use general registers, specified by constrant "r" */
Simon Cooksey 0:fb7af294d5d9 404 #if defined (__thumb__) && !defined (__thumb2__)
Simon Cooksey 0:fb7af294d5d9 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Simon Cooksey 0:fb7af294d5d9 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Simon Cooksey 0:fb7af294d5d9 407 #else
Simon Cooksey 0:fb7af294d5d9 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Simon Cooksey 0:fb7af294d5d9 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Simon Cooksey 0:fb7af294d5d9 410 #endif
Simon Cooksey 0:fb7af294d5d9 411
Simon Cooksey 0:fb7af294d5d9 412 /** \brief No Operation
Simon Cooksey 0:fb7af294d5d9 413
Simon Cooksey 0:fb7af294d5d9 414 No Operation does nothing. This instruction can be used for code alignment purposes.
Simon Cooksey 0:fb7af294d5d9 415 */
Simon Cooksey 0:fb7af294d5d9 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
Simon Cooksey 0:fb7af294d5d9 417 {
Simon Cooksey 0:fb7af294d5d9 418 __ASM volatile ("nop");
Simon Cooksey 0:fb7af294d5d9 419 }
Simon Cooksey 0:fb7af294d5d9 420
Simon Cooksey 0:fb7af294d5d9 421
Simon Cooksey 0:fb7af294d5d9 422 /** \brief Wait For Interrupt
Simon Cooksey 0:fb7af294d5d9 423
Simon Cooksey 0:fb7af294d5d9 424 Wait For Interrupt is a hint instruction that suspends execution
Simon Cooksey 0:fb7af294d5d9 425 until one of a number of events occurs.
Simon Cooksey 0:fb7af294d5d9 426 */
Simon Cooksey 0:fb7af294d5d9 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
Simon Cooksey 0:fb7af294d5d9 428 {
Simon Cooksey 0:fb7af294d5d9 429 __ASM volatile ("wfi");
Simon Cooksey 0:fb7af294d5d9 430 }
Simon Cooksey 0:fb7af294d5d9 431
Simon Cooksey 0:fb7af294d5d9 432
Simon Cooksey 0:fb7af294d5d9 433 /** \brief Wait For Event
Simon Cooksey 0:fb7af294d5d9 434
Simon Cooksey 0:fb7af294d5d9 435 Wait For Event is a hint instruction that permits the processor to enter
Simon Cooksey 0:fb7af294d5d9 436 a low-power state until one of a number of events occurs.
Simon Cooksey 0:fb7af294d5d9 437 */
Simon Cooksey 0:fb7af294d5d9 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
Simon Cooksey 0:fb7af294d5d9 439 {
Simon Cooksey 0:fb7af294d5d9 440 __ASM volatile ("wfe");
Simon Cooksey 0:fb7af294d5d9 441 }
Simon Cooksey 0:fb7af294d5d9 442
Simon Cooksey 0:fb7af294d5d9 443
Simon Cooksey 0:fb7af294d5d9 444 /** \brief Send Event
Simon Cooksey 0:fb7af294d5d9 445
Simon Cooksey 0:fb7af294d5d9 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Simon Cooksey 0:fb7af294d5d9 447 */
Simon Cooksey 0:fb7af294d5d9 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
Simon Cooksey 0:fb7af294d5d9 449 {
Simon Cooksey 0:fb7af294d5d9 450 __ASM volatile ("sev");
Simon Cooksey 0:fb7af294d5d9 451 }
Simon Cooksey 0:fb7af294d5d9 452
Simon Cooksey 0:fb7af294d5d9 453
Simon Cooksey 0:fb7af294d5d9 454 /** \brief Instruction Synchronization Barrier
Simon Cooksey 0:fb7af294d5d9 455
Simon Cooksey 0:fb7af294d5d9 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
Simon Cooksey 0:fb7af294d5d9 457 so that all instructions following the ISB are fetched from cache or
Simon Cooksey 0:fb7af294d5d9 458 memory, after the instruction has been completed.
Simon Cooksey 0:fb7af294d5d9 459 */
Simon Cooksey 0:fb7af294d5d9 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
Simon Cooksey 0:fb7af294d5d9 461 {
Simon Cooksey 0:fb7af294d5d9 462 __ASM volatile ("isb 0xF":::"memory");
Simon Cooksey 0:fb7af294d5d9 463 }
Simon Cooksey 0:fb7af294d5d9 464
Simon Cooksey 0:fb7af294d5d9 465
Simon Cooksey 0:fb7af294d5d9 466 /** \brief Data Synchronization Barrier
Simon Cooksey 0:fb7af294d5d9 467
Simon Cooksey 0:fb7af294d5d9 468 This function acts as a special kind of Data Memory Barrier.
Simon Cooksey 0:fb7af294d5d9 469 It completes when all explicit memory accesses before this instruction complete.
Simon Cooksey 0:fb7af294d5d9 470 */
Simon Cooksey 0:fb7af294d5d9 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
Simon Cooksey 0:fb7af294d5d9 472 {
Simon Cooksey 0:fb7af294d5d9 473 __ASM volatile ("dsb 0xF":::"memory");
Simon Cooksey 0:fb7af294d5d9 474 }
Simon Cooksey 0:fb7af294d5d9 475
Simon Cooksey 0:fb7af294d5d9 476
Simon Cooksey 0:fb7af294d5d9 477 /** \brief Data Memory Barrier
Simon Cooksey 0:fb7af294d5d9 478
Simon Cooksey 0:fb7af294d5d9 479 This function ensures the apparent order of the explicit memory operations before
Simon Cooksey 0:fb7af294d5d9 480 and after the instruction, without ensuring their completion.
Simon Cooksey 0:fb7af294d5d9 481 */
Simon Cooksey 0:fb7af294d5d9 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
Simon Cooksey 0:fb7af294d5d9 483 {
Simon Cooksey 0:fb7af294d5d9 484 __ASM volatile ("dmb 0xF":::"memory");
Simon Cooksey 0:fb7af294d5d9 485 }
Simon Cooksey 0:fb7af294d5d9 486
Simon Cooksey 0:fb7af294d5d9 487
Simon Cooksey 0:fb7af294d5d9 488 /** \brief Reverse byte order (32 bit)
Simon Cooksey 0:fb7af294d5d9 489
Simon Cooksey 0:fb7af294d5d9 490 This function reverses the byte order in integer value.
Simon Cooksey 0:fb7af294d5d9 491
Simon Cooksey 0:fb7af294d5d9 492 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 493 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 494 */
Simon Cooksey 0:fb7af294d5d9 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 496 {
Simon Cooksey 0:fb7af294d5d9 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
Simon Cooksey 0:fb7af294d5d9 498 return __builtin_bswap32(value);
Simon Cooksey 0:fb7af294d5d9 499 #else
Simon Cooksey 0:fb7af294d5d9 500 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 501
Simon Cooksey 0:fb7af294d5d9 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Simon Cooksey 0:fb7af294d5d9 503 return(result);
Simon Cooksey 0:fb7af294d5d9 504 #endif
Simon Cooksey 0:fb7af294d5d9 505 }
Simon Cooksey 0:fb7af294d5d9 506
Simon Cooksey 0:fb7af294d5d9 507
Simon Cooksey 0:fb7af294d5d9 508 /** \brief Reverse byte order (16 bit)
Simon Cooksey 0:fb7af294d5d9 509
Simon Cooksey 0:fb7af294d5d9 510 This function reverses the byte order in two unsigned short values.
Simon Cooksey 0:fb7af294d5d9 511
Simon Cooksey 0:fb7af294d5d9 512 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 513 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 514 */
Simon Cooksey 0:fb7af294d5d9 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 516 {
Simon Cooksey 0:fb7af294d5d9 517 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 518
Simon Cooksey 0:fb7af294d5d9 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Simon Cooksey 0:fb7af294d5d9 520 return(result);
Simon Cooksey 0:fb7af294d5d9 521 }
Simon Cooksey 0:fb7af294d5d9 522
Simon Cooksey 0:fb7af294d5d9 523
Simon Cooksey 0:fb7af294d5d9 524 /** \brief Reverse byte order in signed short value
Simon Cooksey 0:fb7af294d5d9 525
Simon Cooksey 0:fb7af294d5d9 526 This function reverses the byte order in a signed short value with sign extension to integer.
Simon Cooksey 0:fb7af294d5d9 527
Simon Cooksey 0:fb7af294d5d9 528 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 529 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 530 */
Simon Cooksey 0:fb7af294d5d9 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
Simon Cooksey 0:fb7af294d5d9 532 {
Simon Cooksey 0:fb7af294d5d9 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Simon Cooksey 0:fb7af294d5d9 534 return (short)__builtin_bswap16(value);
Simon Cooksey 0:fb7af294d5d9 535 #else
Simon Cooksey 0:fb7af294d5d9 536 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 537
Simon Cooksey 0:fb7af294d5d9 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Simon Cooksey 0:fb7af294d5d9 539 return(result);
Simon Cooksey 0:fb7af294d5d9 540 #endif
Simon Cooksey 0:fb7af294d5d9 541 }
Simon Cooksey 0:fb7af294d5d9 542
Simon Cooksey 0:fb7af294d5d9 543
Simon Cooksey 0:fb7af294d5d9 544 /** \brief Rotate Right in unsigned value (32 bit)
Simon Cooksey 0:fb7af294d5d9 545
Simon Cooksey 0:fb7af294d5d9 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Simon Cooksey 0:fb7af294d5d9 547
Simon Cooksey 0:fb7af294d5d9 548 \param [in] value Value to rotate
Simon Cooksey 0:fb7af294d5d9 549 \param [in] value Number of Bits to rotate
Simon Cooksey 0:fb7af294d5d9 550 \return Rotated value
Simon Cooksey 0:fb7af294d5d9 551 */
Simon Cooksey 0:fb7af294d5d9 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Simon Cooksey 0:fb7af294d5d9 553 {
Simon Cooksey 0:fb7af294d5d9 554 return (op1 >> op2) | (op1 << (32 - op2));
Simon Cooksey 0:fb7af294d5d9 555 }
Simon Cooksey 0:fb7af294d5d9 556
Simon Cooksey 0:fb7af294d5d9 557
Simon Cooksey 0:fb7af294d5d9 558 /** \brief Breakpoint
Simon Cooksey 0:fb7af294d5d9 559
Simon Cooksey 0:fb7af294d5d9 560 This function causes the processor to enter Debug state.
Simon Cooksey 0:fb7af294d5d9 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Simon Cooksey 0:fb7af294d5d9 562
Simon Cooksey 0:fb7af294d5d9 563 \param [in] value is ignored by the processor.
Simon Cooksey 0:fb7af294d5d9 564 If required, a debugger can use it to store additional information about the breakpoint.
Simon Cooksey 0:fb7af294d5d9 565 */
Simon Cooksey 0:fb7af294d5d9 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Simon Cooksey 0:fb7af294d5d9 567
Simon Cooksey 0:fb7af294d5d9 568
Simon Cooksey 0:fb7af294d5d9 569 /** \brief Reverse bit order of value
Simon Cooksey 0:fb7af294d5d9 570
Simon Cooksey 0:fb7af294d5d9 571 This function reverses the bit order of the given value.
Simon Cooksey 0:fb7af294d5d9 572
Simon Cooksey 0:fb7af294d5d9 573 \param [in] value Value to reverse
Simon Cooksey 0:fb7af294d5d9 574 \return Reversed value
Simon Cooksey 0:fb7af294d5d9 575 */
Simon Cooksey 0:fb7af294d5d9 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 577 {
Simon Cooksey 0:fb7af294d5d9 578 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 579
Simon Cooksey 0:fb7af294d5d9 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Simon Cooksey 0:fb7af294d5d9 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Simon Cooksey 0:fb7af294d5d9 582 #else
Simon Cooksey 0:fb7af294d5d9 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
Simon Cooksey 0:fb7af294d5d9 584
Simon Cooksey 0:fb7af294d5d9 585 result = value; // r will be reversed bits of v; first get LSB of v
Simon Cooksey 0:fb7af294d5d9 586 for (value >>= 1; value; value >>= 1)
Simon Cooksey 0:fb7af294d5d9 587 {
Simon Cooksey 0:fb7af294d5d9 588 result <<= 1;
Simon Cooksey 0:fb7af294d5d9 589 result |= value & 1;
Simon Cooksey 0:fb7af294d5d9 590 s--;
Simon Cooksey 0:fb7af294d5d9 591 }
Simon Cooksey 0:fb7af294d5d9 592 result <<= s; // shift when v's highest bits are zero
Simon Cooksey 0:fb7af294d5d9 593 #endif
Simon Cooksey 0:fb7af294d5d9 594 return(result);
Simon Cooksey 0:fb7af294d5d9 595 }
Simon Cooksey 0:fb7af294d5d9 596
Simon Cooksey 0:fb7af294d5d9 597
Simon Cooksey 0:fb7af294d5d9 598 /** \brief Count leading zeros
Simon Cooksey 0:fb7af294d5d9 599
Simon Cooksey 0:fb7af294d5d9 600 This function counts the number of leading zeros of a data value.
Simon Cooksey 0:fb7af294d5d9 601
Simon Cooksey 0:fb7af294d5d9 602 \param [in] value Value to count the leading zeros
Simon Cooksey 0:fb7af294d5d9 603 \return number of leading zeros in value
Simon Cooksey 0:fb7af294d5d9 604 */
Simon Cooksey 0:fb7af294d5d9 605 #define __CLZ __builtin_clz
Simon Cooksey 0:fb7af294d5d9 606
Simon Cooksey 0:fb7af294d5d9 607
Simon Cooksey 0:fb7af294d5d9 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Simon Cooksey 0:fb7af294d5d9 609
Simon Cooksey 0:fb7af294d5d9 610 /** \brief LDR Exclusive (8 bit)
Simon Cooksey 0:fb7af294d5d9 611
Simon Cooksey 0:fb7af294d5d9 612 This function executes a exclusive LDR instruction for 8 bit value.
Simon Cooksey 0:fb7af294d5d9 613
Simon Cooksey 0:fb7af294d5d9 614 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 615 \return value of type uint8_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 616 */
Simon Cooksey 0:fb7af294d5d9 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
Simon Cooksey 0:fb7af294d5d9 618 {
Simon Cooksey 0:fb7af294d5d9 619 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 620
Simon Cooksey 0:fb7af294d5d9 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Simon Cooksey 0:fb7af294d5d9 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 623 #else
Simon Cooksey 0:fb7af294d5d9 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Simon Cooksey 0:fb7af294d5d9 625 accepted by assembler. So has to use following less efficient pattern.
Simon Cooksey 0:fb7af294d5d9 626 */
Simon Cooksey 0:fb7af294d5d9 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Simon Cooksey 0:fb7af294d5d9 628 #endif
Simon Cooksey 0:fb7af294d5d9 629 return ((uint8_t) result); /* Add explicit type cast here */
Simon Cooksey 0:fb7af294d5d9 630 }
Simon Cooksey 0:fb7af294d5d9 631
Simon Cooksey 0:fb7af294d5d9 632
Simon Cooksey 0:fb7af294d5d9 633 /** \brief LDR Exclusive (16 bit)
Simon Cooksey 0:fb7af294d5d9 634
Simon Cooksey 0:fb7af294d5d9 635 This function executes a exclusive LDR instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 636
Simon Cooksey 0:fb7af294d5d9 637 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 638 \return value of type uint16_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 639 */
Simon Cooksey 0:fb7af294d5d9 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
Simon Cooksey 0:fb7af294d5d9 641 {
Simon Cooksey 0:fb7af294d5d9 642 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 643
Simon Cooksey 0:fb7af294d5d9 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Simon Cooksey 0:fb7af294d5d9 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 646 #else
Simon Cooksey 0:fb7af294d5d9 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Simon Cooksey 0:fb7af294d5d9 648 accepted by assembler. So has to use following less efficient pattern.
Simon Cooksey 0:fb7af294d5d9 649 */
Simon Cooksey 0:fb7af294d5d9 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Simon Cooksey 0:fb7af294d5d9 651 #endif
Simon Cooksey 0:fb7af294d5d9 652 return ((uint16_t) result); /* Add explicit type cast here */
Simon Cooksey 0:fb7af294d5d9 653 }
Simon Cooksey 0:fb7af294d5d9 654
Simon Cooksey 0:fb7af294d5d9 655
Simon Cooksey 0:fb7af294d5d9 656 /** \brief LDR Exclusive (32 bit)
Simon Cooksey 0:fb7af294d5d9 657
Simon Cooksey 0:fb7af294d5d9 658 This function executes a exclusive LDR instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 659
Simon Cooksey 0:fb7af294d5d9 660 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 661 \return value of type uint32_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 662 */
Simon Cooksey 0:fb7af294d5d9 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
Simon Cooksey 0:fb7af294d5d9 664 {
Simon Cooksey 0:fb7af294d5d9 665 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 666
Simon Cooksey 0:fb7af294d5d9 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 668 return(result);
Simon Cooksey 0:fb7af294d5d9 669 }
Simon Cooksey 0:fb7af294d5d9 670
Simon Cooksey 0:fb7af294d5d9 671
Simon Cooksey 0:fb7af294d5d9 672 /** \brief STR Exclusive (8 bit)
Simon Cooksey 0:fb7af294d5d9 673
Simon Cooksey 0:fb7af294d5d9 674 This function executes a exclusive STR instruction for 8 bit values.
Simon Cooksey 0:fb7af294d5d9 675
Simon Cooksey 0:fb7af294d5d9 676 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 677 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 678 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 679 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 680 */
Simon Cooksey 0:fb7af294d5d9 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Simon Cooksey 0:fb7af294d5d9 682 {
Simon Cooksey 0:fb7af294d5d9 683 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 684
Simon Cooksey 0:fb7af294d5d9 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
Simon Cooksey 0:fb7af294d5d9 686 return(result);
Simon Cooksey 0:fb7af294d5d9 687 }
Simon Cooksey 0:fb7af294d5d9 688
Simon Cooksey 0:fb7af294d5d9 689
Simon Cooksey 0:fb7af294d5d9 690 /** \brief STR Exclusive (16 bit)
Simon Cooksey 0:fb7af294d5d9 691
Simon Cooksey 0:fb7af294d5d9 692 This function executes a exclusive STR instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 693
Simon Cooksey 0:fb7af294d5d9 694 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 695 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 696 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 697 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 698 */
Simon Cooksey 0:fb7af294d5d9 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Simon Cooksey 0:fb7af294d5d9 700 {
Simon Cooksey 0:fb7af294d5d9 701 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 702
Simon Cooksey 0:fb7af294d5d9 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
Simon Cooksey 0:fb7af294d5d9 704 return(result);
Simon Cooksey 0:fb7af294d5d9 705 }
Simon Cooksey 0:fb7af294d5d9 706
Simon Cooksey 0:fb7af294d5d9 707
Simon Cooksey 0:fb7af294d5d9 708 /** \brief STR Exclusive (32 bit)
Simon Cooksey 0:fb7af294d5d9 709
Simon Cooksey 0:fb7af294d5d9 710 This function executes a exclusive STR instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 711
Simon Cooksey 0:fb7af294d5d9 712 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 713 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 714 \return 0 Function succeeded
Simon Cooksey 0:fb7af294d5d9 715 \return 1 Function failed
Simon Cooksey 0:fb7af294d5d9 716 */
Simon Cooksey 0:fb7af294d5d9 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Simon Cooksey 0:fb7af294d5d9 718 {
Simon Cooksey 0:fb7af294d5d9 719 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 720
Simon Cooksey 0:fb7af294d5d9 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Simon Cooksey 0:fb7af294d5d9 722 return(result);
Simon Cooksey 0:fb7af294d5d9 723 }
Simon Cooksey 0:fb7af294d5d9 724
Simon Cooksey 0:fb7af294d5d9 725
Simon Cooksey 0:fb7af294d5d9 726 /** \brief Remove the exclusive lock
Simon Cooksey 0:fb7af294d5d9 727
Simon Cooksey 0:fb7af294d5d9 728 This function removes the exclusive lock which is created by LDREX.
Simon Cooksey 0:fb7af294d5d9 729
Simon Cooksey 0:fb7af294d5d9 730 */
Simon Cooksey 0:fb7af294d5d9 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
Simon Cooksey 0:fb7af294d5d9 732 {
Simon Cooksey 0:fb7af294d5d9 733 __ASM volatile ("clrex" ::: "memory");
Simon Cooksey 0:fb7af294d5d9 734 }
Simon Cooksey 0:fb7af294d5d9 735
Simon Cooksey 0:fb7af294d5d9 736
Simon Cooksey 0:fb7af294d5d9 737 /** \brief Signed Saturate
Simon Cooksey 0:fb7af294d5d9 738
Simon Cooksey 0:fb7af294d5d9 739 This function saturates a signed value.
Simon Cooksey 0:fb7af294d5d9 740
Simon Cooksey 0:fb7af294d5d9 741 \param [in] value Value to be saturated
Simon Cooksey 0:fb7af294d5d9 742 \param [in] sat Bit position to saturate to (1..32)
Simon Cooksey 0:fb7af294d5d9 743 \return Saturated value
Simon Cooksey 0:fb7af294d5d9 744 */
Simon Cooksey 0:fb7af294d5d9 745 #define __SSAT(ARG1,ARG2) \
Simon Cooksey 0:fb7af294d5d9 746 ({ \
Simon Cooksey 0:fb7af294d5d9 747 uint32_t __RES, __ARG1 = (ARG1); \
Simon Cooksey 0:fb7af294d5d9 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Simon Cooksey 0:fb7af294d5d9 749 __RES; \
Simon Cooksey 0:fb7af294d5d9 750 })
Simon Cooksey 0:fb7af294d5d9 751
Simon Cooksey 0:fb7af294d5d9 752
Simon Cooksey 0:fb7af294d5d9 753 /** \brief Unsigned Saturate
Simon Cooksey 0:fb7af294d5d9 754
Simon Cooksey 0:fb7af294d5d9 755 This function saturates an unsigned value.
Simon Cooksey 0:fb7af294d5d9 756
Simon Cooksey 0:fb7af294d5d9 757 \param [in] value Value to be saturated
Simon Cooksey 0:fb7af294d5d9 758 \param [in] sat Bit position to saturate to (0..31)
Simon Cooksey 0:fb7af294d5d9 759 \return Saturated value
Simon Cooksey 0:fb7af294d5d9 760 */
Simon Cooksey 0:fb7af294d5d9 761 #define __USAT(ARG1,ARG2) \
Simon Cooksey 0:fb7af294d5d9 762 ({ \
Simon Cooksey 0:fb7af294d5d9 763 uint32_t __RES, __ARG1 = (ARG1); \
Simon Cooksey 0:fb7af294d5d9 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Simon Cooksey 0:fb7af294d5d9 765 __RES; \
Simon Cooksey 0:fb7af294d5d9 766 })
Simon Cooksey 0:fb7af294d5d9 767
Simon Cooksey 0:fb7af294d5d9 768
Simon Cooksey 0:fb7af294d5d9 769 /** \brief Rotate Right with Extend (32 bit)
Simon Cooksey 0:fb7af294d5d9 770
Simon Cooksey 0:fb7af294d5d9 771 This function moves each bit of a bitstring right by one bit.
Simon Cooksey 0:fb7af294d5d9 772 The carry input is shifted in at the left end of the bitstring.
Simon Cooksey 0:fb7af294d5d9 773
Simon Cooksey 0:fb7af294d5d9 774 \param [in] value Value to rotate
Simon Cooksey 0:fb7af294d5d9 775 \return Rotated value
Simon Cooksey 0:fb7af294d5d9 776 */
Simon Cooksey 0:fb7af294d5d9 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
Simon Cooksey 0:fb7af294d5d9 778 {
Simon Cooksey 0:fb7af294d5d9 779 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 780
Simon Cooksey 0:fb7af294d5d9 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Simon Cooksey 0:fb7af294d5d9 782 return(result);
Simon Cooksey 0:fb7af294d5d9 783 }
Simon Cooksey 0:fb7af294d5d9 784
Simon Cooksey 0:fb7af294d5d9 785
Simon Cooksey 0:fb7af294d5d9 786 /** \brief LDRT Unprivileged (8 bit)
Simon Cooksey 0:fb7af294d5d9 787
Simon Cooksey 0:fb7af294d5d9 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
Simon Cooksey 0:fb7af294d5d9 789
Simon Cooksey 0:fb7af294d5d9 790 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 791 \return value of type uint8_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 792 */
Simon Cooksey 0:fb7af294d5d9 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
Simon Cooksey 0:fb7af294d5d9 794 {
Simon Cooksey 0:fb7af294d5d9 795 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 796
Simon Cooksey 0:fb7af294d5d9 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Simon Cooksey 0:fb7af294d5d9 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 799 #else
Simon Cooksey 0:fb7af294d5d9 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Simon Cooksey 0:fb7af294d5d9 801 accepted by assembler. So has to use following less efficient pattern.
Simon Cooksey 0:fb7af294d5d9 802 */
Simon Cooksey 0:fb7af294d5d9 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Simon Cooksey 0:fb7af294d5d9 804 #endif
Simon Cooksey 0:fb7af294d5d9 805 return ((uint8_t) result); /* Add explicit type cast here */
Simon Cooksey 0:fb7af294d5d9 806 }
Simon Cooksey 0:fb7af294d5d9 807
Simon Cooksey 0:fb7af294d5d9 808
Simon Cooksey 0:fb7af294d5d9 809 /** \brief LDRT Unprivileged (16 bit)
Simon Cooksey 0:fb7af294d5d9 810
Simon Cooksey 0:fb7af294d5d9 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 812
Simon Cooksey 0:fb7af294d5d9 813 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 814 \return value of type uint16_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 815 */
Simon Cooksey 0:fb7af294d5d9 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
Simon Cooksey 0:fb7af294d5d9 817 {
Simon Cooksey 0:fb7af294d5d9 818 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 819
Simon Cooksey 0:fb7af294d5d9 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Simon Cooksey 0:fb7af294d5d9 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 822 #else
Simon Cooksey 0:fb7af294d5d9 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Simon Cooksey 0:fb7af294d5d9 824 accepted by assembler. So has to use following less efficient pattern.
Simon Cooksey 0:fb7af294d5d9 825 */
Simon Cooksey 0:fb7af294d5d9 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Simon Cooksey 0:fb7af294d5d9 827 #endif
Simon Cooksey 0:fb7af294d5d9 828 return ((uint16_t) result); /* Add explicit type cast here */
Simon Cooksey 0:fb7af294d5d9 829 }
Simon Cooksey 0:fb7af294d5d9 830
Simon Cooksey 0:fb7af294d5d9 831
Simon Cooksey 0:fb7af294d5d9 832 /** \brief LDRT Unprivileged (32 bit)
Simon Cooksey 0:fb7af294d5d9 833
Simon Cooksey 0:fb7af294d5d9 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 835
Simon Cooksey 0:fb7af294d5d9 836 \param [in] ptr Pointer to data
Simon Cooksey 0:fb7af294d5d9 837 \return value of type uint32_t at (*ptr)
Simon Cooksey 0:fb7af294d5d9 838 */
Simon Cooksey 0:fb7af294d5d9 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
Simon Cooksey 0:fb7af294d5d9 840 {
Simon Cooksey 0:fb7af294d5d9 841 uint32_t result;
Simon Cooksey 0:fb7af294d5d9 842
Simon Cooksey 0:fb7af294d5d9 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
Simon Cooksey 0:fb7af294d5d9 844 return(result);
Simon Cooksey 0:fb7af294d5d9 845 }
Simon Cooksey 0:fb7af294d5d9 846
Simon Cooksey 0:fb7af294d5d9 847
Simon Cooksey 0:fb7af294d5d9 848 /** \brief STRT Unprivileged (8 bit)
Simon Cooksey 0:fb7af294d5d9 849
Simon Cooksey 0:fb7af294d5d9 850 This function executes a Unprivileged STRT instruction for 8 bit values.
Simon Cooksey 0:fb7af294d5d9 851
Simon Cooksey 0:fb7af294d5d9 852 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 853 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 854 */
Simon Cooksey 0:fb7af294d5d9 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
Simon Cooksey 0:fb7af294d5d9 856 {
Simon Cooksey 0:fb7af294d5d9 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Simon Cooksey 0:fb7af294d5d9 858 }
Simon Cooksey 0:fb7af294d5d9 859
Simon Cooksey 0:fb7af294d5d9 860
Simon Cooksey 0:fb7af294d5d9 861 /** \brief STRT Unprivileged (16 bit)
Simon Cooksey 0:fb7af294d5d9 862
Simon Cooksey 0:fb7af294d5d9 863 This function executes a Unprivileged STRT instruction for 16 bit values.
Simon Cooksey 0:fb7af294d5d9 864
Simon Cooksey 0:fb7af294d5d9 865 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 866 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 867 */
Simon Cooksey 0:fb7af294d5d9 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
Simon Cooksey 0:fb7af294d5d9 869 {
Simon Cooksey 0:fb7af294d5d9 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Simon Cooksey 0:fb7af294d5d9 871 }
Simon Cooksey 0:fb7af294d5d9 872
Simon Cooksey 0:fb7af294d5d9 873
Simon Cooksey 0:fb7af294d5d9 874 /** \brief STRT Unprivileged (32 bit)
Simon Cooksey 0:fb7af294d5d9 875
Simon Cooksey 0:fb7af294d5d9 876 This function executes a Unprivileged STRT instruction for 32 bit values.
Simon Cooksey 0:fb7af294d5d9 877
Simon Cooksey 0:fb7af294d5d9 878 \param [in] value Value to store
Simon Cooksey 0:fb7af294d5d9 879 \param [in] ptr Pointer to location
Simon Cooksey 0:fb7af294d5d9 880 */
Simon Cooksey 0:fb7af294d5d9 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
Simon Cooksey 0:fb7af294d5d9 882 {
Simon Cooksey 0:fb7af294d5d9 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
Simon Cooksey 0:fb7af294d5d9 884 }
Simon Cooksey 0:fb7af294d5d9 885
Simon Cooksey 0:fb7af294d5d9 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Simon Cooksey 0:fb7af294d5d9 887
Simon Cooksey 0:fb7af294d5d9 888
Simon Cooksey 0:fb7af294d5d9 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Simon Cooksey 0:fb7af294d5d9 890 /* IAR iccarm specific functions */
Simon Cooksey 0:fb7af294d5d9 891 #include <cmsis_iar.h>
Simon Cooksey 0:fb7af294d5d9 892
Simon Cooksey 0:fb7af294d5d9 893
Simon Cooksey 0:fb7af294d5d9 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Simon Cooksey 0:fb7af294d5d9 895 /* TI CCS specific functions */
Simon Cooksey 0:fb7af294d5d9 896 #include <cmsis_ccs.h>
Simon Cooksey 0:fb7af294d5d9 897
Simon Cooksey 0:fb7af294d5d9 898
Simon Cooksey 0:fb7af294d5d9 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Simon Cooksey 0:fb7af294d5d9 900 /* TASKING carm specific functions */
Simon Cooksey 0:fb7af294d5d9 901 /*
Simon Cooksey 0:fb7af294d5d9 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
Simon Cooksey 0:fb7af294d5d9 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
Simon Cooksey 0:fb7af294d5d9 904 * Including the CMSIS ones.
Simon Cooksey 0:fb7af294d5d9 905 */
Simon Cooksey 0:fb7af294d5d9 906
Simon Cooksey 0:fb7af294d5d9 907
Simon Cooksey 0:fb7af294d5d9 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Simon Cooksey 0:fb7af294d5d9 909 /* Cosmic specific functions */
Simon Cooksey 0:fb7af294d5d9 910 #include <cmsis_csm.h>
Simon Cooksey 0:fb7af294d5d9 911
Simon Cooksey 0:fb7af294d5d9 912 #endif
Simon Cooksey 0:fb7af294d5d9 913
Simon Cooksey 0:fb7af294d5d9 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Simon Cooksey 0:fb7af294d5d9 915
Simon Cooksey 0:fb7af294d5d9 916 #endif /* __CORE_CMINSTR_H */