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cmsis/core_ca9.h@0:fb7af294d5d9, 2016-11-17 (annotated)

Committer:
Simon Cooksey
Date:
Thu Nov 17 16:43:53 2016 +0000
Revision:
0:fb7af294d5d9
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Simon Cooksey 0:fb7af294d5d9 1 /**************************************************************************//**
Simon Cooksey 0:fb7af294d5d9 2 * @file core_ca9.h
Simon Cooksey 0:fb7af294d5d9 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Simon Cooksey 0:fb7af294d5d9 4 * @version
Simon Cooksey 0:fb7af294d5d9 5 * @date 25 March 2013
Simon Cooksey 0:fb7af294d5d9 6 *
Simon Cooksey 0:fb7af294d5d9 7 * @note
Simon Cooksey 0:fb7af294d5d9 8 *
Simon Cooksey 0:fb7af294d5d9 9 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Simon Cooksey 0:fb7af294d5d9 11
Simon Cooksey 0:fb7af294d5d9 12 All rights reserved.
Simon Cooksey 0:fb7af294d5d9 13 Redistribution and use in source and binary forms, with or without
Simon Cooksey 0:fb7af294d5d9 14 modification, are permitted provided that the following conditions are met:
Simon Cooksey 0:fb7af294d5d9 15 - Redistributions of source code must retain the above copyright
Simon Cooksey 0:fb7af294d5d9 16 notice, this list of conditions and the following disclaimer.
Simon Cooksey 0:fb7af294d5d9 17 - Redistributions in binary form must reproduce the above copyright
Simon Cooksey 0:fb7af294d5d9 18 notice, this list of conditions and the following disclaimer in the
Simon Cooksey 0:fb7af294d5d9 19 documentation and/or other materials provided with the distribution.
Simon Cooksey 0:fb7af294d5d9 20 - Neither the name of ARM nor the names of its contributors may be used
Simon Cooksey 0:fb7af294d5d9 21 to endorse or promote products derived from this software without
Simon Cooksey 0:fb7af294d5d9 22 specific prior written permission.
Simon Cooksey 0:fb7af294d5d9 23 *
Simon Cooksey 0:fb7af294d5d9 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Simon Cooksey 0:fb7af294d5d9 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Simon Cooksey 0:fb7af294d5d9 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Simon Cooksey 0:fb7af294d5d9 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Simon Cooksey 0:fb7af294d5d9 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Simon Cooksey 0:fb7af294d5d9 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Simon Cooksey 0:fb7af294d5d9 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Simon Cooksey 0:fb7af294d5d9 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Simon Cooksey 0:fb7af294d5d9 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Simon Cooksey 0:fb7af294d5d9 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Simon Cooksey 0:fb7af294d5d9 34 POSSIBILITY OF SUCH DAMAGE.
Simon Cooksey 0:fb7af294d5d9 35 ---------------------------------------------------------------------------*/
Simon Cooksey 0:fb7af294d5d9 36
Simon Cooksey 0:fb7af294d5d9 37
Simon Cooksey 0:fb7af294d5d9 38 #if defined ( __ICCARM__ )
Simon Cooksey 0:fb7af294d5d9 39 #pragma system_include /* treat file as system include file for MISRA check */
Simon Cooksey 0:fb7af294d5d9 40 #endif
Simon Cooksey 0:fb7af294d5d9 41
Simon Cooksey 0:fb7af294d5d9 42 #ifdef __cplusplus
Simon Cooksey 0:fb7af294d5d9 43 extern "C" {
Simon Cooksey 0:fb7af294d5d9 44 #endif
Simon Cooksey 0:fb7af294d5d9 45
Simon Cooksey 0:fb7af294d5d9 46 #ifndef __CORE_CA9_H_GENERIC
Simon Cooksey 0:fb7af294d5d9 47 #define __CORE_CA9_H_GENERIC
Simon Cooksey 0:fb7af294d5d9 48
Simon Cooksey 0:fb7af294d5d9 49
Simon Cooksey 0:fb7af294d5d9 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Simon Cooksey 0:fb7af294d5d9 51 CMSIS violates the following MISRA-C:2004 rules:
Simon Cooksey 0:fb7af294d5d9 52
Simon Cooksey 0:fb7af294d5d9 53 \li Required Rule 8.5, object/function definition in header file.<br>
Simon Cooksey 0:fb7af294d5d9 54 Function definitions in header files are used to allow 'inlining'.
Simon Cooksey 0:fb7af294d5d9 55
Simon Cooksey 0:fb7af294d5d9 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Simon Cooksey 0:fb7af294d5d9 57 Unions are used for effective representation of core registers.
Simon Cooksey 0:fb7af294d5d9 58
Simon Cooksey 0:fb7af294d5d9 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Simon Cooksey 0:fb7af294d5d9 60 Function-like macros are used to allow more efficient code.
Simon Cooksey 0:fb7af294d5d9 61 */
Simon Cooksey 0:fb7af294d5d9 62
Simon Cooksey 0:fb7af294d5d9 63
Simon Cooksey 0:fb7af294d5d9 64 /*******************************************************************************
Simon Cooksey 0:fb7af294d5d9 65 * CMSIS definitions
Simon Cooksey 0:fb7af294d5d9 66 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 67 /** \ingroup Cortex_A9
Simon Cooksey 0:fb7af294d5d9 68 @{
Simon Cooksey 0:fb7af294d5d9 69 */
Simon Cooksey 0:fb7af294d5d9 70
Simon Cooksey 0:fb7af294d5d9 71 /* CMSIS CA9 definitions */
Simon Cooksey 0:fb7af294d5d9 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Simon Cooksey 0:fb7af294d5d9 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Simon Cooksey 0:fb7af294d5d9 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Simon Cooksey 0:fb7af294d5d9 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Simon Cooksey 0:fb7af294d5d9 76
Simon Cooksey 0:fb7af294d5d9 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Simon Cooksey 0:fb7af294d5d9 78
Simon Cooksey 0:fb7af294d5d9 79
Simon Cooksey 0:fb7af294d5d9 80 #if defined ( __CC_ARM )
Simon Cooksey 0:fb7af294d5d9 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Simon Cooksey 0:fb7af294d5d9 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Simon Cooksey 0:fb7af294d5d9 83 #define __STATIC_INLINE static __inline
Simon Cooksey 0:fb7af294d5d9 84 #define __STATIC_ASM static __asm
Simon Cooksey 0:fb7af294d5d9 85
Simon Cooksey 0:fb7af294d5d9 86 #elif defined ( __ICCARM__ )
Simon Cooksey 0:fb7af294d5d9 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Simon Cooksey 0:fb7af294d5d9 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Simon Cooksey 0:fb7af294d5d9 89 #define __STATIC_INLINE static inline
Simon Cooksey 0:fb7af294d5d9 90 #define __STATIC_ASM static __asm
Simon Cooksey 0:fb7af294d5d9 91
Simon Cooksey 0:fb7af294d5d9 92 #include <stdint.h>
Simon Cooksey 0:fb7af294d5d9 93 inline uint32_t __get_PSR(void) {
Simon Cooksey 0:fb7af294d5d9 94 __ASM("mrs r0, cpsr");
Simon Cooksey 0:fb7af294d5d9 95 }
Simon Cooksey 0:fb7af294d5d9 96
Simon Cooksey 0:fb7af294d5d9 97 #elif defined ( __TMS470__ )
Simon Cooksey 0:fb7af294d5d9 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Simon Cooksey 0:fb7af294d5d9 99 #define __STATIC_INLINE static inline
Simon Cooksey 0:fb7af294d5d9 100 #define __STATIC_ASM static __asm
Simon Cooksey 0:fb7af294d5d9 101
Simon Cooksey 0:fb7af294d5d9 102 #elif defined ( __GNUC__ )
Simon Cooksey 0:fb7af294d5d9 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Simon Cooksey 0:fb7af294d5d9 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Simon Cooksey 0:fb7af294d5d9 105 #define __STATIC_INLINE static inline
Simon Cooksey 0:fb7af294d5d9 106 #define __STATIC_ASM static __asm
Simon Cooksey 0:fb7af294d5d9 107
Simon Cooksey 0:fb7af294d5d9 108 #elif defined ( __TASKING__ )
Simon Cooksey 0:fb7af294d5d9 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Simon Cooksey 0:fb7af294d5d9 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Simon Cooksey 0:fb7af294d5d9 111 #define __STATIC_INLINE static inline
Simon Cooksey 0:fb7af294d5d9 112 #define __STATIC_ASM static __asm
Simon Cooksey 0:fb7af294d5d9 113
Simon Cooksey 0:fb7af294d5d9 114 #endif
Simon Cooksey 0:fb7af294d5d9 115
Simon Cooksey 0:fb7af294d5d9 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Simon Cooksey 0:fb7af294d5d9 117 */
Simon Cooksey 0:fb7af294d5d9 118 #if defined ( __CC_ARM )
Simon Cooksey 0:fb7af294d5d9 119 #if defined __TARGET_FPU_VFP
Simon Cooksey 0:fb7af294d5d9 120 #if (__FPU_PRESENT == 1)
Simon Cooksey 0:fb7af294d5d9 121 #define __FPU_USED 1
Simon Cooksey 0:fb7af294d5d9 122 #else
Simon Cooksey 0:fb7af294d5d9 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Simon Cooksey 0:fb7af294d5d9 124 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 125 #endif
Simon Cooksey 0:fb7af294d5d9 126 #else
Simon Cooksey 0:fb7af294d5d9 127 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 128 #endif
Simon Cooksey 0:fb7af294d5d9 129
Simon Cooksey 0:fb7af294d5d9 130 #elif defined ( __ICCARM__ )
Simon Cooksey 0:fb7af294d5d9 131 #if defined __ARMVFP__
Simon Cooksey 0:fb7af294d5d9 132 #if (__FPU_PRESENT == 1)
Simon Cooksey 0:fb7af294d5d9 133 #define __FPU_USED 1
Simon Cooksey 0:fb7af294d5d9 134 #else
Simon Cooksey 0:fb7af294d5d9 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Simon Cooksey 0:fb7af294d5d9 136 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 137 #endif
Simon Cooksey 0:fb7af294d5d9 138 #else
Simon Cooksey 0:fb7af294d5d9 139 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 140 #endif
Simon Cooksey 0:fb7af294d5d9 141
Simon Cooksey 0:fb7af294d5d9 142 #elif defined ( __TMS470__ )
Simon Cooksey 0:fb7af294d5d9 143 #if defined __TI_VFP_SUPPORT__
Simon Cooksey 0:fb7af294d5d9 144 #if (__FPU_PRESENT == 1)
Simon Cooksey 0:fb7af294d5d9 145 #define __FPU_USED 1
Simon Cooksey 0:fb7af294d5d9 146 #else
Simon Cooksey 0:fb7af294d5d9 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Simon Cooksey 0:fb7af294d5d9 148 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 149 #endif
Simon Cooksey 0:fb7af294d5d9 150 #else
Simon Cooksey 0:fb7af294d5d9 151 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 152 #endif
Simon Cooksey 0:fb7af294d5d9 153
Simon Cooksey 0:fb7af294d5d9 154 #elif defined ( __GNUC__ )
Simon Cooksey 0:fb7af294d5d9 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Simon Cooksey 0:fb7af294d5d9 156 #if (__FPU_PRESENT == 1)
Simon Cooksey 0:fb7af294d5d9 157 #define __FPU_USED 1
Simon Cooksey 0:fb7af294d5d9 158 #else
Simon Cooksey 0:fb7af294d5d9 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Simon Cooksey 0:fb7af294d5d9 160 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 161 #endif
Simon Cooksey 0:fb7af294d5d9 162 #else
Simon Cooksey 0:fb7af294d5d9 163 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 164 #endif
Simon Cooksey 0:fb7af294d5d9 165
Simon Cooksey 0:fb7af294d5d9 166 #elif defined ( __TASKING__ )
Simon Cooksey 0:fb7af294d5d9 167 #if defined __FPU_VFP__
Simon Cooksey 0:fb7af294d5d9 168 #if (__FPU_PRESENT == 1)
Simon Cooksey 0:fb7af294d5d9 169 #define __FPU_USED 1
Simon Cooksey 0:fb7af294d5d9 170 #else
Simon Cooksey 0:fb7af294d5d9 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Simon Cooksey 0:fb7af294d5d9 172 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 173 #endif
Simon Cooksey 0:fb7af294d5d9 174 #else
Simon Cooksey 0:fb7af294d5d9 175 #define __FPU_USED 0
Simon Cooksey 0:fb7af294d5d9 176 #endif
Simon Cooksey 0:fb7af294d5d9 177 #endif
Simon Cooksey 0:fb7af294d5d9 178
Simon Cooksey 0:fb7af294d5d9 179 #include <stdint.h> /*!< standard types definitions */
Simon Cooksey 0:fb7af294d5d9 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Simon Cooksey 0:fb7af294d5d9 181 #include "core_caFunc.h" /*!< Core Function Access */
Simon Cooksey 0:fb7af294d5d9 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Simon Cooksey 0:fb7af294d5d9 183
Simon Cooksey 0:fb7af294d5d9 184 #endif /* __CORE_CA9_H_GENERIC */
Simon Cooksey 0:fb7af294d5d9 185
Simon Cooksey 0:fb7af294d5d9 186 #ifndef __CMSIS_GENERIC
Simon Cooksey 0:fb7af294d5d9 187
Simon Cooksey 0:fb7af294d5d9 188 #ifndef __CORE_CA9_H_DEPENDANT
Simon Cooksey 0:fb7af294d5d9 189 #define __CORE_CA9_H_DEPENDANT
Simon Cooksey 0:fb7af294d5d9 190
Simon Cooksey 0:fb7af294d5d9 191 /* check device defines and use defaults */
Simon Cooksey 0:fb7af294d5d9 192 #if defined __CHECK_DEVICE_DEFINES
Simon Cooksey 0:fb7af294d5d9 193 #ifndef __CA9_REV
Simon Cooksey 0:fb7af294d5d9 194 #define __CA9_REV 0x0000
Simon Cooksey 0:fb7af294d5d9 195 #warning "__CA9_REV not defined in device header file; using default!"
Simon Cooksey 0:fb7af294d5d9 196 #endif
Simon Cooksey 0:fb7af294d5d9 197
Simon Cooksey 0:fb7af294d5d9 198 #ifndef __FPU_PRESENT
Simon Cooksey 0:fb7af294d5d9 199 #define __FPU_PRESENT 1
Simon Cooksey 0:fb7af294d5d9 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Simon Cooksey 0:fb7af294d5d9 201 #endif
Simon Cooksey 0:fb7af294d5d9 202
Simon Cooksey 0:fb7af294d5d9 203 #ifndef __Vendor_SysTickConfig
Simon Cooksey 0:fb7af294d5d9 204 #define __Vendor_SysTickConfig 1
Simon Cooksey 0:fb7af294d5d9 205 #endif
Simon Cooksey 0:fb7af294d5d9 206
Simon Cooksey 0:fb7af294d5d9 207 #if __Vendor_SysTickConfig == 0
Simon Cooksey 0:fb7af294d5d9 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Simon Cooksey 0:fb7af294d5d9 209 #endif
Simon Cooksey 0:fb7af294d5d9 210 #endif
Simon Cooksey 0:fb7af294d5d9 211
Simon Cooksey 0:fb7af294d5d9 212 /* IO definitions (access restrictions to peripheral registers) */
Simon Cooksey 0:fb7af294d5d9 213 /**
Simon Cooksey 0:fb7af294d5d9 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Simon Cooksey 0:fb7af294d5d9 215
Simon Cooksey 0:fb7af294d5d9 216 <strong>IO Type Qualifiers</strong> are used
Simon Cooksey 0:fb7af294d5d9 217 \li to specify the access to peripheral variables.
Simon Cooksey 0:fb7af294d5d9 218 \li for automatic generation of peripheral register debug information.
Simon Cooksey 0:fb7af294d5d9 219 */
Simon Cooksey 0:fb7af294d5d9 220 #ifdef __cplusplus
Simon Cooksey 0:fb7af294d5d9 221 #define __I volatile /*!< Defines 'read only' permissions */
Simon Cooksey 0:fb7af294d5d9 222 #else
Simon Cooksey 0:fb7af294d5d9 223 #define __I volatile const /*!< Defines 'read only' permissions */
Simon Cooksey 0:fb7af294d5d9 224 #endif
Simon Cooksey 0:fb7af294d5d9 225 #define __O volatile /*!< Defines 'write only' permissions */
Simon Cooksey 0:fb7af294d5d9 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Simon Cooksey 0:fb7af294d5d9 227
Simon Cooksey 0:fb7af294d5d9 228 /*@} end of group Cortex_A9 */
Simon Cooksey 0:fb7af294d5d9 229
Simon Cooksey 0:fb7af294d5d9 230
Simon Cooksey 0:fb7af294d5d9 231 /*******************************************************************************
Simon Cooksey 0:fb7af294d5d9 232 * Register Abstraction
Simon Cooksey 0:fb7af294d5d9 233 ******************************************************************************/
Simon Cooksey 0:fb7af294d5d9 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Simon Cooksey 0:fb7af294d5d9 235 \brief Type definitions and defines for Cortex-A processor based devices.
Simon Cooksey 0:fb7af294d5d9 236 */
Simon Cooksey 0:fb7af294d5d9 237
Simon Cooksey 0:fb7af294d5d9 238 /** \ingroup CMSIS_core_register
Simon Cooksey 0:fb7af294d5d9 239 \defgroup CMSIS_CORE Status and Control Registers
Simon Cooksey 0:fb7af294d5d9 240 \brief Core Register type definitions.
Simon Cooksey 0:fb7af294d5d9 241 @{
Simon Cooksey 0:fb7af294d5d9 242 */
Simon Cooksey 0:fb7af294d5d9 243
Simon Cooksey 0:fb7af294d5d9 244 /** \brief Union type to access the Application Program Status Register (APSR).
Simon Cooksey 0:fb7af294d5d9 245 */
Simon Cooksey 0:fb7af294d5d9 246 typedef union
Simon Cooksey 0:fb7af294d5d9 247 {
Simon Cooksey 0:fb7af294d5d9 248 struct
Simon Cooksey 0:fb7af294d5d9 249 {
Simon Cooksey 0:fb7af294d5d9 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Simon Cooksey 0:fb7af294d5d9 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Simon Cooksey 0:fb7af294d5d9 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Simon Cooksey 0:fb7af294d5d9 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Simon Cooksey 0:fb7af294d5d9 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Simon Cooksey 0:fb7af294d5d9 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Simon Cooksey 0:fb7af294d5d9 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Simon Cooksey 0:fb7af294d5d9 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Simon Cooksey 0:fb7af294d5d9 258 } b; /*!< Structure used for bit access */
Simon Cooksey 0:fb7af294d5d9 259 uint32_t w; /*!< Type used for word access */
Simon Cooksey 0:fb7af294d5d9 260 } APSR_Type;
Simon Cooksey 0:fb7af294d5d9 261
Simon Cooksey 0:fb7af294d5d9 262
Simon Cooksey 0:fb7af294d5d9 263 /*@} end of group CMSIS_CORE */
Simon Cooksey 0:fb7af294d5d9 264
Simon Cooksey 0:fb7af294d5d9 265 /*@} end of CMSIS_Core_FPUFunctions */
Simon Cooksey 0:fb7af294d5d9 266
Simon Cooksey 0:fb7af294d5d9 267
Simon Cooksey 0:fb7af294d5d9 268 #endif /* __CORE_CA9_H_GENERIC */
Simon Cooksey 0:fb7af294d5d9 269
Simon Cooksey 0:fb7af294d5d9 270 #endif /* __CMSIS_GENERIC */
Simon Cooksey 0:fb7af294d5d9 271
Simon Cooksey 0:fb7af294d5d9 272 #ifdef __cplusplus
Simon Cooksey 0:fb7af294d5d9 273 }
Simon Cooksey 0:fb7af294d5d9 274
Simon Cooksey 0:fb7af294d5d9 275
Simon Cooksey 0:fb7af294d5d9 276 #endif