clement lignie / configure_ax12_test_bras_module

config AX12

Fork of configure_ax12_test_bras_module by CRAC Team

mbed/LPC1768/GCC_CR/LPC1768.ld@0:c03cffe402df, 2016-02-03 (annotated)

Committer:
slowness
Date:
Wed Feb 03 14:01:53 2016 +0000
Revision:
0:c03cffe402df
Pour configurer les AX12 avec la carte NXP1768 sur les Pin 9 et 10

Who changed what in which revision?

UserRevisionLine numberNew contents of line
slowness 0:c03cffe402df 1 /* mbed - LPC1768 linker script
slowness 0:c03cffe402df 2 * Based linker script generated by Code Red Technologies Red Suite 4.1
slowness 0:c03cffe402df 3 */
slowness 0:c03cffe402df 4 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
slowness 0:c03cffe402df 5
slowness 0:c03cffe402df 6 MEMORY
slowness 0:c03cffe402df 7 {
slowness 0:c03cffe402df 8 /* Define each memory region */
slowness 0:c03cffe402df 9 MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */
slowness 0:c03cffe402df 10 RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */
slowness 0:c03cffe402df 11 RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32k */
slowness 0:c03cffe402df 12
slowness 0:c03cffe402df 13 }
slowness 0:c03cffe402df 14 /* Define a symbol for the top of each memory region */
slowness 0:c03cffe402df 15 __top_MFlash512 = 0x0 + 0x80000;
slowness 0:c03cffe402df 16 __top_RamLoc32 = 0x10000000 + 0x8000;
slowness 0:c03cffe402df 17 __top_RamAHB32 = 0x2007c000 + 0x8000;
slowness 0:c03cffe402df 18
slowness 0:c03cffe402df 19 ENTRY(ResetISR)
slowness 0:c03cffe402df 20
slowness 0:c03cffe402df 21 SECTIONS
slowness 0:c03cffe402df 22 {
slowness 0:c03cffe402df 23
slowness 0:c03cffe402df 24 /* MAIN TEXT SECTION */
slowness 0:c03cffe402df 25 .text : ALIGN(4)
slowness 0:c03cffe402df 26 {
slowness 0:c03cffe402df 27 FILL(0xff)
slowness 0:c03cffe402df 28 KEEP(*(.isr_vector))
slowness 0:c03cffe402df 29
slowness 0:c03cffe402df 30 /* Global Section Table */
slowness 0:c03cffe402df 31 . = ALIGN(4) ;
slowness 0:c03cffe402df 32 __section_table_start = .;
slowness 0:c03cffe402df 33 __data_section_table = .;
slowness 0:c03cffe402df 34 LONG(LOADADDR(.data));
slowness 0:c03cffe402df 35 LONG( ADDR(.data)) ;
slowness 0:c03cffe402df 36 LONG( SIZEOF(.data));
slowness 0:c03cffe402df 37 LONG(LOADADDR(.data_RAM2));
slowness 0:c03cffe402df 38 LONG( ADDR(.data_RAM2)) ;
slowness 0:c03cffe402df 39 LONG( SIZEOF(.data_RAM2));
slowness 0:c03cffe402df 40 __data_section_table_end = .;
slowness 0:c03cffe402df 41 __bss_section_table = .;
slowness 0:c03cffe402df 42 LONG( ADDR(.bss));
slowness 0:c03cffe402df 43 LONG( SIZEOF(.bss));
slowness 0:c03cffe402df 44 LONG( ADDR(.bss_RAM2));
slowness 0:c03cffe402df 45 LONG( SIZEOF(.bss_RAM2));
slowness 0:c03cffe402df 46 __bss_section_table_end = .;
slowness 0:c03cffe402df 47 __section_table_end = . ;
slowness 0:c03cffe402df 48 /* End of Global Section Table */
slowness 0:c03cffe402df 49
slowness 0:c03cffe402df 50
slowness 0:c03cffe402df 51 *(.after_vectors*)
slowness 0:c03cffe402df 52
slowness 0:c03cffe402df 53 *(.text*)
slowness 0:c03cffe402df 54 *(.rodata .rodata.*)
slowness 0:c03cffe402df 55 . = ALIGN(4);
slowness 0:c03cffe402df 56
slowness 0:c03cffe402df 57 /* C++ constructors etc */
slowness 0:c03cffe402df 58 . = ALIGN(4);
slowness 0:c03cffe402df 59 KEEP(*(.init))
slowness 0:c03cffe402df 60
slowness 0:c03cffe402df 61 . = ALIGN(4);
slowness 0:c03cffe402df 62 __preinit_array_start = .;
slowness 0:c03cffe402df 63 KEEP (*(.preinit_array))
slowness 0:c03cffe402df 64 __preinit_array_end = .;
slowness 0:c03cffe402df 65
slowness 0:c03cffe402df 66 . = ALIGN(4);
slowness 0:c03cffe402df 67 __init_array_start = .;
slowness 0:c03cffe402df 68 KEEP (*(SORT(.init_array.*)))
slowness 0:c03cffe402df 69 KEEP (*(.init_array))
slowness 0:c03cffe402df 70 __init_array_end = .;
slowness 0:c03cffe402df 71
slowness 0:c03cffe402df 72 KEEP(*(.fini));
slowness 0:c03cffe402df 73
slowness 0:c03cffe402df 74 . = ALIGN(0x4);
slowness 0:c03cffe402df 75 KEEP (*crtbegin.o(.ctors))
slowness 0:c03cffe402df 76 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
slowness 0:c03cffe402df 77 KEEP (*(SORT(.ctors.*)))
slowness 0:c03cffe402df 78 KEEP (*crtend.o(.ctors))
slowness 0:c03cffe402df 79
slowness 0:c03cffe402df 80 . = ALIGN(0x4);
slowness 0:c03cffe402df 81 KEEP (*crtbegin.o(.dtors))
slowness 0:c03cffe402df 82 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
slowness 0:c03cffe402df 83 KEEP (*(SORT(.dtors.*)))
slowness 0:c03cffe402df 84 KEEP (*crtend.o(.dtors))
slowness 0:c03cffe402df 85 /* End C++ */
slowness 0:c03cffe402df 86 } > MFlash512
slowness 0:c03cffe402df 87
slowness 0:c03cffe402df 88 /*
slowness 0:c03cffe402df 89 * for exception handling/unwind - some Newlib functions (in common
slowness 0:c03cffe402df 90 * with C++ and STDC++) use this.
slowness 0:c03cffe402df 91 */
slowness 0:c03cffe402df 92 .ARM.extab : ALIGN(4)
slowness 0:c03cffe402df 93 {
slowness 0:c03cffe402df 94 *(.ARM.extab* .gnu.linkonce.armextab.*)
slowness 0:c03cffe402df 95 } > MFlash512
slowness 0:c03cffe402df 96 __exidx_start = .;
slowness 0:c03cffe402df 97
slowness 0:c03cffe402df 98 .ARM.exidx : ALIGN(4)
slowness 0:c03cffe402df 99 {
slowness 0:c03cffe402df 100 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
slowness 0:c03cffe402df 101 } > MFlash512
slowness 0:c03cffe402df 102 __exidx_end = .;
slowness 0:c03cffe402df 103
slowness 0:c03cffe402df 104 _etext = .;
slowness 0:c03cffe402df 105
slowness 0:c03cffe402df 106
slowness 0:c03cffe402df 107 .data_RAM2 : ALIGN(4)
slowness 0:c03cffe402df 108 {
slowness 0:c03cffe402df 109 FILL(0xff)
slowness 0:c03cffe402df 110 *(.data.$RAM2*)
slowness 0:c03cffe402df 111 *(.data.$RamAHB32*)
slowness 0:c03cffe402df 112 . = ALIGN(4) ;
slowness 0:c03cffe402df 113 } > RamAHB32 AT>MFlash512
slowness 0:c03cffe402df 114
slowness 0:c03cffe402df 115 /* MAIN DATA SECTION */
slowness 0:c03cffe402df 116
slowness 0:c03cffe402df 117 .uninit_RESERVED : ALIGN(4)
slowness 0:c03cffe402df 118 {
slowness 0:c03cffe402df 119 KEEP(*(.bss.$RESERVED*))
slowness 0:c03cffe402df 120 } > RamLoc32
slowness 0:c03cffe402df 121
slowness 0:c03cffe402df 122 .data : ALIGN(4)
slowness 0:c03cffe402df 123 {
slowness 0:c03cffe402df 124 FILL(0xff)
slowness 0:c03cffe402df 125 _data = .;
slowness 0:c03cffe402df 126 *(vtable)
slowness 0:c03cffe402df 127 *(.data*)
slowness 0:c03cffe402df 128 . = ALIGN(4) ;
slowness 0:c03cffe402df 129 _edata = .;
slowness 0:c03cffe402df 130 } > RamLoc32 AT>MFlash512
slowness 0:c03cffe402df 131
slowness 0:c03cffe402df 132
slowness 0:c03cffe402df 133 .bss_RAM2 : ALIGN(4)
slowness 0:c03cffe402df 134 {
slowness 0:c03cffe402df 135 *(.bss.$RAM2*)
slowness 0:c03cffe402df 136 *(.bss.$RamAHB32*)
slowness 0:c03cffe402df 137 . = ALIGN(4) ;
slowness 0:c03cffe402df 138 } > RamAHB32
slowness 0:c03cffe402df 139
slowness 0:c03cffe402df 140 /* MAIN BSS SECTION */
slowness 0:c03cffe402df 141 .bss : ALIGN(4)
slowness 0:c03cffe402df 142 {
slowness 0:c03cffe402df 143 _bss = .;
slowness 0:c03cffe402df 144 *(.bss*)
slowness 0:c03cffe402df 145 *(COMMON)
slowness 0:c03cffe402df 146 . = ALIGN(4) ;
slowness 0:c03cffe402df 147 _ebss = .;
slowness 0:c03cffe402df 148 PROVIDE(end = .);
slowness 0:c03cffe402df 149 } > RamLoc32
slowness 0:c03cffe402df 150
slowness 0:c03cffe402df 151 PROVIDE(_pvHeapStart = .);
slowness 0:c03cffe402df 152 PROVIDE(_vStackTop = __top_RamLoc32 - 0);
slowness 0:c03cffe402df 153 }