Chris Snow / AkiSpiLcd

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Fork of AkiSpiLcd by Kazuki Yamamoto

AkiSpiLcd.h@9:33d5888d1fb9, 2014-09-07 (annotated)

Committer:
k4zuki
Date:
Sun Sep 07 14:42:13 2014 +0000
Revision:
9:33d5888d1fb9
Parent:
7:0c85f23a6568
Child:
10:eed99ef09e63
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
k4zuki 1:57de84d2025c 1 /** this is for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 2 * by Kazuki Yamamoto, or _K4ZUKI_
k4zuki 0:b3c8fdd01601 3 */
k4zuki 0:b3c8fdd01601 4
k4zuki 0:b3c8fdd01601 5 #ifndef __AKISPILCD_H__
k4zuki 0:b3c8fdd01601 6 #define __AKISPILCD_H
k4zuki 0:b3c8fdd01601 7
k4zuki 5:7061ce47a359 8 #include "mbed.h"
k4zuki 9:33d5888d1fb9 9 //#include "Ser23K256.h"
k4zuki 2:01979b296ab5 10 /** AkiSpiLcd
k4zuki 2:01979b296ab5 11 * mbed library for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 12 *
k4zuki 2:01979b296ab5 13 * Example:
k4zuki 2:01979b296ab5 14 * @code
k4zuki 2:01979b296ab5 15 * #include "mbed.h"
k4zuki 2:01979b296ab5 16 * #include "AkiSpiLcd.h"
k4zuki 2:01979b296ab5 17 *
k4zuki 2:01979b296ab5 18 * AkiSpiLcd LCD(MOSI_, SCK_, D2, D5);
k4zuki 2:01979b296ab5 19 * extern const uint8_t hogepic[];
k4zuki 2:01979b296ab5 20 * int main()
k4zuki 2:01979b296ab5 21 * {
k4zuki 2:01979b296ab5 22 *
k4zuki 2:01979b296ab5 23 * wait_ms(1);
k4zuki 2:01979b296ab5 24 * LCD.cls();
k4zuki 2:01979b296ab5 25 * LCD.updateSingle(10,(uint8_t*)(hogepic+2000));
k4zuki 2:01979b296ab5 26 * LCD.updateMulti(100,(240-100),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 27 *
k4zuki 2:01979b296ab5 28 * while(1) {
k4zuki 2:01979b296ab5 29 * for(int i=0; i<240; i++) {
k4zuki 2:01979b296ab5 30 * LCD.updateMulti(i,(240-i),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 31 * LCD.updateMulti(0,(i),(uint8_t*)(hogepic+50*(240-i)));
k4zuki 2:01979b296ab5 32 * }
k4zuki 2:01979b296ab5 33 * }
k4zuki 2:01979b296ab5 34 * }
k4zuki 2:01979b296ab5 35 * @endcode
k4zuki 2:01979b296ab5 36 */
k4zuki 5:7061ce47a359 37 #define RAMLINE_BASE 0x6000
k4zuki 5:7061ce47a359 38 #define RAMMODE_BASE 0x6100
k4zuki 5:7061ce47a359 39 #define SCREEN0_BASE 0x0000
k4zuki 5:7061ce47a359 40 #define SCREEN1_BASE 0x3000
k4zuki 9:33d5888d1fb9 41 #define SCREEN0 0
k4zuki 9:33d5888d1fb9 42 #define SCREEN1 1
k4zuki 5:7061ce47a359 43
k4zuki 0:b3c8fdd01601 44 class AkiSpiLcd
k4zuki 0:b3c8fdd01601 45 {
k4zuki 0:b3c8fdd01601 46 public:
k4zuki 0:b3c8fdd01601 47 /** Constructor
k4zuki 0:b3c8fdd01601 48 * @param mosi SPI data input
k4zuki 4:844693a617dc 49 * @param mosi SPI data output
k4zuki 0:b3c8fdd01601 50 * @param sck SPI clock input
k4zuki 0:b3c8fdd01601 51 * @param cs HIGH-active chip enable input
k4zuki 0:b3c8fdd01601 52 * @param disp HIGH-active display enable input
k4zuki 0:b3c8fdd01601 53 */
k4zuki 4:844693a617dc 54 AkiSpiLcd(PinName mosi, PinName miso, PinName sck, PinName csl, PinName csr);
k4zuki 0:b3c8fdd01601 55
k4zuki 0:b3c8fdd01601 56 /** Clear screen
k4zuki 0:b3c8fdd01601 57 */
k4zuki 0:b3c8fdd01601 58 void cls();
k4zuki 0:b3c8fdd01601 59
k4zuki 0:b3c8fdd01601 60 /** Writes single line(400 bits = 50 bytes)
k4zuki 0:b3c8fdd01601 61 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 62 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 63 */
k4zuki 3:f835b8daf9a0 64 void directUpdateSingle(int line, uint8_t* data);
k4zuki 0:b3c8fdd01601 65
k4zuki 0:b3c8fdd01601 66 /** Writes multi lines(400 x N bits = 50 x N bytes)
k4zuki 0:b3c8fdd01601 67 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 68 * @param length number of line to write
k4zuki 0:b3c8fdd01601 69 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 70 */
k4zuki 4:844693a617dc 71 void directUpdateMulti(int startline, int length, uint8_t* data);
k4zuki 0:b3c8fdd01601 72
k4zuki 0:b3c8fdd01601 73 /** Inverting internal COM signal
k4zuki 0:b3c8fdd01601 74 */
k4zuki 0:b3c8fdd01601 75 void cominvert();
k4zuki 3:f835b8daf9a0 76
k4zuki 4:844693a617dc 77 /** Reads single line (400 bits = 50 bytes) from a screen
k4zuki 4:844693a617dc 78 */
k4zuki 4:844693a617dc 79 void ramReadSingle(int line, uint8_t* buffer, int screen);
k4zuki 4:844693a617dc 80
k4zuki 4:844693a617dc 81 /** Reads multi lines(400 x N bits = 50 x N bytes) from a screen
k4zuki 4:844693a617dc 82 */
k4zuki 4:844693a617dc 83 void ramReadMulti(int startline, int length, uint8_t* buffer, int screen);
k4zuki 3:f835b8daf9a0 84
k4zuki 4:844693a617dc 85 /** Writes single line (400 bits = 50 bytes) into a screen
k4zuki 3:f835b8daf9a0 86 */
k4zuki 4:844693a617dc 87 void ramWriteSingle(int line, uint8_t* data, int screen);
k4zuki 4:844693a617dc 88
k4zuki 4:844693a617dc 89 /** Writes multi lines(400 x N bits = 50 x N bytes) into a screen
k4zuki 4:844693a617dc 90 */
k4zuki 4:844693a617dc 91 void ramWriteMulti(int startline, int length, uint8_t* data, int screen);
k4zuki 4:844693a617dc 92
k4zuki 4:844693a617dc 93 /** copies whole data in screen into LCD
k4zuki 4:844693a617dc 94 */
k4zuki 7:0c85f23a6568 95 void ram2lcd(int startline, int length, int screen);
k4zuki 0:b3c8fdd01601 96
k4zuki 3:f835b8daf9a0 97 // /** Enables/disables display. internal memory will not flushed
k4zuki 3:f835b8daf9a0 98 // * @param disp true = display is on / false = display is off
k4zuki 3:f835b8daf9a0 99 // */
k4zuki 3:f835b8daf9a0 100 // void dispOn(bool disp);
k4zuki 2:01979b296ab5 101
k4zuki 9:33d5888d1fb9 102 /** read a byte from SRAM
k4zuki 9:33d5888d1fb9 103 * @param address The address to read from
k4zuki 9:33d5888d1fb9 104 * @return the uint8_tacter at that address
k4zuki 9:33d5888d1fb9 105 */
k4zuki 9:33d5888d1fb9 106 uint8_t ram_read(int address);
k4zuki 9:33d5888d1fb9 107 /** read multiple bytes from SRAM into a buffer
k4zuki 9:33d5888d1fb9 108 * @param address The SRAM address to read from
k4zuki 9:33d5888d1fb9 109 * @param buffer The buffer to read into (must be big enough!)
k4zuki 9:33d5888d1fb9 110 * @param count The number of bytes to read
k4zuki 9:33d5888d1fb9 111 */
k4zuki 9:33d5888d1fb9 112 void ram_read(int address, uint8_t * buffer, int count);
k4zuki 9:33d5888d1fb9 113 /** write a byte to SRAM
k4zuki 9:33d5888d1fb9 114 * @param address The address SRAM to write to
k4zuki 9:33d5888d1fb9 115 * @param byte The byte to write there
k4zuki 9:33d5888d1fb9 116 */
k4zuki 9:33d5888d1fb9 117 void ram_write(int address, uint8_t byte);
k4zuki 9:33d5888d1fb9 118 /** write multiple bytes to SRAM from a buffer
k4zuki 9:33d5888d1fb9 119 * @param address The SRAM address write to
k4zuki 9:33d5888d1fb9 120 * @param buffer The buffer to write from
k4zuki 9:33d5888d1fb9 121 * @param count The number of bytes to write
k4zuki 9:33d5888d1fb9 122 */
k4zuki 9:33d5888d1fb9 123 void ram_write(int address, uint8_t * buffer, int count);
k4zuki 9:33d5888d1fb9 124
k4zuki 0:b3c8fdd01601 125 private:
k4zuki 9:33d5888d1fb9 126 // Ser23K256 _ram;
k4zuki 0:b3c8fdd01601 127 int comflag;
k4zuki 0:b3c8fdd01601 128 int modeflag;
k4zuki 0:b3c8fdd01601 129 int clearflag;
k4zuki 0:b3c8fdd01601 130 SPI _spi;
k4zuki 3:f835b8daf9a0 131 DigitalOut _csl;
k4zuki 3:f835b8daf9a0 132 DigitalOut _csr;
k4zuki 9:33d5888d1fb9 133
k4zuki 9:33d5888d1fb9 134 uint8_t ram_readStatus();
k4zuki 9:33d5888d1fb9 135 void ram_writeStatus(uint8_t status);
k4zuki 9:33d5888d1fb9 136 void ram_prepareCommand(uint8_t command, int address);
k4zuki 9:33d5888d1fb9 137 void ram_select();
k4zuki 9:33d5888d1fb9 138 void ram_deselect();
k4zuki 0:b3c8fdd01601 139 };
k4zuki 0:b3c8fdd01601 140 #endif