Fixes for line numbers

Fork of AkiSpiLcd by Kazuki Yamamoto

Committer:
Chris
Date:
Wed May 11 11:58:05 2016 +0100
Revision:
22:5ac00ac2a4be
Parent:
21:8de1035017b5
change to lcdconf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
k4zuki 1:57de84d2025c 1 /** this is for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 2 * by Kazuki Yamamoto, or _K4ZUKI_
k4zuki 0:b3c8fdd01601 3 */
k4zuki 0:b3c8fdd01601 4
k4zuki 0:b3c8fdd01601 5 #ifndef __AKISPILCD_H__
k4zuki 13:20ba395cbf2a 6 #define __AKISPILCD_H__
k4zuki 0:b3c8fdd01601 7
k4zuki 5:7061ce47a359 8 #include "mbed.h"
k4zuki 13:20ba395cbf2a 9
k4zuki 14:812873f3a933 10 /** \class AkiSpiLcd
k4zuki 14:812873f3a933 11 * \brief mbed library for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 12 *
k4zuki 2:01979b296ab5 13 * Example:
k4zuki 2:01979b296ab5 14 * @code
k4zuki 2:01979b296ab5 15 * #include "mbed.h"
k4zuki 2:01979b296ab5 16 * #include "AkiSpiLcd.h"
k4zuki 2:01979b296ab5 17 *
k4zuki 13:20ba395cbf2a 18 * AkiSpiLcd LCD(MOSI_, MISO_, SCK_, D2, D5);
k4zuki 2:01979b296ab5 19 * extern const uint8_t hogepic[];
k4zuki 2:01979b296ab5 20 * int main()
k4zuki 2:01979b296ab5 21 * {
k4zuki 10:eed99ef09e63 22 *
k4zuki 2:01979b296ab5 23 * wait_ms(1);
k4zuki 2:01979b296ab5 24 * LCD.cls();
k4zuki 13:20ba395cbf2a 25 * LCD.directUpdateSingle(10,(uint8_t*)(hogepic+2000));
k4zuki 13:20ba395cbf2a 26 * LCD.directUpdateMulti(100,(240-100),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 27 *
k4zuki 2:01979b296ab5 28 * while(1) {
k4zuki 2:01979b296ab5 29 * for(int i=0; i<240; i++) {
k4zuki 13:20ba395cbf2a 30 * LCD.directUpdateMulti(i,(240-i),(uint8_t*)(hogepic));
k4zuki 13:20ba395cbf2a 31 * LCD.directUpdateMulti(0,(i),(uint8_t*)(hogepic+50*(240-i)));
k4zuki 2:01979b296ab5 32 * }
k4zuki 2:01979b296ab5 33 * }
k4zuki 2:01979b296ab5 34 * }
k4zuki 2:01979b296ab5 35 * @endcode
k4zuki 2:01979b296ab5 36 */
k4zuki 14:812873f3a933 37
k4zuki 14:812873f3a933 38 #define SCREEN0 0
k4zuki 14:812873f3a933 39 #define SCREEN1 1
k4zuki 14:812873f3a933 40 #define LINE_LENGTH 50
k4zuki 14:812873f3a933 41 #define RAMLINE_LENGTH 52
k4zuki 14:812873f3a933 42
k4zuki 14:812873f3a933 43 const uint8_t lcd_line[256]= {
k4zuki 14:812873f3a933 44 0x00,
k4zuki 14:812873f3a933 45 0x80,0x40,0xC0,0x20,0xA0,0x60,0xE0,0x10,0x90,0x50,0xD0,0x30,0xB0,0x70,0xF0,0x08,
k4zuki 14:812873f3a933 46 0x88,0x48,0xC8,0x28,0xA8,0x68,0xE8,0x18,0x98,0x58,0xD8,0x38,0xB8,0x78,0xF8,0x04,
k4zuki 14:812873f3a933 47 0x84,0x44,0xC4,0x24,0xA4,0x64,0xE4,0x14,0x94,0x54,0xD4,0x34,0xB4,0x74,0xF4,0x0C,
k4zuki 14:812873f3a933 48 0x8C,0x4C,0xCC,0x2C,0xAC,0x6C,0xEC,0x1C,0x9C,0x5C,0xDC,0x3C,0xBC,0x7C,0xFC,0x02,
k4zuki 14:812873f3a933 49 0x82,0x42,0xC2,0x22,0xA2,0x62,0xE2,0x12,0x92,0x52,0xD2,0x32,0xB2,0x72,0xF2,0x0A,
k4zuki 14:812873f3a933 50 0x8A,0x4A,0xCA,0x2A,0xAA,0x6A,0xEA,0x1A,0x9A,0x5A,0xDA,0x3A,0xBA,0x7A,0xFA,0x06,
k4zuki 14:812873f3a933 51 0x86,0x46,0xC6,0x26,0xA6,0x66,0xE6,0x16,0x96,0x56,0xD6,0x36,0xB6,0x76,0xF6,0x0E,
k4zuki 14:812873f3a933 52 0x8E,0x4E,0xCE,0x2E,0xAE,0x6E,0xEE,0x1E,0x9E,0x5E,0xDE,0x3E,0xBE,0x7E,0xFE,0x01,
k4zuki 14:812873f3a933 53 0x81,0x41,0xC1,0x21,0xA1,0x61,0xE1,0x11,0x91,0x51,0xD1,0x31,0xB1,0x71,0xF1,0x09,
k4zuki 14:812873f3a933 54 0x89,0x49,0xC9,0x29,0xA9,0x69,0xE9,0x19,0x99,0x59,0xD9,0x39,0xB9,0x79,0xF9,0x05,
k4zuki 14:812873f3a933 55 0x85,0x45,0xC5,0x25,0xA5,0x65,0xE5,0x15,0x95,0x55,0xD5,0x35,0xB5,0x75,0xF5,0x0D,
k4zuki 14:812873f3a933 56 0x8D,0x4D,0xCD,0x2D,0xAD,0x6D,0xED,0x1D,0x9D,0x5D,0xDD,0x3D,0xBD,0x7D,0xFD,0x03,
k4zuki 14:812873f3a933 57 0x83,0x43,0xC3,0x23,0xA3,0x63,0xE3,0x13,0x93,0x53,0xD3,0x33,0xB3,0x73,0xF3,0x0B,
k4zuki 14:812873f3a933 58 0x8B,0x4B,0xCB,0x2B,0xAB,0x6B,0xEB,0x1B,0x9B,0x5B,0xDB,0x3B,0xBB,0x7B,0xFB,0x07,
k4zuki 14:812873f3a933 59 0x87,0x47,0xC7,0x27,0xA7,0x67,0xE7,0x17,0x97,0x57,0xD7,0x37,0xB7,0x77,0xF7,0x0F,
k4zuki 14:812873f3a933 60 };
k4zuki 14:812873f3a933 61
k4zuki 0:b3c8fdd01601 62 class AkiSpiLcd
k4zuki 0:b3c8fdd01601 63 {
k4zuki 0:b3c8fdd01601 64 public:
k4zuki 14:812873f3a933 65 /** \enum BASE_ADDR
k4zuki 14:812873f3a933 66 \brief base address list for 23K256
k4zuki 14:812873f3a933 67 @param SCREEN0_BASE = 0x0000,
k4zuki 14:812873f3a933 68 @param SCREEN1_BASE = 0x3000,
k4zuki 14:812873f3a933 69 @param RAMLINE_BASE = 0x6000,
k4zuki 14:812873f3a933 70 */
k4zuki 10:eed99ef09e63 71 enum BASE_ADDR {
k4zuki 10:eed99ef09e63 72 SCREEN0_BASE = 0x0000,
m_wakayama 17:3b47e5044518 73 SCREEN1_BASE = 0x4000,
m_wakayama 17:3b47e5044518 74 // RAMLINE_BASE = 0x7000,
k4zuki 10:eed99ef09e63 75 };
k4zuki 10:eed99ef09e63 76
k4zuki 0:b3c8fdd01601 77 /** Constructor
k4zuki 14:812873f3a933 78 * @param mosi SPI data output from mbed
k4zuki 14:812873f3a933 79 * @param mosi SPI data input from slave
k4zuki 14:812873f3a933 80 * @param sck SPI clock output from mbed
k4zuki 14:812873f3a933 81 * @param csl HIGH-active chip select input for LCD
k4zuki 14:812873f3a933 82 * @param csr LOW-active chip select input for SRAM
k4zuki 0:b3c8fdd01601 83 */
chrissnow 21:8de1035017b5 84 AkiSpiLcd(PinName mosi, PinName miso, PinName sck, PinName csl, PinName csr,long mhz,int width,int height);
k4zuki 0:b3c8fdd01601 85
k4zuki 0:b3c8fdd01601 86 /** Clear screen
k4zuki 0:b3c8fdd01601 87 */
k4zuki 0:b3c8fdd01601 88 void cls();
k4zuki 0:b3c8fdd01601 89
k4zuki 13:20ba395cbf2a 90 /** Clear screen of SRAM
k4zuki 14:812873f3a933 91 * @param screen screen number (0 or 1)
k4zuki 12:30b31d87a30e 92 */
k4zuki 13:20ba395cbf2a 93 void cls_ram( int screen );
k4zuki 14:812873f3a933 94
k4zuki 14:812873f3a933 95 /** place a dot pixel
k4zuki 14:812873f3a933 96 * @param x x position
k4zuki 14:812873f3a933 97 * @param y y position
k4zuki 14:812873f3a933 98 */
k4zuki 14:812873f3a933 99 // virtual void pixel(int x, int y, int colour);
k4zuki 14:812873f3a933 100 // virtual int width() = 0;
k4zuki 14:812873f3a933 101 // virtual int height() = 0;
k4zuki 13:20ba395cbf2a 102
k4zuki 0:b3c8fdd01601 103 /** Writes single line(400 bits = 50 bytes)
k4zuki 0:b3c8fdd01601 104 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 105 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 106 */
k4zuki 3:f835b8daf9a0 107 void directUpdateSingle(int line, uint8_t* data);
k4zuki 0:b3c8fdd01601 108
k4zuki 0:b3c8fdd01601 109 /** Writes multi lines(400 x N bits = 50 x N bytes)
k4zuki 0:b3c8fdd01601 110 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 111 * @param length number of line to write
k4zuki 0:b3c8fdd01601 112 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 113 */
k4zuki 4:844693a617dc 114 void directUpdateMulti(int startline, int length, uint8_t* data);
k4zuki 0:b3c8fdd01601 115
k4zuki 0:b3c8fdd01601 116 /** Inverting internal COM signal
k4zuki 0:b3c8fdd01601 117 */
k4zuki 0:b3c8fdd01601 118 void cominvert();
k4zuki 10:eed99ef09e63 119
k4zuki 13:20ba395cbf2a 120 /** Reads single line (400 bits = 50 bytes) from a screen and writes into buffer
k4zuki 13:20ba395cbf2a 121 * @param line line number(1-240)
k4zuki 13:20ba395cbf2a 122 * @param buffer pointer to buffer(50 bytes)
k4zuki 13:20ba395cbf2a 123 * @param screen screen to read from(0 or 1)
k4zuki 4:844693a617dc 124 */
k4zuki 14:812873f3a933 125 void ramReadSingleLine(int line, uint8_t* buffer, int screen);
k4zuki 4:844693a617dc 126
k4zuki 4:844693a617dc 127 /** Reads multi lines(400 x N bits = 50 x N bytes) from a screen
k4zuki 13:20ba395cbf2a 128 * @param startline starting line number(1-240)
k4zuki 13:20ba395cbf2a 129 * @param length number of line to read
k4zuki 13:20ba395cbf2a 130 * @param *buffer pointer to buffer
k4zuki 13:20ba395cbf2a 131 * @param screen screen to read from(0 or 1)
k4zuki 4:844693a617dc 132 */
k4zuki 14:812873f3a933 133 void ramReadMultiLine(int startline, int length, uint8_t* buffer, int screen);
k4zuki 10:eed99ef09e63 134
k4zuki 4:844693a617dc 135 /** Writes single line (400 bits = 50 bytes) into a screen
k4zuki 13:20ba395cbf2a 136 * @param line line number(1-240)
k4zuki 13:20ba395cbf2a 137 * @param *data pointer to data to write(50 bytes)
k4zuki 13:20ba395cbf2a 138 * @param screen screen to read from(0 or 1)
k4zuki 3:f835b8daf9a0 139 */
k4zuki 14:812873f3a933 140 void ramWriteSingleLine(int line, uint8_t* data, int screen);
k4zuki 4:844693a617dc 141
k4zuki 4:844693a617dc 142 /** Writes multi lines(400 x N bits = 50 x N bytes) into a screen
k4zuki 13:20ba395cbf2a 143 * @param startline starting line number(1-240)
k4zuki 13:20ba395cbf2a 144 * @param length number of line to read
k4zuki 13:20ba395cbf2a 145 * @param *data pointer to data to write
k4zuki 13:20ba395cbf2a 146 * @param screen screen to read from(0 or 1)
k4zuki 4:844693a617dc 147 */
k4zuki 14:812873f3a933 148 void ramWriteMultiLine(int startline, int length, uint8_t* data, int screen);
k4zuki 10:eed99ef09e63 149
k4zuki 4:844693a617dc 150 /** copies whole data in screen into LCD
k4zuki 16:fa277cbcc890 151 * @param startline starting line number(1-240)
k4zuki 16:fa277cbcc890 152 * @param length number of line to read
k4zuki 13:20ba395cbf2a 153 * @param screen screen to copy (0 or 1)
k4zuki 4:844693a617dc 154 */
k4zuki 7:0c85f23a6568 155 void ram2lcd(int startline, int length, int screen);
k4zuki 0:b3c8fdd01601 156
k4zuki 16:fa277cbcc890 157 /** copies whole data in screen into LCD
k4zuki 16:fa277cbcc890 158 * @param screen screen to copy (0 or 1)
k4zuki 16:fa277cbcc890 159 */
k4zuki 16:fa277cbcc890 160 void ram2lcd(int screen);
k4zuki 16:fa277cbcc890 161
k4zuki 13:20ba395cbf2a 162 /** read a byte from SRAM (copied from Ser23K256)
k4zuki 10:eed99ef09e63 163 * @param address The address to read from
k4zuki 14:812873f3a933 164 * @return the character at that address
k4zuki 10:eed99ef09e63 165 */
k4zuki 9:33d5888d1fb9 166 uint8_t ram_read(int address);
k4zuki 14:812873f3a933 167
k4zuki 13:20ba395cbf2a 168 /** read multiple bytes from SRAM into a buffer (copied from Ser23K256)
k4zuki 10:eed99ef09e63 169 * @param address The SRAM address to read from
k4zuki 10:eed99ef09e63 170 * @param buffer The buffer to read into (must be big enough!)
k4zuki 10:eed99ef09e63 171 * @param count The number of bytes to read
k4zuki 10:eed99ef09e63 172 */
k4zuki 9:33d5888d1fb9 173 void ram_read(int address, uint8_t * buffer, int count);
k4zuki 14:812873f3a933 174
k4zuki 13:20ba395cbf2a 175 /** write a byte to SRAM (copied from Ser23K256)
k4zuki 14:812873f3a933 176 * @param address The SRAM address to write to
k4zuki 10:eed99ef09e63 177 * @param byte The byte to write there
k4zuki 10:eed99ef09e63 178 */
k4zuki 9:33d5888d1fb9 179 void ram_write(int address, uint8_t byte);
k4zuki 14:812873f3a933 180
k4zuki 13:20ba395cbf2a 181 /** write multiple bytes to SRAM from a buffer (copied from Ser23K256)
k4zuki 10:eed99ef09e63 182 * @param address The SRAM address write to
k4zuki 10:eed99ef09e63 183 * @param buffer The buffer to write from
k4zuki 10:eed99ef09e63 184 * @param count The number of bytes to write
k4zuki 10:eed99ef09e63 185 */
k4zuki 9:33d5888d1fb9 186 void ram_write(int address, uint8_t * buffer, int count);
k4zuki 9:33d5888d1fb9 187
k4zuki 0:b3c8fdd01601 188 private:
k4zuki 9:33d5888d1fb9 189 // Ser23K256 _ram;
k4zuki 14:812873f3a933 190
k4zuki 14:812873f3a933 191 enum MODE {
k4zuki 14:812873f3a933 192 BYTE_MODE = 0x00,
k4zuki 14:812873f3a933 193 SEQUENTIAL_MODE = 0x40
k4zuki 14:812873f3a933 194 };
k4zuki 14:812873f3a933 195
k4zuki 14:812873f3a933 196 enum COMMAND {
k4zuki 14:812873f3a933 197 READ = 0x03,
k4zuki 14:812873f3a933 198 WRITE = 0x02,
k4zuki 14:812873f3a933 199 READ_STATUS = 0x05, // called RDSR in datasheet
k4zuki 14:812873f3a933 200 WRITE_STATUS = 0x01 // called WRSR in datasheet
k4zuki 14:812873f3a933 201 };
k4zuki 14:812873f3a933 202
k4zuki 14:812873f3a933 203 int _comflag;
k4zuki 14:812873f3a933 204 int _modeflag;
k4zuki 14:812873f3a933 205 int _clearflag;
k4zuki 0:b3c8fdd01601 206 SPI _spi;
k4zuki 3:f835b8daf9a0 207 DigitalOut _csl;
k4zuki 3:f835b8daf9a0 208 DigitalOut _csr;
chrissnow 19:b53d3942c983 209 int _width;
chrissnow 19:b53d3942c983 210 int _height;
k4zuki 9:33d5888d1fb9 211
k4zuki 14:812873f3a933 212 void _cls_ram( int address );
k4zuki 9:33d5888d1fb9 213 uint8_t ram_readStatus();
k4zuki 14:812873f3a933 214 void _ram_writeStatus(uint8_t status);
k4zuki 14:812873f3a933 215 void _ram_prepareCommand(uint8_t command, int address);
k4zuki 14:812873f3a933 216 void _ram_select();
k4zuki 14:812873f3a933 217 void _ram_deselect();
k4zuki 0:b3c8fdd01601 218 };
k4zuki 0:b3c8fdd01601 219 #endif