issues
Dependents: mpu6050_test_basic_1
Fork of MPU6050 by
MPU6050.cpp@2:d7915dab2d3c, 2014-07-01 (annotated)
- Committer:
- chris1seto
- Date:
- Tue Jul 01 23:24:17 2014 +0000
- Revision:
- 2:d7915dab2d3c
- Parent:
- 0:662207e34fba
STM issues
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
garfieldsg | 0:662207e34fba | 1 | //ported from arduino library: https://github.com/jrowberg/i2cdevlib/tree/master/Arduino/MPU6050 |
garfieldsg | 0:662207e34fba | 2 | //written by szymon gaertig (email: szymon@gaertig.com.pl) |
garfieldsg | 0:662207e34fba | 3 | // |
garfieldsg | 0:662207e34fba | 4 | //Changelog: |
garfieldsg | 0:662207e34fba | 5 | //2013-01-08 - first beta release |
garfieldsg | 0:662207e34fba | 6 | |
garfieldsg | 0:662207e34fba | 7 | // I2Cdev library collection - MPU6050 I2C device class |
garfieldsg | 0:662207e34fba | 8 | // Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011 (RM-MPU-6000A-00) |
garfieldsg | 0:662207e34fba | 9 | // 8/24/2011 by Jeff Rowberg <jeff@rowberg.net> |
garfieldsg | 0:662207e34fba | 10 | // Updates should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib |
garfieldsg | 0:662207e34fba | 11 | // |
garfieldsg | 0:662207e34fba | 12 | // Changelog: |
garfieldsg | 0:662207e34fba | 13 | // ... - ongoing debug release |
garfieldsg | 0:662207e34fba | 14 | |
garfieldsg | 0:662207e34fba | 15 | // NOTE: THIS IS ONLY A PARIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY UNDERGOING ACTIVE |
garfieldsg | 0:662207e34fba | 16 | // DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES. PLEASE KEEP THIS IN MIND IF |
garfieldsg | 0:662207e34fba | 17 | // YOU DECIDE TO USE THIS PARTICULAR CODE FOR ANYTHING. |
garfieldsg | 0:662207e34fba | 18 | |
garfieldsg | 0:662207e34fba | 19 | /* ============================================ |
garfieldsg | 0:662207e34fba | 20 | I2Cdev device library code is placed under the MIT license |
garfieldsg | 0:662207e34fba | 21 | Copyright (c) 2012 Jeff Rowberg |
garfieldsg | 0:662207e34fba | 22 | |
garfieldsg | 0:662207e34fba | 23 | Permission is hereby granted, free of charge, to any person obtaining a copy |
garfieldsg | 0:662207e34fba | 24 | of this software and associated documentation files (the "Software"), to deal |
garfieldsg | 0:662207e34fba | 25 | in the Software without restriction, including without limitation the rights |
garfieldsg | 0:662207e34fba | 26 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
garfieldsg | 0:662207e34fba | 27 | copies of the Software, and to permit persons to whom the Software is |
garfieldsg | 0:662207e34fba | 28 | furnished to do so, subject to the following conditions: |
garfieldsg | 0:662207e34fba | 29 | |
garfieldsg | 0:662207e34fba | 30 | The above copyright notice and this permission notice shall be included in |
garfieldsg | 0:662207e34fba | 31 | all copies or substantial portions of the Software. |
garfieldsg | 0:662207e34fba | 32 | |
garfieldsg | 0:662207e34fba | 33 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
garfieldsg | 0:662207e34fba | 34 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
garfieldsg | 0:662207e34fba | 35 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
garfieldsg | 0:662207e34fba | 36 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
garfieldsg | 0:662207e34fba | 37 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
garfieldsg | 0:662207e34fba | 38 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
garfieldsg | 0:662207e34fba | 39 | THE SOFTWARE. |
garfieldsg | 0:662207e34fba | 40 | =============================================== |
garfieldsg | 0:662207e34fba | 41 | */ |
garfieldsg | 0:662207e34fba | 42 | |
garfieldsg | 0:662207e34fba | 43 | #include "MPU6050.h" |
chris1seto | 2:d7915dab2d3c | 44 | #include "shared.h" |
garfieldsg | 0:662207e34fba | 45 | |
chris1seto | 2:d7915dab2d3c | 46 | //#define useDebugSerial |
garfieldsg | 0:662207e34fba | 47 | |
garfieldsg | 0:662207e34fba | 48 | //instead of using pgmspace.h |
garfieldsg | 0:662207e34fba | 49 | typedef const unsigned char prog_uchar; |
garfieldsg | 0:662207e34fba | 50 | #define pgm_read_byte_near(x) (*(prog_uchar*)x) |
garfieldsg | 0:662207e34fba | 51 | #define pgm_read_byte(x) (*(prog_uchar*)x) |
garfieldsg | 0:662207e34fba | 52 | |
garfieldsg | 0:662207e34fba | 53 | /** Default constructor, uses default I2C address. |
garfieldsg | 0:662207e34fba | 54 | * @see MPU6050_DEFAULT_ADDRESS |
garfieldsg | 0:662207e34fba | 55 | */ |
chris1seto | 2:d7915dab2d3c | 56 | MPU6050::MPU6050() |
garfieldsg | 0:662207e34fba | 57 | { |
garfieldsg | 0:662207e34fba | 58 | devAddr = MPU6050_DEFAULT_ADDRESS; |
garfieldsg | 0:662207e34fba | 59 | } |
garfieldsg | 0:662207e34fba | 60 | |
garfieldsg | 0:662207e34fba | 61 | /** Specific address constructor. |
garfieldsg | 0:662207e34fba | 62 | * @param address I2C address |
garfieldsg | 0:662207e34fba | 63 | * @see MPU6050_DEFAULT_ADDRESS |
garfieldsg | 0:662207e34fba | 64 | * @see MPU6050_ADDRESS_AD0_LOW |
garfieldsg | 0:662207e34fba | 65 | * @see MPU6050_ADDRESS_AD0_HIGH |
garfieldsg | 0:662207e34fba | 66 | */ |
chris1seto | 2:d7915dab2d3c | 67 | MPU6050::MPU6050(uint8_t address) |
garfieldsg | 0:662207e34fba | 68 | { |
garfieldsg | 0:662207e34fba | 69 | devAddr = address; |
garfieldsg | 0:662207e34fba | 70 | } |
garfieldsg | 0:662207e34fba | 71 | |
garfieldsg | 0:662207e34fba | 72 | /** Power on and prepare for general usage. |
garfieldsg | 0:662207e34fba | 73 | * This will activate the device and take it out of sleep mode (which must be done |
garfieldsg | 0:662207e34fba | 74 | * after start-up). This function also sets both the accelerometer and the gyroscope |
garfieldsg | 0:662207e34fba | 75 | * to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets |
garfieldsg | 0:662207e34fba | 76 | * the clock source to use the X Gyro for reference, which is slightly better than |
garfieldsg | 0:662207e34fba | 77 | * the default internal clock source. |
garfieldsg | 0:662207e34fba | 78 | */ |
garfieldsg | 0:662207e34fba | 79 | void MPU6050::initialize() |
garfieldsg | 0:662207e34fba | 80 | { |
garfieldsg | 0:662207e34fba | 81 | |
garfieldsg | 0:662207e34fba | 82 | #ifdef useDebugSerial |
garfieldsg | 0:662207e34fba | 83 | debugSerial.printf("MPU6050::initialize start\n"); |
garfieldsg | 0:662207e34fba | 84 | #endif |
garfieldsg | 0:662207e34fba | 85 | |
garfieldsg | 0:662207e34fba | 86 | setClockSource(MPU6050_CLOCK_PLL_XGYRO); |
garfieldsg | 0:662207e34fba | 87 | setFullScaleGyroRange(MPU6050_GYRO_FS_250); |
garfieldsg | 0:662207e34fba | 88 | setFullScaleAccelRange(MPU6050_ACCEL_FS_2); |
garfieldsg | 0:662207e34fba | 89 | setSleepEnabled(false); // thanks to Jack Elston for pointing this one out! |
garfieldsg | 0:662207e34fba | 90 | |
garfieldsg | 0:662207e34fba | 91 | #ifdef useDebugSerial |
garfieldsg | 0:662207e34fba | 92 | debugSerial.printf("MPU6050::initialize end\n"); |
garfieldsg | 0:662207e34fba | 93 | #endif |
garfieldsg | 0:662207e34fba | 94 | } |
garfieldsg | 0:662207e34fba | 95 | |
garfieldsg | 0:662207e34fba | 96 | /** Verify the I2C connection. |
garfieldsg | 0:662207e34fba | 97 | * Make sure the device is connected and responds as expected. |
garfieldsg | 0:662207e34fba | 98 | * @return True if connection is valid, false otherwise |
garfieldsg | 0:662207e34fba | 99 | */ |
garfieldsg | 0:662207e34fba | 100 | bool MPU6050::testConnection() |
garfieldsg | 0:662207e34fba | 101 | { |
garfieldsg | 0:662207e34fba | 102 | #ifdef useDebugSerial |
garfieldsg | 0:662207e34fba | 103 | debugSerial.printf("MPU6050::testConnection start\n"); |
garfieldsg | 0:662207e34fba | 104 | #endif |
garfieldsg | 0:662207e34fba | 105 | uint8_t deviceId = getDeviceID(); |
garfieldsg | 0:662207e34fba | 106 | #ifdef useDebugSerial |
garfieldsg | 0:662207e34fba | 107 | debugSerial.printf("DeviceId = %d\n",deviceId); |
garfieldsg | 0:662207e34fba | 108 | #endif |
garfieldsg | 0:662207e34fba | 109 | return deviceId == 0x34; |
garfieldsg | 0:662207e34fba | 110 | } |
garfieldsg | 0:662207e34fba | 111 | |
garfieldsg | 0:662207e34fba | 112 | // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC) |
garfieldsg | 0:662207e34fba | 113 | |
garfieldsg | 0:662207e34fba | 114 | /** Get the auxiliary I2C supply voltage level. |
garfieldsg | 0:662207e34fba | 115 | * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to |
garfieldsg | 0:662207e34fba | 116 | * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to |
garfieldsg | 0:662207e34fba | 117 | * the MPU-6000, which does not have a VLOGIC pin. |
garfieldsg | 0:662207e34fba | 118 | * @return I2C supply voltage level (0=VLOGIC, 1=VDD) |
garfieldsg | 0:662207e34fba | 119 | */ |
garfieldsg | 0:662207e34fba | 120 | uint8_t MPU6050::getAuxVDDIOLevel() |
garfieldsg | 0:662207e34fba | 121 | { |
garfieldsg | 0:662207e34fba | 122 | i2Cdev.readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer); |
garfieldsg | 0:662207e34fba | 123 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 124 | } |
garfieldsg | 0:662207e34fba | 125 | /** Set the auxiliary I2C supply voltage level. |
garfieldsg | 0:662207e34fba | 126 | * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to |
garfieldsg | 0:662207e34fba | 127 | * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to |
garfieldsg | 0:662207e34fba | 128 | * the MPU-6000, which does not have a VLOGIC pin. |
garfieldsg | 0:662207e34fba | 129 | * @param level I2C supply voltage level (0=VLOGIC, 1=VDD) |
garfieldsg | 0:662207e34fba | 130 | */ |
garfieldsg | 0:662207e34fba | 131 | void MPU6050::setAuxVDDIOLevel(uint8_t level) |
garfieldsg | 0:662207e34fba | 132 | { |
garfieldsg | 0:662207e34fba | 133 | i2Cdev.writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level); |
garfieldsg | 0:662207e34fba | 134 | } |
garfieldsg | 0:662207e34fba | 135 | |
garfieldsg | 0:662207e34fba | 136 | // SMPLRT_DIV register |
garfieldsg | 0:662207e34fba | 137 | |
garfieldsg | 0:662207e34fba | 138 | /** Get gyroscope output rate divider. |
garfieldsg | 0:662207e34fba | 139 | * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero |
garfieldsg | 0:662207e34fba | 140 | * Motion detection, and Free Fall detection are all based on the Sample Rate. |
garfieldsg | 0:662207e34fba | 141 | * The Sample Rate is generated by dividing the gyroscope output rate by |
garfieldsg | 0:662207e34fba | 142 | * SMPLRT_DIV: |
garfieldsg | 0:662207e34fba | 143 | * |
garfieldsg | 0:662207e34fba | 144 | * Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV) |
garfieldsg | 0:662207e34fba | 145 | * |
garfieldsg | 0:662207e34fba | 146 | * where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or |
garfieldsg | 0:662207e34fba | 147 | * 7), and 1kHz when the DLPF is enabled (see Register 26). |
garfieldsg | 0:662207e34fba | 148 | * |
garfieldsg | 0:662207e34fba | 149 | * Note: The accelerometer output rate is 1kHz. This means that for a Sample |
garfieldsg | 0:662207e34fba | 150 | * Rate greater than 1kHz, the same accelerometer sample may be output to the |
garfieldsg | 0:662207e34fba | 151 | * FIFO, DMP, and sensor registers more than once. |
garfieldsg | 0:662207e34fba | 152 | * |
garfieldsg | 0:662207e34fba | 153 | * For a diagram of the gyroscope and accelerometer signal paths, see Section 8 |
garfieldsg | 0:662207e34fba | 154 | * of the MPU-6000/MPU-6050 Product Specification document. |
garfieldsg | 0:662207e34fba | 155 | * |
garfieldsg | 0:662207e34fba | 156 | * @return Current sample rate |
garfieldsg | 0:662207e34fba | 157 | * @see MPU6050_RA_SMPLRT_DIV |
garfieldsg | 0:662207e34fba | 158 | */ |
garfieldsg | 0:662207e34fba | 159 | uint8_t MPU6050::getRate() |
garfieldsg | 0:662207e34fba | 160 | { |
garfieldsg | 0:662207e34fba | 161 | i2Cdev.readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer); |
garfieldsg | 0:662207e34fba | 162 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 163 | } |
garfieldsg | 0:662207e34fba | 164 | /** Set gyroscope sample rate divider. |
garfieldsg | 0:662207e34fba | 165 | * @param rate New sample rate divider |
garfieldsg | 0:662207e34fba | 166 | * @see getRate() |
garfieldsg | 0:662207e34fba | 167 | * @see MPU6050_RA_SMPLRT_DIV |
garfieldsg | 0:662207e34fba | 168 | */ |
garfieldsg | 0:662207e34fba | 169 | void MPU6050::setRate(uint8_t rate) |
garfieldsg | 0:662207e34fba | 170 | { |
garfieldsg | 0:662207e34fba | 171 | i2Cdev.writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate); |
garfieldsg | 0:662207e34fba | 172 | } |
garfieldsg | 0:662207e34fba | 173 | |
garfieldsg | 0:662207e34fba | 174 | // CONFIG register |
garfieldsg | 0:662207e34fba | 175 | |
garfieldsg | 0:662207e34fba | 176 | /** Get external FSYNC configuration. |
garfieldsg | 0:662207e34fba | 177 | * Configures the external Frame Synchronization (FSYNC) pin sampling. An |
garfieldsg | 0:662207e34fba | 178 | * external signal connected to the FSYNC pin can be sampled by configuring |
garfieldsg | 0:662207e34fba | 179 | * EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short |
garfieldsg | 0:662207e34fba | 180 | * strobes may be captured. The latched FSYNC signal will be sampled at the |
garfieldsg | 0:662207e34fba | 181 | * Sampling Rate, as defined in register 25. After sampling, the latch will |
garfieldsg | 0:662207e34fba | 182 | * reset to the current FSYNC signal state. |
garfieldsg | 0:662207e34fba | 183 | * |
garfieldsg | 0:662207e34fba | 184 | * The sampled value will be reported in place of the least significant bit in |
garfieldsg | 0:662207e34fba | 185 | * a sensor data register determined by the value of EXT_SYNC_SET according to |
garfieldsg | 0:662207e34fba | 186 | * the following table. |
garfieldsg | 0:662207e34fba | 187 | * |
garfieldsg | 0:662207e34fba | 188 | * <pre> |
garfieldsg | 0:662207e34fba | 189 | * EXT_SYNC_SET | FSYNC Bit Location |
garfieldsg | 0:662207e34fba | 190 | * -------------+------------------- |
garfieldsg | 0:662207e34fba | 191 | * 0 | Input disabled |
garfieldsg | 0:662207e34fba | 192 | * 1 | TEMP_OUT_L[0] |
garfieldsg | 0:662207e34fba | 193 | * 2 | GYRO_XOUT_L[0] |
garfieldsg | 0:662207e34fba | 194 | * 3 | GYRO_YOUT_L[0] |
garfieldsg | 0:662207e34fba | 195 | * 4 | GYRO_ZOUT_L[0] |
garfieldsg | 0:662207e34fba | 196 | * 5 | ACCEL_XOUT_L[0] |
garfieldsg | 0:662207e34fba | 197 | * 6 | ACCEL_YOUT_L[0] |
garfieldsg | 0:662207e34fba | 198 | * 7 | ACCEL_ZOUT_L[0] |
garfieldsg | 0:662207e34fba | 199 | * </pre> |
garfieldsg | 0:662207e34fba | 200 | * |
garfieldsg | 0:662207e34fba | 201 | * @return FSYNC configuration value |
garfieldsg | 0:662207e34fba | 202 | */ |
garfieldsg | 0:662207e34fba | 203 | uint8_t MPU6050::getExternalFrameSync() |
garfieldsg | 0:662207e34fba | 204 | { |
garfieldsg | 0:662207e34fba | 205 | i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 206 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 207 | } |
garfieldsg | 0:662207e34fba | 208 | /** Set external FSYNC configuration. |
garfieldsg | 0:662207e34fba | 209 | * @see getExternalFrameSync() |
garfieldsg | 0:662207e34fba | 210 | * @see MPU6050_RA_CONFIG |
garfieldsg | 0:662207e34fba | 211 | * @param sync New FSYNC configuration value |
garfieldsg | 0:662207e34fba | 212 | */ |
garfieldsg | 0:662207e34fba | 213 | void MPU6050::setExternalFrameSync(uint8_t sync) |
garfieldsg | 0:662207e34fba | 214 | { |
garfieldsg | 0:662207e34fba | 215 | i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync); |
garfieldsg | 0:662207e34fba | 216 | } |
garfieldsg | 0:662207e34fba | 217 | /** Get digital low-pass filter configuration. |
garfieldsg | 0:662207e34fba | 218 | * The DLPF_CFG parameter sets the digital low pass filter configuration. It |
garfieldsg | 0:662207e34fba | 219 | * also determines the internal sampling rate used by the device as shown in |
garfieldsg | 0:662207e34fba | 220 | * the table below. |
garfieldsg | 0:662207e34fba | 221 | * |
garfieldsg | 0:662207e34fba | 222 | * Note: The accelerometer output rate is 1kHz. This means that for a Sample |
garfieldsg | 0:662207e34fba | 223 | * Rate greater than 1kHz, the same accelerometer sample may be output to the |
garfieldsg | 0:662207e34fba | 224 | * FIFO, DMP, and sensor registers more than once. |
garfieldsg | 0:662207e34fba | 225 | * |
garfieldsg | 0:662207e34fba | 226 | * <pre> |
garfieldsg | 0:662207e34fba | 227 | * | ACCELEROMETER | GYROSCOPE |
garfieldsg | 0:662207e34fba | 228 | * DLPF_CFG | Bandwidth | Delay | Bandwidth | Delay | Sample Rate |
garfieldsg | 0:662207e34fba | 229 | * ---------+-----------+--------+-----------+--------+------------- |
garfieldsg | 0:662207e34fba | 230 | * 0 | 260Hz | 0ms | 256Hz | 0.98ms | 8kHz |
garfieldsg | 0:662207e34fba | 231 | * 1 | 184Hz | 2.0ms | 188Hz | 1.9ms | 1kHz |
garfieldsg | 0:662207e34fba | 232 | * 2 | 94Hz | 3.0ms | 98Hz | 2.8ms | 1kHz |
garfieldsg | 0:662207e34fba | 233 | * 3 | 44Hz | 4.9ms | 42Hz | 4.8ms | 1kHz |
garfieldsg | 0:662207e34fba | 234 | * 4 | 21Hz | 8.5ms | 20Hz | 8.3ms | 1kHz |
garfieldsg | 0:662207e34fba | 235 | * 5 | 10Hz | 13.8ms | 10Hz | 13.4ms | 1kHz |
garfieldsg | 0:662207e34fba | 236 | * 6 | 5Hz | 19.0ms | 5Hz | 18.6ms | 1kHz |
garfieldsg | 0:662207e34fba | 237 | * 7 | -- Reserved -- | -- Reserved -- | Reserved |
garfieldsg | 0:662207e34fba | 238 | * </pre> |
garfieldsg | 0:662207e34fba | 239 | * |
garfieldsg | 0:662207e34fba | 240 | * @return DLFP configuration |
garfieldsg | 0:662207e34fba | 241 | * @see MPU6050_RA_CONFIG |
garfieldsg | 0:662207e34fba | 242 | * @see MPU6050_CFG_DLPF_CFG_BIT |
garfieldsg | 0:662207e34fba | 243 | * @see MPU6050_CFG_DLPF_CFG_LENGTH |
garfieldsg | 0:662207e34fba | 244 | */ |
garfieldsg | 0:662207e34fba | 245 | uint8_t MPU6050::getDLPFMode() |
garfieldsg | 0:662207e34fba | 246 | { |
garfieldsg | 0:662207e34fba | 247 | i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 248 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 249 | } |
garfieldsg | 0:662207e34fba | 250 | /** Set digital low-pass filter configuration. |
garfieldsg | 0:662207e34fba | 251 | * @param mode New DLFP configuration setting |
garfieldsg | 0:662207e34fba | 252 | * @see getDLPFBandwidth() |
garfieldsg | 0:662207e34fba | 253 | * @see MPU6050_DLPF_BW_256 |
garfieldsg | 0:662207e34fba | 254 | * @see MPU6050_RA_CONFIG |
garfieldsg | 0:662207e34fba | 255 | * @see MPU6050_CFG_DLPF_CFG_BIT |
garfieldsg | 0:662207e34fba | 256 | * @see MPU6050_CFG_DLPF_CFG_LENGTH |
garfieldsg | 0:662207e34fba | 257 | */ |
garfieldsg | 0:662207e34fba | 258 | void MPU6050::setDLPFMode(uint8_t mode) |
garfieldsg | 0:662207e34fba | 259 | { |
garfieldsg | 0:662207e34fba | 260 | i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode); |
garfieldsg | 0:662207e34fba | 261 | } |
garfieldsg | 0:662207e34fba | 262 | |
garfieldsg | 0:662207e34fba | 263 | // GYRO_CONFIG register |
garfieldsg | 0:662207e34fba | 264 | |
garfieldsg | 0:662207e34fba | 265 | /** Get full-scale gyroscope range. |
garfieldsg | 0:662207e34fba | 266 | * The FS_SEL parameter allows setting the full-scale range of the gyro sensors, |
garfieldsg | 0:662207e34fba | 267 | * as described in the table below. |
garfieldsg | 0:662207e34fba | 268 | * |
garfieldsg | 0:662207e34fba | 269 | * <pre> |
garfieldsg | 0:662207e34fba | 270 | * 0 = +/- 250 degrees/sec |
garfieldsg | 0:662207e34fba | 271 | * 1 = +/- 500 degrees/sec |
garfieldsg | 0:662207e34fba | 272 | * 2 = +/- 1000 degrees/sec |
garfieldsg | 0:662207e34fba | 273 | * 3 = +/- 2000 degrees/sec |
garfieldsg | 0:662207e34fba | 274 | * </pre> |
garfieldsg | 0:662207e34fba | 275 | * |
garfieldsg | 0:662207e34fba | 276 | * @return Current full-scale gyroscope range setting |
garfieldsg | 0:662207e34fba | 277 | * @see MPU6050_GYRO_FS_250 |
garfieldsg | 0:662207e34fba | 278 | * @see MPU6050_RA_GYRO_CONFIG |
garfieldsg | 0:662207e34fba | 279 | * @see MPU6050_GCONFIG_FS_SEL_BIT |
garfieldsg | 0:662207e34fba | 280 | * @see MPU6050_GCONFIG_FS_SEL_LENGTH |
garfieldsg | 0:662207e34fba | 281 | */ |
garfieldsg | 0:662207e34fba | 282 | uint8_t MPU6050::getFullScaleGyroRange() |
garfieldsg | 0:662207e34fba | 283 | { |
garfieldsg | 0:662207e34fba | 284 | i2Cdev.readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 285 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 286 | } |
garfieldsg | 0:662207e34fba | 287 | /** Set full-scale gyroscope range. |
garfieldsg | 0:662207e34fba | 288 | * @param range New full-scale gyroscope range value |
garfieldsg | 0:662207e34fba | 289 | * @see getFullScaleRange() |
garfieldsg | 0:662207e34fba | 290 | * @see MPU6050_GYRO_FS_250 |
garfieldsg | 0:662207e34fba | 291 | * @see MPU6050_RA_GYRO_CONFIG |
garfieldsg | 0:662207e34fba | 292 | * @see MPU6050_GCONFIG_FS_SEL_BIT |
garfieldsg | 0:662207e34fba | 293 | * @see MPU6050_GCONFIG_FS_SEL_LENGTH |
garfieldsg | 0:662207e34fba | 294 | */ |
garfieldsg | 0:662207e34fba | 295 | void MPU6050::setFullScaleGyroRange(uint8_t range) |
garfieldsg | 0:662207e34fba | 296 | { |
garfieldsg | 0:662207e34fba | 297 | i2Cdev.writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range); |
garfieldsg | 0:662207e34fba | 298 | } |
garfieldsg | 0:662207e34fba | 299 | |
garfieldsg | 0:662207e34fba | 300 | // ACCEL_CONFIG register |
garfieldsg | 0:662207e34fba | 301 | |
garfieldsg | 0:662207e34fba | 302 | /** Get self-test enabled setting for accelerometer X axis. |
garfieldsg | 0:662207e34fba | 303 | * @return Self-test enabled value |
garfieldsg | 0:662207e34fba | 304 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 305 | */ |
garfieldsg | 0:662207e34fba | 306 | bool MPU6050::getAccelXSelfTest() |
garfieldsg | 0:662207e34fba | 307 | { |
garfieldsg | 0:662207e34fba | 308 | i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer); |
garfieldsg | 0:662207e34fba | 309 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 310 | } |
garfieldsg | 0:662207e34fba | 311 | /** Get self-test enabled setting for accelerometer X axis. |
garfieldsg | 0:662207e34fba | 312 | * @param enabled Self-test enabled value |
garfieldsg | 0:662207e34fba | 313 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 314 | */ |
garfieldsg | 0:662207e34fba | 315 | void MPU6050::setAccelXSelfTest(bool enabled) |
garfieldsg | 0:662207e34fba | 316 | { |
garfieldsg | 0:662207e34fba | 317 | i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled); |
garfieldsg | 0:662207e34fba | 318 | } |
garfieldsg | 0:662207e34fba | 319 | /** Get self-test enabled value for accelerometer Y axis. |
garfieldsg | 0:662207e34fba | 320 | * @return Self-test enabled value |
garfieldsg | 0:662207e34fba | 321 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 322 | */ |
garfieldsg | 0:662207e34fba | 323 | bool MPU6050::getAccelYSelfTest() |
garfieldsg | 0:662207e34fba | 324 | { |
garfieldsg | 0:662207e34fba | 325 | i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer); |
garfieldsg | 0:662207e34fba | 326 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 327 | } |
garfieldsg | 0:662207e34fba | 328 | /** Get self-test enabled value for accelerometer Y axis. |
garfieldsg | 0:662207e34fba | 329 | * @param enabled Self-test enabled value |
garfieldsg | 0:662207e34fba | 330 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 331 | */ |
garfieldsg | 0:662207e34fba | 332 | void MPU6050::setAccelYSelfTest(bool enabled) |
garfieldsg | 0:662207e34fba | 333 | { |
garfieldsg | 0:662207e34fba | 334 | i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled); |
garfieldsg | 0:662207e34fba | 335 | } |
garfieldsg | 0:662207e34fba | 336 | /** Get self-test enabled value for accelerometer Z axis. |
garfieldsg | 0:662207e34fba | 337 | * @return Self-test enabled value |
garfieldsg | 0:662207e34fba | 338 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 339 | */ |
garfieldsg | 0:662207e34fba | 340 | bool MPU6050::getAccelZSelfTest() |
garfieldsg | 0:662207e34fba | 341 | { |
garfieldsg | 0:662207e34fba | 342 | i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer); |
garfieldsg | 0:662207e34fba | 343 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 344 | } |
garfieldsg | 0:662207e34fba | 345 | /** Set self-test enabled value for accelerometer Z axis. |
garfieldsg | 0:662207e34fba | 346 | * @param enabled Self-test enabled value |
garfieldsg | 0:662207e34fba | 347 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 348 | */ |
garfieldsg | 0:662207e34fba | 349 | void MPU6050::setAccelZSelfTest(bool enabled) |
garfieldsg | 0:662207e34fba | 350 | { |
garfieldsg | 0:662207e34fba | 351 | i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled); |
garfieldsg | 0:662207e34fba | 352 | } |
garfieldsg | 0:662207e34fba | 353 | /** Get full-scale accelerometer range. |
garfieldsg | 0:662207e34fba | 354 | * The FS_SEL parameter allows setting the full-scale range of the accelerometer |
garfieldsg | 0:662207e34fba | 355 | * sensors, as described in the table below. |
garfieldsg | 0:662207e34fba | 356 | * |
garfieldsg | 0:662207e34fba | 357 | * <pre> |
garfieldsg | 0:662207e34fba | 358 | * 0 = +/- 2g |
garfieldsg | 0:662207e34fba | 359 | * 1 = +/- 4g |
garfieldsg | 0:662207e34fba | 360 | * 2 = +/- 8g |
garfieldsg | 0:662207e34fba | 361 | * 3 = +/- 16g |
garfieldsg | 0:662207e34fba | 362 | * </pre> |
garfieldsg | 0:662207e34fba | 363 | * |
garfieldsg | 0:662207e34fba | 364 | * @return Current full-scale accelerometer range setting |
garfieldsg | 0:662207e34fba | 365 | * @see MPU6050_ACCEL_FS_2 |
garfieldsg | 0:662207e34fba | 366 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 367 | * @see MPU6050_ACONFIG_AFS_SEL_BIT |
garfieldsg | 0:662207e34fba | 368 | * @see MPU6050_ACONFIG_AFS_SEL_LENGTH |
garfieldsg | 0:662207e34fba | 369 | */ |
garfieldsg | 0:662207e34fba | 370 | uint8_t MPU6050::getFullScaleAccelRange() |
garfieldsg | 0:662207e34fba | 371 | { |
garfieldsg | 0:662207e34fba | 372 | i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 373 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 374 | } |
garfieldsg | 0:662207e34fba | 375 | /** Set full-scale accelerometer range. |
garfieldsg | 0:662207e34fba | 376 | * @param range New full-scale accelerometer range setting |
garfieldsg | 0:662207e34fba | 377 | * @see getFullScaleAccelRange() |
garfieldsg | 0:662207e34fba | 378 | */ |
garfieldsg | 0:662207e34fba | 379 | void MPU6050::setFullScaleAccelRange(uint8_t range) |
garfieldsg | 0:662207e34fba | 380 | { |
garfieldsg | 0:662207e34fba | 381 | i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range); |
garfieldsg | 0:662207e34fba | 382 | } |
garfieldsg | 0:662207e34fba | 383 | /** Get the high-pass filter configuration. |
garfieldsg | 0:662207e34fba | 384 | * The DHPF is a filter module in the path leading to motion detectors (Free |
garfieldsg | 0:662207e34fba | 385 | * Fall, Motion threshold, and Zero Motion). The high pass filter output is not |
garfieldsg | 0:662207e34fba | 386 | * available to the data registers (see Figure in Section 8 of the MPU-6000/ |
garfieldsg | 0:662207e34fba | 387 | * MPU-6050 Product Specification document). |
garfieldsg | 0:662207e34fba | 388 | * |
garfieldsg | 0:662207e34fba | 389 | * The high pass filter has three modes: |
garfieldsg | 0:662207e34fba | 390 | * |
garfieldsg | 0:662207e34fba | 391 | * <pre> |
garfieldsg | 0:662207e34fba | 392 | * Reset: The filter output settles to zero within one sample. This |
garfieldsg | 0:662207e34fba | 393 | * effectively disables the high pass filter. This mode may be toggled |
garfieldsg | 0:662207e34fba | 394 | * to quickly settle the filter. |
garfieldsg | 0:662207e34fba | 395 | * |
garfieldsg | 0:662207e34fba | 396 | * On: The high pass filter will pass signals above the cut off frequency. |
garfieldsg | 0:662207e34fba | 397 | * |
garfieldsg | 0:662207e34fba | 398 | * Hold: When triggered, the filter holds the present sample. The filter |
garfieldsg | 0:662207e34fba | 399 | * output will be the difference between the input sample and the held |
garfieldsg | 0:662207e34fba | 400 | * sample. |
garfieldsg | 0:662207e34fba | 401 | * </pre> |
garfieldsg | 0:662207e34fba | 402 | * |
garfieldsg | 0:662207e34fba | 403 | * <pre> |
garfieldsg | 0:662207e34fba | 404 | * ACCEL_HPF | Filter Mode | Cut-off Frequency |
garfieldsg | 0:662207e34fba | 405 | * ----------+-------------+------------------ |
garfieldsg | 0:662207e34fba | 406 | * 0 | Reset | None |
garfieldsg | 0:662207e34fba | 407 | * 1 | On | 5Hz |
garfieldsg | 0:662207e34fba | 408 | * 2 | On | 2.5Hz |
garfieldsg | 0:662207e34fba | 409 | * 3 | On | 1.25Hz |
garfieldsg | 0:662207e34fba | 410 | * 4 | On | 0.63Hz |
garfieldsg | 0:662207e34fba | 411 | * 7 | Hold | None |
garfieldsg | 0:662207e34fba | 412 | * </pre> |
garfieldsg | 0:662207e34fba | 413 | * |
garfieldsg | 0:662207e34fba | 414 | * @return Current high-pass filter configuration |
garfieldsg | 0:662207e34fba | 415 | * @see MPU6050_DHPF_RESET |
garfieldsg | 0:662207e34fba | 416 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 417 | */ |
garfieldsg | 0:662207e34fba | 418 | uint8_t MPU6050::getDHPFMode() |
garfieldsg | 0:662207e34fba | 419 | { |
garfieldsg | 0:662207e34fba | 420 | i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 421 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 422 | } |
garfieldsg | 0:662207e34fba | 423 | /** Set the high-pass filter configuration. |
garfieldsg | 0:662207e34fba | 424 | * @param bandwidth New high-pass filter configuration |
garfieldsg | 0:662207e34fba | 425 | * @see setDHPFMode() |
garfieldsg | 0:662207e34fba | 426 | * @see MPU6050_DHPF_RESET |
garfieldsg | 0:662207e34fba | 427 | * @see MPU6050_RA_ACCEL_CONFIG |
garfieldsg | 0:662207e34fba | 428 | */ |
garfieldsg | 0:662207e34fba | 429 | void MPU6050::setDHPFMode(uint8_t bandwidth) |
garfieldsg | 0:662207e34fba | 430 | { |
garfieldsg | 0:662207e34fba | 431 | i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth); |
garfieldsg | 0:662207e34fba | 432 | } |
garfieldsg | 0:662207e34fba | 433 | |
garfieldsg | 0:662207e34fba | 434 | // FF_THR register |
garfieldsg | 0:662207e34fba | 435 | |
garfieldsg | 0:662207e34fba | 436 | /** Get free-fall event acceleration threshold. |
garfieldsg | 0:662207e34fba | 437 | * This register configures the detection threshold for Free Fall event |
garfieldsg | 0:662207e34fba | 438 | * detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the |
garfieldsg | 0:662207e34fba | 439 | * absolute value of the accelerometer measurements for the three axes are each |
garfieldsg | 0:662207e34fba | 440 | * less than the detection threshold. This condition increments the Free Fall |
garfieldsg | 0:662207e34fba | 441 | * duration counter (Register 30). The Free Fall interrupt is triggered when the |
garfieldsg | 0:662207e34fba | 442 | * Free Fall duration counter reaches the time specified in FF_DUR. |
garfieldsg | 0:662207e34fba | 443 | * |
garfieldsg | 0:662207e34fba | 444 | * For more details on the Free Fall detection interrupt, see Section 8.2 of the |
garfieldsg | 0:662207e34fba | 445 | * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and |
garfieldsg | 0:662207e34fba | 446 | * 58 of this document. |
garfieldsg | 0:662207e34fba | 447 | * |
garfieldsg | 0:662207e34fba | 448 | * @return Current free-fall acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 449 | * @see MPU6050_RA_FF_THR |
garfieldsg | 0:662207e34fba | 450 | */ |
garfieldsg | 0:662207e34fba | 451 | uint8_t MPU6050::getFreefallDetectionThreshold() |
garfieldsg | 0:662207e34fba | 452 | { |
garfieldsg | 0:662207e34fba | 453 | i2Cdev.readByte(devAddr, MPU6050_RA_FF_THR, buffer); |
garfieldsg | 0:662207e34fba | 454 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 455 | } |
garfieldsg | 0:662207e34fba | 456 | /** Get free-fall event acceleration threshold. |
garfieldsg | 0:662207e34fba | 457 | * @param threshold New free-fall acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 458 | * @see getFreefallDetectionThreshold() |
garfieldsg | 0:662207e34fba | 459 | * @see MPU6050_RA_FF_THR |
garfieldsg | 0:662207e34fba | 460 | */ |
garfieldsg | 0:662207e34fba | 461 | void MPU6050::setFreefallDetectionThreshold(uint8_t threshold) |
garfieldsg | 0:662207e34fba | 462 | { |
garfieldsg | 0:662207e34fba | 463 | i2Cdev.writeByte(devAddr, MPU6050_RA_FF_THR, threshold); |
garfieldsg | 0:662207e34fba | 464 | } |
garfieldsg | 0:662207e34fba | 465 | |
garfieldsg | 0:662207e34fba | 466 | // FF_DUR register |
garfieldsg | 0:662207e34fba | 467 | |
garfieldsg | 0:662207e34fba | 468 | /** Get free-fall event duration threshold. |
garfieldsg | 0:662207e34fba | 469 | * This register configures the duration counter threshold for Free Fall event |
garfieldsg | 0:662207e34fba | 470 | * detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit |
garfieldsg | 0:662207e34fba | 471 | * of 1 LSB = 1 ms. |
garfieldsg | 0:662207e34fba | 472 | * |
garfieldsg | 0:662207e34fba | 473 | * The Free Fall duration counter increments while the absolute value of the |
garfieldsg | 0:662207e34fba | 474 | * accelerometer measurements are each less than the detection threshold |
garfieldsg | 0:662207e34fba | 475 | * (Register 29). The Free Fall interrupt is triggered when the Free Fall |
garfieldsg | 0:662207e34fba | 476 | * duration counter reaches the time specified in this register. |
garfieldsg | 0:662207e34fba | 477 | * |
garfieldsg | 0:662207e34fba | 478 | * For more details on the Free Fall detection interrupt, see Section 8.2 of |
garfieldsg | 0:662207e34fba | 479 | * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56 |
garfieldsg | 0:662207e34fba | 480 | * and 58 of this document. |
garfieldsg | 0:662207e34fba | 481 | * |
garfieldsg | 0:662207e34fba | 482 | * @return Current free-fall duration threshold value (LSB = 1ms) |
garfieldsg | 0:662207e34fba | 483 | * @see MPU6050_RA_FF_DUR |
garfieldsg | 0:662207e34fba | 484 | */ |
garfieldsg | 0:662207e34fba | 485 | uint8_t MPU6050::getFreefallDetectionDuration() |
garfieldsg | 0:662207e34fba | 486 | { |
garfieldsg | 0:662207e34fba | 487 | i2Cdev.readByte(devAddr, MPU6050_RA_FF_DUR, buffer); |
garfieldsg | 0:662207e34fba | 488 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 489 | } |
garfieldsg | 0:662207e34fba | 490 | /** Get free-fall event duration threshold. |
garfieldsg | 0:662207e34fba | 491 | * @param duration New free-fall duration threshold value (LSB = 1ms) |
garfieldsg | 0:662207e34fba | 492 | * @see getFreefallDetectionDuration() |
garfieldsg | 0:662207e34fba | 493 | * @see MPU6050_RA_FF_DUR |
garfieldsg | 0:662207e34fba | 494 | */ |
garfieldsg | 0:662207e34fba | 495 | void MPU6050::setFreefallDetectionDuration(uint8_t duration) |
garfieldsg | 0:662207e34fba | 496 | { |
garfieldsg | 0:662207e34fba | 497 | i2Cdev.writeByte(devAddr, MPU6050_RA_FF_DUR, duration); |
garfieldsg | 0:662207e34fba | 498 | } |
garfieldsg | 0:662207e34fba | 499 | |
garfieldsg | 0:662207e34fba | 500 | // MOT_THR register |
garfieldsg | 0:662207e34fba | 501 | |
garfieldsg | 0:662207e34fba | 502 | /** Get motion detection event acceleration threshold. |
garfieldsg | 0:662207e34fba | 503 | * This register configures the detection threshold for Motion interrupt |
garfieldsg | 0:662207e34fba | 504 | * generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the |
garfieldsg | 0:662207e34fba | 505 | * absolute value of any of the accelerometer measurements exceeds this Motion |
garfieldsg | 0:662207e34fba | 506 | * detection threshold. This condition increments the Motion detection duration |
garfieldsg | 0:662207e34fba | 507 | * counter (Register 32). The Motion detection interrupt is triggered when the |
garfieldsg | 0:662207e34fba | 508 | * Motion Detection counter reaches the time count specified in MOT_DUR |
garfieldsg | 0:662207e34fba | 509 | * (Register 32). |
garfieldsg | 0:662207e34fba | 510 | * |
garfieldsg | 0:662207e34fba | 511 | * The Motion interrupt will indicate the axis and polarity of detected motion |
garfieldsg | 0:662207e34fba | 512 | * in MOT_DETECT_STATUS (Register 97). |
garfieldsg | 0:662207e34fba | 513 | * |
garfieldsg | 0:662207e34fba | 514 | * For more details on the Motion detection interrupt, see Section 8.3 of the |
garfieldsg | 0:662207e34fba | 515 | * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and |
garfieldsg | 0:662207e34fba | 516 | * 58 of this document. |
garfieldsg | 0:662207e34fba | 517 | * |
garfieldsg | 0:662207e34fba | 518 | * @return Current motion detection acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 519 | * @see MPU6050_RA_MOT_THR |
garfieldsg | 0:662207e34fba | 520 | */ |
garfieldsg | 0:662207e34fba | 521 | uint8_t MPU6050::getMotionDetectionThreshold() |
garfieldsg | 0:662207e34fba | 522 | { |
garfieldsg | 0:662207e34fba | 523 | i2Cdev.readByte(devAddr, MPU6050_RA_MOT_THR, buffer); |
garfieldsg | 0:662207e34fba | 524 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 525 | } |
garfieldsg | 0:662207e34fba | 526 | /** Set free-fall event acceleration threshold. |
garfieldsg | 0:662207e34fba | 527 | * @param threshold New motion detection acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 528 | * @see getMotionDetectionThreshold() |
garfieldsg | 0:662207e34fba | 529 | * @see MPU6050_RA_MOT_THR |
garfieldsg | 0:662207e34fba | 530 | */ |
garfieldsg | 0:662207e34fba | 531 | void MPU6050::setMotionDetectionThreshold(uint8_t threshold) |
garfieldsg | 0:662207e34fba | 532 | { |
garfieldsg | 0:662207e34fba | 533 | i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_THR, threshold); |
garfieldsg | 0:662207e34fba | 534 | } |
garfieldsg | 0:662207e34fba | 535 | |
garfieldsg | 0:662207e34fba | 536 | // MOT_DUR register |
garfieldsg | 0:662207e34fba | 537 | |
garfieldsg | 0:662207e34fba | 538 | /** Get motion detection event duration threshold. |
garfieldsg | 0:662207e34fba | 539 | * This register configures the duration counter threshold for Motion interrupt |
garfieldsg | 0:662207e34fba | 540 | * generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit |
garfieldsg | 0:662207e34fba | 541 | * of 1LSB = 1ms. The Motion detection duration counter increments when the |
garfieldsg | 0:662207e34fba | 542 | * absolute value of any of the accelerometer measurements exceeds the Motion |
garfieldsg | 0:662207e34fba | 543 | * detection threshold (Register 31). The Motion detection interrupt is |
garfieldsg | 0:662207e34fba | 544 | * triggered when the Motion detection counter reaches the time count specified |
garfieldsg | 0:662207e34fba | 545 | * in this register. |
garfieldsg | 0:662207e34fba | 546 | * |
garfieldsg | 0:662207e34fba | 547 | * For more details on the Motion detection interrupt, see Section 8.3 of the |
garfieldsg | 0:662207e34fba | 548 | * MPU-6000/MPU-6050 Product Specification document. |
garfieldsg | 0:662207e34fba | 549 | * |
garfieldsg | 0:662207e34fba | 550 | * @return Current motion detection duration threshold value (LSB = 1ms) |
garfieldsg | 0:662207e34fba | 551 | * @see MPU6050_RA_MOT_DUR |
garfieldsg | 0:662207e34fba | 552 | */ |
garfieldsg | 0:662207e34fba | 553 | uint8_t MPU6050::getMotionDetectionDuration() |
garfieldsg | 0:662207e34fba | 554 | { |
garfieldsg | 0:662207e34fba | 555 | i2Cdev.readByte(devAddr, MPU6050_RA_MOT_DUR, buffer); |
garfieldsg | 0:662207e34fba | 556 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 557 | } |
garfieldsg | 0:662207e34fba | 558 | /** Set motion detection event duration threshold. |
garfieldsg | 0:662207e34fba | 559 | * @param duration New motion detection duration threshold value (LSB = 1ms) |
garfieldsg | 0:662207e34fba | 560 | * @see getMotionDetectionDuration() |
garfieldsg | 0:662207e34fba | 561 | * @see MPU6050_RA_MOT_DUR |
garfieldsg | 0:662207e34fba | 562 | */ |
garfieldsg | 0:662207e34fba | 563 | void MPU6050::setMotionDetectionDuration(uint8_t duration) |
garfieldsg | 0:662207e34fba | 564 | { |
garfieldsg | 0:662207e34fba | 565 | i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_DUR, duration); |
garfieldsg | 0:662207e34fba | 566 | } |
garfieldsg | 0:662207e34fba | 567 | |
garfieldsg | 0:662207e34fba | 568 | // ZRMOT_THR register |
garfieldsg | 0:662207e34fba | 569 | |
garfieldsg | 0:662207e34fba | 570 | /** Get zero motion detection event acceleration threshold. |
garfieldsg | 0:662207e34fba | 571 | * This register configures the detection threshold for Zero Motion interrupt |
garfieldsg | 0:662207e34fba | 572 | * generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when |
garfieldsg | 0:662207e34fba | 573 | * the absolute value of the accelerometer measurements for the 3 axes are each |
garfieldsg | 0:662207e34fba | 574 | * less than the detection threshold. This condition increments the Zero Motion |
garfieldsg | 0:662207e34fba | 575 | * duration counter (Register 34). The Zero Motion interrupt is triggered when |
garfieldsg | 0:662207e34fba | 576 | * the Zero Motion duration counter reaches the time count specified in |
garfieldsg | 0:662207e34fba | 577 | * ZRMOT_DUR (Register 34). |
garfieldsg | 0:662207e34fba | 578 | * |
garfieldsg | 0:662207e34fba | 579 | * Unlike Free Fall or Motion detection, Zero Motion detection triggers an |
garfieldsg | 0:662207e34fba | 580 | * interrupt both when Zero Motion is first detected and when Zero Motion is no |
garfieldsg | 0:662207e34fba | 581 | * longer detected. |
garfieldsg | 0:662207e34fba | 582 | * |
garfieldsg | 0:662207e34fba | 583 | * When a zero motion event is detected, a Zero Motion Status will be indicated |
garfieldsg | 0:662207e34fba | 584 | * in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion |
garfieldsg | 0:662207e34fba | 585 | * condition is detected, the status bit is set to 1. When a zero-motion-to- |
garfieldsg | 0:662207e34fba | 586 | * motion condition is detected, the status bit is set to 0. |
garfieldsg | 0:662207e34fba | 587 | * |
garfieldsg | 0:662207e34fba | 588 | * For more details on the Zero Motion detection interrupt, see Section 8.4 of |
garfieldsg | 0:662207e34fba | 589 | * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56 |
garfieldsg | 0:662207e34fba | 590 | * and 58 of this document. |
garfieldsg | 0:662207e34fba | 591 | * |
garfieldsg | 0:662207e34fba | 592 | * @return Current zero motion detection acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 593 | * @see MPU6050_RA_ZRMOT_THR |
garfieldsg | 0:662207e34fba | 594 | */ |
garfieldsg | 0:662207e34fba | 595 | uint8_t MPU6050::getZeroMotionDetectionThreshold() |
garfieldsg | 0:662207e34fba | 596 | { |
garfieldsg | 0:662207e34fba | 597 | i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer); |
garfieldsg | 0:662207e34fba | 598 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 599 | } |
garfieldsg | 0:662207e34fba | 600 | /** Set zero motion detection event acceleration threshold. |
garfieldsg | 0:662207e34fba | 601 | * @param threshold New zero motion detection acceleration threshold value (LSB = 2mg) |
garfieldsg | 0:662207e34fba | 602 | * @see getZeroMotionDetectionThreshold() |
garfieldsg | 0:662207e34fba | 603 | * @see MPU6050_RA_ZRMOT_THR |
garfieldsg | 0:662207e34fba | 604 | */ |
garfieldsg | 0:662207e34fba | 605 | void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold) |
garfieldsg | 0:662207e34fba | 606 | { |
garfieldsg | 0:662207e34fba | 607 | i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold); |
garfieldsg | 0:662207e34fba | 608 | } |
garfieldsg | 0:662207e34fba | 609 | |
garfieldsg | 0:662207e34fba | 610 | // ZRMOT_DUR register |
garfieldsg | 0:662207e34fba | 611 | |
garfieldsg | 0:662207e34fba | 612 | /** Get zero motion detection event duration threshold. |
garfieldsg | 0:662207e34fba | 613 | * This register configures the duration counter threshold for Zero Motion |
garfieldsg | 0:662207e34fba | 614 | * interrupt generation. The duration counter ticks at 16 Hz, therefore |
garfieldsg | 0:662207e34fba | 615 | * ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter |
garfieldsg | 0:662207e34fba | 616 | * increments while the absolute value of the accelerometer measurements are |
garfieldsg | 0:662207e34fba | 617 | * each less than the detection threshold (Register 33). The Zero Motion |
garfieldsg | 0:662207e34fba | 618 | * interrupt is triggered when the Zero Motion duration counter reaches the time |
garfieldsg | 0:662207e34fba | 619 | * count specified in this register. |
garfieldsg | 0:662207e34fba | 620 | * |
garfieldsg | 0:662207e34fba | 621 | * For more details on the Zero Motion detection interrupt, see Section 8.4 of |
garfieldsg | 0:662207e34fba | 622 | * the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56 |
garfieldsg | 0:662207e34fba | 623 | * and 58 of this document. |
garfieldsg | 0:662207e34fba | 624 | * |
garfieldsg | 0:662207e34fba | 625 | * @return Current zero motion detection duration threshold value (LSB = 64ms) |
garfieldsg | 0:662207e34fba | 626 | * @see MPU6050_RA_ZRMOT_DUR |
garfieldsg | 0:662207e34fba | 627 | */ |
garfieldsg | 0:662207e34fba | 628 | uint8_t MPU6050::getZeroMotionDetectionDuration() |
garfieldsg | 0:662207e34fba | 629 | { |
garfieldsg | 0:662207e34fba | 630 | i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer); |
garfieldsg | 0:662207e34fba | 631 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 632 | } |
garfieldsg | 0:662207e34fba | 633 | /** Set zero motion detection event duration threshold. |
garfieldsg | 0:662207e34fba | 634 | * @param duration New zero motion detection duration threshold value (LSB = 1ms) |
garfieldsg | 0:662207e34fba | 635 | * @see getZeroMotionDetectionDuration() |
garfieldsg | 0:662207e34fba | 636 | * @see MPU6050_RA_ZRMOT_DUR |
garfieldsg | 0:662207e34fba | 637 | */ |
garfieldsg | 0:662207e34fba | 638 | void MPU6050::setZeroMotionDetectionDuration(uint8_t duration) |
garfieldsg | 0:662207e34fba | 639 | { |
garfieldsg | 0:662207e34fba | 640 | i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration); |
garfieldsg | 0:662207e34fba | 641 | } |
garfieldsg | 0:662207e34fba | 642 | |
garfieldsg | 0:662207e34fba | 643 | // FIFO_EN register |
garfieldsg | 0:662207e34fba | 644 | |
garfieldsg | 0:662207e34fba | 645 | /** Get temperature FIFO enabled value. |
garfieldsg | 0:662207e34fba | 646 | * When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and |
garfieldsg | 0:662207e34fba | 647 | * 66) to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 648 | * @return Current temperature FIFO enabled value |
garfieldsg | 0:662207e34fba | 649 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 650 | */ |
garfieldsg | 0:662207e34fba | 651 | bool MPU6050::getTempFIFOEnabled() |
garfieldsg | 0:662207e34fba | 652 | { |
garfieldsg | 0:662207e34fba | 653 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 654 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 655 | } |
garfieldsg | 0:662207e34fba | 656 | /** Set temperature FIFO enabled value. |
garfieldsg | 0:662207e34fba | 657 | * @param enabled New temperature FIFO enabled value |
garfieldsg | 0:662207e34fba | 658 | * @see getTempFIFOEnabled() |
garfieldsg | 0:662207e34fba | 659 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 660 | */ |
garfieldsg | 0:662207e34fba | 661 | void MPU6050::setTempFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 662 | { |
garfieldsg | 0:662207e34fba | 663 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 664 | } |
garfieldsg | 0:662207e34fba | 665 | /** Get gyroscope X-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 666 | * When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and |
garfieldsg | 0:662207e34fba | 667 | * 68) to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 668 | * @return Current gyroscope X-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 669 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 670 | */ |
garfieldsg | 0:662207e34fba | 671 | bool MPU6050::getXGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 672 | { |
garfieldsg | 0:662207e34fba | 673 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 674 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 675 | } |
garfieldsg | 0:662207e34fba | 676 | /** Set gyroscope X-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 677 | * @param enabled New gyroscope X-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 678 | * @see getXGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 679 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 680 | */ |
garfieldsg | 0:662207e34fba | 681 | void MPU6050::setXGyroFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 682 | { |
garfieldsg | 0:662207e34fba | 683 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 684 | } |
garfieldsg | 0:662207e34fba | 685 | /** Get gyroscope Y-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 686 | * When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and |
garfieldsg | 0:662207e34fba | 687 | * 70) to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 688 | * @return Current gyroscope Y-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 689 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 690 | */ |
garfieldsg | 0:662207e34fba | 691 | bool MPU6050::getYGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 692 | { |
garfieldsg | 0:662207e34fba | 693 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 694 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 695 | } |
garfieldsg | 0:662207e34fba | 696 | /** Set gyroscope Y-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 697 | * @param enabled New gyroscope Y-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 698 | * @see getYGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 699 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 700 | */ |
garfieldsg | 0:662207e34fba | 701 | void MPU6050::setYGyroFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 702 | { |
garfieldsg | 0:662207e34fba | 703 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 704 | } |
garfieldsg | 0:662207e34fba | 705 | /** Get gyroscope Z-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 706 | * When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and |
garfieldsg | 0:662207e34fba | 707 | * 72) to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 708 | * @return Current gyroscope Z-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 709 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 710 | */ |
garfieldsg | 0:662207e34fba | 711 | bool MPU6050::getZGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 712 | { |
garfieldsg | 0:662207e34fba | 713 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 714 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 715 | } |
garfieldsg | 0:662207e34fba | 716 | /** Set gyroscope Z-axis FIFO enabled value. |
garfieldsg | 0:662207e34fba | 717 | * @param enabled New gyroscope Z-axis FIFO enabled value |
garfieldsg | 0:662207e34fba | 718 | * @see getZGyroFIFOEnabled() |
garfieldsg | 0:662207e34fba | 719 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 720 | */ |
garfieldsg | 0:662207e34fba | 721 | void MPU6050::setZGyroFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 722 | { |
garfieldsg | 0:662207e34fba | 723 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 724 | } |
garfieldsg | 0:662207e34fba | 725 | /** Get accelerometer FIFO enabled value. |
garfieldsg | 0:662207e34fba | 726 | * When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, |
garfieldsg | 0:662207e34fba | 727 | * ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be |
garfieldsg | 0:662207e34fba | 728 | * written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 729 | * @return Current accelerometer FIFO enabled value |
garfieldsg | 0:662207e34fba | 730 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 731 | */ |
garfieldsg | 0:662207e34fba | 732 | bool MPU6050::getAccelFIFOEnabled() |
garfieldsg | 0:662207e34fba | 733 | { |
garfieldsg | 0:662207e34fba | 734 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 735 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 736 | } |
garfieldsg | 0:662207e34fba | 737 | /** Set accelerometer FIFO enabled value. |
garfieldsg | 0:662207e34fba | 738 | * @param enabled New accelerometer FIFO enabled value |
garfieldsg | 0:662207e34fba | 739 | * @see getAccelFIFOEnabled() |
garfieldsg | 0:662207e34fba | 740 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 741 | */ |
garfieldsg | 0:662207e34fba | 742 | void MPU6050::setAccelFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 743 | { |
garfieldsg | 0:662207e34fba | 744 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 745 | } |
garfieldsg | 0:662207e34fba | 746 | /** Get Slave 2 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 747 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
garfieldsg | 0:662207e34fba | 748 | * associated with Slave 2 to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 749 | * @return Current Slave 2 FIFO enabled value |
garfieldsg | 0:662207e34fba | 750 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 751 | */ |
garfieldsg | 0:662207e34fba | 752 | bool MPU6050::getSlave2FIFOEnabled() |
garfieldsg | 0:662207e34fba | 753 | { |
garfieldsg | 0:662207e34fba | 754 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 755 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 756 | } |
garfieldsg | 0:662207e34fba | 757 | /** Set Slave 2 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 758 | * @param enabled New Slave 2 FIFO enabled value |
garfieldsg | 0:662207e34fba | 759 | * @see getSlave2FIFOEnabled() |
garfieldsg | 0:662207e34fba | 760 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 761 | */ |
garfieldsg | 0:662207e34fba | 762 | void MPU6050::setSlave2FIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 763 | { |
garfieldsg | 0:662207e34fba | 764 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 765 | } |
garfieldsg | 0:662207e34fba | 766 | /** Get Slave 1 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 767 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
garfieldsg | 0:662207e34fba | 768 | * associated with Slave 1 to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 769 | * @return Current Slave 1 FIFO enabled value |
garfieldsg | 0:662207e34fba | 770 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 771 | */ |
garfieldsg | 0:662207e34fba | 772 | bool MPU6050::getSlave1FIFOEnabled() |
garfieldsg | 0:662207e34fba | 773 | { |
garfieldsg | 0:662207e34fba | 774 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 775 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 776 | } |
garfieldsg | 0:662207e34fba | 777 | /** Set Slave 1 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 778 | * @param enabled New Slave 1 FIFO enabled value |
garfieldsg | 0:662207e34fba | 779 | * @see getSlave1FIFOEnabled() |
garfieldsg | 0:662207e34fba | 780 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 781 | */ |
garfieldsg | 0:662207e34fba | 782 | void MPU6050::setSlave1FIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 783 | { |
garfieldsg | 0:662207e34fba | 784 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 785 | } |
garfieldsg | 0:662207e34fba | 786 | /** Get Slave 0 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 787 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
garfieldsg | 0:662207e34fba | 788 | * associated with Slave 0 to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 789 | * @return Current Slave 0 FIFO enabled value |
garfieldsg | 0:662207e34fba | 790 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 791 | */ |
garfieldsg | 0:662207e34fba | 792 | bool MPU6050::getSlave0FIFOEnabled() |
garfieldsg | 0:662207e34fba | 793 | { |
garfieldsg | 0:662207e34fba | 794 | i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 795 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 796 | } |
garfieldsg | 0:662207e34fba | 797 | /** Set Slave 0 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 798 | * @param enabled New Slave 0 FIFO enabled value |
garfieldsg | 0:662207e34fba | 799 | * @see getSlave0FIFOEnabled() |
garfieldsg | 0:662207e34fba | 800 | * @see MPU6050_RA_FIFO_EN |
garfieldsg | 0:662207e34fba | 801 | */ |
garfieldsg | 0:662207e34fba | 802 | void MPU6050::setSlave0FIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 803 | { |
garfieldsg | 0:662207e34fba | 804 | i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 805 | } |
garfieldsg | 0:662207e34fba | 806 | |
garfieldsg | 0:662207e34fba | 807 | // I2C_MST_CTRL register |
garfieldsg | 0:662207e34fba | 808 | |
garfieldsg | 0:662207e34fba | 809 | /** Get multi-master enabled value. |
garfieldsg | 0:662207e34fba | 810 | * Multi-master capability allows multiple I2C masters to operate on the same |
garfieldsg | 0:662207e34fba | 811 | * bus. In circuits where multi-master capability is required, set MULT_MST_EN |
garfieldsg | 0:662207e34fba | 812 | * to 1. This will increase current drawn by approximately 30uA. |
garfieldsg | 0:662207e34fba | 813 | * |
garfieldsg | 0:662207e34fba | 814 | * In circuits where multi-master capability is required, the state of the I2C |
garfieldsg | 0:662207e34fba | 815 | * bus must always be monitored by each separate I2C Master. Before an I2C |
garfieldsg | 0:662207e34fba | 816 | * Master can assume arbitration of the bus, it must first confirm that no other |
garfieldsg | 0:662207e34fba | 817 | * I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the |
garfieldsg | 0:662207e34fba | 818 | * MPU-60X0's bus arbitration detection logic is turned on, enabling it to |
garfieldsg | 0:662207e34fba | 819 | * detect when the bus is available. |
garfieldsg | 0:662207e34fba | 820 | * |
garfieldsg | 0:662207e34fba | 821 | * @return Current multi-master enabled value |
garfieldsg | 0:662207e34fba | 822 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 823 | */ |
garfieldsg | 0:662207e34fba | 824 | bool MPU6050::getMultiMasterEnabled() |
garfieldsg | 0:662207e34fba | 825 | { |
garfieldsg | 0:662207e34fba | 826 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 827 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 828 | } |
garfieldsg | 0:662207e34fba | 829 | /** Set multi-master enabled value. |
garfieldsg | 0:662207e34fba | 830 | * @param enabled New multi-master enabled value |
garfieldsg | 0:662207e34fba | 831 | * @see getMultiMasterEnabled() |
garfieldsg | 0:662207e34fba | 832 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 833 | */ |
garfieldsg | 0:662207e34fba | 834 | void MPU6050::setMultiMasterEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 835 | { |
garfieldsg | 0:662207e34fba | 836 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 837 | } |
garfieldsg | 0:662207e34fba | 838 | /** Get wait-for-external-sensor-data enabled value. |
garfieldsg | 0:662207e34fba | 839 | * When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be |
garfieldsg | 0:662207e34fba | 840 | * delayed until External Sensor data from the Slave Devices are loaded into the |
garfieldsg | 0:662207e34fba | 841 | * EXT_SENS_DATA registers. This is used to ensure that both the internal sensor |
garfieldsg | 0:662207e34fba | 842 | * data (i.e. from gyro and accel) and external sensor data have been loaded to |
garfieldsg | 0:662207e34fba | 843 | * their respective data registers (i.e. the data is synced) when the Data Ready |
garfieldsg | 0:662207e34fba | 844 | * interrupt is triggered. |
garfieldsg | 0:662207e34fba | 845 | * |
garfieldsg | 0:662207e34fba | 846 | * @return Current wait-for-external-sensor-data enabled value |
garfieldsg | 0:662207e34fba | 847 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 848 | */ |
garfieldsg | 0:662207e34fba | 849 | bool MPU6050::getWaitForExternalSensorEnabled() |
garfieldsg | 0:662207e34fba | 850 | { |
garfieldsg | 0:662207e34fba | 851 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer); |
garfieldsg | 0:662207e34fba | 852 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 853 | } |
garfieldsg | 0:662207e34fba | 854 | /** Set wait-for-external-sensor-data enabled value. |
garfieldsg | 0:662207e34fba | 855 | * @param enabled New wait-for-external-sensor-data enabled value |
garfieldsg | 0:662207e34fba | 856 | * @see getWaitForExternalSensorEnabled() |
garfieldsg | 0:662207e34fba | 857 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 858 | */ |
garfieldsg | 0:662207e34fba | 859 | void MPU6050::setWaitForExternalSensorEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 860 | { |
garfieldsg | 0:662207e34fba | 861 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled); |
garfieldsg | 0:662207e34fba | 862 | } |
garfieldsg | 0:662207e34fba | 863 | /** Get Slave 3 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 864 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
garfieldsg | 0:662207e34fba | 865 | * associated with Slave 3 to be written into the FIFO buffer. |
garfieldsg | 0:662207e34fba | 866 | * @return Current Slave 3 FIFO enabled value |
garfieldsg | 0:662207e34fba | 867 | * @see MPU6050_RA_MST_CTRL |
garfieldsg | 0:662207e34fba | 868 | */ |
garfieldsg | 0:662207e34fba | 869 | bool MPU6050::getSlave3FIFOEnabled() |
garfieldsg | 0:662207e34fba | 870 | { |
garfieldsg | 0:662207e34fba | 871 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 872 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 873 | } |
garfieldsg | 0:662207e34fba | 874 | /** Set Slave 3 FIFO enabled value. |
garfieldsg | 0:662207e34fba | 875 | * @param enabled New Slave 3 FIFO enabled value |
garfieldsg | 0:662207e34fba | 876 | * @see getSlave3FIFOEnabled() |
garfieldsg | 0:662207e34fba | 877 | * @see MPU6050_RA_MST_CTRL |
garfieldsg | 0:662207e34fba | 878 | */ |
garfieldsg | 0:662207e34fba | 879 | void MPU6050::setSlave3FIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 880 | { |
garfieldsg | 0:662207e34fba | 881 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 882 | } |
garfieldsg | 0:662207e34fba | 883 | /** Get slave read/write transition enabled value. |
garfieldsg | 0:662207e34fba | 884 | * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave |
garfieldsg | 0:662207e34fba | 885 | * read to the next slave read. If the bit equals 0, there will be a restart |
garfieldsg | 0:662207e34fba | 886 | * between reads. If the bit equals 1, there will be a stop followed by a start |
garfieldsg | 0:662207e34fba | 887 | * of the following read. When a write transaction follows a read transaction, |
garfieldsg | 0:662207e34fba | 888 | * the stop followed by a start of the successive write will be always used. |
garfieldsg | 0:662207e34fba | 889 | * |
garfieldsg | 0:662207e34fba | 890 | * @return Current slave read/write transition enabled value |
garfieldsg | 0:662207e34fba | 891 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 892 | */ |
garfieldsg | 0:662207e34fba | 893 | bool MPU6050::getSlaveReadWriteTransitionEnabled() |
garfieldsg | 0:662207e34fba | 894 | { |
garfieldsg | 0:662207e34fba | 895 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer); |
garfieldsg | 0:662207e34fba | 896 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 897 | } |
garfieldsg | 0:662207e34fba | 898 | /** Set slave read/write transition enabled value. |
garfieldsg | 0:662207e34fba | 899 | * @param enabled New slave read/write transition enabled value |
garfieldsg | 0:662207e34fba | 900 | * @see getSlaveReadWriteTransitionEnabled() |
garfieldsg | 0:662207e34fba | 901 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 902 | */ |
garfieldsg | 0:662207e34fba | 903 | void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 904 | { |
garfieldsg | 0:662207e34fba | 905 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled); |
garfieldsg | 0:662207e34fba | 906 | } |
garfieldsg | 0:662207e34fba | 907 | /** Get I2C master clock speed. |
garfieldsg | 0:662207e34fba | 908 | * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the |
garfieldsg | 0:662207e34fba | 909 | * MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to |
garfieldsg | 0:662207e34fba | 910 | * the following table: |
garfieldsg | 0:662207e34fba | 911 | * |
garfieldsg | 0:662207e34fba | 912 | * <pre> |
garfieldsg | 0:662207e34fba | 913 | * I2C_MST_CLK | I2C Master Clock Speed | 8MHz Clock Divider |
garfieldsg | 0:662207e34fba | 914 | * ------------+------------------------+------------------- |
garfieldsg | 0:662207e34fba | 915 | * 0 | 348kHz | 23 |
garfieldsg | 0:662207e34fba | 916 | * 1 | 333kHz | 24 |
garfieldsg | 0:662207e34fba | 917 | * 2 | 320kHz | 25 |
garfieldsg | 0:662207e34fba | 918 | * 3 | 308kHz | 26 |
garfieldsg | 0:662207e34fba | 919 | * 4 | 296kHz | 27 |
garfieldsg | 0:662207e34fba | 920 | * 5 | 286kHz | 28 |
garfieldsg | 0:662207e34fba | 921 | * 6 | 276kHz | 29 |
garfieldsg | 0:662207e34fba | 922 | * 7 | 267kHz | 30 |
garfieldsg | 0:662207e34fba | 923 | * 8 | 258kHz | 31 |
garfieldsg | 0:662207e34fba | 924 | * 9 | 500kHz | 16 |
garfieldsg | 0:662207e34fba | 925 | * 10 | 471kHz | 17 |
garfieldsg | 0:662207e34fba | 926 | * 11 | 444kHz | 18 |
garfieldsg | 0:662207e34fba | 927 | * 12 | 421kHz | 19 |
garfieldsg | 0:662207e34fba | 928 | * 13 | 400kHz | 20 |
garfieldsg | 0:662207e34fba | 929 | * 14 | 381kHz | 21 |
garfieldsg | 0:662207e34fba | 930 | * 15 | 364kHz | 22 |
garfieldsg | 0:662207e34fba | 931 | * </pre> |
garfieldsg | 0:662207e34fba | 932 | * |
garfieldsg | 0:662207e34fba | 933 | * @return Current I2C master clock speed |
garfieldsg | 0:662207e34fba | 934 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 935 | */ |
garfieldsg | 0:662207e34fba | 936 | uint8_t MPU6050::getMasterClockSpeed() |
garfieldsg | 0:662207e34fba | 937 | { |
garfieldsg | 0:662207e34fba | 938 | i2Cdev.readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 939 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 940 | } |
garfieldsg | 0:662207e34fba | 941 | /** Set I2C master clock speed. |
garfieldsg | 0:662207e34fba | 942 | * @reparam speed Current I2C master clock speed |
garfieldsg | 0:662207e34fba | 943 | * @see MPU6050_RA_I2C_MST_CTRL |
garfieldsg | 0:662207e34fba | 944 | */ |
garfieldsg | 0:662207e34fba | 945 | void MPU6050::setMasterClockSpeed(uint8_t speed) |
garfieldsg | 0:662207e34fba | 946 | { |
garfieldsg | 0:662207e34fba | 947 | i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed); |
garfieldsg | 0:662207e34fba | 948 | } |
garfieldsg | 0:662207e34fba | 949 | |
garfieldsg | 0:662207e34fba | 950 | // I2C_SLV* registers (Slave 0-3) |
garfieldsg | 0:662207e34fba | 951 | |
garfieldsg | 0:662207e34fba | 952 | /** Get the I2C address of the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 953 | * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read |
garfieldsg | 0:662207e34fba | 954 | * operation, and if it is cleared, then it's a write operation. The remaining |
garfieldsg | 0:662207e34fba | 955 | * bits (6-0) are the 7-bit device address of the slave device. |
garfieldsg | 0:662207e34fba | 956 | * |
garfieldsg | 0:662207e34fba | 957 | * In read mode, the result of the read is placed in the lowest available |
garfieldsg | 0:662207e34fba | 958 | * EXT_SENS_DATA register. For further information regarding the allocation of |
garfieldsg | 0:662207e34fba | 959 | * read results, please refer to the EXT_SENS_DATA register description |
garfieldsg | 0:662207e34fba | 960 | * (Registers 73 - 96). |
garfieldsg | 0:662207e34fba | 961 | * |
garfieldsg | 0:662207e34fba | 962 | * The MPU-6050 supports a total of five slaves, but Slave 4 has unique |
garfieldsg | 0:662207e34fba | 963 | * characteristics, and so it has its own functions (getSlave4* and setSlave4*). |
garfieldsg | 0:662207e34fba | 964 | * |
garfieldsg | 0:662207e34fba | 965 | * I2C data transactions are performed at the Sample Rate, as defined in |
garfieldsg | 0:662207e34fba | 966 | * Register 25. The user is responsible for ensuring that I2C data transactions |
garfieldsg | 0:662207e34fba | 967 | * to and from each enabled Slave can be completed within a single period of the |
garfieldsg | 0:662207e34fba | 968 | * Sample Rate. |
garfieldsg | 0:662207e34fba | 969 | * |
garfieldsg | 0:662207e34fba | 970 | * The I2C slave access rate can be reduced relative to the Sample Rate. This |
garfieldsg | 0:662207e34fba | 971 | * reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a |
garfieldsg | 0:662207e34fba | 972 | * slave's access rate is reduced relative to the Sample Rate is determined by |
garfieldsg | 0:662207e34fba | 973 | * I2C_MST_DELAY_CTRL (Register 103). |
garfieldsg | 0:662207e34fba | 974 | * |
garfieldsg | 0:662207e34fba | 975 | * The processing order for the slaves is fixed. The sequence followed for |
garfieldsg | 0:662207e34fba | 976 | * processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a |
garfieldsg | 0:662207e34fba | 977 | * particular Slave is disabled it will be skipped. |
garfieldsg | 0:662207e34fba | 978 | * |
garfieldsg | 0:662207e34fba | 979 | * Each slave can either be accessed at the sample rate or at a reduced sample |
garfieldsg | 0:662207e34fba | 980 | * rate. In a case where some slaves are accessed at the Sample Rate and some |
garfieldsg | 0:662207e34fba | 981 | * slaves are accessed at the reduced rate, the sequence of accessing the slaves |
garfieldsg | 0:662207e34fba | 982 | * (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will |
garfieldsg | 0:662207e34fba | 983 | * be skipped if their access rate dictates that they should not be accessed |
garfieldsg | 0:662207e34fba | 984 | * during that particular cycle. For further information regarding the reduced |
garfieldsg | 0:662207e34fba | 985 | * access rate, please refer to Register 52. Whether a slave is accessed at the |
garfieldsg | 0:662207e34fba | 986 | * Sample Rate or at the reduced rate is determined by the Delay Enable bits in |
garfieldsg | 0:662207e34fba | 987 | * Register 103. |
garfieldsg | 0:662207e34fba | 988 | * |
garfieldsg | 0:662207e34fba | 989 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 990 | * @return Current address for specified slave |
garfieldsg | 0:662207e34fba | 991 | * @see MPU6050_RA_I2C_SLV0_ADDR |
garfieldsg | 0:662207e34fba | 992 | */ |
garfieldsg | 0:662207e34fba | 993 | uint8_t MPU6050::getSlaveAddress(uint8_t num) |
garfieldsg | 0:662207e34fba | 994 | { |
garfieldsg | 0:662207e34fba | 995 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 996 | i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer); |
garfieldsg | 0:662207e34fba | 997 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 998 | } |
garfieldsg | 0:662207e34fba | 999 | /** Set the I2C address of the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1000 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1001 | * @param address New address for specified slave |
garfieldsg | 0:662207e34fba | 1002 | * @see getSlaveAddress() |
garfieldsg | 0:662207e34fba | 1003 | * @see MPU6050_RA_I2C_SLV0_ADDR |
garfieldsg | 0:662207e34fba | 1004 | */ |
garfieldsg | 0:662207e34fba | 1005 | void MPU6050::setSlaveAddress(uint8_t num, uint8_t address) |
garfieldsg | 0:662207e34fba | 1006 | { |
garfieldsg | 0:662207e34fba | 1007 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1008 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address); |
garfieldsg | 0:662207e34fba | 1009 | } |
garfieldsg | 0:662207e34fba | 1010 | /** Get the active internal register for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1011 | * Read/write operations for this slave will be done to whatever internal |
garfieldsg | 0:662207e34fba | 1012 | * register address is stored in this MPU register. |
garfieldsg | 0:662207e34fba | 1013 | * |
garfieldsg | 0:662207e34fba | 1014 | * The MPU-6050 supports a total of five slaves, but Slave 4 has unique |
garfieldsg | 0:662207e34fba | 1015 | * characteristics, and so it has its own functions. |
garfieldsg | 0:662207e34fba | 1016 | * |
garfieldsg | 0:662207e34fba | 1017 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1018 | * @return Current active register for specified slave |
garfieldsg | 0:662207e34fba | 1019 | * @see MPU6050_RA_I2C_SLV0_REG |
garfieldsg | 0:662207e34fba | 1020 | */ |
garfieldsg | 0:662207e34fba | 1021 | uint8_t MPU6050::getSlaveRegister(uint8_t num) |
garfieldsg | 0:662207e34fba | 1022 | { |
garfieldsg | 0:662207e34fba | 1023 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1024 | i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer); |
garfieldsg | 0:662207e34fba | 1025 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1026 | } |
garfieldsg | 0:662207e34fba | 1027 | /** Set the active internal register for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1028 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1029 | * @param reg New active register for specified slave |
garfieldsg | 0:662207e34fba | 1030 | * @see getSlaveRegister() |
garfieldsg | 0:662207e34fba | 1031 | * @see MPU6050_RA_I2C_SLV0_REG |
garfieldsg | 0:662207e34fba | 1032 | */ |
garfieldsg | 0:662207e34fba | 1033 | void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg) |
garfieldsg | 0:662207e34fba | 1034 | { |
garfieldsg | 0:662207e34fba | 1035 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1036 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg); |
garfieldsg | 0:662207e34fba | 1037 | } |
garfieldsg | 0:662207e34fba | 1038 | /** Get the enabled value for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1039 | * When set to 1, this bit enables Slave 0 for data transfer operations. When |
garfieldsg | 0:662207e34fba | 1040 | * cleared to 0, this bit disables Slave 0 from data transfer operations. |
garfieldsg | 0:662207e34fba | 1041 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1042 | * @return Current enabled value for specified slave |
garfieldsg | 0:662207e34fba | 1043 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1044 | */ |
garfieldsg | 0:662207e34fba | 1045 | bool MPU6050::getSlaveEnabled(uint8_t num) |
garfieldsg | 0:662207e34fba | 1046 | { |
garfieldsg | 0:662207e34fba | 1047 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1048 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1049 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1050 | } |
garfieldsg | 0:662207e34fba | 1051 | /** Set the enabled value for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1052 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1053 | * @param enabled New enabled value for specified slave |
garfieldsg | 0:662207e34fba | 1054 | * @see getSlaveEnabled() |
garfieldsg | 0:662207e34fba | 1055 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1056 | */ |
garfieldsg | 0:662207e34fba | 1057 | void MPU6050::setSlaveEnabled(uint8_t num, bool enabled) |
garfieldsg | 0:662207e34fba | 1058 | { |
garfieldsg | 0:662207e34fba | 1059 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1060 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1061 | } |
garfieldsg | 0:662207e34fba | 1062 | /** Get word pair byte-swapping enabled for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1063 | * When set to 1, this bit enables byte swapping. When byte swapping is enabled, |
garfieldsg | 0:662207e34fba | 1064 | * the high and low bytes of a word pair are swapped. Please refer to |
garfieldsg | 0:662207e34fba | 1065 | * I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0, |
garfieldsg | 0:662207e34fba | 1066 | * bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA |
garfieldsg | 0:662207e34fba | 1067 | * registers in the order they were transferred. |
garfieldsg | 0:662207e34fba | 1068 | * |
garfieldsg | 0:662207e34fba | 1069 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1070 | * @return Current word pair byte-swapping enabled value for specified slave |
garfieldsg | 0:662207e34fba | 1071 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1072 | */ |
garfieldsg | 0:662207e34fba | 1073 | bool MPU6050::getSlaveWordByteSwap(uint8_t num) |
garfieldsg | 0:662207e34fba | 1074 | { |
garfieldsg | 0:662207e34fba | 1075 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1076 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1077 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1078 | } |
garfieldsg | 0:662207e34fba | 1079 | /** Set word pair byte-swapping enabled for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1080 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1081 | * @param enabled New word pair byte-swapping enabled value for specified slave |
garfieldsg | 0:662207e34fba | 1082 | * @see getSlaveWordByteSwap() |
garfieldsg | 0:662207e34fba | 1083 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1084 | */ |
garfieldsg | 0:662207e34fba | 1085 | void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled) |
garfieldsg | 0:662207e34fba | 1086 | { |
garfieldsg | 0:662207e34fba | 1087 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1088 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1089 | } |
garfieldsg | 0:662207e34fba | 1090 | /** Get write mode for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1091 | * When set to 1, the transaction will read or write data only. When cleared to |
garfieldsg | 0:662207e34fba | 1092 | * 0, the transaction will write a register address prior to reading or writing |
garfieldsg | 0:662207e34fba | 1093 | * data. This should equal 0 when specifying the register address within the |
garfieldsg | 0:662207e34fba | 1094 | * Slave device to/from which the ensuing data transaction will take place. |
garfieldsg | 0:662207e34fba | 1095 | * |
garfieldsg | 0:662207e34fba | 1096 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1097 | * @return Current write mode for specified slave (0 = register address + data, 1 = data only) |
garfieldsg | 0:662207e34fba | 1098 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1099 | */ |
garfieldsg | 0:662207e34fba | 1100 | bool MPU6050::getSlaveWriteMode(uint8_t num) |
garfieldsg | 0:662207e34fba | 1101 | { |
garfieldsg | 0:662207e34fba | 1102 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1103 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1104 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1105 | } |
garfieldsg | 0:662207e34fba | 1106 | /** Set write mode for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1107 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1108 | * @param mode New write mode for specified slave (0 = register address + data, 1 = data only) |
garfieldsg | 0:662207e34fba | 1109 | * @see getSlaveWriteMode() |
garfieldsg | 0:662207e34fba | 1110 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1111 | */ |
garfieldsg | 0:662207e34fba | 1112 | void MPU6050::setSlaveWriteMode(uint8_t num, bool mode) |
garfieldsg | 0:662207e34fba | 1113 | { |
garfieldsg | 0:662207e34fba | 1114 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1115 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode); |
garfieldsg | 0:662207e34fba | 1116 | } |
garfieldsg | 0:662207e34fba | 1117 | /** Get word pair grouping order offset for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1118 | * This sets specifies the grouping order of word pairs received from registers. |
garfieldsg | 0:662207e34fba | 1119 | * When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even, |
garfieldsg | 0:662207e34fba | 1120 | * then odd register addresses) are paired to form a word. When set to 1, bytes |
garfieldsg | 0:662207e34fba | 1121 | * from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even |
garfieldsg | 0:662207e34fba | 1122 | * register addresses) are paired to form a word. |
garfieldsg | 0:662207e34fba | 1123 | * |
garfieldsg | 0:662207e34fba | 1124 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1125 | * @return Current word pair grouping order offset for specified slave |
garfieldsg | 0:662207e34fba | 1126 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1127 | */ |
garfieldsg | 0:662207e34fba | 1128 | bool MPU6050::getSlaveWordGroupOffset(uint8_t num) |
garfieldsg | 0:662207e34fba | 1129 | { |
garfieldsg | 0:662207e34fba | 1130 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1131 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1132 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1133 | } |
garfieldsg | 0:662207e34fba | 1134 | /** Set word pair grouping order offset for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1135 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1136 | * @param enabled New word pair grouping order offset for specified slave |
garfieldsg | 0:662207e34fba | 1137 | * @see getSlaveWordGroupOffset() |
garfieldsg | 0:662207e34fba | 1138 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1139 | */ |
garfieldsg | 0:662207e34fba | 1140 | void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled) |
garfieldsg | 0:662207e34fba | 1141 | { |
garfieldsg | 0:662207e34fba | 1142 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1143 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1144 | } |
garfieldsg | 0:662207e34fba | 1145 | /** Get number of bytes to read for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1146 | * Specifies the number of bytes transferred to and from Slave 0. Clearing this |
garfieldsg | 0:662207e34fba | 1147 | * bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN. |
garfieldsg | 0:662207e34fba | 1148 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1149 | * @return Number of bytes to read for specified slave |
garfieldsg | 0:662207e34fba | 1150 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1151 | */ |
garfieldsg | 0:662207e34fba | 1152 | uint8_t MPU6050::getSlaveDataLength(uint8_t num) |
garfieldsg | 0:662207e34fba | 1153 | { |
garfieldsg | 0:662207e34fba | 1154 | if (num > 3) return 0; |
garfieldsg | 0:662207e34fba | 1155 | i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 1156 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1157 | } |
garfieldsg | 0:662207e34fba | 1158 | /** Set number of bytes to read for the specified slave (0-3). |
garfieldsg | 0:662207e34fba | 1159 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 1160 | * @param length Number of bytes to read for specified slave |
garfieldsg | 0:662207e34fba | 1161 | * @see getSlaveDataLength() |
garfieldsg | 0:662207e34fba | 1162 | * @see MPU6050_RA_I2C_SLV0_CTRL |
garfieldsg | 0:662207e34fba | 1163 | */ |
garfieldsg | 0:662207e34fba | 1164 | void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length) |
garfieldsg | 0:662207e34fba | 1165 | { |
garfieldsg | 0:662207e34fba | 1166 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 1167 | i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length); |
garfieldsg | 0:662207e34fba | 1168 | } |
garfieldsg | 0:662207e34fba | 1169 | |
garfieldsg | 0:662207e34fba | 1170 | // I2C_SLV* registers (Slave 4) |
garfieldsg | 0:662207e34fba | 1171 | |
garfieldsg | 0:662207e34fba | 1172 | /** Get the I2C address of Slave 4. |
garfieldsg | 0:662207e34fba | 1173 | * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read |
garfieldsg | 0:662207e34fba | 1174 | * operation, and if it is cleared, then it's a write operation. The remaining |
garfieldsg | 0:662207e34fba | 1175 | * bits (6-0) are the 7-bit device address of the slave device. |
garfieldsg | 0:662207e34fba | 1176 | * |
garfieldsg | 0:662207e34fba | 1177 | * @return Current address for Slave 4 |
garfieldsg | 0:662207e34fba | 1178 | * @see getSlaveAddress() |
garfieldsg | 0:662207e34fba | 1179 | * @see MPU6050_RA_I2C_SLV4_ADDR |
garfieldsg | 0:662207e34fba | 1180 | */ |
garfieldsg | 0:662207e34fba | 1181 | uint8_t MPU6050::getSlave4Address() |
garfieldsg | 0:662207e34fba | 1182 | { |
garfieldsg | 0:662207e34fba | 1183 | i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer); |
garfieldsg | 0:662207e34fba | 1184 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1185 | } |
garfieldsg | 0:662207e34fba | 1186 | /** Set the I2C address of Slave 4. |
garfieldsg | 0:662207e34fba | 1187 | * @param address New address for Slave 4 |
garfieldsg | 0:662207e34fba | 1188 | * @see getSlave4Address() |
garfieldsg | 0:662207e34fba | 1189 | * @see MPU6050_RA_I2C_SLV4_ADDR |
garfieldsg | 0:662207e34fba | 1190 | */ |
garfieldsg | 0:662207e34fba | 1191 | void MPU6050::setSlave4Address(uint8_t address) |
garfieldsg | 0:662207e34fba | 1192 | { |
garfieldsg | 0:662207e34fba | 1193 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address); |
garfieldsg | 0:662207e34fba | 1194 | } |
garfieldsg | 0:662207e34fba | 1195 | /** Get the active internal register for the Slave 4. |
garfieldsg | 0:662207e34fba | 1196 | * Read/write operations for this slave will be done to whatever internal |
garfieldsg | 0:662207e34fba | 1197 | * register address is stored in this MPU register. |
garfieldsg | 0:662207e34fba | 1198 | * |
garfieldsg | 0:662207e34fba | 1199 | * @return Current active register for Slave 4 |
garfieldsg | 0:662207e34fba | 1200 | * @see MPU6050_RA_I2C_SLV4_REG |
garfieldsg | 0:662207e34fba | 1201 | */ |
garfieldsg | 0:662207e34fba | 1202 | uint8_t MPU6050::getSlave4Register() |
garfieldsg | 0:662207e34fba | 1203 | { |
garfieldsg | 0:662207e34fba | 1204 | i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer); |
garfieldsg | 0:662207e34fba | 1205 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1206 | } |
garfieldsg | 0:662207e34fba | 1207 | /** Set the active internal register for Slave 4. |
garfieldsg | 0:662207e34fba | 1208 | * @param reg New active register for Slave 4 |
garfieldsg | 0:662207e34fba | 1209 | * @see getSlave4Register() |
garfieldsg | 0:662207e34fba | 1210 | * @see MPU6050_RA_I2C_SLV4_REG |
garfieldsg | 0:662207e34fba | 1211 | */ |
garfieldsg | 0:662207e34fba | 1212 | void MPU6050::setSlave4Register(uint8_t reg) |
garfieldsg | 0:662207e34fba | 1213 | { |
garfieldsg | 0:662207e34fba | 1214 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg); |
garfieldsg | 0:662207e34fba | 1215 | } |
garfieldsg | 0:662207e34fba | 1216 | /** Set new byte to write to Slave 4. |
garfieldsg | 0:662207e34fba | 1217 | * This register stores the data to be written into the Slave 4. If I2C_SLV4_RW |
garfieldsg | 0:662207e34fba | 1218 | * is set 1 (set to read), this register has no effect. |
garfieldsg | 0:662207e34fba | 1219 | * @param data New byte to write to Slave 4 |
garfieldsg | 0:662207e34fba | 1220 | * @see MPU6050_RA_I2C_SLV4_DO |
garfieldsg | 0:662207e34fba | 1221 | */ |
garfieldsg | 0:662207e34fba | 1222 | void MPU6050::setSlave4OutputByte(uint8_t data) |
garfieldsg | 0:662207e34fba | 1223 | { |
garfieldsg | 0:662207e34fba | 1224 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data); |
garfieldsg | 0:662207e34fba | 1225 | } |
garfieldsg | 0:662207e34fba | 1226 | /** Get the enabled value for the Slave 4. |
garfieldsg | 0:662207e34fba | 1227 | * When set to 1, this bit enables Slave 4 for data transfer operations. When |
garfieldsg | 0:662207e34fba | 1228 | * cleared to 0, this bit disables Slave 4 from data transfer operations. |
garfieldsg | 0:662207e34fba | 1229 | * @return Current enabled value for Slave 4 |
garfieldsg | 0:662207e34fba | 1230 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1231 | */ |
garfieldsg | 0:662207e34fba | 1232 | bool MPU6050::getSlave4Enabled() |
garfieldsg | 0:662207e34fba | 1233 | { |
garfieldsg | 0:662207e34fba | 1234 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1235 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1236 | } |
garfieldsg | 0:662207e34fba | 1237 | /** Set the enabled value for Slave 4. |
garfieldsg | 0:662207e34fba | 1238 | * @param enabled New enabled value for Slave 4 |
garfieldsg | 0:662207e34fba | 1239 | * @see getSlave4Enabled() |
garfieldsg | 0:662207e34fba | 1240 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1241 | */ |
garfieldsg | 0:662207e34fba | 1242 | void MPU6050::setSlave4Enabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1243 | { |
garfieldsg | 0:662207e34fba | 1244 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1245 | } |
garfieldsg | 0:662207e34fba | 1246 | /** Get the enabled value for Slave 4 transaction interrupts. |
garfieldsg | 0:662207e34fba | 1247 | * When set to 1, this bit enables the generation of an interrupt signal upon |
garfieldsg | 0:662207e34fba | 1248 | * completion of a Slave 4 transaction. When cleared to 0, this bit disables the |
garfieldsg | 0:662207e34fba | 1249 | * generation of an interrupt signal upon completion of a Slave 4 transaction. |
garfieldsg | 0:662207e34fba | 1250 | * The interrupt status can be observed in Register 54. |
garfieldsg | 0:662207e34fba | 1251 | * |
garfieldsg | 0:662207e34fba | 1252 | * @return Current enabled value for Slave 4 transaction interrupts. |
garfieldsg | 0:662207e34fba | 1253 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1254 | */ |
garfieldsg | 0:662207e34fba | 1255 | bool MPU6050::getSlave4InterruptEnabled() |
garfieldsg | 0:662207e34fba | 1256 | { |
garfieldsg | 0:662207e34fba | 1257 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1258 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1259 | } |
garfieldsg | 0:662207e34fba | 1260 | /** Set the enabled value for Slave 4 transaction interrupts. |
garfieldsg | 0:662207e34fba | 1261 | * @param enabled New enabled value for Slave 4 transaction interrupts. |
garfieldsg | 0:662207e34fba | 1262 | * @see getSlave4InterruptEnabled() |
garfieldsg | 0:662207e34fba | 1263 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1264 | */ |
garfieldsg | 0:662207e34fba | 1265 | void MPU6050::setSlave4InterruptEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1266 | { |
garfieldsg | 0:662207e34fba | 1267 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1268 | } |
garfieldsg | 0:662207e34fba | 1269 | /** Get write mode for Slave 4. |
garfieldsg | 0:662207e34fba | 1270 | * When set to 1, the transaction will read or write data only. When cleared to |
garfieldsg | 0:662207e34fba | 1271 | * 0, the transaction will write a register address prior to reading or writing |
garfieldsg | 0:662207e34fba | 1272 | * data. This should equal 0 when specifying the register address within the |
garfieldsg | 0:662207e34fba | 1273 | * Slave device to/from which the ensuing data transaction will take place. |
garfieldsg | 0:662207e34fba | 1274 | * |
garfieldsg | 0:662207e34fba | 1275 | * @return Current write mode for Slave 4 (0 = register address + data, 1 = data only) |
garfieldsg | 0:662207e34fba | 1276 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1277 | */ |
garfieldsg | 0:662207e34fba | 1278 | bool MPU6050::getSlave4WriteMode() |
garfieldsg | 0:662207e34fba | 1279 | { |
garfieldsg | 0:662207e34fba | 1280 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1281 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1282 | } |
garfieldsg | 0:662207e34fba | 1283 | /** Set write mode for the Slave 4. |
garfieldsg | 0:662207e34fba | 1284 | * @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only) |
garfieldsg | 0:662207e34fba | 1285 | * @see getSlave4WriteMode() |
garfieldsg | 0:662207e34fba | 1286 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1287 | */ |
garfieldsg | 0:662207e34fba | 1288 | void MPU6050::setSlave4WriteMode(bool mode) |
garfieldsg | 0:662207e34fba | 1289 | { |
garfieldsg | 0:662207e34fba | 1290 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode); |
garfieldsg | 0:662207e34fba | 1291 | } |
garfieldsg | 0:662207e34fba | 1292 | /** Get Slave 4 master delay value. |
garfieldsg | 0:662207e34fba | 1293 | * This configures the reduced access rate of I2C slaves relative to the Sample |
garfieldsg | 0:662207e34fba | 1294 | * Rate. When a slave's access rate is decreased relative to the Sample Rate, |
garfieldsg | 0:662207e34fba | 1295 | * the slave is accessed every: |
garfieldsg | 0:662207e34fba | 1296 | * |
garfieldsg | 0:662207e34fba | 1297 | * 1 / (1 + I2C_MST_DLY) samples |
garfieldsg | 0:662207e34fba | 1298 | * |
garfieldsg | 0:662207e34fba | 1299 | * This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and |
garfieldsg | 0:662207e34fba | 1300 | * DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to |
garfieldsg | 0:662207e34fba | 1301 | * the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For |
garfieldsg | 0:662207e34fba | 1302 | * further information regarding the Sample Rate, please refer to register 25. |
garfieldsg | 0:662207e34fba | 1303 | * |
garfieldsg | 0:662207e34fba | 1304 | * @return Current Slave 4 master delay value |
garfieldsg | 0:662207e34fba | 1305 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1306 | */ |
garfieldsg | 0:662207e34fba | 1307 | uint8_t MPU6050::getSlave4MasterDelay() |
garfieldsg | 0:662207e34fba | 1308 | { |
garfieldsg | 0:662207e34fba | 1309 | i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 1310 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1311 | } |
garfieldsg | 0:662207e34fba | 1312 | /** Set Slave 4 master delay value. |
garfieldsg | 0:662207e34fba | 1313 | * @param delay New Slave 4 master delay value |
garfieldsg | 0:662207e34fba | 1314 | * @see getSlave4MasterDelay() |
garfieldsg | 0:662207e34fba | 1315 | * @see MPU6050_RA_I2C_SLV4_CTRL |
garfieldsg | 0:662207e34fba | 1316 | */ |
garfieldsg | 0:662207e34fba | 1317 | void MPU6050::setSlave4MasterDelay(uint8_t delay) |
garfieldsg | 0:662207e34fba | 1318 | { |
garfieldsg | 0:662207e34fba | 1319 | i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay); |
garfieldsg | 0:662207e34fba | 1320 | } |
garfieldsg | 0:662207e34fba | 1321 | /** Get last available byte read from Slave 4. |
garfieldsg | 0:662207e34fba | 1322 | * This register stores the data read from Slave 4. This field is populated |
garfieldsg | 0:662207e34fba | 1323 | * after a read transaction. |
garfieldsg | 0:662207e34fba | 1324 | * @return Last available byte read from to Slave 4 |
garfieldsg | 0:662207e34fba | 1325 | * @see MPU6050_RA_I2C_SLV4_DI |
garfieldsg | 0:662207e34fba | 1326 | */ |
garfieldsg | 0:662207e34fba | 1327 | uint8_t MPU6050::getSlate4InputByte() |
garfieldsg | 0:662207e34fba | 1328 | { |
garfieldsg | 0:662207e34fba | 1329 | i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer); |
garfieldsg | 0:662207e34fba | 1330 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1331 | } |
garfieldsg | 0:662207e34fba | 1332 | |
garfieldsg | 0:662207e34fba | 1333 | // I2C_MST_STATUS register |
garfieldsg | 0:662207e34fba | 1334 | |
garfieldsg | 0:662207e34fba | 1335 | /** Get FSYNC interrupt status. |
garfieldsg | 0:662207e34fba | 1336 | * This bit reflects the status of the FSYNC interrupt from an external device |
garfieldsg | 0:662207e34fba | 1337 | * into the MPU-60X0. This is used as a way to pass an external interrupt |
garfieldsg | 0:662207e34fba | 1338 | * through the MPU-60X0 to the host application processor. When set to 1, this |
garfieldsg | 0:662207e34fba | 1339 | * bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1340 | * (Register 55). |
garfieldsg | 0:662207e34fba | 1341 | * @return FSYNC interrupt status |
garfieldsg | 0:662207e34fba | 1342 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1343 | */ |
garfieldsg | 0:662207e34fba | 1344 | bool MPU6050::getPassthroughStatus() |
garfieldsg | 0:662207e34fba | 1345 | { |
garfieldsg | 0:662207e34fba | 1346 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1347 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1348 | } |
garfieldsg | 0:662207e34fba | 1349 | /** Get Slave 4 transaction done status. |
garfieldsg | 0:662207e34fba | 1350 | * Automatically sets to 1 when a Slave 4 transaction has completed. This |
garfieldsg | 0:662207e34fba | 1351 | * triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register |
garfieldsg | 0:662207e34fba | 1352 | * (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the |
garfieldsg | 0:662207e34fba | 1353 | * I2C_SLV4_CTRL register (Register 52). |
garfieldsg | 0:662207e34fba | 1354 | * @return Slave 4 transaction done status |
garfieldsg | 0:662207e34fba | 1355 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1356 | */ |
garfieldsg | 0:662207e34fba | 1357 | bool MPU6050::getSlave4IsDone() |
garfieldsg | 0:662207e34fba | 1358 | { |
garfieldsg | 0:662207e34fba | 1359 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1360 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1361 | } |
garfieldsg | 0:662207e34fba | 1362 | /** Get master arbitration lost status. |
garfieldsg | 0:662207e34fba | 1363 | * This bit automatically sets to 1 when the I2C Master has lost arbitration of |
garfieldsg | 0:662207e34fba | 1364 | * the auxiliary I2C bus (an error condition). This triggers an interrupt if the |
garfieldsg | 0:662207e34fba | 1365 | * I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1366 | * @return Master arbitration lost status |
garfieldsg | 0:662207e34fba | 1367 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1368 | */ |
garfieldsg | 0:662207e34fba | 1369 | bool MPU6050::getLostArbitration() |
garfieldsg | 0:662207e34fba | 1370 | { |
garfieldsg | 0:662207e34fba | 1371 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1372 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1373 | } |
garfieldsg | 0:662207e34fba | 1374 | /** Get Slave 4 NACK status. |
garfieldsg | 0:662207e34fba | 1375 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
garfieldsg | 0:662207e34fba | 1376 | * transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN |
garfieldsg | 0:662207e34fba | 1377 | * bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1378 | * @return Slave 4 NACK interrupt status |
garfieldsg | 0:662207e34fba | 1379 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1380 | */ |
garfieldsg | 0:662207e34fba | 1381 | bool MPU6050::getSlave4Nack() |
garfieldsg | 0:662207e34fba | 1382 | { |
garfieldsg | 0:662207e34fba | 1383 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1384 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1385 | } |
garfieldsg | 0:662207e34fba | 1386 | /** Get Slave 3 NACK status. |
garfieldsg | 0:662207e34fba | 1387 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
garfieldsg | 0:662207e34fba | 1388 | * transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN |
garfieldsg | 0:662207e34fba | 1389 | * bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1390 | * @return Slave 3 NACK interrupt status |
garfieldsg | 0:662207e34fba | 1391 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1392 | */ |
garfieldsg | 0:662207e34fba | 1393 | bool MPU6050::getSlave3Nack() |
garfieldsg | 0:662207e34fba | 1394 | { |
garfieldsg | 0:662207e34fba | 1395 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1396 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1397 | } |
garfieldsg | 0:662207e34fba | 1398 | /** Get Slave 2 NACK status. |
garfieldsg | 0:662207e34fba | 1399 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
garfieldsg | 0:662207e34fba | 1400 | * transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN |
garfieldsg | 0:662207e34fba | 1401 | * bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1402 | * @return Slave 2 NACK interrupt status |
garfieldsg | 0:662207e34fba | 1403 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1404 | */ |
garfieldsg | 0:662207e34fba | 1405 | bool MPU6050::getSlave2Nack() |
garfieldsg | 0:662207e34fba | 1406 | { |
garfieldsg | 0:662207e34fba | 1407 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1408 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1409 | } |
garfieldsg | 0:662207e34fba | 1410 | /** Get Slave 1 NACK status. |
garfieldsg | 0:662207e34fba | 1411 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
garfieldsg | 0:662207e34fba | 1412 | * transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN |
garfieldsg | 0:662207e34fba | 1413 | * bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1414 | * @return Slave 1 NACK interrupt status |
garfieldsg | 0:662207e34fba | 1415 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1416 | */ |
garfieldsg | 0:662207e34fba | 1417 | bool MPU6050::getSlave1Nack() |
garfieldsg | 0:662207e34fba | 1418 | { |
garfieldsg | 0:662207e34fba | 1419 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1420 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1421 | } |
garfieldsg | 0:662207e34fba | 1422 | /** Get Slave 0 NACK status. |
garfieldsg | 0:662207e34fba | 1423 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
garfieldsg | 0:662207e34fba | 1424 | * transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN |
garfieldsg | 0:662207e34fba | 1425 | * bit in the INT_ENABLE register (Register 56) is asserted. |
garfieldsg | 0:662207e34fba | 1426 | * @return Slave 0 NACK interrupt status |
garfieldsg | 0:662207e34fba | 1427 | * @see MPU6050_RA_I2C_MST_STATUS |
garfieldsg | 0:662207e34fba | 1428 | */ |
garfieldsg | 0:662207e34fba | 1429 | bool MPU6050::getSlave0Nack() |
garfieldsg | 0:662207e34fba | 1430 | { |
garfieldsg | 0:662207e34fba | 1431 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1432 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1433 | } |
garfieldsg | 0:662207e34fba | 1434 | |
garfieldsg | 0:662207e34fba | 1435 | // INT_PIN_CFG register |
garfieldsg | 0:662207e34fba | 1436 | |
garfieldsg | 0:662207e34fba | 1437 | /** Get interrupt logic level mode. |
garfieldsg | 0:662207e34fba | 1438 | * Will be set 0 for active-high, 1 for active-low. |
garfieldsg | 0:662207e34fba | 1439 | * @return Current interrupt mode (0=active-high, 1=active-low) |
garfieldsg | 0:662207e34fba | 1440 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1441 | * @see MPU6050_INTCFG_INT_LEVEL_BIT |
garfieldsg | 0:662207e34fba | 1442 | */ |
garfieldsg | 0:662207e34fba | 1443 | bool MPU6050::getInterruptMode() |
garfieldsg | 0:662207e34fba | 1444 | { |
garfieldsg | 0:662207e34fba | 1445 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1446 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1447 | } |
garfieldsg | 0:662207e34fba | 1448 | /** Set interrupt logic level mode. |
garfieldsg | 0:662207e34fba | 1449 | * @param mode New interrupt mode (0=active-high, 1=active-low) |
garfieldsg | 0:662207e34fba | 1450 | * @see getInterruptMode() |
garfieldsg | 0:662207e34fba | 1451 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1452 | * @see MPU6050_INTCFG_INT_LEVEL_BIT |
garfieldsg | 0:662207e34fba | 1453 | */ |
garfieldsg | 0:662207e34fba | 1454 | void MPU6050::setInterruptMode(bool mode) |
garfieldsg | 0:662207e34fba | 1455 | { |
garfieldsg | 0:662207e34fba | 1456 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode); |
garfieldsg | 0:662207e34fba | 1457 | } |
garfieldsg | 0:662207e34fba | 1458 | /** Get interrupt drive mode. |
garfieldsg | 0:662207e34fba | 1459 | * Will be set 0 for push-pull, 1 for open-drain. |
garfieldsg | 0:662207e34fba | 1460 | * @return Current interrupt drive mode (0=push-pull, 1=open-drain) |
garfieldsg | 0:662207e34fba | 1461 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1462 | * @see MPU6050_INTCFG_INT_OPEN_BIT |
garfieldsg | 0:662207e34fba | 1463 | */ |
garfieldsg | 0:662207e34fba | 1464 | bool MPU6050::getInterruptDrive() |
garfieldsg | 0:662207e34fba | 1465 | { |
garfieldsg | 0:662207e34fba | 1466 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1467 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1468 | } |
garfieldsg | 0:662207e34fba | 1469 | /** Set interrupt drive mode. |
garfieldsg | 0:662207e34fba | 1470 | * @param drive New interrupt drive mode (0=push-pull, 1=open-drain) |
garfieldsg | 0:662207e34fba | 1471 | * @see getInterruptDrive() |
garfieldsg | 0:662207e34fba | 1472 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1473 | * @see MPU6050_INTCFG_INT_OPEN_BIT |
garfieldsg | 0:662207e34fba | 1474 | */ |
garfieldsg | 0:662207e34fba | 1475 | void MPU6050::setInterruptDrive(bool drive) |
garfieldsg | 0:662207e34fba | 1476 | { |
garfieldsg | 0:662207e34fba | 1477 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive); |
garfieldsg | 0:662207e34fba | 1478 | } |
garfieldsg | 0:662207e34fba | 1479 | /** Get interrupt latch mode. |
garfieldsg | 0:662207e34fba | 1480 | * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared. |
garfieldsg | 0:662207e34fba | 1481 | * @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared) |
garfieldsg | 0:662207e34fba | 1482 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1483 | * @see MPU6050_INTCFG_LATCH_INT_EN_BIT |
garfieldsg | 0:662207e34fba | 1484 | */ |
garfieldsg | 0:662207e34fba | 1485 | bool MPU6050::getInterruptLatch() |
garfieldsg | 0:662207e34fba | 1486 | { |
garfieldsg | 0:662207e34fba | 1487 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1488 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1489 | } |
garfieldsg | 0:662207e34fba | 1490 | /** Set interrupt latch mode. |
garfieldsg | 0:662207e34fba | 1491 | * @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared) |
garfieldsg | 0:662207e34fba | 1492 | * @see getInterruptLatch() |
garfieldsg | 0:662207e34fba | 1493 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1494 | * @see MPU6050_INTCFG_LATCH_INT_EN_BIT |
garfieldsg | 0:662207e34fba | 1495 | */ |
garfieldsg | 0:662207e34fba | 1496 | void MPU6050::setInterruptLatch(bool latch) |
garfieldsg | 0:662207e34fba | 1497 | { |
garfieldsg | 0:662207e34fba | 1498 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch); |
garfieldsg | 0:662207e34fba | 1499 | } |
garfieldsg | 0:662207e34fba | 1500 | /** Get interrupt latch clear mode. |
garfieldsg | 0:662207e34fba | 1501 | * Will be set 0 for status-read-only, 1 for any-register-read. |
garfieldsg | 0:662207e34fba | 1502 | * @return Current latch clear mode (0=status-read-only, 1=any-register-read) |
garfieldsg | 0:662207e34fba | 1503 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1504 | * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT |
garfieldsg | 0:662207e34fba | 1505 | */ |
garfieldsg | 0:662207e34fba | 1506 | bool MPU6050::getInterruptLatchClear() |
garfieldsg | 0:662207e34fba | 1507 | { |
garfieldsg | 0:662207e34fba | 1508 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1509 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1510 | } |
garfieldsg | 0:662207e34fba | 1511 | /** Set interrupt latch clear mode. |
garfieldsg | 0:662207e34fba | 1512 | * @param clear New latch clear mode (0=status-read-only, 1=any-register-read) |
garfieldsg | 0:662207e34fba | 1513 | * @see getInterruptLatchClear() |
garfieldsg | 0:662207e34fba | 1514 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1515 | * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT |
garfieldsg | 0:662207e34fba | 1516 | */ |
garfieldsg | 0:662207e34fba | 1517 | void MPU6050::setInterruptLatchClear(bool clear) |
garfieldsg | 0:662207e34fba | 1518 | { |
garfieldsg | 0:662207e34fba | 1519 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear); |
garfieldsg | 0:662207e34fba | 1520 | } |
garfieldsg | 0:662207e34fba | 1521 | /** Get FSYNC interrupt logic level mode. |
garfieldsg | 0:662207e34fba | 1522 | * @return Current FSYNC interrupt mode (0=active-high, 1=active-low) |
garfieldsg | 0:662207e34fba | 1523 | * @see getFSyncInterruptMode() |
garfieldsg | 0:662207e34fba | 1524 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1525 | * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT |
garfieldsg | 0:662207e34fba | 1526 | */ |
garfieldsg | 0:662207e34fba | 1527 | bool MPU6050::getFSyncInterruptLevel() |
garfieldsg | 0:662207e34fba | 1528 | { |
garfieldsg | 0:662207e34fba | 1529 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1530 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1531 | } |
garfieldsg | 0:662207e34fba | 1532 | /** Set FSYNC interrupt logic level mode. |
garfieldsg | 0:662207e34fba | 1533 | * @param mode New FSYNC interrupt mode (0=active-high, 1=active-low) |
garfieldsg | 0:662207e34fba | 1534 | * @see getFSyncInterruptMode() |
garfieldsg | 0:662207e34fba | 1535 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1536 | * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT |
garfieldsg | 0:662207e34fba | 1537 | */ |
garfieldsg | 0:662207e34fba | 1538 | void MPU6050::setFSyncInterruptLevel(bool level) |
garfieldsg | 0:662207e34fba | 1539 | { |
garfieldsg | 0:662207e34fba | 1540 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level); |
garfieldsg | 0:662207e34fba | 1541 | } |
garfieldsg | 0:662207e34fba | 1542 | /** Get FSYNC pin interrupt enabled setting. |
garfieldsg | 0:662207e34fba | 1543 | * Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1544 | * @return Current interrupt enabled setting |
garfieldsg | 0:662207e34fba | 1545 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1546 | * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT |
garfieldsg | 0:662207e34fba | 1547 | */ |
garfieldsg | 0:662207e34fba | 1548 | bool MPU6050::getFSyncInterruptEnabled() |
garfieldsg | 0:662207e34fba | 1549 | { |
garfieldsg | 0:662207e34fba | 1550 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1551 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1552 | } |
garfieldsg | 0:662207e34fba | 1553 | /** Set FSYNC pin interrupt enabled setting. |
garfieldsg | 0:662207e34fba | 1554 | * @param enabled New FSYNC pin interrupt enabled setting |
garfieldsg | 0:662207e34fba | 1555 | * @see getFSyncInterruptEnabled() |
garfieldsg | 0:662207e34fba | 1556 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1557 | * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT |
garfieldsg | 0:662207e34fba | 1558 | */ |
garfieldsg | 0:662207e34fba | 1559 | void MPU6050::setFSyncInterruptEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1560 | { |
garfieldsg | 0:662207e34fba | 1561 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1562 | } |
garfieldsg | 0:662207e34fba | 1563 | /** Get I2C bypass enabled status. |
garfieldsg | 0:662207e34fba | 1564 | * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to |
garfieldsg | 0:662207e34fba | 1565 | * 0, the host application processor will be able to directly access the |
garfieldsg | 0:662207e34fba | 1566 | * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host |
garfieldsg | 0:662207e34fba | 1567 | * application processor will not be able to directly access the auxiliary I2C |
garfieldsg | 0:662207e34fba | 1568 | * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 |
garfieldsg | 0:662207e34fba | 1569 | * bit[5]). |
garfieldsg | 0:662207e34fba | 1570 | * @return Current I2C bypass enabled status |
garfieldsg | 0:662207e34fba | 1571 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1572 | * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT |
garfieldsg | 0:662207e34fba | 1573 | */ |
garfieldsg | 0:662207e34fba | 1574 | bool MPU6050::getI2CBypassEnabled() |
garfieldsg | 0:662207e34fba | 1575 | { |
garfieldsg | 0:662207e34fba | 1576 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1577 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1578 | } |
garfieldsg | 0:662207e34fba | 1579 | /** Set I2C bypass enabled status. |
garfieldsg | 0:662207e34fba | 1580 | * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to |
garfieldsg | 0:662207e34fba | 1581 | * 0, the host application processor will be able to directly access the |
garfieldsg | 0:662207e34fba | 1582 | * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host |
garfieldsg | 0:662207e34fba | 1583 | * application processor will not be able to directly access the auxiliary I2C |
garfieldsg | 0:662207e34fba | 1584 | * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 |
garfieldsg | 0:662207e34fba | 1585 | * bit[5]). |
garfieldsg | 0:662207e34fba | 1586 | * @param enabled New I2C bypass enabled status |
garfieldsg | 0:662207e34fba | 1587 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1588 | * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT |
garfieldsg | 0:662207e34fba | 1589 | */ |
garfieldsg | 0:662207e34fba | 1590 | void MPU6050::setI2CBypassEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1591 | { |
garfieldsg | 0:662207e34fba | 1592 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1593 | } |
garfieldsg | 0:662207e34fba | 1594 | /** Get reference clock output enabled status. |
garfieldsg | 0:662207e34fba | 1595 | * When this bit is equal to 1, a reference clock output is provided at the |
garfieldsg | 0:662207e34fba | 1596 | * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For |
garfieldsg | 0:662207e34fba | 1597 | * further information regarding CLKOUT, please refer to the MPU-60X0 Product |
garfieldsg | 0:662207e34fba | 1598 | * Specification document. |
garfieldsg | 0:662207e34fba | 1599 | * @return Current reference clock output enabled status |
garfieldsg | 0:662207e34fba | 1600 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1601 | * @see MPU6050_INTCFG_CLKOUT_EN_BIT |
garfieldsg | 0:662207e34fba | 1602 | */ |
garfieldsg | 0:662207e34fba | 1603 | bool MPU6050::getClockOutputEnabled() |
garfieldsg | 0:662207e34fba | 1604 | { |
garfieldsg | 0:662207e34fba | 1605 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1606 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1607 | } |
garfieldsg | 0:662207e34fba | 1608 | /** Set reference clock output enabled status. |
garfieldsg | 0:662207e34fba | 1609 | * When this bit is equal to 1, a reference clock output is provided at the |
garfieldsg | 0:662207e34fba | 1610 | * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For |
garfieldsg | 0:662207e34fba | 1611 | * further information regarding CLKOUT, please refer to the MPU-60X0 Product |
garfieldsg | 0:662207e34fba | 1612 | * Specification document. |
garfieldsg | 0:662207e34fba | 1613 | * @param enabled New reference clock output enabled status |
garfieldsg | 0:662207e34fba | 1614 | * @see MPU6050_RA_INT_PIN_CFG |
garfieldsg | 0:662207e34fba | 1615 | * @see MPU6050_INTCFG_CLKOUT_EN_BIT |
garfieldsg | 0:662207e34fba | 1616 | */ |
garfieldsg | 0:662207e34fba | 1617 | void MPU6050::setClockOutputEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1618 | { |
garfieldsg | 0:662207e34fba | 1619 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1620 | } |
garfieldsg | 0:662207e34fba | 1621 | |
garfieldsg | 0:662207e34fba | 1622 | // INT_ENABLE register |
garfieldsg | 0:662207e34fba | 1623 | |
garfieldsg | 0:662207e34fba | 1624 | /** Get full interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1625 | * Full register byte for all interrupts, for quick reading. Each bit will be |
garfieldsg | 0:662207e34fba | 1626 | * set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1627 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1628 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1629 | * @see MPU6050_INTERRUPT_FF_BIT |
garfieldsg | 0:662207e34fba | 1630 | **/ |
garfieldsg | 0:662207e34fba | 1631 | uint8_t MPU6050::getIntEnabled() |
garfieldsg | 0:662207e34fba | 1632 | { |
garfieldsg | 0:662207e34fba | 1633 | i2Cdev.readByte(devAddr, MPU6050_RA_INT_ENABLE, buffer); |
garfieldsg | 0:662207e34fba | 1634 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1635 | } |
garfieldsg | 0:662207e34fba | 1636 | /** Set full interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1637 | * Full register byte for all interrupts, for quick reading. Each bit should be |
garfieldsg | 0:662207e34fba | 1638 | * set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1639 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1640 | * @see getIntFreefallEnabled() |
garfieldsg | 0:662207e34fba | 1641 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1642 | * @see MPU6050_INTERRUPT_FF_BIT |
garfieldsg | 0:662207e34fba | 1643 | **/ |
garfieldsg | 0:662207e34fba | 1644 | void MPU6050::setIntEnabled(uint8_t enabled) |
garfieldsg | 0:662207e34fba | 1645 | { |
garfieldsg | 0:662207e34fba | 1646 | i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled); |
garfieldsg | 0:662207e34fba | 1647 | } |
garfieldsg | 0:662207e34fba | 1648 | /** Get Free Fall interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1649 | * Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1650 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1651 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1652 | * @see MPU6050_INTERRUPT_FF_BIT |
garfieldsg | 0:662207e34fba | 1653 | **/ |
garfieldsg | 0:662207e34fba | 1654 | bool MPU6050::getIntFreefallEnabled() |
garfieldsg | 0:662207e34fba | 1655 | { |
garfieldsg | 0:662207e34fba | 1656 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1657 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1658 | } |
garfieldsg | 0:662207e34fba | 1659 | /** Set Free Fall interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1660 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1661 | * @see getIntFreefallEnabled() |
garfieldsg | 0:662207e34fba | 1662 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1663 | * @see MPU6050_INTERRUPT_FF_BIT |
garfieldsg | 0:662207e34fba | 1664 | **/ |
garfieldsg | 0:662207e34fba | 1665 | void MPU6050::setIntFreefallEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1666 | { |
garfieldsg | 0:662207e34fba | 1667 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1668 | } |
garfieldsg | 0:662207e34fba | 1669 | /** Get Motion Detection interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1670 | * Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1671 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1672 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1673 | * @see MPU6050_INTERRUPT_MOT_BIT |
garfieldsg | 0:662207e34fba | 1674 | **/ |
garfieldsg | 0:662207e34fba | 1675 | bool MPU6050::getIntMotionEnabled() |
garfieldsg | 0:662207e34fba | 1676 | { |
garfieldsg | 0:662207e34fba | 1677 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1678 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1679 | } |
garfieldsg | 0:662207e34fba | 1680 | /** Set Motion Detection interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1681 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1682 | * @see getIntMotionEnabled() |
garfieldsg | 0:662207e34fba | 1683 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1684 | * @see MPU6050_INTERRUPT_MOT_BIT |
garfieldsg | 0:662207e34fba | 1685 | **/ |
garfieldsg | 0:662207e34fba | 1686 | void MPU6050::setIntMotionEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1687 | { |
garfieldsg | 0:662207e34fba | 1688 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1689 | } |
garfieldsg | 0:662207e34fba | 1690 | /** Get Zero Motion Detection interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1691 | * Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1692 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1693 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1694 | * @see MPU6050_INTERRUPT_ZMOT_BIT |
garfieldsg | 0:662207e34fba | 1695 | **/ |
garfieldsg | 0:662207e34fba | 1696 | bool MPU6050::getIntZeroMotionEnabled() |
garfieldsg | 0:662207e34fba | 1697 | { |
garfieldsg | 0:662207e34fba | 1698 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1699 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1700 | } |
garfieldsg | 0:662207e34fba | 1701 | /** Set Zero Motion Detection interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1702 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1703 | * @see getIntZeroMotionEnabled() |
garfieldsg | 0:662207e34fba | 1704 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1705 | * @see MPU6050_INTERRUPT_ZMOT_BIT |
garfieldsg | 0:662207e34fba | 1706 | **/ |
garfieldsg | 0:662207e34fba | 1707 | void MPU6050::setIntZeroMotionEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1708 | { |
garfieldsg | 0:662207e34fba | 1709 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1710 | } |
garfieldsg | 0:662207e34fba | 1711 | /** Get FIFO Buffer Overflow interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1712 | * Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1713 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1714 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1715 | * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT |
garfieldsg | 0:662207e34fba | 1716 | **/ |
garfieldsg | 0:662207e34fba | 1717 | bool MPU6050::getIntFIFOBufferOverflowEnabled() |
garfieldsg | 0:662207e34fba | 1718 | { |
garfieldsg | 0:662207e34fba | 1719 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1720 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1721 | } |
garfieldsg | 0:662207e34fba | 1722 | /** Set FIFO Buffer Overflow interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1723 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1724 | * @see getIntFIFOBufferOverflowEnabled() |
garfieldsg | 0:662207e34fba | 1725 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1726 | * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT |
garfieldsg | 0:662207e34fba | 1727 | **/ |
garfieldsg | 0:662207e34fba | 1728 | void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1729 | { |
garfieldsg | 0:662207e34fba | 1730 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1731 | } |
garfieldsg | 0:662207e34fba | 1732 | /** Get I2C Master interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1733 | * This enables any of the I2C Master interrupt sources to generate an |
garfieldsg | 0:662207e34fba | 1734 | * interrupt. Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1735 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1736 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1737 | * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT |
garfieldsg | 0:662207e34fba | 1738 | **/ |
garfieldsg | 0:662207e34fba | 1739 | bool MPU6050::getIntI2CMasterEnabled() |
garfieldsg | 0:662207e34fba | 1740 | { |
garfieldsg | 0:662207e34fba | 1741 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1742 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1743 | } |
garfieldsg | 0:662207e34fba | 1744 | /** Set I2C Master interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1745 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1746 | * @see getIntI2CMasterEnabled() |
garfieldsg | 0:662207e34fba | 1747 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1748 | * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT |
garfieldsg | 0:662207e34fba | 1749 | **/ |
garfieldsg | 0:662207e34fba | 1750 | void MPU6050::setIntI2CMasterEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1751 | { |
garfieldsg | 0:662207e34fba | 1752 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1753 | } |
garfieldsg | 0:662207e34fba | 1754 | /** Get Data Ready interrupt enabled setting. |
garfieldsg | 0:662207e34fba | 1755 | * This event occurs each time a write operation to all of the sensor registers |
garfieldsg | 0:662207e34fba | 1756 | * has been completed. Will be set 0 for disabled, 1 for enabled. |
garfieldsg | 0:662207e34fba | 1757 | * @return Current interrupt enabled status |
garfieldsg | 0:662207e34fba | 1758 | * @see MPU6050_RA_INT_ENABLE |
garfieldsg | 0:662207e34fba | 1759 | * @see MPU6050_INTERRUPT_DATA_RDY_BIT |
garfieldsg | 0:662207e34fba | 1760 | */ |
garfieldsg | 0:662207e34fba | 1761 | bool MPU6050::getIntDataReadyEnabled() |
garfieldsg | 0:662207e34fba | 1762 | { |
garfieldsg | 0:662207e34fba | 1763 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1764 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1765 | } |
garfieldsg | 0:662207e34fba | 1766 | /** Set Data Ready interrupt enabled status. |
garfieldsg | 0:662207e34fba | 1767 | * @param enabled New interrupt enabled status |
garfieldsg | 0:662207e34fba | 1768 | * @see getIntDataReadyEnabled() |
garfieldsg | 0:662207e34fba | 1769 | * @see MPU6050_RA_INT_CFG |
garfieldsg | 0:662207e34fba | 1770 | * @see MPU6050_INTERRUPT_DATA_RDY_BIT |
garfieldsg | 0:662207e34fba | 1771 | */ |
garfieldsg | 0:662207e34fba | 1772 | void MPU6050::setIntDataReadyEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 1773 | { |
garfieldsg | 0:662207e34fba | 1774 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled); |
garfieldsg | 0:662207e34fba | 1775 | } |
garfieldsg | 0:662207e34fba | 1776 | |
garfieldsg | 0:662207e34fba | 1777 | // INT_STATUS register |
garfieldsg | 0:662207e34fba | 1778 | |
garfieldsg | 0:662207e34fba | 1779 | /** Get full set of interrupt status bits. |
garfieldsg | 0:662207e34fba | 1780 | * These bits clear to 0 after the register has been read. Very useful |
garfieldsg | 0:662207e34fba | 1781 | * for getting multiple INT statuses, since each single bit read clears |
garfieldsg | 0:662207e34fba | 1782 | * all of them because it has to read the whole byte. |
garfieldsg | 0:662207e34fba | 1783 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1784 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1785 | */ |
garfieldsg | 0:662207e34fba | 1786 | uint8_t MPU6050::getIntStatus() |
garfieldsg | 0:662207e34fba | 1787 | { |
garfieldsg | 0:662207e34fba | 1788 | i2Cdev.readByte(devAddr, MPU6050_RA_INT_STATUS, buffer); |
garfieldsg | 0:662207e34fba | 1789 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1790 | } |
garfieldsg | 0:662207e34fba | 1791 | /** Get Free Fall interrupt status. |
garfieldsg | 0:662207e34fba | 1792 | * This bit automatically sets to 1 when a Free Fall interrupt has been |
garfieldsg | 0:662207e34fba | 1793 | * generated. The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1794 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1795 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1796 | * @see MPU6050_INTERRUPT_FF_BIT |
garfieldsg | 0:662207e34fba | 1797 | */ |
garfieldsg | 0:662207e34fba | 1798 | bool MPU6050::getIntFreefallStatus() |
garfieldsg | 0:662207e34fba | 1799 | { |
garfieldsg | 0:662207e34fba | 1800 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1801 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1802 | } |
garfieldsg | 0:662207e34fba | 1803 | /** Get Motion Detection interrupt status. |
garfieldsg | 0:662207e34fba | 1804 | * This bit automatically sets to 1 when a Motion Detection interrupt has been |
garfieldsg | 0:662207e34fba | 1805 | * generated. The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1806 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1807 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1808 | * @see MPU6050_INTERRUPT_MOT_BIT |
garfieldsg | 0:662207e34fba | 1809 | */ |
garfieldsg | 0:662207e34fba | 1810 | bool MPU6050::getIntMotionStatus() |
garfieldsg | 0:662207e34fba | 1811 | { |
garfieldsg | 0:662207e34fba | 1812 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1813 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1814 | } |
garfieldsg | 0:662207e34fba | 1815 | /** Get Zero Motion Detection interrupt status. |
garfieldsg | 0:662207e34fba | 1816 | * This bit automatically sets to 1 when a Zero Motion Detection interrupt has |
garfieldsg | 0:662207e34fba | 1817 | * been generated. The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1818 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1819 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1820 | * @see MPU6050_INTERRUPT_ZMOT_BIT |
garfieldsg | 0:662207e34fba | 1821 | */ |
garfieldsg | 0:662207e34fba | 1822 | bool MPU6050::getIntZeroMotionStatus() |
garfieldsg | 0:662207e34fba | 1823 | { |
garfieldsg | 0:662207e34fba | 1824 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1825 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1826 | } |
garfieldsg | 0:662207e34fba | 1827 | /** Get FIFO Buffer Overflow interrupt status. |
garfieldsg | 0:662207e34fba | 1828 | * This bit automatically sets to 1 when a Free Fall interrupt has been |
garfieldsg | 0:662207e34fba | 1829 | * generated. The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1830 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1831 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1832 | * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT |
garfieldsg | 0:662207e34fba | 1833 | */ |
garfieldsg | 0:662207e34fba | 1834 | bool MPU6050::getIntFIFOBufferOverflowStatus() |
garfieldsg | 0:662207e34fba | 1835 | { |
garfieldsg | 0:662207e34fba | 1836 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1837 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1838 | } |
garfieldsg | 0:662207e34fba | 1839 | /** Get I2C Master interrupt status. |
garfieldsg | 0:662207e34fba | 1840 | * This bit automatically sets to 1 when an I2C Master interrupt has been |
garfieldsg | 0:662207e34fba | 1841 | * generated. For a list of I2C Master interrupts, please refer to Register 54. |
garfieldsg | 0:662207e34fba | 1842 | * The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1843 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1844 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1845 | * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT |
garfieldsg | 0:662207e34fba | 1846 | */ |
garfieldsg | 0:662207e34fba | 1847 | bool MPU6050::getIntI2CMasterStatus() |
garfieldsg | 0:662207e34fba | 1848 | { |
garfieldsg | 0:662207e34fba | 1849 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1850 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1851 | } |
garfieldsg | 0:662207e34fba | 1852 | /** Get Data Ready interrupt status. |
garfieldsg | 0:662207e34fba | 1853 | * This bit automatically sets to 1 when a Data Ready interrupt has been |
garfieldsg | 0:662207e34fba | 1854 | * generated. The bit clears to 0 after the register has been read. |
garfieldsg | 0:662207e34fba | 1855 | * @return Current interrupt status |
garfieldsg | 0:662207e34fba | 1856 | * @see MPU6050_RA_INT_STATUS |
garfieldsg | 0:662207e34fba | 1857 | * @see MPU6050_INTERRUPT_DATA_RDY_BIT |
garfieldsg | 0:662207e34fba | 1858 | */ |
garfieldsg | 0:662207e34fba | 1859 | bool MPU6050::getIntDataReadyStatus() |
garfieldsg | 0:662207e34fba | 1860 | { |
garfieldsg | 0:662207e34fba | 1861 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer); |
garfieldsg | 0:662207e34fba | 1862 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 1863 | } |
garfieldsg | 0:662207e34fba | 1864 | |
garfieldsg | 0:662207e34fba | 1865 | // ACCEL_*OUT_* registers |
garfieldsg | 0:662207e34fba | 1866 | |
garfieldsg | 0:662207e34fba | 1867 | /** Get raw 9-axis motion sensor readings (accel/gyro/compass). |
garfieldsg | 0:662207e34fba | 1868 | * FUNCTION NOT FULLY IMPLEMENTED YET. |
garfieldsg | 0:662207e34fba | 1869 | * @param ax 16-bit signed integer container for accelerometer X-axis value |
garfieldsg | 0:662207e34fba | 1870 | * @param ay 16-bit signed integer container for accelerometer Y-axis value |
garfieldsg | 0:662207e34fba | 1871 | * @param az 16-bit signed integer container for accelerometer Z-axis value |
garfieldsg | 0:662207e34fba | 1872 | * @param gx 16-bit signed integer container for gyroscope X-axis value |
garfieldsg | 0:662207e34fba | 1873 | * @param gy 16-bit signed integer container for gyroscope Y-axis value |
garfieldsg | 0:662207e34fba | 1874 | * @param gz 16-bit signed integer container for gyroscope Z-axis value |
garfieldsg | 0:662207e34fba | 1875 | * @param mx 16-bit signed integer container for magnetometer X-axis value |
garfieldsg | 0:662207e34fba | 1876 | * @param my 16-bit signed integer container for magnetometer Y-axis value |
garfieldsg | 0:662207e34fba | 1877 | * @param mz 16-bit signed integer container for magnetometer Z-axis value |
garfieldsg | 0:662207e34fba | 1878 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 1879 | * @see getAcceleration() |
garfieldsg | 0:662207e34fba | 1880 | * @see getRotation() |
garfieldsg | 0:662207e34fba | 1881 | * @see MPU6050_RA_ACCEL_XOUT_H |
garfieldsg | 0:662207e34fba | 1882 | */ |
garfieldsg | 0:662207e34fba | 1883 | void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) |
garfieldsg | 0:662207e34fba | 1884 | { |
garfieldsg | 0:662207e34fba | 1885 | getMotion6(ax, ay, az, gx, gy, gz); |
garfieldsg | 0:662207e34fba | 1886 | // TODO: magnetometer integration |
garfieldsg | 0:662207e34fba | 1887 | } |
garfieldsg | 0:662207e34fba | 1888 | /** Get raw 6-axis motion sensor readings (accel/gyro). |
garfieldsg | 0:662207e34fba | 1889 | * Retrieves all currently available motion sensor values. |
garfieldsg | 0:662207e34fba | 1890 | * @param ax 16-bit signed integer container for accelerometer X-axis value |
garfieldsg | 0:662207e34fba | 1891 | * @param ay 16-bit signed integer container for accelerometer Y-axis value |
garfieldsg | 0:662207e34fba | 1892 | * @param az 16-bit signed integer container for accelerometer Z-axis value |
garfieldsg | 0:662207e34fba | 1893 | * @param gx 16-bit signed integer container for gyroscope X-axis value |
garfieldsg | 0:662207e34fba | 1894 | * @param gy 16-bit signed integer container for gyroscope Y-axis value |
garfieldsg | 0:662207e34fba | 1895 | * @param gz 16-bit signed integer container for gyroscope Z-axis value |
garfieldsg | 0:662207e34fba | 1896 | * @see getAcceleration() |
garfieldsg | 0:662207e34fba | 1897 | * @see getRotation() |
garfieldsg | 0:662207e34fba | 1898 | * @see MPU6050_RA_ACCEL_XOUT_H |
garfieldsg | 0:662207e34fba | 1899 | */ |
garfieldsg | 0:662207e34fba | 1900 | void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) |
garfieldsg | 0:662207e34fba | 1901 | { |
garfieldsg | 0:662207e34fba | 1902 | i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer); |
chris1seto | 2:d7915dab2d3c | 1903 | |
chris1seto | 2:d7915dab2d3c | 1904 | for (int i = 0; i < 14; i++) |
chris1seto | 2:d7915dab2d3c | 1905 | { |
chris1seto | 2:d7915dab2d3c | 1906 | pc.printf("%d", buffer[i]); |
chris1seto | 2:d7915dab2d3c | 1907 | } |
chris1seto | 2:d7915dab2d3c | 1908 | |
garfieldsg | 0:662207e34fba | 1909 | *ax = (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 1910 | *ay = (((int16_t)buffer[2]) << 8) | buffer[3]; |
garfieldsg | 0:662207e34fba | 1911 | *az = (((int16_t)buffer[4]) << 8) | buffer[5]; |
garfieldsg | 0:662207e34fba | 1912 | *gx = (((int16_t)buffer[8]) << 8) | buffer[9]; |
garfieldsg | 0:662207e34fba | 1913 | *gy = (((int16_t)buffer[10]) << 8) | buffer[11]; |
garfieldsg | 0:662207e34fba | 1914 | *gz = (((int16_t)buffer[12]) << 8) | buffer[13]; |
garfieldsg | 0:662207e34fba | 1915 | } |
garfieldsg | 0:662207e34fba | 1916 | /** Get 3-axis accelerometer readings. |
garfieldsg | 0:662207e34fba | 1917 | * These registers store the most recent accelerometer measurements. |
garfieldsg | 0:662207e34fba | 1918 | * Accelerometer measurements are written to these registers at the Sample Rate |
garfieldsg | 0:662207e34fba | 1919 | * as defined in Register 25. |
garfieldsg | 0:662207e34fba | 1920 | * |
garfieldsg | 0:662207e34fba | 1921 | * The accelerometer measurement registers, along with the temperature |
garfieldsg | 0:662207e34fba | 1922 | * measurement registers, gyroscope measurement registers, and external sensor |
garfieldsg | 0:662207e34fba | 1923 | * data registers, are composed of two sets of registers: an internal register |
garfieldsg | 0:662207e34fba | 1924 | * set and a user-facing read register set. |
garfieldsg | 0:662207e34fba | 1925 | * |
garfieldsg | 0:662207e34fba | 1926 | * The data within the accelerometer sensors' internal register set is always |
garfieldsg | 0:662207e34fba | 1927 | * updated at the Sample Rate. Meanwhile, the user-facing read register set |
garfieldsg | 0:662207e34fba | 1928 | * duplicates the internal register set's data values whenever the serial |
garfieldsg | 0:662207e34fba | 1929 | * interface is idle. This guarantees that a burst read of sensor registers will |
garfieldsg | 0:662207e34fba | 1930 | * read measurements from the same sampling instant. Note that if burst reads |
garfieldsg | 0:662207e34fba | 1931 | * are not used, the user is responsible for ensuring a set of single byte reads |
garfieldsg | 0:662207e34fba | 1932 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
garfieldsg | 0:662207e34fba | 1933 | * |
garfieldsg | 0:662207e34fba | 1934 | * Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS |
garfieldsg | 0:662207e34fba | 1935 | * (Register 28). For each full scale setting, the accelerometers' sensitivity |
garfieldsg | 0:662207e34fba | 1936 | * per LSB in ACCEL_xOUT is shown in the table below: |
garfieldsg | 0:662207e34fba | 1937 | * |
garfieldsg | 0:662207e34fba | 1938 | * <pre> |
garfieldsg | 0:662207e34fba | 1939 | * AFS_SEL | Full Scale Range | LSB Sensitivity |
garfieldsg | 0:662207e34fba | 1940 | * --------+------------------+---------------- |
garfieldsg | 0:662207e34fba | 1941 | * 0 | +/- 2g | 8192 LSB/mg |
garfieldsg | 0:662207e34fba | 1942 | * 1 | +/- 4g | 4096 LSB/mg |
garfieldsg | 0:662207e34fba | 1943 | * 2 | +/- 8g | 2048 LSB/mg |
garfieldsg | 0:662207e34fba | 1944 | * 3 | +/- 16g | 1024 LSB/mg |
garfieldsg | 0:662207e34fba | 1945 | * </pre> |
garfieldsg | 0:662207e34fba | 1946 | * |
garfieldsg | 0:662207e34fba | 1947 | * @param x 16-bit signed integer container for X-axis acceleration |
garfieldsg | 0:662207e34fba | 1948 | * @param y 16-bit signed integer container for Y-axis acceleration |
garfieldsg | 0:662207e34fba | 1949 | * @param z 16-bit signed integer container for Z-axis acceleration |
garfieldsg | 0:662207e34fba | 1950 | * @see MPU6050_RA_GYRO_XOUT_H |
garfieldsg | 0:662207e34fba | 1951 | */ |
garfieldsg | 0:662207e34fba | 1952 | void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z) |
garfieldsg | 0:662207e34fba | 1953 | { |
garfieldsg | 0:662207e34fba | 1954 | i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer); |
garfieldsg | 0:662207e34fba | 1955 | *x = (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 1956 | *y = (((int16_t)buffer[2]) << 8) | buffer[3]; |
garfieldsg | 0:662207e34fba | 1957 | *z = (((int16_t)buffer[4]) << 8) | buffer[5]; |
garfieldsg | 0:662207e34fba | 1958 | } |
garfieldsg | 0:662207e34fba | 1959 | /** Get X-axis accelerometer reading. |
garfieldsg | 0:662207e34fba | 1960 | * @return X-axis acceleration measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 1961 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 1962 | * @see MPU6050_RA_ACCEL_XOUT_H |
garfieldsg | 0:662207e34fba | 1963 | */ |
garfieldsg | 0:662207e34fba | 1964 | int16_t MPU6050::getAccelerationX() |
garfieldsg | 0:662207e34fba | 1965 | { |
garfieldsg | 0:662207e34fba | 1966 | i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 1967 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 1968 | } |
garfieldsg | 0:662207e34fba | 1969 | /** Get Y-axis accelerometer reading. |
garfieldsg | 0:662207e34fba | 1970 | * @return Y-axis acceleration measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 1971 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 1972 | * @see MPU6050_RA_ACCEL_YOUT_H |
garfieldsg | 0:662207e34fba | 1973 | */ |
garfieldsg | 0:662207e34fba | 1974 | int16_t MPU6050::getAccelerationY() |
garfieldsg | 0:662207e34fba | 1975 | { |
garfieldsg | 0:662207e34fba | 1976 | i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 1977 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 1978 | } |
garfieldsg | 0:662207e34fba | 1979 | /** Get Z-axis accelerometer reading. |
garfieldsg | 0:662207e34fba | 1980 | * @return Z-axis acceleration measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 1981 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 1982 | * @see MPU6050_RA_ACCEL_ZOUT_H |
garfieldsg | 0:662207e34fba | 1983 | */ |
garfieldsg | 0:662207e34fba | 1984 | int16_t MPU6050::getAccelerationZ() |
garfieldsg | 0:662207e34fba | 1985 | { |
garfieldsg | 0:662207e34fba | 1986 | i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 1987 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 1988 | } |
garfieldsg | 0:662207e34fba | 1989 | |
garfieldsg | 0:662207e34fba | 1990 | // TEMP_OUT_* registers |
garfieldsg | 0:662207e34fba | 1991 | |
garfieldsg | 0:662207e34fba | 1992 | /** Get current internal temperature. |
garfieldsg | 0:662207e34fba | 1993 | * @return Temperature reading in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 1994 | * @see MPU6050_RA_TEMP_OUT_H |
garfieldsg | 0:662207e34fba | 1995 | */ |
garfieldsg | 0:662207e34fba | 1996 | int16_t MPU6050::getTemperature() |
garfieldsg | 0:662207e34fba | 1997 | { |
garfieldsg | 0:662207e34fba | 1998 | i2Cdev.readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 1999 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2000 | } |
garfieldsg | 0:662207e34fba | 2001 | |
garfieldsg | 0:662207e34fba | 2002 | // GYRO_*OUT_* registers |
garfieldsg | 0:662207e34fba | 2003 | |
garfieldsg | 0:662207e34fba | 2004 | /** Get 3-axis gyroscope readings. |
garfieldsg | 0:662207e34fba | 2005 | * These gyroscope measurement registers, along with the accelerometer |
garfieldsg | 0:662207e34fba | 2006 | * measurement registers, temperature measurement registers, and external sensor |
garfieldsg | 0:662207e34fba | 2007 | * data registers, are composed of two sets of registers: an internal register |
garfieldsg | 0:662207e34fba | 2008 | * set and a user-facing read register set. |
garfieldsg | 0:662207e34fba | 2009 | * The data within the gyroscope sensors' internal register set is always |
garfieldsg | 0:662207e34fba | 2010 | * updated at the Sample Rate. Meanwhile, the user-facing read register set |
garfieldsg | 0:662207e34fba | 2011 | * duplicates the internal register set's data values whenever the serial |
garfieldsg | 0:662207e34fba | 2012 | * interface is idle. This guarantees that a burst read of sensor registers will |
garfieldsg | 0:662207e34fba | 2013 | * read measurements from the same sampling instant. Note that if burst reads |
garfieldsg | 0:662207e34fba | 2014 | * are not used, the user is responsible for ensuring a set of single byte reads |
garfieldsg | 0:662207e34fba | 2015 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
garfieldsg | 0:662207e34fba | 2016 | * |
garfieldsg | 0:662207e34fba | 2017 | * Each 16-bit gyroscope measurement has a full scale defined in FS_SEL |
garfieldsg | 0:662207e34fba | 2018 | * (Register 27). For each full scale setting, the gyroscopes' sensitivity per |
garfieldsg | 0:662207e34fba | 2019 | * LSB in GYRO_xOUT is shown in the table below: |
garfieldsg | 0:662207e34fba | 2020 | * |
garfieldsg | 0:662207e34fba | 2021 | * <pre> |
garfieldsg | 0:662207e34fba | 2022 | * FS_SEL | Full Scale Range | LSB Sensitivity |
garfieldsg | 0:662207e34fba | 2023 | * -------+--------------------+---------------- |
garfieldsg | 0:662207e34fba | 2024 | * 0 | +/- 250 degrees/s | 131 LSB/deg/s |
garfieldsg | 0:662207e34fba | 2025 | * 1 | +/- 500 degrees/s | 65.5 LSB/deg/s |
garfieldsg | 0:662207e34fba | 2026 | * 2 | +/- 1000 degrees/s | 32.8 LSB/deg/s |
garfieldsg | 0:662207e34fba | 2027 | * 3 | +/- 2000 degrees/s | 16.4 LSB/deg/s |
garfieldsg | 0:662207e34fba | 2028 | * </pre> |
garfieldsg | 0:662207e34fba | 2029 | * |
garfieldsg | 0:662207e34fba | 2030 | * @param x 16-bit signed integer container for X-axis rotation |
garfieldsg | 0:662207e34fba | 2031 | * @param y 16-bit signed integer container for Y-axis rotation |
garfieldsg | 0:662207e34fba | 2032 | * @param z 16-bit signed integer container for Z-axis rotation |
garfieldsg | 0:662207e34fba | 2033 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 2034 | * @see MPU6050_RA_GYRO_XOUT_H |
garfieldsg | 0:662207e34fba | 2035 | */ |
garfieldsg | 0:662207e34fba | 2036 | void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z) |
garfieldsg | 0:662207e34fba | 2037 | { |
garfieldsg | 0:662207e34fba | 2038 | i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer); |
garfieldsg | 0:662207e34fba | 2039 | *x = (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2040 | *y = (((int16_t)buffer[2]) << 8) | buffer[3]; |
garfieldsg | 0:662207e34fba | 2041 | *z = (((int16_t)buffer[4]) << 8) | buffer[5]; |
garfieldsg | 0:662207e34fba | 2042 | } |
garfieldsg | 0:662207e34fba | 2043 | /** Get X-axis gyroscope reading. |
garfieldsg | 0:662207e34fba | 2044 | * @return X-axis rotation measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 2045 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 2046 | * @see MPU6050_RA_GYRO_XOUT_H |
garfieldsg | 0:662207e34fba | 2047 | */ |
garfieldsg | 0:662207e34fba | 2048 | int16_t MPU6050::getRotationX() |
garfieldsg | 0:662207e34fba | 2049 | { |
garfieldsg | 0:662207e34fba | 2050 | i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 2051 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2052 | } |
garfieldsg | 0:662207e34fba | 2053 | /** Get Y-axis gyroscope reading. |
garfieldsg | 0:662207e34fba | 2054 | * @return Y-axis rotation measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 2055 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 2056 | * @see MPU6050_RA_GYRO_YOUT_H |
garfieldsg | 0:662207e34fba | 2057 | */ |
garfieldsg | 0:662207e34fba | 2058 | int16_t MPU6050::getRotationY() |
garfieldsg | 0:662207e34fba | 2059 | { |
garfieldsg | 0:662207e34fba | 2060 | i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 2061 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2062 | } |
garfieldsg | 0:662207e34fba | 2063 | /** Get Z-axis gyroscope reading. |
garfieldsg | 0:662207e34fba | 2064 | * @return Z-axis rotation measurement in 16-bit 2's complement format |
garfieldsg | 0:662207e34fba | 2065 | * @see getMotion6() |
garfieldsg | 0:662207e34fba | 2066 | * @see MPU6050_RA_GYRO_ZOUT_H |
garfieldsg | 0:662207e34fba | 2067 | */ |
garfieldsg | 0:662207e34fba | 2068 | int16_t MPU6050::getRotationZ() |
garfieldsg | 0:662207e34fba | 2069 | { |
garfieldsg | 0:662207e34fba | 2070 | i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 2071 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2072 | } |
garfieldsg | 0:662207e34fba | 2073 | |
garfieldsg | 0:662207e34fba | 2074 | // EXT_SENS_DATA_* registers |
garfieldsg | 0:662207e34fba | 2075 | |
garfieldsg | 0:662207e34fba | 2076 | /** Read single byte from external sensor data register. |
garfieldsg | 0:662207e34fba | 2077 | * These registers store data read from external sensors by the Slave 0, 1, 2, |
garfieldsg | 0:662207e34fba | 2078 | * and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in |
garfieldsg | 0:662207e34fba | 2079 | * I2C_SLV4_DI (Register 53). |
garfieldsg | 0:662207e34fba | 2080 | * |
garfieldsg | 0:662207e34fba | 2081 | * External sensor data is written to these registers at the Sample Rate as |
garfieldsg | 0:662207e34fba | 2082 | * defined in Register 25. This access rate can be reduced by using the Slave |
garfieldsg | 0:662207e34fba | 2083 | * Delay Enable registers (Register 103). |
garfieldsg | 0:662207e34fba | 2084 | * |
garfieldsg | 0:662207e34fba | 2085 | * External sensor data registers, along with the gyroscope measurement |
garfieldsg | 0:662207e34fba | 2086 | * registers, accelerometer measurement registers, and temperature measurement |
garfieldsg | 0:662207e34fba | 2087 | * registers, are composed of two sets of registers: an internal register set |
garfieldsg | 0:662207e34fba | 2088 | * and a user-facing read register set. |
garfieldsg | 0:662207e34fba | 2089 | * |
garfieldsg | 0:662207e34fba | 2090 | * The data within the external sensors' internal register set is always updated |
garfieldsg | 0:662207e34fba | 2091 | * at the Sample Rate (or the reduced access rate) whenever the serial interface |
garfieldsg | 0:662207e34fba | 2092 | * is idle. This guarantees that a burst read of sensor registers will read |
garfieldsg | 0:662207e34fba | 2093 | * measurements from the same sampling instant. Note that if burst reads are not |
garfieldsg | 0:662207e34fba | 2094 | * used, the user is responsible for ensuring a set of single byte reads |
garfieldsg | 0:662207e34fba | 2095 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
garfieldsg | 0:662207e34fba | 2096 | * |
garfieldsg | 0:662207e34fba | 2097 | * Data is placed in these external sensor data registers according to |
garfieldsg | 0:662207e34fba | 2098 | * I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39, |
garfieldsg | 0:662207e34fba | 2099 | * 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from |
garfieldsg | 0:662207e34fba | 2100 | * an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as |
garfieldsg | 0:662207e34fba | 2101 | * defined in Register 25) or delayed rate (if specified in Register 52 and |
garfieldsg | 0:662207e34fba | 2102 | * 103). During each Sample cycle, slave reads are performed in order of Slave |
garfieldsg | 0:662207e34fba | 2103 | * number. If all slaves are enabled with more than zero bytes to be read, the |
garfieldsg | 0:662207e34fba | 2104 | * order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3. |
garfieldsg | 0:662207e34fba | 2105 | * |
garfieldsg | 0:662207e34fba | 2106 | * Each enabled slave will have EXT_SENS_DATA registers associated with it by |
garfieldsg | 0:662207e34fba | 2107 | * number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from |
garfieldsg | 0:662207e34fba | 2108 | * EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may |
garfieldsg | 0:662207e34fba | 2109 | * change the higher numbered slaves' associated registers. Furthermore, if |
garfieldsg | 0:662207e34fba | 2110 | * fewer total bytes are being read from the external sensors as a result of |
garfieldsg | 0:662207e34fba | 2111 | * such a change, then the data remaining in the registers which no longer have |
garfieldsg | 0:662207e34fba | 2112 | * an associated slave device (i.e. high numbered registers) will remain in |
garfieldsg | 0:662207e34fba | 2113 | * these previously allocated registers unless reset. |
garfieldsg | 0:662207e34fba | 2114 | * |
garfieldsg | 0:662207e34fba | 2115 | * If the sum of the read lengths of all SLVx transactions exceed the number of |
garfieldsg | 0:662207e34fba | 2116 | * available EXT_SENS_DATA registers, the excess bytes will be dropped. There |
garfieldsg | 0:662207e34fba | 2117 | * are 24 EXT_SENS_DATA registers and hence the total read lengths between all |
garfieldsg | 0:662207e34fba | 2118 | * the slaves cannot be greater than 24 or some bytes will be lost. |
garfieldsg | 0:662207e34fba | 2119 | * |
garfieldsg | 0:662207e34fba | 2120 | * Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further |
garfieldsg | 0:662207e34fba | 2121 | * information regarding the characteristics of Slave 4, please refer to |
garfieldsg | 0:662207e34fba | 2122 | * Registers 49 to 53. |
garfieldsg | 0:662207e34fba | 2123 | * |
garfieldsg | 0:662207e34fba | 2124 | * EXAMPLE: |
garfieldsg | 0:662207e34fba | 2125 | * Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and |
garfieldsg | 0:662207e34fba | 2126 | * I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that |
garfieldsg | 0:662207e34fba | 2127 | * I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00 |
garfieldsg | 0:662207e34fba | 2128 | * through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05 |
garfieldsg | 0:662207e34fba | 2129 | * will be associated with Slave 1. If Slave 2 is enabled as well, registers |
garfieldsg | 0:662207e34fba | 2130 | * starting from EXT_SENS_DATA_06 will be allocated to Slave 2. |
garfieldsg | 0:662207e34fba | 2131 | * |
garfieldsg | 0:662207e34fba | 2132 | * If Slave 2 is disabled while Slave 3 is enabled in this same situation, then |
garfieldsg | 0:662207e34fba | 2133 | * registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3 |
garfieldsg | 0:662207e34fba | 2134 | * instead. |
garfieldsg | 0:662207e34fba | 2135 | * |
garfieldsg | 0:662207e34fba | 2136 | * REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE: |
garfieldsg | 0:662207e34fba | 2137 | * If a slave is disabled at any time, the space initially allocated to the |
garfieldsg | 0:662207e34fba | 2138 | * slave in the EXT_SENS_DATA register, will remain associated with that slave. |
garfieldsg | 0:662207e34fba | 2139 | * This is to avoid dynamic adjustment of the register allocation. |
garfieldsg | 0:662207e34fba | 2140 | * |
garfieldsg | 0:662207e34fba | 2141 | * The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all |
garfieldsg | 0:662207e34fba | 2142 | * slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106). |
garfieldsg | 0:662207e34fba | 2143 | * |
garfieldsg | 0:662207e34fba | 2144 | * This above is also true if one of the slaves gets NACKed and stops |
garfieldsg | 0:662207e34fba | 2145 | * functioning. |
garfieldsg | 0:662207e34fba | 2146 | * |
garfieldsg | 0:662207e34fba | 2147 | * @param position Starting position (0-23) |
garfieldsg | 0:662207e34fba | 2148 | * @return Byte read from register |
garfieldsg | 0:662207e34fba | 2149 | */ |
garfieldsg | 0:662207e34fba | 2150 | uint8_t MPU6050::getExternalSensorByte(int position) |
garfieldsg | 0:662207e34fba | 2151 | { |
garfieldsg | 0:662207e34fba | 2152 | i2Cdev.readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer); |
garfieldsg | 0:662207e34fba | 2153 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2154 | } |
garfieldsg | 0:662207e34fba | 2155 | /** Read word (2 bytes) from external sensor data registers. |
garfieldsg | 0:662207e34fba | 2156 | * @param position Starting position (0-21) |
garfieldsg | 0:662207e34fba | 2157 | * @return Word read from register |
garfieldsg | 0:662207e34fba | 2158 | * @see getExternalSensorByte() |
garfieldsg | 0:662207e34fba | 2159 | */ |
garfieldsg | 0:662207e34fba | 2160 | uint16_t MPU6050::getExternalSensorWord(int position) |
garfieldsg | 0:662207e34fba | 2161 | { |
garfieldsg | 0:662207e34fba | 2162 | i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer); |
garfieldsg | 0:662207e34fba | 2163 | return (((uint16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2164 | } |
garfieldsg | 0:662207e34fba | 2165 | /** Read double word (4 bytes) from external sensor data registers. |
garfieldsg | 0:662207e34fba | 2166 | * @param position Starting position (0-20) |
garfieldsg | 0:662207e34fba | 2167 | * @return Double word read from registers |
garfieldsg | 0:662207e34fba | 2168 | * @see getExternalSensorByte() |
garfieldsg | 0:662207e34fba | 2169 | */ |
garfieldsg | 0:662207e34fba | 2170 | uint32_t MPU6050::getExternalSensorDWord(int position) |
garfieldsg | 0:662207e34fba | 2171 | { |
garfieldsg | 0:662207e34fba | 2172 | i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer); |
garfieldsg | 0:662207e34fba | 2173 | return (((uint32_t)buffer[0]) << 24) | (((uint32_t)buffer[1]) << 16) | (((uint16_t)buffer[2]) << 8) | buffer[3]; |
garfieldsg | 0:662207e34fba | 2174 | } |
garfieldsg | 0:662207e34fba | 2175 | |
garfieldsg | 0:662207e34fba | 2176 | // MOT_DETECT_STATUS register |
garfieldsg | 0:662207e34fba | 2177 | |
garfieldsg | 0:662207e34fba | 2178 | /** Get X-axis negative motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2179 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2180 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2181 | * @see MPU6050_MOTION_MOT_XNEG_BIT |
garfieldsg | 0:662207e34fba | 2182 | */ |
garfieldsg | 0:662207e34fba | 2183 | bool MPU6050::getXNegMotionDetected() |
garfieldsg | 0:662207e34fba | 2184 | { |
garfieldsg | 0:662207e34fba | 2185 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2186 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2187 | } |
garfieldsg | 0:662207e34fba | 2188 | /** Get X-axis positive motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2189 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2190 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2191 | * @see MPU6050_MOTION_MOT_XPOS_BIT |
garfieldsg | 0:662207e34fba | 2192 | */ |
garfieldsg | 0:662207e34fba | 2193 | bool MPU6050::getXPosMotionDetected() |
garfieldsg | 0:662207e34fba | 2194 | { |
garfieldsg | 0:662207e34fba | 2195 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2196 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2197 | } |
garfieldsg | 0:662207e34fba | 2198 | /** Get Y-axis negative motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2199 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2200 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2201 | * @see MPU6050_MOTION_MOT_YNEG_BIT |
garfieldsg | 0:662207e34fba | 2202 | */ |
garfieldsg | 0:662207e34fba | 2203 | bool MPU6050::getYNegMotionDetected() |
garfieldsg | 0:662207e34fba | 2204 | { |
garfieldsg | 0:662207e34fba | 2205 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2206 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2207 | } |
garfieldsg | 0:662207e34fba | 2208 | /** Get Y-axis positive motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2209 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2210 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2211 | * @see MPU6050_MOTION_MOT_YPOS_BIT |
garfieldsg | 0:662207e34fba | 2212 | */ |
garfieldsg | 0:662207e34fba | 2213 | bool MPU6050::getYPosMotionDetected() |
garfieldsg | 0:662207e34fba | 2214 | { |
garfieldsg | 0:662207e34fba | 2215 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2216 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2217 | } |
garfieldsg | 0:662207e34fba | 2218 | /** Get Z-axis negative motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2219 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2220 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2221 | * @see MPU6050_MOTION_MOT_ZNEG_BIT |
garfieldsg | 0:662207e34fba | 2222 | */ |
garfieldsg | 0:662207e34fba | 2223 | bool MPU6050::getZNegMotionDetected() |
garfieldsg | 0:662207e34fba | 2224 | { |
garfieldsg | 0:662207e34fba | 2225 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2226 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2227 | } |
garfieldsg | 0:662207e34fba | 2228 | /** Get Z-axis positive motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2229 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2230 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2231 | * @see MPU6050_MOTION_MOT_ZPOS_BIT |
garfieldsg | 0:662207e34fba | 2232 | */ |
garfieldsg | 0:662207e34fba | 2233 | bool MPU6050::getZPosMotionDetected() |
garfieldsg | 0:662207e34fba | 2234 | { |
garfieldsg | 0:662207e34fba | 2235 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2236 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2237 | } |
garfieldsg | 0:662207e34fba | 2238 | /** Get zero motion detection interrupt status. |
garfieldsg | 0:662207e34fba | 2239 | * @return Motion detection status |
garfieldsg | 0:662207e34fba | 2240 | * @see MPU6050_RA_MOT_DETECT_STATUS |
garfieldsg | 0:662207e34fba | 2241 | * @see MPU6050_MOTION_MOT_ZRMOT_BIT |
garfieldsg | 0:662207e34fba | 2242 | */ |
garfieldsg | 0:662207e34fba | 2243 | bool MPU6050::getZeroMotionDetected() |
garfieldsg | 0:662207e34fba | 2244 | { |
garfieldsg | 0:662207e34fba | 2245 | i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2246 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2247 | } |
garfieldsg | 0:662207e34fba | 2248 | |
garfieldsg | 0:662207e34fba | 2249 | // I2C_SLV*_DO register |
garfieldsg | 0:662207e34fba | 2250 | |
garfieldsg | 0:662207e34fba | 2251 | /** Write byte to Data Output container for specified slave. |
garfieldsg | 0:662207e34fba | 2252 | * This register holds the output data written into Slave when Slave is set to |
garfieldsg | 0:662207e34fba | 2253 | * write mode. For further information regarding Slave control, please |
garfieldsg | 0:662207e34fba | 2254 | * refer to Registers 37 to 39 and immediately following. |
garfieldsg | 0:662207e34fba | 2255 | * @param num Slave number (0-3) |
garfieldsg | 0:662207e34fba | 2256 | * @param data Byte to write |
garfieldsg | 0:662207e34fba | 2257 | * @see MPU6050_RA_I2C_SLV0_DO |
garfieldsg | 0:662207e34fba | 2258 | */ |
garfieldsg | 0:662207e34fba | 2259 | void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data) |
garfieldsg | 0:662207e34fba | 2260 | { |
garfieldsg | 0:662207e34fba | 2261 | if (num > 3) return; |
garfieldsg | 0:662207e34fba | 2262 | i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data); |
garfieldsg | 0:662207e34fba | 2263 | } |
garfieldsg | 0:662207e34fba | 2264 | |
garfieldsg | 0:662207e34fba | 2265 | // I2C_MST_DELAY_CTRL register |
garfieldsg | 0:662207e34fba | 2266 | |
garfieldsg | 0:662207e34fba | 2267 | /** Get external data shadow delay enabled status. |
garfieldsg | 0:662207e34fba | 2268 | * This register is used to specify the timing of external sensor data |
garfieldsg | 0:662207e34fba | 2269 | * shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external |
garfieldsg | 0:662207e34fba | 2270 | * sensor data is delayed until all data has been received. |
garfieldsg | 0:662207e34fba | 2271 | * @return Current external data shadow delay enabled status. |
garfieldsg | 0:662207e34fba | 2272 | * @see MPU6050_RA_I2C_MST_DELAY_CTRL |
garfieldsg | 0:662207e34fba | 2273 | * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT |
garfieldsg | 0:662207e34fba | 2274 | */ |
garfieldsg | 0:662207e34fba | 2275 | bool MPU6050::getExternalShadowDelayEnabled() |
garfieldsg | 0:662207e34fba | 2276 | { |
garfieldsg | 0:662207e34fba | 2277 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2278 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2279 | } |
garfieldsg | 0:662207e34fba | 2280 | /** Set external data shadow delay enabled status. |
garfieldsg | 0:662207e34fba | 2281 | * @param enabled New external data shadow delay enabled status. |
garfieldsg | 0:662207e34fba | 2282 | * @see getExternalShadowDelayEnabled() |
garfieldsg | 0:662207e34fba | 2283 | * @see MPU6050_RA_I2C_MST_DELAY_CTRL |
garfieldsg | 0:662207e34fba | 2284 | * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT |
garfieldsg | 0:662207e34fba | 2285 | */ |
garfieldsg | 0:662207e34fba | 2286 | void MPU6050::setExternalShadowDelayEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2287 | { |
garfieldsg | 0:662207e34fba | 2288 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2289 | } |
garfieldsg | 0:662207e34fba | 2290 | /** Get slave delay enabled status. |
garfieldsg | 0:662207e34fba | 2291 | * When a particular slave delay is enabled, the rate of access for the that |
garfieldsg | 0:662207e34fba | 2292 | * slave device is reduced. When a slave's access rate is decreased relative to |
garfieldsg | 0:662207e34fba | 2293 | * the Sample Rate, the slave is accessed every: |
garfieldsg | 0:662207e34fba | 2294 | * |
garfieldsg | 0:662207e34fba | 2295 | * 1 / (1 + I2C_MST_DLY) Samples |
garfieldsg | 0:662207e34fba | 2296 | * |
garfieldsg | 0:662207e34fba | 2297 | * This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25) |
garfieldsg | 0:662207e34fba | 2298 | * and DLPF_CFG (register 26). |
garfieldsg | 0:662207e34fba | 2299 | * |
garfieldsg | 0:662207e34fba | 2300 | * For further information regarding I2C_MST_DLY, please refer to register 52. |
garfieldsg | 0:662207e34fba | 2301 | * For further information regarding the Sample Rate, please refer to register 25. |
garfieldsg | 0:662207e34fba | 2302 | * |
garfieldsg | 0:662207e34fba | 2303 | * @param num Slave number (0-4) |
garfieldsg | 0:662207e34fba | 2304 | * @return Current slave delay enabled status. |
garfieldsg | 0:662207e34fba | 2305 | * @see MPU6050_RA_I2C_MST_DELAY_CTRL |
garfieldsg | 0:662207e34fba | 2306 | * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT |
garfieldsg | 0:662207e34fba | 2307 | */ |
garfieldsg | 0:662207e34fba | 2308 | bool MPU6050::getSlaveDelayEnabled(uint8_t num) |
garfieldsg | 0:662207e34fba | 2309 | { |
garfieldsg | 0:662207e34fba | 2310 | // MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc. |
garfieldsg | 0:662207e34fba | 2311 | if (num > 4) return 0; |
garfieldsg | 0:662207e34fba | 2312 | i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer); |
garfieldsg | 0:662207e34fba | 2313 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2314 | } |
garfieldsg | 0:662207e34fba | 2315 | /** Set slave delay enabled status. |
garfieldsg | 0:662207e34fba | 2316 | * @param num Slave number (0-4) |
garfieldsg | 0:662207e34fba | 2317 | * @param enabled New slave delay enabled status. |
garfieldsg | 0:662207e34fba | 2318 | * @see MPU6050_RA_I2C_MST_DELAY_CTRL |
garfieldsg | 0:662207e34fba | 2319 | * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT |
garfieldsg | 0:662207e34fba | 2320 | */ |
garfieldsg | 0:662207e34fba | 2321 | void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled) |
garfieldsg | 0:662207e34fba | 2322 | { |
garfieldsg | 0:662207e34fba | 2323 | i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled); |
garfieldsg | 0:662207e34fba | 2324 | } |
garfieldsg | 0:662207e34fba | 2325 | |
garfieldsg | 0:662207e34fba | 2326 | // SIGNAL_PATH_RESET register |
garfieldsg | 0:662207e34fba | 2327 | |
garfieldsg | 0:662207e34fba | 2328 | /** Reset gyroscope signal path. |
garfieldsg | 0:662207e34fba | 2329 | * The reset will revert the signal path analog to digital converters and |
garfieldsg | 0:662207e34fba | 2330 | * filters to their power up configurations. |
garfieldsg | 0:662207e34fba | 2331 | * @see MPU6050_RA_SIGNAL_PATH_RESET |
garfieldsg | 0:662207e34fba | 2332 | * @see MPU6050_PATHRESET_GYRO_RESET_BIT |
garfieldsg | 0:662207e34fba | 2333 | */ |
garfieldsg | 0:662207e34fba | 2334 | void MPU6050::resetGyroscopePath() |
garfieldsg | 0:662207e34fba | 2335 | { |
garfieldsg | 0:662207e34fba | 2336 | i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2337 | } |
garfieldsg | 0:662207e34fba | 2338 | /** Reset accelerometer signal path. |
garfieldsg | 0:662207e34fba | 2339 | * The reset will revert the signal path analog to digital converters and |
garfieldsg | 0:662207e34fba | 2340 | * filters to their power up configurations. |
garfieldsg | 0:662207e34fba | 2341 | * @see MPU6050_RA_SIGNAL_PATH_RESET |
garfieldsg | 0:662207e34fba | 2342 | * @see MPU6050_PATHRESET_ACCEL_RESET_BIT |
garfieldsg | 0:662207e34fba | 2343 | */ |
garfieldsg | 0:662207e34fba | 2344 | void MPU6050::resetAccelerometerPath() |
garfieldsg | 0:662207e34fba | 2345 | { |
garfieldsg | 0:662207e34fba | 2346 | i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2347 | } |
garfieldsg | 0:662207e34fba | 2348 | /** Reset temperature sensor signal path. |
garfieldsg | 0:662207e34fba | 2349 | * The reset will revert the signal path analog to digital converters and |
garfieldsg | 0:662207e34fba | 2350 | * filters to their power up configurations. |
garfieldsg | 0:662207e34fba | 2351 | * @see MPU6050_RA_SIGNAL_PATH_RESET |
garfieldsg | 0:662207e34fba | 2352 | * @see MPU6050_PATHRESET_TEMP_RESET_BIT |
garfieldsg | 0:662207e34fba | 2353 | */ |
garfieldsg | 0:662207e34fba | 2354 | void MPU6050::resetTemperaturePath() |
garfieldsg | 0:662207e34fba | 2355 | { |
garfieldsg | 0:662207e34fba | 2356 | i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2357 | } |
garfieldsg | 0:662207e34fba | 2358 | |
garfieldsg | 0:662207e34fba | 2359 | // MOT_DETECT_CTRL register |
garfieldsg | 0:662207e34fba | 2360 | |
garfieldsg | 0:662207e34fba | 2361 | /** Get accelerometer power-on delay. |
garfieldsg | 0:662207e34fba | 2362 | * The accelerometer data path provides samples to the sensor registers, Motion |
garfieldsg | 0:662207e34fba | 2363 | * detection, Zero Motion detection, and Free Fall detection modules. The |
garfieldsg | 0:662207e34fba | 2364 | * signal path contains filters which must be flushed on wake-up with new |
garfieldsg | 0:662207e34fba | 2365 | * samples before the detection modules begin operations. The default wake-up |
garfieldsg | 0:662207e34fba | 2366 | * delay, of 4ms can be lengthened by up to 3ms. This additional delay is |
garfieldsg | 0:662207e34fba | 2367 | * specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select |
garfieldsg | 0:662207e34fba | 2368 | * any value above zero unless instructed otherwise by InvenSense. Please refer |
garfieldsg | 0:662207e34fba | 2369 | * to Section 8 of the MPU-6000/MPU-6050 Product Specification document for |
garfieldsg | 0:662207e34fba | 2370 | * further information regarding the detection modules. |
garfieldsg | 0:662207e34fba | 2371 | * @return Current accelerometer power-on delay |
garfieldsg | 0:662207e34fba | 2372 | * @see MPU6050_RA_MOT_DETECT_CTRL |
garfieldsg | 0:662207e34fba | 2373 | * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT |
garfieldsg | 0:662207e34fba | 2374 | */ |
garfieldsg | 0:662207e34fba | 2375 | uint8_t MPU6050::getAccelerometerPowerOnDelay() |
garfieldsg | 0:662207e34fba | 2376 | { |
garfieldsg | 0:662207e34fba | 2377 | i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2378 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2379 | } |
garfieldsg | 0:662207e34fba | 2380 | /** Set accelerometer power-on delay. |
garfieldsg | 0:662207e34fba | 2381 | * @param delay New accelerometer power-on delay (0-3) |
garfieldsg | 0:662207e34fba | 2382 | * @see getAccelerometerPowerOnDelay() |
garfieldsg | 0:662207e34fba | 2383 | * @see MPU6050_RA_MOT_DETECT_CTRL |
garfieldsg | 0:662207e34fba | 2384 | * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT |
garfieldsg | 0:662207e34fba | 2385 | */ |
garfieldsg | 0:662207e34fba | 2386 | void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay) |
garfieldsg | 0:662207e34fba | 2387 | { |
garfieldsg | 0:662207e34fba | 2388 | i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay); |
garfieldsg | 0:662207e34fba | 2389 | } |
garfieldsg | 0:662207e34fba | 2390 | /** Get Free Fall detection counter decrement configuration. |
garfieldsg | 0:662207e34fba | 2391 | * Detection is registered by the Free Fall detection module after accelerometer |
garfieldsg | 0:662207e34fba | 2392 | * measurements meet their respective threshold conditions over a specified |
garfieldsg | 0:662207e34fba | 2393 | * number of samples. When the threshold conditions are met, the corresponding |
garfieldsg | 0:662207e34fba | 2394 | * detection counter increments by 1. The user may control the rate at which the |
garfieldsg | 0:662207e34fba | 2395 | * detection counter decrements when the threshold condition is not met by |
garfieldsg | 0:662207e34fba | 2396 | * configuring FF_COUNT. The decrement rate can be set according to the |
garfieldsg | 0:662207e34fba | 2397 | * following table: |
garfieldsg | 0:662207e34fba | 2398 | * |
garfieldsg | 0:662207e34fba | 2399 | * <pre> |
garfieldsg | 0:662207e34fba | 2400 | * FF_COUNT | Counter Decrement |
garfieldsg | 0:662207e34fba | 2401 | * ---------+------------------ |
garfieldsg | 0:662207e34fba | 2402 | * 0 | Reset |
garfieldsg | 0:662207e34fba | 2403 | * 1 | 1 |
garfieldsg | 0:662207e34fba | 2404 | * 2 | 2 |
garfieldsg | 0:662207e34fba | 2405 | * 3 | 4 |
garfieldsg | 0:662207e34fba | 2406 | * </pre> |
garfieldsg | 0:662207e34fba | 2407 | * |
garfieldsg | 0:662207e34fba | 2408 | * When FF_COUNT is configured to 0 (reset), any non-qualifying sample will |
garfieldsg | 0:662207e34fba | 2409 | * reset the counter to 0. For further information on Free Fall detection, |
garfieldsg | 0:662207e34fba | 2410 | * please refer to Registers 29 to 32. |
garfieldsg | 0:662207e34fba | 2411 | * |
garfieldsg | 0:662207e34fba | 2412 | * @return Current decrement configuration |
garfieldsg | 0:662207e34fba | 2413 | * @see MPU6050_RA_MOT_DETECT_CTRL |
garfieldsg | 0:662207e34fba | 2414 | * @see MPU6050_DETECT_FF_COUNT_BIT |
garfieldsg | 0:662207e34fba | 2415 | */ |
garfieldsg | 0:662207e34fba | 2416 | uint8_t MPU6050::getFreefallDetectionCounterDecrement() |
garfieldsg | 0:662207e34fba | 2417 | { |
garfieldsg | 0:662207e34fba | 2418 | i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2419 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2420 | } |
garfieldsg | 0:662207e34fba | 2421 | /** Set Free Fall detection counter decrement configuration. |
garfieldsg | 0:662207e34fba | 2422 | * @param decrement New decrement configuration value |
garfieldsg | 0:662207e34fba | 2423 | * @see getFreefallDetectionCounterDecrement() |
garfieldsg | 0:662207e34fba | 2424 | * @see MPU6050_RA_MOT_DETECT_CTRL |
garfieldsg | 0:662207e34fba | 2425 | * @see MPU6050_DETECT_FF_COUNT_BIT |
garfieldsg | 0:662207e34fba | 2426 | */ |
garfieldsg | 0:662207e34fba | 2427 | void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement) |
garfieldsg | 0:662207e34fba | 2428 | { |
garfieldsg | 0:662207e34fba | 2429 | i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement); |
garfieldsg | 0:662207e34fba | 2430 | } |
garfieldsg | 0:662207e34fba | 2431 | /** Get Motion detection counter decrement configuration. |
garfieldsg | 0:662207e34fba | 2432 | * Detection is registered by the Motion detection module after accelerometer |
garfieldsg | 0:662207e34fba | 2433 | * measurements meet their respective threshold conditions over a specified |
garfieldsg | 0:662207e34fba | 2434 | * number of samples. When the threshold conditions are met, the corresponding |
garfieldsg | 0:662207e34fba | 2435 | * detection counter increments by 1. The user may control the rate at which the |
garfieldsg | 0:662207e34fba | 2436 | * detection counter decrements when the threshold condition is not met by |
garfieldsg | 0:662207e34fba | 2437 | * configuring MOT_COUNT. The decrement rate can be set according to the |
garfieldsg | 0:662207e34fba | 2438 | * following table: |
garfieldsg | 0:662207e34fba | 2439 | * |
garfieldsg | 0:662207e34fba | 2440 | * <pre> |
garfieldsg | 0:662207e34fba | 2441 | * MOT_COUNT | Counter Decrement |
garfieldsg | 0:662207e34fba | 2442 | * ----------+------------------ |
garfieldsg | 0:662207e34fba | 2443 | * 0 | Reset |
garfieldsg | 0:662207e34fba | 2444 | * 1 | 1 |
garfieldsg | 0:662207e34fba | 2445 | * 2 | 2 |
garfieldsg | 0:662207e34fba | 2446 | * 3 | 4 |
garfieldsg | 0:662207e34fba | 2447 | * </pre> |
garfieldsg | 0:662207e34fba | 2448 | * |
garfieldsg | 0:662207e34fba | 2449 | * When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will |
garfieldsg | 0:662207e34fba | 2450 | * reset the counter to 0. For further information on Motion detection, |
garfieldsg | 0:662207e34fba | 2451 | * please refer to Registers 29 to 32. |
garfieldsg | 0:662207e34fba | 2452 | * |
garfieldsg | 0:662207e34fba | 2453 | */ |
garfieldsg | 0:662207e34fba | 2454 | uint8_t MPU6050::getMotionDetectionCounterDecrement() |
garfieldsg | 0:662207e34fba | 2455 | { |
garfieldsg | 0:662207e34fba | 2456 | i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2457 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2458 | } |
garfieldsg | 0:662207e34fba | 2459 | /** Set Motion detection counter decrement configuration. |
garfieldsg | 0:662207e34fba | 2460 | * @param decrement New decrement configuration value |
garfieldsg | 0:662207e34fba | 2461 | * @see getMotionDetectionCounterDecrement() |
garfieldsg | 0:662207e34fba | 2462 | * @see MPU6050_RA_MOT_DETECT_CTRL |
garfieldsg | 0:662207e34fba | 2463 | * @see MPU6050_DETECT_MOT_COUNT_BIT |
garfieldsg | 0:662207e34fba | 2464 | */ |
garfieldsg | 0:662207e34fba | 2465 | void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement) |
garfieldsg | 0:662207e34fba | 2466 | { |
garfieldsg | 0:662207e34fba | 2467 | i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement); |
garfieldsg | 0:662207e34fba | 2468 | } |
garfieldsg | 0:662207e34fba | 2469 | |
garfieldsg | 0:662207e34fba | 2470 | // USER_CTRL register |
garfieldsg | 0:662207e34fba | 2471 | |
garfieldsg | 0:662207e34fba | 2472 | /** Get FIFO enabled status. |
garfieldsg | 0:662207e34fba | 2473 | * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer |
garfieldsg | 0:662207e34fba | 2474 | * cannot be written to or read from while disabled. The FIFO buffer's state |
garfieldsg | 0:662207e34fba | 2475 | * does not change unless the MPU-60X0 is power cycled. |
garfieldsg | 0:662207e34fba | 2476 | * @return Current FIFO enabled status |
garfieldsg | 0:662207e34fba | 2477 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2478 | * @see MPU6050_USERCTRL_FIFO_EN_BIT |
garfieldsg | 0:662207e34fba | 2479 | */ |
garfieldsg | 0:662207e34fba | 2480 | bool MPU6050::getFIFOEnabled() |
garfieldsg | 0:662207e34fba | 2481 | { |
garfieldsg | 0:662207e34fba | 2482 | i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2483 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2484 | } |
garfieldsg | 0:662207e34fba | 2485 | /** Set FIFO enabled status. |
garfieldsg | 0:662207e34fba | 2486 | * @param enabled New FIFO enabled status |
garfieldsg | 0:662207e34fba | 2487 | * @see getFIFOEnabled() |
garfieldsg | 0:662207e34fba | 2488 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2489 | * @see MPU6050_USERCTRL_FIFO_EN_BIT |
garfieldsg | 0:662207e34fba | 2490 | */ |
garfieldsg | 0:662207e34fba | 2491 | void MPU6050::setFIFOEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2492 | { |
garfieldsg | 0:662207e34fba | 2493 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2494 | } |
garfieldsg | 0:662207e34fba | 2495 | /** Get I2C Master Mode enabled status. |
garfieldsg | 0:662207e34fba | 2496 | * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the |
garfieldsg | 0:662207e34fba | 2497 | * external sensor slave devices on the auxiliary I2C bus. When this bit is |
garfieldsg | 0:662207e34fba | 2498 | * cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically |
garfieldsg | 0:662207e34fba | 2499 | * driven by the primary I2C bus (SDA and SCL). This is a precondition to |
garfieldsg | 0:662207e34fba | 2500 | * enabling Bypass Mode. For further information regarding Bypass Mode, please |
garfieldsg | 0:662207e34fba | 2501 | * refer to Register 55. |
garfieldsg | 0:662207e34fba | 2502 | * @return Current I2C Master Mode enabled status |
garfieldsg | 0:662207e34fba | 2503 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2504 | * @see MPU6050_USERCTRL_I2C_MST_EN_BIT |
garfieldsg | 0:662207e34fba | 2505 | */ |
garfieldsg | 0:662207e34fba | 2506 | bool MPU6050::getI2CMasterModeEnabled() |
garfieldsg | 0:662207e34fba | 2507 | { |
garfieldsg | 0:662207e34fba | 2508 | i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2509 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2510 | } |
garfieldsg | 0:662207e34fba | 2511 | /** Set I2C Master Mode enabled status. |
garfieldsg | 0:662207e34fba | 2512 | * @param enabled New I2C Master Mode enabled status |
garfieldsg | 0:662207e34fba | 2513 | * @see getI2CMasterModeEnabled() |
garfieldsg | 0:662207e34fba | 2514 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2515 | * @see MPU6050_USERCTRL_I2C_MST_EN_BIT |
garfieldsg | 0:662207e34fba | 2516 | */ |
garfieldsg | 0:662207e34fba | 2517 | void MPU6050::setI2CMasterModeEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2518 | { |
garfieldsg | 0:662207e34fba | 2519 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2520 | } |
garfieldsg | 0:662207e34fba | 2521 | /** Switch from I2C to SPI mode (MPU-6000 only) |
garfieldsg | 0:662207e34fba | 2522 | * If this is set, the primary SPI interface will be enabled in place of the |
garfieldsg | 0:662207e34fba | 2523 | * disabled primary I2C interface. |
garfieldsg | 0:662207e34fba | 2524 | */ |
garfieldsg | 0:662207e34fba | 2525 | void MPU6050::switchSPIEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2526 | { |
garfieldsg | 0:662207e34fba | 2527 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2528 | } |
garfieldsg | 0:662207e34fba | 2529 | /** Reset the FIFO. |
garfieldsg | 0:662207e34fba | 2530 | * This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This |
garfieldsg | 0:662207e34fba | 2531 | * bit automatically clears to 0 after the reset has been triggered. |
garfieldsg | 0:662207e34fba | 2532 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2533 | * @see MPU6050_USERCTRL_FIFO_RESET_BIT |
garfieldsg | 0:662207e34fba | 2534 | */ |
garfieldsg | 0:662207e34fba | 2535 | void MPU6050::resetFIFO() |
garfieldsg | 0:662207e34fba | 2536 | { |
garfieldsg | 0:662207e34fba | 2537 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2538 | } |
garfieldsg | 0:662207e34fba | 2539 | /** Reset the I2C Master. |
garfieldsg | 0:662207e34fba | 2540 | * This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0. |
garfieldsg | 0:662207e34fba | 2541 | * This bit automatically clears to 0 after the reset has been triggered. |
garfieldsg | 0:662207e34fba | 2542 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2543 | * @see MPU6050_USERCTRL_I2C_MST_RESET_BIT |
garfieldsg | 0:662207e34fba | 2544 | */ |
garfieldsg | 0:662207e34fba | 2545 | void MPU6050::resetI2CMaster() |
garfieldsg | 0:662207e34fba | 2546 | { |
garfieldsg | 0:662207e34fba | 2547 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2548 | } |
garfieldsg | 0:662207e34fba | 2549 | /** Reset all sensor registers and signal paths. |
garfieldsg | 0:662207e34fba | 2550 | * When set to 1, this bit resets the signal paths for all sensors (gyroscopes, |
garfieldsg | 0:662207e34fba | 2551 | * accelerometers, and temperature sensor). This operation will also clear the |
garfieldsg | 0:662207e34fba | 2552 | * sensor registers. This bit automatically clears to 0 after the reset has been |
garfieldsg | 0:662207e34fba | 2553 | * triggered. |
garfieldsg | 0:662207e34fba | 2554 | * |
garfieldsg | 0:662207e34fba | 2555 | * When resetting only the signal path (and not the sensor registers), please |
garfieldsg | 0:662207e34fba | 2556 | * use Register 104, SIGNAL_PATH_RESET. |
garfieldsg | 0:662207e34fba | 2557 | * |
garfieldsg | 0:662207e34fba | 2558 | * @see MPU6050_RA_USER_CTRL |
garfieldsg | 0:662207e34fba | 2559 | * @see MPU6050_USERCTRL_SIG_COND_RESET_BIT |
garfieldsg | 0:662207e34fba | 2560 | */ |
garfieldsg | 0:662207e34fba | 2561 | void MPU6050::resetSensors() |
garfieldsg | 0:662207e34fba | 2562 | { |
garfieldsg | 0:662207e34fba | 2563 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2564 | } |
garfieldsg | 0:662207e34fba | 2565 | |
garfieldsg | 0:662207e34fba | 2566 | // PWR_MGMT_1 register |
garfieldsg | 0:662207e34fba | 2567 | |
garfieldsg | 0:662207e34fba | 2568 | /** Trigger a full device reset. |
garfieldsg | 0:662207e34fba | 2569 | * A small delay of ~50ms may be desirable after triggering a reset. |
garfieldsg | 0:662207e34fba | 2570 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2571 | * @see MPU6050_PWR1_DEVICE_RESET_BIT |
garfieldsg | 0:662207e34fba | 2572 | */ |
garfieldsg | 0:662207e34fba | 2573 | void MPU6050::reset() |
garfieldsg | 0:662207e34fba | 2574 | { |
garfieldsg | 0:662207e34fba | 2575 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 2576 | } |
garfieldsg | 0:662207e34fba | 2577 | /** Get sleep mode status. |
garfieldsg | 0:662207e34fba | 2578 | * Setting the SLEEP bit in the register puts the device into very low power |
garfieldsg | 0:662207e34fba | 2579 | * sleep mode. In this mode, only the serial interface and internal registers |
garfieldsg | 0:662207e34fba | 2580 | * remain active, allowing for a very low standby current. Clearing this bit |
garfieldsg | 0:662207e34fba | 2581 | * puts the device back into normal mode. To save power, the individual standby |
garfieldsg | 0:662207e34fba | 2582 | * selections for each of the gyros should be used if any gyro axis is not used |
garfieldsg | 0:662207e34fba | 2583 | * by the application. |
garfieldsg | 0:662207e34fba | 2584 | * @return Current sleep mode enabled status |
garfieldsg | 0:662207e34fba | 2585 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2586 | * @see MPU6050_PWR1_SLEEP_BIT |
garfieldsg | 0:662207e34fba | 2587 | */ |
garfieldsg | 0:662207e34fba | 2588 | bool MPU6050::getSleepEnabled() |
garfieldsg | 0:662207e34fba | 2589 | { |
garfieldsg | 0:662207e34fba | 2590 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2591 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2592 | } |
garfieldsg | 0:662207e34fba | 2593 | /** Set sleep mode status. |
garfieldsg | 0:662207e34fba | 2594 | * @param enabled New sleep mode enabled status |
garfieldsg | 0:662207e34fba | 2595 | * @see getSleepEnabled() |
garfieldsg | 0:662207e34fba | 2596 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2597 | * @see MPU6050_PWR1_SLEEP_BIT |
garfieldsg | 0:662207e34fba | 2598 | */ |
garfieldsg | 0:662207e34fba | 2599 | void MPU6050::setSleepEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2600 | { |
garfieldsg | 0:662207e34fba | 2601 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2602 | } |
garfieldsg | 0:662207e34fba | 2603 | /** Get wake cycle enabled status. |
garfieldsg | 0:662207e34fba | 2604 | * When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle |
garfieldsg | 0:662207e34fba | 2605 | * between sleep mode and waking up to take a single sample of data from active |
garfieldsg | 0:662207e34fba | 2606 | * sensors at a rate determined by LP_WAKE_CTRL (register 108). |
garfieldsg | 0:662207e34fba | 2607 | * @return Current sleep mode enabled status |
garfieldsg | 0:662207e34fba | 2608 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2609 | * @see MPU6050_PWR1_CYCLE_BIT |
garfieldsg | 0:662207e34fba | 2610 | */ |
garfieldsg | 0:662207e34fba | 2611 | bool MPU6050::getWakeCycleEnabled() |
garfieldsg | 0:662207e34fba | 2612 | { |
garfieldsg | 0:662207e34fba | 2613 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2614 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2615 | } |
garfieldsg | 0:662207e34fba | 2616 | /** Set wake cycle enabled status. |
garfieldsg | 0:662207e34fba | 2617 | * @param enabled New sleep mode enabled status |
garfieldsg | 0:662207e34fba | 2618 | * @see getWakeCycleEnabled() |
garfieldsg | 0:662207e34fba | 2619 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2620 | * @see MPU6050_PWR1_CYCLE_BIT |
garfieldsg | 0:662207e34fba | 2621 | */ |
garfieldsg | 0:662207e34fba | 2622 | void MPU6050::setWakeCycleEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2623 | { |
garfieldsg | 0:662207e34fba | 2624 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2625 | } |
garfieldsg | 0:662207e34fba | 2626 | /** Get temperature sensor enabled status. |
garfieldsg | 0:662207e34fba | 2627 | * Control the usage of the internal temperature sensor. |
garfieldsg | 0:662207e34fba | 2628 | * |
garfieldsg | 0:662207e34fba | 2629 | * Note: this register stores the *disabled* value, but for consistency with the |
garfieldsg | 0:662207e34fba | 2630 | * rest of the code, the function is named and used with standard true/false |
garfieldsg | 0:662207e34fba | 2631 | * values to indicate whether the sensor is enabled or disabled, respectively. |
garfieldsg | 0:662207e34fba | 2632 | * |
garfieldsg | 0:662207e34fba | 2633 | * @return Current temperature sensor enabled status |
garfieldsg | 0:662207e34fba | 2634 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2635 | * @see MPU6050_PWR1_TEMP_DIS_BIT |
garfieldsg | 0:662207e34fba | 2636 | */ |
garfieldsg | 0:662207e34fba | 2637 | bool MPU6050::getTempSensorEnabled() |
garfieldsg | 0:662207e34fba | 2638 | { |
garfieldsg | 0:662207e34fba | 2639 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2640 | return buffer[0] == 0; // 1 is actually disabled here |
garfieldsg | 0:662207e34fba | 2641 | } |
garfieldsg | 0:662207e34fba | 2642 | /** Set temperature sensor enabled status. |
garfieldsg | 0:662207e34fba | 2643 | * Note: this register stores the *disabled* value, but for consistency with the |
garfieldsg | 0:662207e34fba | 2644 | * rest of the code, the function is named and used with standard true/false |
garfieldsg | 0:662207e34fba | 2645 | * values to indicate whether the sensor is enabled or disabled, respectively. |
garfieldsg | 0:662207e34fba | 2646 | * |
garfieldsg | 0:662207e34fba | 2647 | * @param enabled New temperature sensor enabled status |
garfieldsg | 0:662207e34fba | 2648 | * @see getTempSensorEnabled() |
garfieldsg | 0:662207e34fba | 2649 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2650 | * @see MPU6050_PWR1_TEMP_DIS_BIT |
garfieldsg | 0:662207e34fba | 2651 | */ |
garfieldsg | 0:662207e34fba | 2652 | void MPU6050::setTempSensorEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2653 | { |
garfieldsg | 0:662207e34fba | 2654 | // 1 is actually disabled here |
garfieldsg | 0:662207e34fba | 2655 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled); |
garfieldsg | 0:662207e34fba | 2656 | } |
garfieldsg | 0:662207e34fba | 2657 | /** Get clock source setting. |
garfieldsg | 0:662207e34fba | 2658 | * @return Current clock source setting |
garfieldsg | 0:662207e34fba | 2659 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2660 | * @see MPU6050_PWR1_CLKSEL_BIT |
garfieldsg | 0:662207e34fba | 2661 | * @see MPU6050_PWR1_CLKSEL_LENGTH |
garfieldsg | 0:662207e34fba | 2662 | */ |
garfieldsg | 0:662207e34fba | 2663 | uint8_t MPU6050::getClockSource() |
garfieldsg | 0:662207e34fba | 2664 | { |
garfieldsg | 0:662207e34fba | 2665 | i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2666 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2667 | } |
garfieldsg | 0:662207e34fba | 2668 | /** Set clock source setting. |
garfieldsg | 0:662207e34fba | 2669 | * An internal 8MHz oscillator, gyroscope based clock, or external sources can |
garfieldsg | 0:662207e34fba | 2670 | * be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator |
garfieldsg | 0:662207e34fba | 2671 | * or an external source is chosen as the clock source, the MPU-60X0 can operate |
garfieldsg | 0:662207e34fba | 2672 | * in low power modes with the gyroscopes disabled. |
garfieldsg | 0:662207e34fba | 2673 | * |
garfieldsg | 0:662207e34fba | 2674 | * Upon power up, the MPU-60X0 clock source defaults to the internal oscillator. |
garfieldsg | 0:662207e34fba | 2675 | * However, it is highly recommended that the device be configured to use one of |
garfieldsg | 0:662207e34fba | 2676 | * the gyroscopes (or an external clock source) as the clock reference for |
garfieldsg | 0:662207e34fba | 2677 | * improved stability. The clock source can be selected according to the following table: |
garfieldsg | 0:662207e34fba | 2678 | * |
garfieldsg | 0:662207e34fba | 2679 | * <pre> |
garfieldsg | 0:662207e34fba | 2680 | * CLK_SEL | Clock Source |
garfieldsg | 0:662207e34fba | 2681 | * --------+-------------------------------------- |
garfieldsg | 0:662207e34fba | 2682 | * 0 | Internal oscillator |
garfieldsg | 0:662207e34fba | 2683 | * 1 | PLL with X Gyro reference |
garfieldsg | 0:662207e34fba | 2684 | * 2 | PLL with Y Gyro reference |
garfieldsg | 0:662207e34fba | 2685 | * 3 | PLL with Z Gyro reference |
garfieldsg | 0:662207e34fba | 2686 | * 4 | PLL with external 32.768kHz reference |
garfieldsg | 0:662207e34fba | 2687 | * 5 | PLL with external 19.2MHz reference |
garfieldsg | 0:662207e34fba | 2688 | * 6 | Reserved |
garfieldsg | 0:662207e34fba | 2689 | * 7 | Stops the clock and keeps the timing generator in reset |
garfieldsg | 0:662207e34fba | 2690 | * </pre> |
garfieldsg | 0:662207e34fba | 2691 | * |
garfieldsg | 0:662207e34fba | 2692 | * @param source New clock source setting |
garfieldsg | 0:662207e34fba | 2693 | * @see getClockSource() |
garfieldsg | 0:662207e34fba | 2694 | * @see MPU6050_RA_PWR_MGMT_1 |
garfieldsg | 0:662207e34fba | 2695 | * @see MPU6050_PWR1_CLKSEL_BIT |
garfieldsg | 0:662207e34fba | 2696 | * @see MPU6050_PWR1_CLKSEL_LENGTH |
garfieldsg | 0:662207e34fba | 2697 | */ |
garfieldsg | 0:662207e34fba | 2698 | void MPU6050::setClockSource(uint8_t source) |
garfieldsg | 0:662207e34fba | 2699 | { |
garfieldsg | 0:662207e34fba | 2700 | i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source); |
garfieldsg | 0:662207e34fba | 2701 | } |
garfieldsg | 0:662207e34fba | 2702 | |
garfieldsg | 0:662207e34fba | 2703 | // PWR_MGMT_2 register |
garfieldsg | 0:662207e34fba | 2704 | |
garfieldsg | 0:662207e34fba | 2705 | /** Get wake frequency in Accel-Only Low Power Mode. |
garfieldsg | 0:662207e34fba | 2706 | * The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting |
garfieldsg | 0:662207e34fba | 2707 | * PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode, |
garfieldsg | 0:662207e34fba | 2708 | * the device will power off all devices except for the primary I2C interface, |
garfieldsg | 0:662207e34fba | 2709 | * waking only the accelerometer at fixed intervals to take a single |
garfieldsg | 0:662207e34fba | 2710 | * measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL |
garfieldsg | 0:662207e34fba | 2711 | * as shown below: |
garfieldsg | 0:662207e34fba | 2712 | * |
garfieldsg | 0:662207e34fba | 2713 | * <pre> |
garfieldsg | 0:662207e34fba | 2714 | * LP_WAKE_CTRL | Wake-up Frequency |
garfieldsg | 0:662207e34fba | 2715 | * -------------+------------------ |
garfieldsg | 0:662207e34fba | 2716 | * 0 | 1.25 Hz |
garfieldsg | 0:662207e34fba | 2717 | * 1 | 2.5 Hz |
garfieldsg | 0:662207e34fba | 2718 | * 2 | 5 Hz |
garfieldsg | 0:662207e34fba | 2719 | * 3 | 10 Hz |
garfieldsg | 0:662207e34fba | 2720 | * <pre> |
garfieldsg | 0:662207e34fba | 2721 | * |
garfieldsg | 0:662207e34fba | 2722 | * For further information regarding the MPU-60X0's power modes, please refer to |
garfieldsg | 0:662207e34fba | 2723 | * Register 107. |
garfieldsg | 0:662207e34fba | 2724 | * |
garfieldsg | 0:662207e34fba | 2725 | * @return Current wake frequency |
garfieldsg | 0:662207e34fba | 2726 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2727 | */ |
garfieldsg | 0:662207e34fba | 2728 | uint8_t MPU6050::getWakeFrequency() |
garfieldsg | 0:662207e34fba | 2729 | { |
garfieldsg | 0:662207e34fba | 2730 | i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2731 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2732 | } |
garfieldsg | 0:662207e34fba | 2733 | /** Set wake frequency in Accel-Only Low Power Mode. |
garfieldsg | 0:662207e34fba | 2734 | * @param frequency New wake frequency |
garfieldsg | 0:662207e34fba | 2735 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2736 | */ |
garfieldsg | 0:662207e34fba | 2737 | void MPU6050::setWakeFrequency(uint8_t frequency) |
garfieldsg | 0:662207e34fba | 2738 | { |
garfieldsg | 0:662207e34fba | 2739 | i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency); |
garfieldsg | 0:662207e34fba | 2740 | } |
garfieldsg | 0:662207e34fba | 2741 | |
garfieldsg | 0:662207e34fba | 2742 | /** Get X-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2743 | * If enabled, the X-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2744 | * @return Current X-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2745 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2746 | * @see MPU6050_PWR2_STBY_XA_BIT |
garfieldsg | 0:662207e34fba | 2747 | */ |
garfieldsg | 0:662207e34fba | 2748 | bool MPU6050::getStandbyXAccelEnabled() |
garfieldsg | 0:662207e34fba | 2749 | { |
garfieldsg | 0:662207e34fba | 2750 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2751 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2752 | } |
garfieldsg | 0:662207e34fba | 2753 | /** Set X-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2754 | * @param New X-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2755 | * @see getStandbyXAccelEnabled() |
garfieldsg | 0:662207e34fba | 2756 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2757 | * @see MPU6050_PWR2_STBY_XA_BIT |
garfieldsg | 0:662207e34fba | 2758 | */ |
garfieldsg | 0:662207e34fba | 2759 | void MPU6050::setStandbyXAccelEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2760 | { |
garfieldsg | 0:662207e34fba | 2761 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2762 | } |
garfieldsg | 0:662207e34fba | 2763 | /** Get Y-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2764 | * If enabled, the Y-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2765 | * @return Current Y-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2766 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2767 | * @see MPU6050_PWR2_STBY_YA_BIT |
garfieldsg | 0:662207e34fba | 2768 | */ |
garfieldsg | 0:662207e34fba | 2769 | bool MPU6050::getStandbyYAccelEnabled() |
garfieldsg | 0:662207e34fba | 2770 | { |
garfieldsg | 0:662207e34fba | 2771 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2772 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2773 | } |
garfieldsg | 0:662207e34fba | 2774 | /** Set Y-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2775 | * @param New Y-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2776 | * @see getStandbyYAccelEnabled() |
garfieldsg | 0:662207e34fba | 2777 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2778 | * @see MPU6050_PWR2_STBY_YA_BIT |
garfieldsg | 0:662207e34fba | 2779 | */ |
garfieldsg | 0:662207e34fba | 2780 | void MPU6050::setStandbyYAccelEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2781 | { |
garfieldsg | 0:662207e34fba | 2782 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2783 | } |
garfieldsg | 0:662207e34fba | 2784 | /** Get Z-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2785 | * If enabled, the Z-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2786 | * @return Current Z-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2787 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2788 | * @see MPU6050_PWR2_STBY_ZA_BIT |
garfieldsg | 0:662207e34fba | 2789 | */ |
garfieldsg | 0:662207e34fba | 2790 | bool MPU6050::getStandbyZAccelEnabled() |
garfieldsg | 0:662207e34fba | 2791 | { |
garfieldsg | 0:662207e34fba | 2792 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2793 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2794 | } |
garfieldsg | 0:662207e34fba | 2795 | /** Set Z-axis accelerometer standby enabled status. |
garfieldsg | 0:662207e34fba | 2796 | * @param New Z-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2797 | * @see getStandbyZAccelEnabled() |
garfieldsg | 0:662207e34fba | 2798 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2799 | * @see MPU6050_PWR2_STBY_ZA_BIT |
garfieldsg | 0:662207e34fba | 2800 | */ |
garfieldsg | 0:662207e34fba | 2801 | void MPU6050::setStandbyZAccelEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2802 | { |
garfieldsg | 0:662207e34fba | 2803 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2804 | } |
garfieldsg | 0:662207e34fba | 2805 | /** Get X-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2806 | * If enabled, the X-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2807 | * @return Current X-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2808 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2809 | * @see MPU6050_PWR2_STBY_XG_BIT |
garfieldsg | 0:662207e34fba | 2810 | */ |
garfieldsg | 0:662207e34fba | 2811 | bool MPU6050::getStandbyXGyroEnabled() |
garfieldsg | 0:662207e34fba | 2812 | { |
garfieldsg | 0:662207e34fba | 2813 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2814 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2815 | } |
garfieldsg | 0:662207e34fba | 2816 | /** Set X-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2817 | * @param New X-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2818 | * @see getStandbyXGyroEnabled() |
garfieldsg | 0:662207e34fba | 2819 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2820 | * @see MPU6050_PWR2_STBY_XG_BIT |
garfieldsg | 0:662207e34fba | 2821 | */ |
garfieldsg | 0:662207e34fba | 2822 | void MPU6050::setStandbyXGyroEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2823 | { |
garfieldsg | 0:662207e34fba | 2824 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2825 | } |
garfieldsg | 0:662207e34fba | 2826 | /** Get Y-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2827 | * If enabled, the Y-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2828 | * @return Current Y-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2829 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2830 | * @see MPU6050_PWR2_STBY_YG_BIT |
garfieldsg | 0:662207e34fba | 2831 | */ |
garfieldsg | 0:662207e34fba | 2832 | bool MPU6050::getStandbyYGyroEnabled() |
garfieldsg | 0:662207e34fba | 2833 | { |
garfieldsg | 0:662207e34fba | 2834 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2835 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2836 | } |
garfieldsg | 0:662207e34fba | 2837 | /** Set Y-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2838 | * @param New Y-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2839 | * @see getStandbyYGyroEnabled() |
garfieldsg | 0:662207e34fba | 2840 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2841 | * @see MPU6050_PWR2_STBY_YG_BIT |
garfieldsg | 0:662207e34fba | 2842 | */ |
garfieldsg | 0:662207e34fba | 2843 | void MPU6050::setStandbyYGyroEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2844 | { |
garfieldsg | 0:662207e34fba | 2845 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2846 | } |
garfieldsg | 0:662207e34fba | 2847 | /** Get Z-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2848 | * If enabled, the Z-axis will not gather or report data (or use power). |
garfieldsg | 0:662207e34fba | 2849 | * @return Current Z-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2850 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2851 | * @see MPU6050_PWR2_STBY_ZG_BIT |
garfieldsg | 0:662207e34fba | 2852 | */ |
garfieldsg | 0:662207e34fba | 2853 | bool MPU6050::getStandbyZGyroEnabled() |
garfieldsg | 0:662207e34fba | 2854 | { |
garfieldsg | 0:662207e34fba | 2855 | i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2856 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2857 | } |
garfieldsg | 0:662207e34fba | 2858 | /** Set Z-axis gyroscope standby enabled status. |
garfieldsg | 0:662207e34fba | 2859 | * @param New Z-axis standby enabled status |
garfieldsg | 0:662207e34fba | 2860 | * @see getStandbyZGyroEnabled() |
garfieldsg | 0:662207e34fba | 2861 | * @see MPU6050_RA_PWR_MGMT_2 |
garfieldsg | 0:662207e34fba | 2862 | * @see MPU6050_PWR2_STBY_ZG_BIT |
garfieldsg | 0:662207e34fba | 2863 | */ |
garfieldsg | 0:662207e34fba | 2864 | void MPU6050::setStandbyZGyroEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 2865 | { |
garfieldsg | 0:662207e34fba | 2866 | i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2867 | } |
garfieldsg | 0:662207e34fba | 2868 | |
garfieldsg | 0:662207e34fba | 2869 | // FIFO_COUNT* registers |
garfieldsg | 0:662207e34fba | 2870 | |
garfieldsg | 0:662207e34fba | 2871 | /** Get current FIFO buffer size. |
garfieldsg | 0:662207e34fba | 2872 | * This value indicates the number of bytes stored in the FIFO buffer. This |
garfieldsg | 0:662207e34fba | 2873 | * number is in turn the number of bytes that can be read from the FIFO buffer |
garfieldsg | 0:662207e34fba | 2874 | * and it is directly proportional to the number of samples available given the |
garfieldsg | 0:662207e34fba | 2875 | * set of sensor data bound to be stored in the FIFO (register 35 and 36). |
garfieldsg | 0:662207e34fba | 2876 | * @return Current FIFO buffer size |
garfieldsg | 0:662207e34fba | 2877 | */ |
garfieldsg | 0:662207e34fba | 2878 | uint16_t MPU6050::getFIFOCount() |
garfieldsg | 0:662207e34fba | 2879 | { |
garfieldsg | 0:662207e34fba | 2880 | i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer); |
garfieldsg | 0:662207e34fba | 2881 | return (((uint16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 2882 | } |
garfieldsg | 0:662207e34fba | 2883 | |
garfieldsg | 0:662207e34fba | 2884 | // FIFO_R_W register |
garfieldsg | 0:662207e34fba | 2885 | |
garfieldsg | 0:662207e34fba | 2886 | /** Get byte from FIFO buffer. |
garfieldsg | 0:662207e34fba | 2887 | * This register is used to read and write data from the FIFO buffer. Data is |
garfieldsg | 0:662207e34fba | 2888 | * written to the FIFO in order of register number (from lowest to highest). If |
garfieldsg | 0:662207e34fba | 2889 | * all the FIFO enable flags (see below) are enabled and all External Sensor |
garfieldsg | 0:662207e34fba | 2890 | * Data registers (Registers 73 to 96) are associated with a Slave device, the |
garfieldsg | 0:662207e34fba | 2891 | * contents of registers 59 through 96 will be written in order at the Sample |
garfieldsg | 0:662207e34fba | 2892 | * Rate. |
garfieldsg | 0:662207e34fba | 2893 | * |
garfieldsg | 0:662207e34fba | 2894 | * The contents of the sensor data registers (Registers 59 to 96) are written |
garfieldsg | 0:662207e34fba | 2895 | * into the FIFO buffer when their corresponding FIFO enable flags are set to 1 |
garfieldsg | 0:662207e34fba | 2896 | * in FIFO_EN (Register 35). An additional flag for the sensor data registers |
garfieldsg | 0:662207e34fba | 2897 | * associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36). |
garfieldsg | 0:662207e34fba | 2898 | * |
garfieldsg | 0:662207e34fba | 2899 | * If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is |
garfieldsg | 0:662207e34fba | 2900 | * automatically set to 1. This bit is located in INT_STATUS (Register 58). |
garfieldsg | 0:662207e34fba | 2901 | * When the FIFO buffer has overflowed, the oldest data will be lost and new |
garfieldsg | 0:662207e34fba | 2902 | * data will be written to the FIFO. |
garfieldsg | 0:662207e34fba | 2903 | * |
garfieldsg | 0:662207e34fba | 2904 | * If the FIFO buffer is empty, reading this register will return the last byte |
garfieldsg | 0:662207e34fba | 2905 | * that was previously read from the FIFO until new data is available. The user |
garfieldsg | 0:662207e34fba | 2906 | * should check FIFO_COUNT to ensure that the FIFO buffer is not read when |
garfieldsg | 0:662207e34fba | 2907 | * empty. |
garfieldsg | 0:662207e34fba | 2908 | * |
garfieldsg | 0:662207e34fba | 2909 | * @return Byte from FIFO buffer |
garfieldsg | 0:662207e34fba | 2910 | */ |
garfieldsg | 0:662207e34fba | 2911 | uint8_t MPU6050::getFIFOByte() |
garfieldsg | 0:662207e34fba | 2912 | { |
garfieldsg | 0:662207e34fba | 2913 | i2Cdev.readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer); |
garfieldsg | 0:662207e34fba | 2914 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2915 | } |
garfieldsg | 0:662207e34fba | 2916 | void MPU6050::getFIFOBytes(uint8_t *data, uint8_t length) |
garfieldsg | 0:662207e34fba | 2917 | { |
garfieldsg | 0:662207e34fba | 2918 | i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data); |
garfieldsg | 0:662207e34fba | 2919 | } |
garfieldsg | 0:662207e34fba | 2920 | /** Write byte to FIFO buffer. |
garfieldsg | 0:662207e34fba | 2921 | * @see getFIFOByte() |
garfieldsg | 0:662207e34fba | 2922 | * @see MPU6050_RA_FIFO_R_W |
garfieldsg | 0:662207e34fba | 2923 | */ |
garfieldsg | 0:662207e34fba | 2924 | void MPU6050::setFIFOByte(uint8_t data) |
garfieldsg | 0:662207e34fba | 2925 | { |
garfieldsg | 0:662207e34fba | 2926 | i2Cdev.writeByte(devAddr, MPU6050_RA_FIFO_R_W, data); |
garfieldsg | 0:662207e34fba | 2927 | } |
garfieldsg | 0:662207e34fba | 2928 | |
garfieldsg | 0:662207e34fba | 2929 | // WHO_AM_I register |
garfieldsg | 0:662207e34fba | 2930 | |
garfieldsg | 0:662207e34fba | 2931 | /** Get Device ID. |
garfieldsg | 0:662207e34fba | 2932 | * This register is used to verify the identity of the device (0b110100, 0x34). |
garfieldsg | 0:662207e34fba | 2933 | * @return Device ID (6 bits only! should be 0x34) |
garfieldsg | 0:662207e34fba | 2934 | * @see MPU6050_RA_WHO_AM_I |
garfieldsg | 0:662207e34fba | 2935 | * @see MPU6050_WHO_AM_I_BIT |
garfieldsg | 0:662207e34fba | 2936 | * @see MPU6050_WHO_AM_I_LENGTH |
garfieldsg | 0:662207e34fba | 2937 | */ |
garfieldsg | 0:662207e34fba | 2938 | uint8_t MPU6050::getDeviceID() |
garfieldsg | 0:662207e34fba | 2939 | { |
garfieldsg | 0:662207e34fba | 2940 | i2Cdev.readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2941 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2942 | } |
garfieldsg | 0:662207e34fba | 2943 | /** Set Device ID. |
garfieldsg | 0:662207e34fba | 2944 | * Write a new ID into the WHO_AM_I register (no idea why this should ever be |
garfieldsg | 0:662207e34fba | 2945 | * necessary though). |
garfieldsg | 0:662207e34fba | 2946 | * @param id New device ID to set. |
garfieldsg | 0:662207e34fba | 2947 | * @see getDeviceID() |
garfieldsg | 0:662207e34fba | 2948 | * @see MPU6050_RA_WHO_AM_I |
garfieldsg | 0:662207e34fba | 2949 | * @see MPU6050_WHO_AM_I_BIT |
garfieldsg | 0:662207e34fba | 2950 | * @see MPU6050_WHO_AM_I_LENGTH |
garfieldsg | 0:662207e34fba | 2951 | */ |
garfieldsg | 0:662207e34fba | 2952 | void MPU6050::setDeviceID(uint8_t id) |
garfieldsg | 0:662207e34fba | 2953 | { |
garfieldsg | 0:662207e34fba | 2954 | i2Cdev.writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id); |
garfieldsg | 0:662207e34fba | 2955 | } |
garfieldsg | 0:662207e34fba | 2956 | |
garfieldsg | 0:662207e34fba | 2957 | // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ======== |
garfieldsg | 0:662207e34fba | 2958 | |
garfieldsg | 0:662207e34fba | 2959 | // XG_OFFS_TC register |
garfieldsg | 0:662207e34fba | 2960 | |
garfieldsg | 0:662207e34fba | 2961 | uint8_t MPU6050::getOTPBankValid() |
garfieldsg | 0:662207e34fba | 2962 | { |
garfieldsg | 0:662207e34fba | 2963 | i2Cdev.readBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, buffer); |
garfieldsg | 0:662207e34fba | 2964 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2965 | } |
garfieldsg | 0:662207e34fba | 2966 | void MPU6050::setOTPBankValid(bool enabled) |
garfieldsg | 0:662207e34fba | 2967 | { |
garfieldsg | 0:662207e34fba | 2968 | i2Cdev.writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled); |
garfieldsg | 0:662207e34fba | 2969 | } |
garfieldsg | 0:662207e34fba | 2970 | int8_t MPU6050::getXGyroOffset() |
garfieldsg | 0:662207e34fba | 2971 | { |
garfieldsg | 0:662207e34fba | 2972 | i2Cdev.readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2973 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2974 | } |
garfieldsg | 0:662207e34fba | 2975 | void MPU6050::setXGyroOffset(int8_t offset) |
garfieldsg | 0:662207e34fba | 2976 | { |
garfieldsg | 0:662207e34fba | 2977 | i2Cdev.writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); |
garfieldsg | 0:662207e34fba | 2978 | } |
garfieldsg | 0:662207e34fba | 2979 | |
garfieldsg | 0:662207e34fba | 2980 | // YG_OFFS_TC register |
garfieldsg | 0:662207e34fba | 2981 | |
garfieldsg | 0:662207e34fba | 2982 | int8_t MPU6050::getYGyroOffset() |
garfieldsg | 0:662207e34fba | 2983 | { |
garfieldsg | 0:662207e34fba | 2984 | i2Cdev.readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2985 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2986 | } |
garfieldsg | 0:662207e34fba | 2987 | void MPU6050::setYGyroOffset(int8_t offset) |
garfieldsg | 0:662207e34fba | 2988 | { |
garfieldsg | 0:662207e34fba | 2989 | i2Cdev.writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); |
garfieldsg | 0:662207e34fba | 2990 | } |
garfieldsg | 0:662207e34fba | 2991 | |
garfieldsg | 0:662207e34fba | 2992 | // ZG_OFFS_TC register |
garfieldsg | 0:662207e34fba | 2993 | |
garfieldsg | 0:662207e34fba | 2994 | int8_t MPU6050::getZGyroOffset() |
garfieldsg | 0:662207e34fba | 2995 | { |
garfieldsg | 0:662207e34fba | 2996 | i2Cdev.readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); |
garfieldsg | 0:662207e34fba | 2997 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 2998 | } |
garfieldsg | 0:662207e34fba | 2999 | void MPU6050::setZGyroOffset(int8_t offset) |
garfieldsg | 0:662207e34fba | 3000 | { |
garfieldsg | 0:662207e34fba | 3001 | i2Cdev.writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); |
garfieldsg | 0:662207e34fba | 3002 | } |
garfieldsg | 0:662207e34fba | 3003 | |
garfieldsg | 0:662207e34fba | 3004 | // X_FINE_GAIN register |
garfieldsg | 0:662207e34fba | 3005 | |
garfieldsg | 0:662207e34fba | 3006 | int8_t MPU6050::getXFineGain() |
garfieldsg | 0:662207e34fba | 3007 | { |
garfieldsg | 0:662207e34fba | 3008 | i2Cdev.readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer); |
garfieldsg | 0:662207e34fba | 3009 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3010 | } |
garfieldsg | 0:662207e34fba | 3011 | void MPU6050::setXFineGain(int8_t gain) |
garfieldsg | 0:662207e34fba | 3012 | { |
garfieldsg | 0:662207e34fba | 3013 | i2Cdev.writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain); |
garfieldsg | 0:662207e34fba | 3014 | } |
garfieldsg | 0:662207e34fba | 3015 | |
garfieldsg | 0:662207e34fba | 3016 | // Y_FINE_GAIN register |
garfieldsg | 0:662207e34fba | 3017 | |
garfieldsg | 0:662207e34fba | 3018 | int8_t MPU6050::getYFineGain() |
garfieldsg | 0:662207e34fba | 3019 | { |
garfieldsg | 0:662207e34fba | 3020 | i2Cdev.readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer); |
garfieldsg | 0:662207e34fba | 3021 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3022 | } |
garfieldsg | 0:662207e34fba | 3023 | void MPU6050::setYFineGain(int8_t gain) |
garfieldsg | 0:662207e34fba | 3024 | { |
garfieldsg | 0:662207e34fba | 3025 | i2Cdev.writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain); |
garfieldsg | 0:662207e34fba | 3026 | } |
garfieldsg | 0:662207e34fba | 3027 | |
garfieldsg | 0:662207e34fba | 3028 | // Z_FINE_GAIN register |
garfieldsg | 0:662207e34fba | 3029 | |
garfieldsg | 0:662207e34fba | 3030 | int8_t MPU6050::getZFineGain() |
garfieldsg | 0:662207e34fba | 3031 | { |
garfieldsg | 0:662207e34fba | 3032 | i2Cdev.readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer); |
garfieldsg | 0:662207e34fba | 3033 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3034 | } |
garfieldsg | 0:662207e34fba | 3035 | void MPU6050::setZFineGain(int8_t gain) |
garfieldsg | 0:662207e34fba | 3036 | { |
garfieldsg | 0:662207e34fba | 3037 | i2Cdev.writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain); |
garfieldsg | 0:662207e34fba | 3038 | } |
garfieldsg | 0:662207e34fba | 3039 | |
garfieldsg | 0:662207e34fba | 3040 | // XA_OFFS_* registers |
garfieldsg | 0:662207e34fba | 3041 | |
garfieldsg | 0:662207e34fba | 3042 | int16_t MPU6050::getXAccelOffset() |
garfieldsg | 0:662207e34fba | 3043 | { |
garfieldsg | 0:662207e34fba | 3044 | i2Cdev.readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 3045 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3046 | } |
garfieldsg | 0:662207e34fba | 3047 | void MPU6050::setXAccelOffset(int16_t offset) |
garfieldsg | 0:662207e34fba | 3048 | { |
garfieldsg | 0:662207e34fba | 3049 | i2Cdev.writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset); |
garfieldsg | 0:662207e34fba | 3050 | } |
garfieldsg | 0:662207e34fba | 3051 | |
garfieldsg | 0:662207e34fba | 3052 | // YA_OFFS_* register |
garfieldsg | 0:662207e34fba | 3053 | |
garfieldsg | 0:662207e34fba | 3054 | int16_t MPU6050::getYAccelOffset() |
garfieldsg | 0:662207e34fba | 3055 | { |
garfieldsg | 0:662207e34fba | 3056 | i2Cdev.readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 3057 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3058 | } |
garfieldsg | 0:662207e34fba | 3059 | void MPU6050::setYAccelOffset(int16_t offset) |
garfieldsg | 0:662207e34fba | 3060 | { |
garfieldsg | 0:662207e34fba | 3061 | i2Cdev.writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset); |
garfieldsg | 0:662207e34fba | 3062 | } |
garfieldsg | 0:662207e34fba | 3063 | |
garfieldsg | 0:662207e34fba | 3064 | // ZA_OFFS_* register |
garfieldsg | 0:662207e34fba | 3065 | |
garfieldsg | 0:662207e34fba | 3066 | int16_t MPU6050::getZAccelOffset() |
garfieldsg | 0:662207e34fba | 3067 | { |
garfieldsg | 0:662207e34fba | 3068 | i2Cdev.readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer); |
garfieldsg | 0:662207e34fba | 3069 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3070 | } |
garfieldsg | 0:662207e34fba | 3071 | void MPU6050::setZAccelOffset(int16_t offset) |
garfieldsg | 0:662207e34fba | 3072 | { |
garfieldsg | 0:662207e34fba | 3073 | i2Cdev.writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset); |
garfieldsg | 0:662207e34fba | 3074 | } |
garfieldsg | 0:662207e34fba | 3075 | |
garfieldsg | 0:662207e34fba | 3076 | // XG_OFFS_USR* registers |
garfieldsg | 0:662207e34fba | 3077 | |
garfieldsg | 0:662207e34fba | 3078 | int16_t MPU6050::getXGyroOffsetUser() |
garfieldsg | 0:662207e34fba | 3079 | { |
garfieldsg | 0:662207e34fba | 3080 | i2Cdev.readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer); |
garfieldsg | 0:662207e34fba | 3081 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3082 | } |
garfieldsg | 0:662207e34fba | 3083 | void MPU6050::setXGyroOffsetUser(int16_t offset) |
garfieldsg | 0:662207e34fba | 3084 | { |
garfieldsg | 0:662207e34fba | 3085 | i2Cdev.writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset); |
garfieldsg | 0:662207e34fba | 3086 | } |
garfieldsg | 0:662207e34fba | 3087 | |
garfieldsg | 0:662207e34fba | 3088 | // YG_OFFS_USR* register |
garfieldsg | 0:662207e34fba | 3089 | |
garfieldsg | 0:662207e34fba | 3090 | int16_t MPU6050::getYGyroOffsetUser() |
garfieldsg | 0:662207e34fba | 3091 | { |
garfieldsg | 0:662207e34fba | 3092 | i2Cdev.readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer); |
garfieldsg | 0:662207e34fba | 3093 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3094 | } |
garfieldsg | 0:662207e34fba | 3095 | void MPU6050::setYGyroOffsetUser(int16_t offset) |
garfieldsg | 0:662207e34fba | 3096 | { |
garfieldsg | 0:662207e34fba | 3097 | i2Cdev.writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset); |
garfieldsg | 0:662207e34fba | 3098 | } |
garfieldsg | 0:662207e34fba | 3099 | |
garfieldsg | 0:662207e34fba | 3100 | // ZG_OFFS_USR* register |
garfieldsg | 0:662207e34fba | 3101 | |
garfieldsg | 0:662207e34fba | 3102 | int16_t MPU6050::getZGyroOffsetUser() |
garfieldsg | 0:662207e34fba | 3103 | { |
garfieldsg | 0:662207e34fba | 3104 | i2Cdev.readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer); |
garfieldsg | 0:662207e34fba | 3105 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
garfieldsg | 0:662207e34fba | 3106 | } |
garfieldsg | 0:662207e34fba | 3107 | void MPU6050::setZGyroOffsetUser(int16_t offset) |
garfieldsg | 0:662207e34fba | 3108 | { |
garfieldsg | 0:662207e34fba | 3109 | i2Cdev.writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset); |
garfieldsg | 0:662207e34fba | 3110 | } |
garfieldsg | 0:662207e34fba | 3111 | |
garfieldsg | 0:662207e34fba | 3112 | // INT_ENABLE register (DMP functions) |
garfieldsg | 0:662207e34fba | 3113 | |
garfieldsg | 0:662207e34fba | 3114 | bool MPU6050::getIntPLLReadyEnabled() |
garfieldsg | 0:662207e34fba | 3115 | { |
garfieldsg | 0:662207e34fba | 3116 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3117 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3118 | } |
garfieldsg | 0:662207e34fba | 3119 | void MPU6050::setIntPLLReadyEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 3120 | { |
garfieldsg | 0:662207e34fba | 3121 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled); |
garfieldsg | 0:662207e34fba | 3122 | } |
garfieldsg | 0:662207e34fba | 3123 | bool MPU6050::getIntDMPEnabled() |
garfieldsg | 0:662207e34fba | 3124 | { |
garfieldsg | 0:662207e34fba | 3125 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3126 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3127 | } |
garfieldsg | 0:662207e34fba | 3128 | void MPU6050::setIntDMPEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 3129 | { |
garfieldsg | 0:662207e34fba | 3130 | i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled); |
garfieldsg | 0:662207e34fba | 3131 | } |
garfieldsg | 0:662207e34fba | 3132 | |
garfieldsg | 0:662207e34fba | 3133 | // DMP_INT_STATUS |
garfieldsg | 0:662207e34fba | 3134 | |
garfieldsg | 0:662207e34fba | 3135 | bool MPU6050::getDMPInt5Status() |
garfieldsg | 0:662207e34fba | 3136 | { |
garfieldsg | 0:662207e34fba | 3137 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3138 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3139 | } |
garfieldsg | 0:662207e34fba | 3140 | bool MPU6050::getDMPInt4Status() |
garfieldsg | 0:662207e34fba | 3141 | { |
garfieldsg | 0:662207e34fba | 3142 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3143 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3144 | } |
garfieldsg | 0:662207e34fba | 3145 | bool MPU6050::getDMPInt3Status() |
garfieldsg | 0:662207e34fba | 3146 | { |
garfieldsg | 0:662207e34fba | 3147 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3148 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3149 | } |
garfieldsg | 0:662207e34fba | 3150 | bool MPU6050::getDMPInt2Status() |
garfieldsg | 0:662207e34fba | 3151 | { |
garfieldsg | 0:662207e34fba | 3152 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3153 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3154 | } |
garfieldsg | 0:662207e34fba | 3155 | bool MPU6050::getDMPInt1Status() |
garfieldsg | 0:662207e34fba | 3156 | { |
garfieldsg | 0:662207e34fba | 3157 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3158 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3159 | } |
garfieldsg | 0:662207e34fba | 3160 | bool MPU6050::getDMPInt0Status() |
garfieldsg | 0:662207e34fba | 3161 | { |
garfieldsg | 0:662207e34fba | 3162 | i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3163 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3164 | } |
garfieldsg | 0:662207e34fba | 3165 | |
garfieldsg | 0:662207e34fba | 3166 | // INT_STATUS register (DMP functions) |
garfieldsg | 0:662207e34fba | 3167 | |
garfieldsg | 0:662207e34fba | 3168 | bool MPU6050::getIntPLLReadyStatus() |
garfieldsg | 0:662207e34fba | 3169 | { |
garfieldsg | 0:662207e34fba | 3170 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3171 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3172 | } |
garfieldsg | 0:662207e34fba | 3173 | bool MPU6050::getIntDMPStatus() |
garfieldsg | 0:662207e34fba | 3174 | { |
garfieldsg | 0:662207e34fba | 3175 | i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3176 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3177 | } |
garfieldsg | 0:662207e34fba | 3178 | |
garfieldsg | 0:662207e34fba | 3179 | // USER_CTRL register (DMP functions) |
garfieldsg | 0:662207e34fba | 3180 | |
garfieldsg | 0:662207e34fba | 3181 | bool MPU6050::getDMPEnabled() |
garfieldsg | 0:662207e34fba | 3182 | { |
garfieldsg | 0:662207e34fba | 3183 | i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer); |
garfieldsg | 0:662207e34fba | 3184 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3185 | } |
garfieldsg | 0:662207e34fba | 3186 | void MPU6050::setDMPEnabled(bool enabled) |
garfieldsg | 0:662207e34fba | 3187 | { |
garfieldsg | 0:662207e34fba | 3188 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled); |
garfieldsg | 0:662207e34fba | 3189 | } |
garfieldsg | 0:662207e34fba | 3190 | void MPU6050::resetDMP() |
garfieldsg | 0:662207e34fba | 3191 | { |
garfieldsg | 0:662207e34fba | 3192 | i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true); |
garfieldsg | 0:662207e34fba | 3193 | } |
garfieldsg | 0:662207e34fba | 3194 | |
garfieldsg | 0:662207e34fba | 3195 | // BANK_SEL register |
garfieldsg | 0:662207e34fba | 3196 | |
garfieldsg | 0:662207e34fba | 3197 | void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) |
garfieldsg | 0:662207e34fba | 3198 | { |
garfieldsg | 0:662207e34fba | 3199 | bank &= 0x1F; |
garfieldsg | 0:662207e34fba | 3200 | if (userBank) bank |= 0x20; |
garfieldsg | 0:662207e34fba | 3201 | if (prefetchEnabled) bank |= 0x40; |
garfieldsg | 0:662207e34fba | 3202 | i2Cdev.writeByte(devAddr, MPU6050_RA_BANK_SEL, bank); |
garfieldsg | 0:662207e34fba | 3203 | } |
garfieldsg | 0:662207e34fba | 3204 | |
garfieldsg | 0:662207e34fba | 3205 | // MEM_START_ADDR register |
garfieldsg | 0:662207e34fba | 3206 | |
garfieldsg | 0:662207e34fba | 3207 | void MPU6050::setMemoryStartAddress(uint8_t address) |
garfieldsg | 0:662207e34fba | 3208 | { |
garfieldsg | 0:662207e34fba | 3209 | i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address); |
garfieldsg | 0:662207e34fba | 3210 | } |
garfieldsg | 0:662207e34fba | 3211 | |
garfieldsg | 0:662207e34fba | 3212 | // MEM_R_W register |
garfieldsg | 0:662207e34fba | 3213 | |
garfieldsg | 0:662207e34fba | 3214 | uint8_t MPU6050::readMemoryByte() |
garfieldsg | 0:662207e34fba | 3215 | { |
garfieldsg | 0:662207e34fba | 3216 | i2Cdev.readByte(devAddr, MPU6050_RA_MEM_R_W, buffer); |
garfieldsg | 0:662207e34fba | 3217 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3218 | } |
garfieldsg | 0:662207e34fba | 3219 | void MPU6050::writeMemoryByte(uint8_t data) |
garfieldsg | 0:662207e34fba | 3220 | { |
garfieldsg | 0:662207e34fba | 3221 | i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_R_W, data); |
garfieldsg | 0:662207e34fba | 3222 | } |
garfieldsg | 0:662207e34fba | 3223 | void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) |
garfieldsg | 0:662207e34fba | 3224 | { |
garfieldsg | 0:662207e34fba | 3225 | setMemoryBank(bank); |
garfieldsg | 0:662207e34fba | 3226 | setMemoryStartAddress(address); |
garfieldsg | 0:662207e34fba | 3227 | uint8_t chunkSize; |
garfieldsg | 0:662207e34fba | 3228 | for (uint16_t i = 0; i < dataSize;) { |
garfieldsg | 0:662207e34fba | 3229 | // determine correct chunk size according to bank position and data size |
garfieldsg | 0:662207e34fba | 3230 | chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE; |
garfieldsg | 0:662207e34fba | 3231 | |
garfieldsg | 0:662207e34fba | 3232 | // make sure we don't go past the data size |
garfieldsg | 0:662207e34fba | 3233 | if (i + chunkSize > dataSize) chunkSize = dataSize - i; |
garfieldsg | 0:662207e34fba | 3234 | |
garfieldsg | 0:662207e34fba | 3235 | // make sure this chunk doesn't go past the bank boundary (256 bytes) |
garfieldsg | 0:662207e34fba | 3236 | if (chunkSize > 256 - address) chunkSize = 256 - address; |
garfieldsg | 0:662207e34fba | 3237 | |
garfieldsg | 0:662207e34fba | 3238 | // read the chunk of data as specified |
garfieldsg | 0:662207e34fba | 3239 | i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i); |
garfieldsg | 0:662207e34fba | 3240 | |
garfieldsg | 0:662207e34fba | 3241 | // increase byte index by [chunkSize] |
garfieldsg | 0:662207e34fba | 3242 | i += chunkSize; |
garfieldsg | 0:662207e34fba | 3243 | |
garfieldsg | 0:662207e34fba | 3244 | // uint8_t automatically wraps to 0 at 256 |
garfieldsg | 0:662207e34fba | 3245 | address += chunkSize; |
garfieldsg | 0:662207e34fba | 3246 | |
garfieldsg | 0:662207e34fba | 3247 | // if we aren't done, update bank (if necessary) and address |
garfieldsg | 0:662207e34fba | 3248 | if (i < dataSize) { |
garfieldsg | 0:662207e34fba | 3249 | if (address == 0) bank++; |
garfieldsg | 0:662207e34fba | 3250 | setMemoryBank(bank); |
garfieldsg | 0:662207e34fba | 3251 | setMemoryStartAddress(address); |
garfieldsg | 0:662207e34fba | 3252 | } |
garfieldsg | 0:662207e34fba | 3253 | } |
garfieldsg | 0:662207e34fba | 3254 | } |
garfieldsg | 0:662207e34fba | 3255 | bool MPU6050::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) |
garfieldsg | 0:662207e34fba | 3256 | { |
garfieldsg | 0:662207e34fba | 3257 | setMemoryBank(bank); |
garfieldsg | 0:662207e34fba | 3258 | setMemoryStartAddress(address); |
garfieldsg | 0:662207e34fba | 3259 | uint8_t chunkSize; |
garfieldsg | 0:662207e34fba | 3260 | uint8_t *verifyBuffer; |
garfieldsg | 0:662207e34fba | 3261 | uint8_t *progBuffer; |
garfieldsg | 0:662207e34fba | 3262 | uint16_t i; |
garfieldsg | 0:662207e34fba | 3263 | uint8_t j; |
garfieldsg | 0:662207e34fba | 3264 | if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE); |
garfieldsg | 0:662207e34fba | 3265 | if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE); |
garfieldsg | 0:662207e34fba | 3266 | for (i = 0; i < dataSize;) { |
garfieldsg | 0:662207e34fba | 3267 | // determine correct chunk size according to bank position and data size |
garfieldsg | 0:662207e34fba | 3268 | chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE; |
garfieldsg | 0:662207e34fba | 3269 | |
garfieldsg | 0:662207e34fba | 3270 | // make sure we don't go past the data size |
garfieldsg | 0:662207e34fba | 3271 | if (i + chunkSize > dataSize) chunkSize = dataSize - i; |
garfieldsg | 0:662207e34fba | 3272 | |
garfieldsg | 0:662207e34fba | 3273 | // make sure this chunk doesn't go past the bank boundary (256 bytes) |
garfieldsg | 0:662207e34fba | 3274 | if (chunkSize > 256 - address) chunkSize = 256 - address; |
garfieldsg | 0:662207e34fba | 3275 | |
garfieldsg | 0:662207e34fba | 3276 | if (useProgMem) { |
garfieldsg | 0:662207e34fba | 3277 | // write the chunk of data as specified |
garfieldsg | 0:662207e34fba | 3278 | for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j); |
garfieldsg | 0:662207e34fba | 3279 | } else { |
garfieldsg | 0:662207e34fba | 3280 | // write the chunk of data as specified |
garfieldsg | 0:662207e34fba | 3281 | progBuffer = (uint8_t *)data + i; |
garfieldsg | 0:662207e34fba | 3282 | } |
garfieldsg | 0:662207e34fba | 3283 | |
garfieldsg | 0:662207e34fba | 3284 | i2Cdev.writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer); |
garfieldsg | 0:662207e34fba | 3285 | |
garfieldsg | 0:662207e34fba | 3286 | // verify data if needed |
garfieldsg | 0:662207e34fba | 3287 | if (verify && verifyBuffer) { |
garfieldsg | 0:662207e34fba | 3288 | setMemoryBank(bank); |
garfieldsg | 0:662207e34fba | 3289 | setMemoryStartAddress(address); |
garfieldsg | 0:662207e34fba | 3290 | i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer); |
garfieldsg | 0:662207e34fba | 3291 | if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) { |
garfieldsg | 0:662207e34fba | 3292 | /*Serial.print("Block write verification error, bank "); |
garfieldsg | 0:662207e34fba | 3293 | Serial.print(bank, DEC); |
garfieldsg | 0:662207e34fba | 3294 | Serial.print(", address "); |
garfieldsg | 0:662207e34fba | 3295 | Serial.print(address, DEC); |
garfieldsg | 0:662207e34fba | 3296 | Serial.print("!\nExpected:"); |
garfieldsg | 0:662207e34fba | 3297 | for (j = 0; j < chunkSize; j++) { |
garfieldsg | 0:662207e34fba | 3298 | Serial.print(" 0x"); |
garfieldsg | 0:662207e34fba | 3299 | if (progBuffer[j] < 16) Serial.print("0"); |
garfieldsg | 0:662207e34fba | 3300 | Serial.print(progBuffer[j], HEX); |
garfieldsg | 0:662207e34fba | 3301 | } |
garfieldsg | 0:662207e34fba | 3302 | Serial.print("\nReceived:"); |
garfieldsg | 0:662207e34fba | 3303 | for (uint8_t j = 0; j < chunkSize; j++) { |
garfieldsg | 0:662207e34fba | 3304 | Serial.print(" 0x"); |
garfieldsg | 0:662207e34fba | 3305 | if (verifyBuffer[i + j] < 16) Serial.print("0"); |
garfieldsg | 0:662207e34fba | 3306 | Serial.print(verifyBuffer[i + j], HEX); |
garfieldsg | 0:662207e34fba | 3307 | } |
garfieldsg | 0:662207e34fba | 3308 | Serial.print("\n");*/ |
garfieldsg | 0:662207e34fba | 3309 | free(verifyBuffer); |
garfieldsg | 0:662207e34fba | 3310 | if (useProgMem) free(progBuffer); |
garfieldsg | 0:662207e34fba | 3311 | return false; // uh oh. |
garfieldsg | 0:662207e34fba | 3312 | } |
garfieldsg | 0:662207e34fba | 3313 | } |
garfieldsg | 0:662207e34fba | 3314 | |
garfieldsg | 0:662207e34fba | 3315 | // increase byte index by [chunkSize] |
garfieldsg | 0:662207e34fba | 3316 | i += chunkSize; |
garfieldsg | 0:662207e34fba | 3317 | |
garfieldsg | 0:662207e34fba | 3318 | // uint8_t automatically wraps to 0 at 256 |
garfieldsg | 0:662207e34fba | 3319 | address += chunkSize; |
garfieldsg | 0:662207e34fba | 3320 | |
garfieldsg | 0:662207e34fba | 3321 | // if we aren't done, update bank (if necessary) and address |
garfieldsg | 0:662207e34fba | 3322 | if (i < dataSize) { |
garfieldsg | 0:662207e34fba | 3323 | if (address == 0) bank++; |
garfieldsg | 0:662207e34fba | 3324 | setMemoryBank(bank); |
garfieldsg | 0:662207e34fba | 3325 | setMemoryStartAddress(address); |
garfieldsg | 0:662207e34fba | 3326 | } |
garfieldsg | 0:662207e34fba | 3327 | } |
garfieldsg | 0:662207e34fba | 3328 | if (verify) free(verifyBuffer); |
garfieldsg | 0:662207e34fba | 3329 | if (useProgMem) free(progBuffer); |
garfieldsg | 0:662207e34fba | 3330 | return true; |
garfieldsg | 0:662207e34fba | 3331 | } |
garfieldsg | 0:662207e34fba | 3332 | bool MPU6050::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) |
garfieldsg | 0:662207e34fba | 3333 | { |
garfieldsg | 0:662207e34fba | 3334 | return writeMemoryBlock(data, dataSize, bank, address, verify, true); |
garfieldsg | 0:662207e34fba | 3335 | } |
garfieldsg | 0:662207e34fba | 3336 | bool MPU6050::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) |
garfieldsg | 0:662207e34fba | 3337 | { |
garfieldsg | 0:662207e34fba | 3338 | uint8_t *progBuffer, success, special; |
garfieldsg | 0:662207e34fba | 3339 | uint16_t i, j; |
garfieldsg | 0:662207e34fba | 3340 | if (useProgMem) { |
garfieldsg | 0:662207e34fba | 3341 | progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary |
garfieldsg | 0:662207e34fba | 3342 | } |
garfieldsg | 0:662207e34fba | 3343 | |
garfieldsg | 0:662207e34fba | 3344 | // config set data is a long string of blocks with the following structure: |
garfieldsg | 0:662207e34fba | 3345 | // [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]] |
garfieldsg | 0:662207e34fba | 3346 | uint8_t bank, offset, length; |
garfieldsg | 0:662207e34fba | 3347 | for (i = 0; i < dataSize;) { |
garfieldsg | 0:662207e34fba | 3348 | if (useProgMem) { |
garfieldsg | 0:662207e34fba | 3349 | bank = pgm_read_byte(data + i++); |
garfieldsg | 0:662207e34fba | 3350 | offset = pgm_read_byte(data + i++); |
garfieldsg | 0:662207e34fba | 3351 | length = pgm_read_byte(data + i++); |
garfieldsg | 0:662207e34fba | 3352 | } else { |
garfieldsg | 0:662207e34fba | 3353 | bank = data[i++]; |
garfieldsg | 0:662207e34fba | 3354 | offset = data[i++]; |
garfieldsg | 0:662207e34fba | 3355 | length = data[i++]; |
garfieldsg | 0:662207e34fba | 3356 | } |
garfieldsg | 0:662207e34fba | 3357 | |
garfieldsg | 0:662207e34fba | 3358 | // write data or perform special action |
garfieldsg | 0:662207e34fba | 3359 | if (length > 0) { |
garfieldsg | 0:662207e34fba | 3360 | // regular block of data to write |
garfieldsg | 0:662207e34fba | 3361 | /*Serial.print("Writing config block to bank "); |
garfieldsg | 0:662207e34fba | 3362 | Serial.print(bank); |
garfieldsg | 0:662207e34fba | 3363 | Serial.print(", offset "); |
garfieldsg | 0:662207e34fba | 3364 | Serial.print(offset); |
garfieldsg | 0:662207e34fba | 3365 | Serial.print(", length="); |
garfieldsg | 0:662207e34fba | 3366 | Serial.println(length);*/ |
garfieldsg | 0:662207e34fba | 3367 | if (useProgMem) { |
garfieldsg | 0:662207e34fba | 3368 | if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length); |
garfieldsg | 0:662207e34fba | 3369 | for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j); |
garfieldsg | 0:662207e34fba | 3370 | } else { |
garfieldsg | 0:662207e34fba | 3371 | progBuffer = (uint8_t *)data + i; |
garfieldsg | 0:662207e34fba | 3372 | } |
garfieldsg | 0:662207e34fba | 3373 | success = writeMemoryBlock(progBuffer, length, bank, offset, true); |
garfieldsg | 0:662207e34fba | 3374 | i += length; |
garfieldsg | 0:662207e34fba | 3375 | } else { |
garfieldsg | 0:662207e34fba | 3376 | // special instruction |
garfieldsg | 0:662207e34fba | 3377 | // NOTE: this kind of behavior (what and when to do certain things) |
garfieldsg | 0:662207e34fba | 3378 | // is totally undocumented. This code is in here based on observed |
garfieldsg | 0:662207e34fba | 3379 | // behavior only, and exactly why (or even whether) it has to be here |
garfieldsg | 0:662207e34fba | 3380 | // is anybody's guess for now. |
garfieldsg | 0:662207e34fba | 3381 | if (useProgMem) { |
garfieldsg | 0:662207e34fba | 3382 | special = pgm_read_byte(data + i++); |
garfieldsg | 0:662207e34fba | 3383 | } else { |
garfieldsg | 0:662207e34fba | 3384 | special = data[i++]; |
garfieldsg | 0:662207e34fba | 3385 | } |
garfieldsg | 0:662207e34fba | 3386 | /*Serial.print("Special command code "); |
garfieldsg | 0:662207e34fba | 3387 | Serial.print(special, HEX); |
garfieldsg | 0:662207e34fba | 3388 | Serial.println(" found...");*/ |
garfieldsg | 0:662207e34fba | 3389 | if (special == 0x01) { |
garfieldsg | 0:662207e34fba | 3390 | // enable DMP-related interrupts |
garfieldsg | 0:662207e34fba | 3391 | |
garfieldsg | 0:662207e34fba | 3392 | //setIntZeroMotionEnabled(true); |
garfieldsg | 0:662207e34fba | 3393 | //setIntFIFOBufferOverflowEnabled(true); |
garfieldsg | 0:662207e34fba | 3394 | //setIntDMPEnabled(true); |
garfieldsg | 0:662207e34fba | 3395 | i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, 0x32); // single operation |
garfieldsg | 0:662207e34fba | 3396 | |
garfieldsg | 0:662207e34fba | 3397 | success = true; |
garfieldsg | 0:662207e34fba | 3398 | } else { |
garfieldsg | 0:662207e34fba | 3399 | // unknown special command |
garfieldsg | 0:662207e34fba | 3400 | success = false; |
garfieldsg | 0:662207e34fba | 3401 | } |
garfieldsg | 0:662207e34fba | 3402 | } |
garfieldsg | 0:662207e34fba | 3403 | |
garfieldsg | 0:662207e34fba | 3404 | if (!success) { |
garfieldsg | 0:662207e34fba | 3405 | if (useProgMem) free(progBuffer); |
garfieldsg | 0:662207e34fba | 3406 | return false; // uh oh |
garfieldsg | 0:662207e34fba | 3407 | } |
garfieldsg | 0:662207e34fba | 3408 | } |
garfieldsg | 0:662207e34fba | 3409 | if (useProgMem) free(progBuffer); |
garfieldsg | 0:662207e34fba | 3410 | return true; |
garfieldsg | 0:662207e34fba | 3411 | } |
garfieldsg | 0:662207e34fba | 3412 | bool MPU6050::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) |
garfieldsg | 0:662207e34fba | 3413 | { |
garfieldsg | 0:662207e34fba | 3414 | return writeDMPConfigurationSet(data, dataSize, false); |
garfieldsg | 0:662207e34fba | 3415 | } |
garfieldsg | 0:662207e34fba | 3416 | |
garfieldsg | 0:662207e34fba | 3417 | // DMP_CFG_1 register |
garfieldsg | 0:662207e34fba | 3418 | |
garfieldsg | 0:662207e34fba | 3419 | uint8_t MPU6050::getDMPConfig1() |
garfieldsg | 0:662207e34fba | 3420 | { |
garfieldsg | 0:662207e34fba | 3421 | i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer); |
garfieldsg | 0:662207e34fba | 3422 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3423 | } |
garfieldsg | 0:662207e34fba | 3424 | void MPU6050::setDMPConfig1(uint8_t config) |
garfieldsg | 0:662207e34fba | 3425 | { |
garfieldsg | 0:662207e34fba | 3426 | i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config); |
garfieldsg | 0:662207e34fba | 3427 | } |
garfieldsg | 0:662207e34fba | 3428 | |
garfieldsg | 0:662207e34fba | 3429 | // DMP_CFG_2 register |
garfieldsg | 0:662207e34fba | 3430 | |
garfieldsg | 0:662207e34fba | 3431 | uint8_t MPU6050::getDMPConfig2() |
garfieldsg | 0:662207e34fba | 3432 | { |
garfieldsg | 0:662207e34fba | 3433 | i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer); |
garfieldsg | 0:662207e34fba | 3434 | return buffer[0]; |
garfieldsg | 0:662207e34fba | 3435 | } |
garfieldsg | 0:662207e34fba | 3436 | void MPU6050::setDMPConfig2(uint8_t config) |
garfieldsg | 0:662207e34fba | 3437 | { |
garfieldsg | 0:662207e34fba | 3438 | i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config); |
garfieldsg | 0:662207e34fba | 3439 | } |