saikiran cholleti
vr1.1
Dependencies: FreescaleIAP mbed-rtos mbed
Fork of
CDMS_RTOS_v1_1
by 
Team Fox
Flags.h@16:7428828a5da2, 2015-07-17 (annotated)
- Committer:
- cholletisaik777
- Date:
- Fri Jul 17 06:35:40 2015 +0000
- Revision:
- 16:7428828a5da2
- Parent:
- 13:ba5dca9e18d8
COM INTEGRATION
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| cholletisaik777 | 8:607ae92fa6af | 1 | /*HK*/ |
| cholletisaik777 | 11:d6dc9074075b | 2 | #define HK_INIT_STATUS 0X0000000000000001 |
| cholletisaik777 | 11:d6dc9074075b | 3 | #define HK_MAIN_STATUS 0X0000000000000002 |
| cholletisaik777 | 11:d6dc9074075b | 4 | #define HK_BAE_DISBLED 0X0000000000000004 |
| cholletisaik777 | 11:d6dc9074075b | 5 | #define HK_BAE_ERR_I2C 0X0000000000000008 |
| pradeepvk2208 | 9:7ff6d75cc09e | 6 | /*End*/ |
| pradeepvk2208 | 9:7ff6d75cc09e | 7 | |
| pradeepvk2208 | 9:7ff6d75cc09e | 8 | /*PL*/ |
| cholletisaik777 | 11:d6dc9074075b | 9 | #define PL_MAIN_STATUS 0x0000000000000010 |
| cholletisaik777 | 11:d6dc9074075b | 10 | #define PL_LOW_POWER 0x0000000000000020 |
| cholletisaik777 | 11:d6dc9074075b | 11 | #define PL_OFF 0x0000000000000040 |
| cholletisaik777 | 11:d6dc9074075b | 12 | #define PL_ERR_I2C 0x0000000000000080 |
| cholletisaik777 | 11:d6dc9074075b | 13 | #define PL_STANDBY 0x0000000000000100 |
| cholletisaik777 | 11:d6dc9074075b | 14 | #define PL_HIBERNATE 0x0000000000000200 |
| cholletisaik777 | 11:d6dc9074075b | 15 | #define PL_SCIENCE 0x0000000000000400 |
| cholletisaik777 | 11:d6dc9074075b | 16 | #define PL_INVALID_STATE 0x0000000000000800 |
| cholletisaik777 | 11:d6dc9074075b | 17 | /*End*/ |
| cholletisaik777 | 11:d6dc9074075b | 18 | |
| cholletisaik777 | 11:d6dc9074075b | 19 | /*CDMS INIT*/ |
| cholletisaik777 | 11:d6dc9074075b | 20 | #define CDMS_INIT_STATUS 0x0000000000001000 |
| cholletisaik777 | 11:d6dc9074075b | 21 | /*End*/ |
| cholletisaik777 | 11:d6dc9074075b | 22 | |
| cholletisaik777 | 11:d6dc9074075b | 23 | /*SDCard*/ |
| cholletisaik777 | 11:d6dc9074075b | 24 | #define SDCARD_INIT_STATUS 0x0000000000000010 |
| cholletisaik777 | 11:d6dc9074075b | 25 | #define SDCARD_INIT_FAIL 0x0000000000000020 |
| cholletisaik777 | 11:d6dc9074075b | 26 | #define SDCARD_DISK_FAIL 0x0000000000000040 |
| cholletisaik777 | 11:d6dc9074075b | 27 | #define SD_WR_STATUS 0x0000000000000080 |
| cholletisaik777 | 11:d6dc9074075b | 28 | #define SD_GET_BLOCK_FAIL 0x0000000000000100 |
| cholletisaik777 | 11:d6dc9074075b | 29 | #define SD_WR_FAIL 0x0000000000000200 |
| cholletisaik777 | 11:d6dc9074075b | 30 | #define SD_RD_STATUS 0x0000000000000400 |
| cholletisaik777 | 12:cb3ee1ac3638 | 31 | #define SD_RD_FAIL 0x0000000000000800 |
| cholletisaik777 | 12:cb3ee1ac3638 | 32 | /*End*/ |
| cholletisaik777 | 12:cb3ee1ac3638 | 33 | |
| cholletisaik777 | 12:cb3ee1ac3638 | 34 | /*SCIENCE*/ |
| cholletisaik777 | 12:cb3ee1ac3638 | 35 | #define PL_SCIENCE_STATUS 0x0000000000000001 |
| cholletisaik777 | 12:cb3ee1ac3638 | 36 | #define PL_FRAME_SIZE_CORRECT 0x0000000000000002 |
| cholletisaik777 | 12:cb3ee1ac3638 | 37 | #define TIME_ELAPSED_LAST_SRP_INTERVAL_HIGH 0x0000000000000008 |
| cholletisaik777 | 12:cb3ee1ac3638 | 38 | #define TIME_ELAPSED_LAST_SRP_INTERVAL_LOW 0x0000000000000010 |
| cholletisaik777 | 12:cb3ee1ac3638 | 39 | #define IS_PL_FRAME_SIZE_CORRECT 0x0000000000000010 |
| cholletisaik777 | 12:cb3ee1ac3638 | 40 | #define IS_FIRST_TIME_SC_DATA 0x0000000000000010 |
| cholletisaik777 | 13:ba5dca9e18d8 | 41 | #define PL_STATE 0x0000000000000001 |
| cholletisaik777 | 13:ba5dca9e18d8 | 42 | #define IS_PL_SCHEDULE 0x0000000000000002 |
| cholletisaik777 | 13:ba5dca9e18d8 | 43 | #define PL_PREV_STATE 0x0000000000000004 |
| cholletisaik777 | 13:ba5dca9e18d8 | 44 | #define IS_I2C_ACK 0x0000000000000008 |
| cholletisaik777 | 13:ba5dca9e18d8 | 45 | #define PL_STATUS 0x0000000000000010 |
| cholletisaik777 | 12:cb3ee1ac3638 | 46 | /*End*/ |
| cholletisaik777 | 12:cb3ee1ac3638 | 47 | |
| cholletisaik777 | 12:cb3ee1ac3638 | 48 | /*TC_TM*/ |
| cholletisaik777 | 12:cb3ee1ac3638 | 49 | #define CDMS_TC_TM_STATUS 0x0000000000000001 |
| cholletisaik777 | 12:cb3ee1ac3638 | 50 | #define BAE_TC_STATUS 0x0000000000000002 |
| cholletisaik777 | 12:cb3ee1ac3638 | 51 | #define PL_TC_STATUS 0x0000000000000004 |
| cholletisaik777 | 12:cb3ee1ac3638 | 52 | #define CDMS_TC_STATUS 0x0000000000000008 |
| cholletisaik777 | 12:cb3ee1ac3638 | 53 | #define TC_I2C_BAE_STATUS 0x0000000000000010 |
| cholletisaik777 | 12:cb3ee1ac3638 | 54 | #define TC_I2C_PL_STATUS 0x0000000000000020 |
| cholletisaik777 | 12:cb3ee1ac3638 | 55 | #define TC_BAE_I2C_ERR 0x0000000000000040 |
| cholletisaik777 | 12:cb3ee1ac3638 | 56 | #define TC_PL_I2C_ERR 0x0000000000000080 |
| cholletisaik777 | 12:cb3ee1ac3638 | 57 | #define TX_TM_STATUS 0x0000000000000100 |
| cholletisaik777 | 12:cb3ee1ac3638 | 58 | #define TX_TM_ERROR 0x0000000000000200 |
| cholletisaik777 | 12:cb3ee1ac3638 | 59 | /*End*/ |