TEST_CODE_ApplyTo2V1_API

Dependencies:   SDFileSystem max32630fthr USBDevice

Committer:
china_sn0w
Date:
Mon Jun 22 05:27:48 2020 +0000
Revision:
3:35b05d91568d
Parent:
1:7530b7eb757a
Child:
4:217334c3a5b2
1.2Alpha;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
china_sn0w 1:7530b7eb757a 1 #ifndef __DUT_REGCONFIG__
china_sn0w 1:7530b7eb757a 2 #define __DUT_REGCONFIG__
china_sn0w 1:7530b7eb757a 3
china_sn0w 1:7530b7eb757a 4 #include "mbed.h"
china_sn0w 1:7530b7eb757a 5 #include "cmsis_os.h"
china_sn0w 1:7530b7eb757a 6 #include "max32630fthr.h"
china_sn0w 1:7530b7eb757a 7
china_sn0w 1:7530b7eb757a 8 #define DUT_DEV_ADDR 0xD8
china_sn0w 1:7530b7eb757a 9
china_sn0w 1:7530b7eb757a 10 #define DUT_REG_NUM 256
china_sn0w 1:7530b7eb757a 11
china_sn0w 1:7530b7eb757a 12 #define REG_MCU_CFG 0x00
china_sn0w 1:7530b7eb757a 13 #define REG_SYS_CFG 0x01
china_sn0w 1:7530b7eb757a 14 #define REG_PW_CTRL 0x07
china_sn0w 1:7530b7eb757a 15 #define REG_CMD 0x0a
china_sn0w 1:7530b7eb757a 16 #define REG_SIZE 0x0b
china_sn0w 1:7530b7eb757a 17 #define REG_SCRATCH_PAD_BASE 0x0c
china_sn0w 1:7530b7eb757a 18 #define REG_INTEG_CNT_L 0x45
china_sn0w 1:7530b7eb757a 19 #define REG_INTEG_CNT_M 0x46
china_sn0w 1:7530b7eb757a 20 #define REG_INTEG_CNT_H 0x47
china_sn0w 1:7530b7eb757a 21 #define REG_RANGING_CTRL 0x50
china_sn0w 1:7530b7eb757a 22 #define REG_RANGING_ANA_CTRL 0xbd
china_sn0w 1:7530b7eb757a 23
china_sn0w 1:7530b7eb757a 24
china_sn0w 1:7530b7eb757a 25 typedef struct DUTREG
china_sn0w 1:7530b7eb757a 26 {
china_sn0w 1:7530b7eb757a 27 uint8_t addr;
china_sn0w 1:7530b7eb757a 28 uint8_t value;
china_sn0w 1:7530b7eb757a 29 }DUTREG;
china_sn0w 1:7530b7eb757a 30
china_sn0w 3:35b05d91568d 31 void DeviceAllInit(uint8_t rco, uint8_t tdc, uint8_t dcr);
china_sn0w 3:35b05d91568d 32
china_sn0w 1:7530b7eb757a 33 void DUT_FirmwareInit(void);
china_sn0w 1:7530b7eb757a 34 void ChipInitReset(void);
china_sn0w 3:35b05d91568d 35 void DUT_RegInit(uint8_t rco, uint8_t tdc, uint8_t dcr);
china_sn0w 1:7530b7eb757a 36 void Enable_DUT_Interrupt(void);
china_sn0w 1:7530b7eb757a 37 void Disable_DUT_Interrupt(void);
china_sn0w 1:7530b7eb757a 38 void InterruptHandle(void);
china_sn0w 1:7530b7eb757a 39
china_sn0w 1:7530b7eb757a 40 void ContinuousMeasureReport();
china_sn0w 1:7530b7eb757a 41 void HistogramReport();
china_sn0w 1:7530b7eb757a 42
china_sn0w 1:7530b7eb757a 43 uint8_t WriteOneReg(uint8_t addr, uint8_t data);
china_sn0w 1:7530b7eb757a 44 uint8_t ReadOneReg(uint8_t addr, uint8_t *data);
china_sn0w 1:7530b7eb757a 45 uint8_t ReadAllRegToTable(void);
china_sn0w 1:7530b7eb757a 46 uint8_t WriteFW(uint16_t size);
china_sn0w 1:7530b7eb757a 47 uint8_t vangogh_ram_rd(uint8_t tdc);
china_sn0w 3:35b05d91568d 48 uint8_t OneTimeMeasure(uint16_t *lsb, uint16_t *milimeter, uint32_t *peak, uint16_t *noise_level);
china_sn0w 1:7530b7eb757a 49 uint8_t ContinuousMeasure(void);
china_sn0w 3:35b05d91568d 50 uint8_t RaadContinuousMeasure(uint16_t *lsb, uint16_t *milimeter, uint32_t *peak, uint16_t *noise_level);
china_sn0w 1:7530b7eb757a 51 uint8_t StopContinuousMeasure(void);
china_sn0w 1:7530b7eb757a 52 uint8_t DCRTest(uint8_t vspad, uint8_t test_time);
china_sn0w 1:7530b7eb757a 53 uint8_t DelayLineTest(uint8_t phase, uint8_t* buf);
china_sn0w 1:7530b7eb757a 54 uint8_t GetTdcPhase(uint8_t* buf);
china_sn0w 3:35b05d91568d 55 uint8_t SetWindow(uint8_t* pd);
china_sn0w 3:35b05d91568d 56 uint8_t RCO_Trim(uint8_t *rco);
china_sn0w 3:35b05d91568d 57 uint8_t BVD_Trim(uint8_t *bvd);
china_sn0w 3:35b05d91568d 58 uint8_t Pixel_Enable(uint8_t *buf);
china_sn0w 1:7530b7eb757a 59
china_sn0w 1:7530b7eb757a 60
china_sn0w 1:7530b7eb757a 61 void StoreHistogram(uint16_t histogram_pos, uint16_t histogram_num, uint8_t tdc);
china_sn0w 1:7530b7eb757a 62
china_sn0w 1:7530b7eb757a 63 #endif
china_sn0w 1:7530b7eb757a 64
china_sn0w 1:7530b7eb757a 65
china_sn0w 1:7530b7eb757a 66
china_sn0w 1:7530b7eb757a 67