Diff: DefinitionsAndGlobals.h

Revision:

290:3159ff1081a2

Parent:

289:9bd62b69874c

Child:

295:699801854b71

--- a/DefinitionsAndGlobals.h	Sat Aug 06 06:34:38 2016 +0000
+++ b/DefinitionsAndGlobals.h	Sun Aug 07 10:36:59 2016 +0000
@@ -279,7 +279,7 @@
 DigitalIn V_B_PGOOD_2 (PIN7);
 DigitalIn V_C_PGOOD (PIN54);
 DigitalIn COMRX_OC_FAULT (PIN68);
-DigitalIn COMTX_OC_FAULT (PIN69);
+//DigitalIn COMTX_OC_FAULT (PIN69);
 DigitalIn BAE_OC_FAULT (PIN92);
 DigitalOut PL_GPIO_1_STATUS (PIN71); // PYLD EPS CNTRL Signal1 / PYLD_EPS_CNTRL_SIG1
 DigitalOut PL_GPIO_2_STATUS (PIN81);//PYLD EPS CNTRL 2 / PYLD_EPS_CNTRL_2
@@ -320,30 +320,30 @@
 uint32_t TIME_LATEST_SPI_SPEED;
 
 //Counter's
-uint16_t CDMS_I2C_ERR_SPEED_COUNTER;
-uint16_t CDMS_I2C_ERR_BAE_COUNTER;
-uint16_t CDMS_HK_MAIN_COUNTER;
-uint16_t COMRX_RESET_COUNTER;
-uint16_t PL_MAIN_COUNTER;
-uint16_t PL_RCV_SC_DATA_COUNTER;
-uint16_t CDMS_WR_SD_FAULT_COUNTER;
+uint16_t CDMS_I2C_ERR_SPEED_COUNTER = 0;
+uint16_t CDMS_I2C_ERR_BAE_COUNTER = 0;
+uint16_t CDMS_HK_MAIN_COUNTER = 0;
+uint16_t COMRX_RESET_COUNTER = 0;
+uint16_t PL_MAIN_COUNTER = 0;
+uint16_t PL_RCV_SC_DATA_COUNTER = 0;
+uint16_t CDMS_WR_SD_FAULT_COUNTER = 0;
 uint16_t SD_LIB_WRITES = 0;
 
 //CDMS RAM parameters
-uint8_t PL_INIT_STATUS;
-uint8_t PL_MAIN_STATUS;
+uint8_t PL_INIT_STATUS = 0;
+uint8_t PL_MAIN_status;
 uint8_t PL_LOW_POWER;
 uint8_t PL_STATE;
-uint8_t PL_RCV_SC_DATA_STATUS;
+uint8_t PL_RCV_SC_DATA_STATUS = 0;
 uint8_t COM_SESSION;
 uint8_t COM_RX;
 uint8_t RF_SW_STATUS;
 uint8_t COM_TX;
 uint8_t COM_TX_STATUS;
 uint8_t COM_MNG_TMTC;
-uint8_t EN_CDMS_HK = 0x01;
-uint8_t EN_PL = 0x01;
-uint8_t EN_RCV_SC = 0x01;
+uint8_t EN_CDMS_HK = 1;
+uint8_t EN_PL = 1;
+uint8_t EN_RCV_SC = 1;
 uint8_t CDMS_INIT_STATUS;
 uint8_t CDMS_HK_STATUS;
 uint8_t COM_RX_STATUS;