Class for using AD7730 chip
AD7730.cpp@0:c584a588c24f, 2011-12-16 (annotated)
- Committer:
- cfscontrols2
- Date:
- Fri Dec 16 20:31:01 2011 +0000
- Revision:
- 0:c584a588c24f
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
cfscontrols2 | 0:c584a588c24f | 1 | #include "AD7730.h" |
cfscontrols2 | 0:c584a588c24f | 2 | |
cfscontrols2 | 0:c584a588c24f | 3 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 4 | //default constructor requires pin names for spi and ready pin |
cfscontrols2 | 0:c584a588c24f | 5 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 6 | AD7730::AD7730(PinName mosi, PinName miso, PinName sclk, PinName ready, PinName cs) : _spi(mosi, miso, sclk), _cs(cs), _readyDig(ready), _LED3(LED3){ |
cfscontrols2 | 0:c584a588c24f | 7 | |
cfscontrols2 | 0:c584a588c24f | 8 | _readyPin = ready; |
cfscontrols2 | 0:c584a588c24f | 9 | |
cfscontrols2 | 0:c584a588c24f | 10 | //setup default parameters for spi |
cfscontrols2 | 0:c584a588c24f | 11 | _spi.format(8, 1); //8bits with polarity 0 (clock idle low), phase 1 (write on falling edge, read on rising edge) |
cfscontrols2 | 0:c584a588c24f | 12 | _spi.frequency(1000000); //2Mhz |
cfscontrols2 | 0:c584a588c24f | 13 | |
cfscontrols2 | 0:c584a588c24f | 14 | //set default setup |
cfscontrols2 | 0:c584a588c24f | 15 | _minWeight = 1; |
cfscontrols2 | 0:c584a588c24f | 16 | _maxWeight = 5; |
cfscontrols2 | 0:c584a588c24f | 17 | _fullScaleWeight = 11.023; //5kgs |
cfscontrols2 | 0:c584a588c24f | 18 | |
cfscontrols2 | 0:c584a588c24f | 19 | //reset the device |
cfscontrols2 | 0:c584a588c24f | 20 | reset(true); |
cfscontrols2 | 0:c584a588c24f | 21 | |
cfscontrols2 | 0:c584a588c24f | 22 | //get default registry values |
cfscontrols2 | 0:c584a588c24f | 23 | _mode = readRegistry(MODE_REG); |
cfscontrols2 | 0:c584a588c24f | 24 | _filter = readRegistry(FILTER_REG); |
cfscontrols2 | 0:c584a588c24f | 25 | _dac = readRegistry(DAC_REG); |
cfscontrols2 | 0:c584a588c24f | 26 | _offset = readRegistry(OFFSET_REG); |
cfscontrols2 | 0:c584a588c24f | 27 | _gain = readRegistry(GAIN_REG); |
cfscontrols2 | 0:c584a588c24f | 28 | |
cfscontrols2 | 0:c584a588c24f | 29 | //set chip select high |
cfscontrols2 | 0:c584a588c24f | 30 | _cs = 1; |
cfscontrols2 | 0:c584a588c24f | 31 | |
cfscontrols2 | 0:c584a588c24f | 32 | //run internal calibration |
cfscontrols2 | 0:c584a588c24f | 33 | internalFullCal(); |
cfscontrols2 | 0:c584a588c24f | 34 | internalZeroCal(); |
cfscontrols2 | 0:c584a588c24f | 35 | |
cfscontrols2 | 0:c584a588c24f | 36 | //turn off LED3 |
cfscontrols2 | 0:c584a588c24f | 37 | _LED3 = false; |
cfscontrols2 | 0:c584a588c24f | 38 | |
cfscontrols2 | 0:c584a588c24f | 39 | |
cfscontrols2 | 0:c584a588c24f | 40 | _continous = false; |
cfscontrols2 | 0:c584a588c24f | 41 | _bufferCount = 0; |
cfscontrols2 | 0:c584a588c24f | 42 | memset(_readBuffer, 0, 100); |
cfscontrols2 | 0:c584a588c24f | 43 | |
cfscontrols2 | 0:c584a588c24f | 44 | } |
cfscontrols2 | 0:c584a588c24f | 45 | |
cfscontrols2 | 0:c584a588c24f | 46 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 47 | // default destructor |
cfscontrols2 | 0:c584a588c24f | 48 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 49 | AD7730::~AD7730(void){} |
cfscontrols2 | 0:c584a588c24f | 50 | |
cfscontrols2 | 0:c584a588c24f | 51 | |
cfscontrols2 | 0:c584a588c24f | 52 | |
cfscontrols2 | 0:c584a588c24f | 53 | |
cfscontrols2 | 0:c584a588c24f | 54 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 55 | //function to read the specified registry value |
cfscontrols2 | 0:c584a588c24f | 56 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 57 | int AD7730::readRegistry(int registry){ |
cfscontrols2 | 0:c584a588c24f | 58 | |
cfscontrols2 | 0:c584a588c24f | 59 | int readReg = 0; |
cfscontrols2 | 0:c584a588c24f | 60 | int bytes = 0; |
cfscontrols2 | 0:c584a588c24f | 61 | |
cfscontrols2 | 0:c584a588c24f | 62 | switch(registry){ |
cfscontrols2 | 0:c584a588c24f | 63 | |
cfscontrols2 | 0:c584a588c24f | 64 | case STATUS_REG: //status registry |
cfscontrols2 | 0:c584a588c24f | 65 | { |
cfscontrols2 | 0:c584a588c24f | 66 | readReg = 0x10; |
cfscontrols2 | 0:c584a588c24f | 67 | bytes = 1; |
cfscontrols2 | 0:c584a588c24f | 68 | break; |
cfscontrols2 | 0:c584a588c24f | 69 | } |
cfscontrols2 | 0:c584a588c24f | 70 | case DATA_REG: //data registry |
cfscontrols2 | 0:c584a588c24f | 71 | { |
cfscontrols2 | 0:c584a588c24f | 72 | _LED3 = _readyDig ? true : false; |
cfscontrols2 | 0:c584a588c24f | 73 | readReg = 0x11; |
cfscontrols2 | 0:c584a588c24f | 74 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 75 | break; |
cfscontrols2 | 0:c584a588c24f | 76 | } |
cfscontrols2 | 0:c584a588c24f | 77 | case MODE_REG: //mode registry |
cfscontrols2 | 0:c584a588c24f | 78 | { |
cfscontrols2 | 0:c584a588c24f | 79 | readReg = 0x12; |
cfscontrols2 | 0:c584a588c24f | 80 | bytes = 2; |
cfscontrols2 | 0:c584a588c24f | 81 | break; |
cfscontrols2 | 0:c584a588c24f | 82 | } |
cfscontrols2 | 0:c584a588c24f | 83 | case FILTER_REG: //filter registry |
cfscontrols2 | 0:c584a588c24f | 84 | { |
cfscontrols2 | 0:c584a588c24f | 85 | readReg = 0x13; |
cfscontrols2 | 0:c584a588c24f | 86 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 87 | break; |
cfscontrols2 | 0:c584a588c24f | 88 | } |
cfscontrols2 | 0:c584a588c24f | 89 | case DAC_REG: //dac registry |
cfscontrols2 | 0:c584a588c24f | 90 | { |
cfscontrols2 | 0:c584a588c24f | 91 | readReg = 0x14; |
cfscontrols2 | 0:c584a588c24f | 92 | bytes = 1; |
cfscontrols2 | 0:c584a588c24f | 93 | break; |
cfscontrols2 | 0:c584a588c24f | 94 | } |
cfscontrols2 | 0:c584a588c24f | 95 | case OFFSET_REG: //offset registry |
cfscontrols2 | 0:c584a588c24f | 96 | { |
cfscontrols2 | 0:c584a588c24f | 97 | readReg = 0x15; |
cfscontrols2 | 0:c584a588c24f | 98 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 99 | break; |
cfscontrols2 | 0:c584a588c24f | 100 | } |
cfscontrols2 | 0:c584a588c24f | 101 | case GAIN_REG: //gain registry |
cfscontrols2 | 0:c584a588c24f | 102 | { |
cfscontrols2 | 0:c584a588c24f | 103 | readReg = 0x16; |
cfscontrols2 | 0:c584a588c24f | 104 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 105 | break; |
cfscontrols2 | 0:c584a588c24f | 106 | } |
cfscontrols2 | 0:c584a588c24f | 107 | case TEST_REG: //test registry |
cfscontrols2 | 0:c584a588c24f | 108 | { |
cfscontrols2 | 0:c584a588c24f | 109 | readReg = 0x17; |
cfscontrols2 | 0:c584a588c24f | 110 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 111 | break; |
cfscontrols2 | 0:c584a588c24f | 112 | } |
cfscontrols2 | 0:c584a588c24f | 113 | default: //default to status registry |
cfscontrols2 | 0:c584a588c24f | 114 | { |
cfscontrols2 | 0:c584a588c24f | 115 | readReg = 0x10; |
cfscontrols2 | 0:c584a588c24f | 116 | bytes = 1; |
cfscontrols2 | 0:c584a588c24f | 117 | break; |
cfscontrols2 | 0:c584a588c24f | 118 | } |
cfscontrols2 | 0:c584a588c24f | 119 | } // end of switch statement |
cfscontrols2 | 0:c584a588c24f | 120 | |
cfscontrols2 | 0:c584a588c24f | 121 | //send command to read the registry |
cfscontrols2 | 0:c584a588c24f | 122 | _cs = 0; |
cfscontrols2 | 0:c584a588c24f | 123 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 124 | _spi.write(readReg); |
cfscontrols2 | 0:c584a588c24f | 125 | |
cfscontrols2 | 0:c584a588c24f | 126 | int value = 0; |
cfscontrols2 | 0:c584a588c24f | 127 | //loop through bytes of returned data |
cfscontrols2 | 0:c584a588c24f | 128 | for(int i=0; i<bytes; i++){ |
cfscontrols2 | 0:c584a588c24f | 129 | value = (value << 8) | _spi.write(EMPTY_SPI); //shift previous return value up by 8 bits to make room for new data |
cfscontrols2 | 0:c584a588c24f | 130 | } |
cfscontrols2 | 0:c584a588c24f | 131 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 132 | _cs = 1; |
cfscontrols2 | 0:c584a588c24f | 133 | |
cfscontrols2 | 0:c584a588c24f | 134 | return value; |
cfscontrols2 | 0:c584a588c24f | 135 | } |
cfscontrols2 | 0:c584a588c24f | 136 | |
cfscontrols2 | 0:c584a588c24f | 137 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 138 | //function to write to the specified registry |
cfscontrols2 | 0:c584a588c24f | 139 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 140 | int AD7730::writeRegistry(int registry, int value){ |
cfscontrols2 | 0:c584a588c24f | 141 | |
cfscontrols2 | 0:c584a588c24f | 142 | int writeReg = 0; |
cfscontrols2 | 0:c584a588c24f | 143 | int bytes = 0; |
cfscontrols2 | 0:c584a588c24f | 144 | |
cfscontrols2 | 0:c584a588c24f | 145 | switch(registry){ |
cfscontrols2 | 0:c584a588c24f | 146 | |
cfscontrols2 | 0:c584a588c24f | 147 | case MODE_REG: //mode registry |
cfscontrols2 | 0:c584a588c24f | 148 | { |
cfscontrols2 | 0:c584a588c24f | 149 | writeReg = 0x02; |
cfscontrols2 | 0:c584a588c24f | 150 | bytes = 2; |
cfscontrols2 | 0:c584a588c24f | 151 | _mode = value; |
cfscontrols2 | 0:c584a588c24f | 152 | //check if continous converstion is being stopped or started |
cfscontrols2 | 0:c584a588c24f | 153 | _continous = ((value & 0x2000) > 0)? true : false; |
cfscontrols2 | 0:c584a588c24f | 154 | break; |
cfscontrols2 | 0:c584a588c24f | 155 | } |
cfscontrols2 | 0:c584a588c24f | 156 | case FILTER_REG: //filter registry |
cfscontrols2 | 0:c584a588c24f | 157 | { |
cfscontrols2 | 0:c584a588c24f | 158 | writeReg = 0x03; |
cfscontrols2 | 0:c584a588c24f | 159 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 160 | _filter = value; |
cfscontrols2 | 0:c584a588c24f | 161 | break; |
cfscontrols2 | 0:c584a588c24f | 162 | } |
cfscontrols2 | 0:c584a588c24f | 163 | case DAC_REG: //dac registry |
cfscontrols2 | 0:c584a588c24f | 164 | { |
cfscontrols2 | 0:c584a588c24f | 165 | writeReg = 0x04; |
cfscontrols2 | 0:c584a588c24f | 166 | bytes = 1; |
cfscontrols2 | 0:c584a588c24f | 167 | _dac = value; |
cfscontrols2 | 0:c584a588c24f | 168 | break; |
cfscontrols2 | 0:c584a588c24f | 169 | } |
cfscontrols2 | 0:c584a588c24f | 170 | case OFFSET_REG: //offset registry |
cfscontrols2 | 0:c584a588c24f | 171 | { |
cfscontrols2 | 0:c584a588c24f | 172 | writeReg = 0x05; |
cfscontrols2 | 0:c584a588c24f | 173 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 174 | _offset = value; |
cfscontrols2 | 0:c584a588c24f | 175 | break; |
cfscontrols2 | 0:c584a588c24f | 176 | } |
cfscontrols2 | 0:c584a588c24f | 177 | case GAIN_REG: //gain registry |
cfscontrols2 | 0:c584a588c24f | 178 | { |
cfscontrols2 | 0:c584a588c24f | 179 | writeReg = 0x06; |
cfscontrols2 | 0:c584a588c24f | 180 | bytes = 3; |
cfscontrols2 | 0:c584a588c24f | 181 | _gain = value; |
cfscontrols2 | 0:c584a588c24f | 182 | break; |
cfscontrols2 | 0:c584a588c24f | 183 | } |
cfscontrols2 | 0:c584a588c24f | 184 | default: //default to communications register |
cfscontrols2 | 0:c584a588c24f | 185 | { |
cfscontrols2 | 0:c584a588c24f | 186 | writeReg = 0x00; |
cfscontrols2 | 0:c584a588c24f | 187 | bytes = 0; |
cfscontrols2 | 0:c584a588c24f | 188 | break; |
cfscontrols2 | 0:c584a588c24f | 189 | } |
cfscontrols2 | 0:c584a588c24f | 190 | } // end of switch statement |
cfscontrols2 | 0:c584a588c24f | 191 | |
cfscontrols2 | 0:c584a588c24f | 192 | //send command to write to a the registry |
cfscontrols2 | 0:c584a588c24f | 193 | _cs = 0; |
cfscontrols2 | 0:c584a588c24f | 194 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 195 | _spi.write(writeReg); |
cfscontrols2 | 0:c584a588c24f | 196 | |
cfscontrols2 | 0:c584a588c24f | 197 | //send data |
cfscontrols2 | 0:c584a588c24f | 198 | switch(bytes) |
cfscontrols2 | 0:c584a588c24f | 199 | { |
cfscontrols2 | 0:c584a588c24f | 200 | case 3: |
cfscontrols2 | 0:c584a588c24f | 201 | _spi.write(((value >> 16) & 255)); |
cfscontrols2 | 0:c584a588c24f | 202 | case 2: |
cfscontrols2 | 0:c584a588c24f | 203 | _spi.write(((value >> 8) & 255)); |
cfscontrols2 | 0:c584a588c24f | 204 | case 1: |
cfscontrols2 | 0:c584a588c24f | 205 | _spi.write((value & 255)); |
cfscontrols2 | 0:c584a588c24f | 206 | break; |
cfscontrols2 | 0:c584a588c24f | 207 | default: |
cfscontrols2 | 0:c584a588c24f | 208 | break; |
cfscontrols2 | 0:c584a588c24f | 209 | } |
cfscontrols2 | 0:c584a588c24f | 210 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 211 | _cs = 1; |
cfscontrols2 | 0:c584a588c24f | 212 | |
cfscontrols2 | 0:c584a588c24f | 213 | return value; |
cfscontrols2 | 0:c584a588c24f | 214 | } |
cfscontrols2 | 0:c584a588c24f | 215 | |
cfscontrols2 | 0:c584a588c24f | 216 | |
cfscontrols2 | 0:c584a588c24f | 217 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 218 | //function to initiate an internal full-scale calibration |
cfscontrols2 | 0:c584a588c24f | 219 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 220 | int AD7730::internalFullCal(void){ |
cfscontrols2 | 0:c584a588c24f | 221 | |
cfscontrols2 | 0:c584a588c24f | 222 | //reset execution timer |
cfscontrols2 | 0:c584a588c24f | 223 | _exeTmr.reset(); |
cfscontrols2 | 0:c584a588c24f | 224 | |
cfscontrols2 | 0:c584a588c24f | 225 | //1011000100110000 (0xB130) Internal Full-Scale Calibration, unipolar, long data, low reference, 0-80mv, channel 0 |
cfscontrols2 | 0:c584a588c24f | 226 | writeRegistry(MODE_REG, 0xB130); |
cfscontrols2 | 0:c584a588c24f | 227 | wait_us(1); //give time for ready line to go high |
cfscontrols2 | 0:c584a588c24f | 228 | |
cfscontrols2 | 0:c584a588c24f | 229 | //wait for ready pin to go low indicating calibration complete with timeout of 2000ms |
cfscontrols2 | 0:c584a588c24f | 230 | int time = 0; |
cfscontrols2 | 0:c584a588c24f | 231 | while(_readyDig && time < 2000){ |
cfscontrols2 | 0:c584a588c24f | 232 | wait_ms(2); |
cfscontrols2 | 0:c584a588c24f | 233 | time += 2; |
cfscontrols2 | 0:c584a588c24f | 234 | } |
cfscontrols2 | 0:c584a588c24f | 235 | |
cfscontrols2 | 0:c584a588c24f | 236 | //update execution time |
cfscontrols2 | 0:c584a588c24f | 237 | _exeTime = _exeTmr.read_us(); |
cfscontrols2 | 0:c584a588c24f | 238 | |
cfscontrols2 | 0:c584a588c24f | 239 | //check if timeout occurred |
cfscontrols2 | 0:c584a588c24f | 240 | if(time >= 2000){ |
cfscontrols2 | 0:c584a588c24f | 241 | _exeError = 56; |
cfscontrols2 | 0:c584a588c24f | 242 | return 1; |
cfscontrols2 | 0:c584a588c24f | 243 | } |
cfscontrols2 | 0:c584a588c24f | 244 | else { |
cfscontrols2 | 0:c584a588c24f | 245 | _exeError = 0; |
cfscontrols2 | 0:c584a588c24f | 246 | return 0; |
cfscontrols2 | 0:c584a588c24f | 247 | } |
cfscontrols2 | 0:c584a588c24f | 248 | } |
cfscontrols2 | 0:c584a588c24f | 249 | |
cfscontrols2 | 0:c584a588c24f | 250 | |
cfscontrols2 | 0:c584a588c24f | 251 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 252 | //function to initiate an internal zero-scale calibration |
cfscontrols2 | 0:c584a588c24f | 253 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 254 | int AD7730::internalZeroCal(void){ |
cfscontrols2 | 0:c584a588c24f | 255 | |
cfscontrols2 | 0:c584a588c24f | 256 | //reset execution timer |
cfscontrols2 | 0:c584a588c24f | 257 | _exeTmr.reset(); |
cfscontrols2 | 0:c584a588c24f | 258 | |
cfscontrols2 | 0:c584a588c24f | 259 | //1001000100110000 (0x9100) Internal Zero-Scale Calibration, unipolar, long data, low reference, 0-10mv, channel 0 |
cfscontrols2 | 0:c584a588c24f | 260 | writeRegistry(MODE_REG, 0x9100); |
cfscontrols2 | 0:c584a588c24f | 261 | wait_us(1); //give time for ready line to go high |
cfscontrols2 | 0:c584a588c24f | 262 | |
cfscontrols2 | 0:c584a588c24f | 263 | //wait for ready pin to go low indicating calibration complete with timeout of 2000ms |
cfscontrols2 | 0:c584a588c24f | 264 | int time = 0; |
cfscontrols2 | 0:c584a588c24f | 265 | while(_readyDig && time < 2000){ |
cfscontrols2 | 0:c584a588c24f | 266 | wait_ms(2); |
cfscontrols2 | 0:c584a588c24f | 267 | time += 2; |
cfscontrols2 | 0:c584a588c24f | 268 | } |
cfscontrols2 | 0:c584a588c24f | 269 | |
cfscontrols2 | 0:c584a588c24f | 270 | //update execution time |
cfscontrols2 | 0:c584a588c24f | 271 | _exeTime = _exeTmr.read_us(); |
cfscontrols2 | 0:c584a588c24f | 272 | |
cfscontrols2 | 0:c584a588c24f | 273 | //check if timeout occurred |
cfscontrols2 | 0:c584a588c24f | 274 | if(time >= 2000){ |
cfscontrols2 | 0:c584a588c24f | 275 | _exeError = 56; |
cfscontrols2 | 0:c584a588c24f | 276 | return 1; |
cfscontrols2 | 0:c584a588c24f | 277 | } |
cfscontrols2 | 0:c584a588c24f | 278 | else { |
cfscontrols2 | 0:c584a588c24f | 279 | _exeError = 0; |
cfscontrols2 | 0:c584a588c24f | 280 | return 0; |
cfscontrols2 | 0:c584a588c24f | 281 | } |
cfscontrols2 | 0:c584a588c24f | 282 | } |
cfscontrols2 | 0:c584a588c24f | 283 | |
cfscontrols2 | 0:c584a588c24f | 284 | |
cfscontrols2 | 0:c584a588c24f | 285 | |
cfscontrols2 | 0:c584a588c24f | 286 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 287 | //function to initialize the chip settings to default values after power up and to run internal calibration |
cfscontrols2 | 0:c584a588c24f | 288 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 289 | int AD7730::initialize(void){ |
cfscontrols2 | 0:c584a588c24f | 290 | |
cfscontrols2 | 0:c584a588c24f | 291 | //reset device |
cfscontrols2 | 0:c584a588c24f | 292 | reset(true); //initate a full reset |
cfscontrols2 | 0:c584a588c24f | 293 | |
cfscontrols2 | 0:c584a588c24f | 294 | systemLowCal(_minWeight); |
cfscontrols2 | 0:c584a588c24f | 295 | |
cfscontrols2 | 0:c584a588c24f | 296 | //set the Offset |
cfscontrols2 | 0:c584a588c24f | 297 | writeRegistry(OFFSET_REG, _offset); |
cfscontrols2 | 0:c584a588c24f | 298 | |
cfscontrols2 | 0:c584a588c24f | 299 | //set the Gain |
cfscontrols2 | 0:c584a588c24f | 300 | writeRegistry(GAIN_REG, _gain); |
cfscontrols2 | 0:c584a588c24f | 301 | |
cfscontrols2 | 0:c584a588c24f | 302 | //set the DAC |
cfscontrols2 | 0:c584a588c24f | 303 | writeRegistry(DAC_REG, _dac); |
cfscontrols2 | 0:c584a588c24f | 304 | |
cfscontrols2 | 0:c584a588c24f | 305 | return 0; |
cfscontrols2 | 0:c584a588c24f | 306 | |
cfscontrols2 | 0:c584a588c24f | 307 | } |
cfscontrols2 | 0:c584a588c24f | 308 | |
cfscontrols2 | 0:c584a588c24f | 309 | |
cfscontrols2 | 0:c584a588c24f | 310 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 311 | //function to initiate a system zero-scale calibration |
cfscontrols2 | 0:c584a588c24f | 312 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 313 | int AD7730::systemLowCal(double wgt){ |
cfscontrols2 | 0:c584a588c24f | 314 | |
cfscontrols2 | 0:c584a588c24f | 315 | //set minimum weight for low calibration |
cfscontrols2 | 0:c584a588c24f | 316 | _minWeight = wgt; |
cfscontrols2 | 0:c584a588c24f | 317 | |
cfscontrols2 | 0:c584a588c24f | 318 | |
cfscontrols2 | 0:c584a588c24f | 319 | //1101000100000000 (0xD100) System Zero-Scale Calibration, unipolar, long data, low reference, 0-10mv, channel 0 |
cfscontrols2 | 0:c584a588c24f | 320 | int mode = 0xD100; |
cfscontrols2 | 0:c584a588c24f | 321 | |
cfscontrols2 | 0:c584a588c24f | 322 | writeRegistry(MODE_REG, mode); |
cfscontrols2 | 0:c584a588c24f | 323 | |
cfscontrols2 | 0:c584a588c24f | 324 | wait_us(1); //give time for ready pin to go high |
cfscontrols2 | 0:c584a588c24f | 325 | int time = 0; |
cfscontrols2 | 0:c584a588c24f | 326 | while(_readyDig && time < 2000){ |
cfscontrols2 | 0:c584a588c24f | 327 | time += 2; |
cfscontrols2 | 0:c584a588c24f | 328 | wait_ms(2); |
cfscontrols2 | 0:c584a588c24f | 329 | }//wait for ready pin to go low |
cfscontrols2 | 0:c584a588c24f | 330 | |
cfscontrols2 | 0:c584a588c24f | 331 | if(_readyDig){ |
cfscontrols2 | 0:c584a588c24f | 332 | //printf("External Zero Failed\r\n"); |
cfscontrols2 | 0:c584a588c24f | 333 | } |
cfscontrols2 | 0:c584a588c24f | 334 | |
cfscontrols2 | 0:c584a588c24f | 335 | return (time >= 2000) ? 1 : 0; |
cfscontrols2 | 0:c584a588c24f | 336 | |
cfscontrols2 | 0:c584a588c24f | 337 | } |
cfscontrols2 | 0:c584a588c24f | 338 | |
cfscontrols2 | 0:c584a588c24f | 339 | |
cfscontrols2 | 0:c584a588c24f | 340 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 341 | //function to initiate a system high calibration |
cfscontrols2 | 0:c584a588c24f | 342 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 343 | int AD7730::systemHighCal(double max, double fullScale){ |
cfscontrols2 | 0:c584a588c24f | 344 | |
cfscontrols2 | 0:c584a588c24f | 345 | //get the current offset value |
cfscontrols2 | 0:c584a588c24f | 346 | int offset = readRegistry(OFFSET_REG); |
cfscontrols2 | 0:c584a588c24f | 347 | int fullScaleAdjust = ((double)offset - 8388608) + 16777215; |
cfscontrols2 | 0:c584a588c24f | 348 | fullScaleAdjust /= 2; |
cfscontrols2 | 0:c584a588c24f | 349 | //double calFactor = fullScale / (fullScaleAdjust / 2); //dual load cells splits the weight in half |
cfscontrols2 | 0:c584a588c24f | 350 | |
cfscontrols2 | 0:c584a588c24f | 351 | //set maximum weight for high calibration |
cfscontrols2 | 0:c584a588c24f | 352 | _maxWeight = max; |
cfscontrols2 | 0:c584a588c24f | 353 | //calculate the expected value for the maximum weight based on the full scale of the load cell |
cfscontrols2 | 0:c584a588c24f | 354 | double expected = ((fullScaleAdjust * max) / fullScale); |
cfscontrols2 | 0:c584a588c24f | 355 | |
cfscontrols2 | 0:c584a588c24f | 356 | //take some samples |
cfscontrols2 | 0:c584a588c24f | 357 | double avg = 0; |
cfscontrols2 | 0:c584a588c24f | 358 | double value = 0; |
cfscontrols2 | 0:c584a588c24f | 359 | for(int i=0; i<20; i++){ |
cfscontrols2 | 0:c584a588c24f | 360 | value = (double)read(); |
cfscontrols2 | 0:c584a588c24f | 361 | avg += value; |
cfscontrols2 | 0:c584a588c24f | 362 | } |
cfscontrols2 | 0:c584a588c24f | 363 | |
cfscontrols2 | 0:c584a588c24f | 364 | avg = avg / 20; |
cfscontrols2 | 0:c584a588c24f | 365 | |
cfscontrols2 | 0:c584a588c24f | 366 | //get current gain setting |
cfscontrols2 | 0:c584a588c24f | 367 | double gain = (double)readRegistry(GAIN_REG); |
cfscontrols2 | 0:c584a588c24f | 368 | |
cfscontrols2 | 0:c584a588c24f | 369 | //calculate new gain value |
cfscontrols2 | 0:c584a588c24f | 370 | double adjustedGain = gain * (expected / avg); |
cfscontrols2 | 0:c584a588c24f | 371 | |
cfscontrols2 | 0:c584a588c24f | 372 | printf("Expected: %.3f\r\nActual: %.3f\r\n", expected, avg); |
cfscontrols2 | 0:c584a588c24f | 373 | |
cfscontrols2 | 0:c584a588c24f | 374 | int err = 0; |
cfscontrols2 | 0:c584a588c24f | 375 | if(adjustedGain > 16777215){ |
cfscontrols2 | 0:c584a588c24f | 376 | //printf("Exceeded Maximum Gain Value\r\n"); |
cfscontrols2 | 0:c584a588c24f | 377 | err = 1; |
cfscontrols2 | 0:c584a588c24f | 378 | } |
cfscontrols2 | 0:c584a588c24f | 379 | |
cfscontrols2 | 0:c584a588c24f | 380 | //update gain registry |
cfscontrols2 | 0:c584a588c24f | 381 | writeRegistry(GAIN_REG, (int)adjustedGain); |
cfscontrols2 | 0:c584a588c24f | 382 | |
cfscontrols2 | 0:c584a588c24f | 383 | return err; |
cfscontrols2 | 0:c584a588c24f | 384 | } |
cfscontrols2 | 0:c584a588c24f | 385 | |
cfscontrols2 | 0:c584a588c24f | 386 | |
cfscontrols2 | 0:c584a588c24f | 387 | |
cfscontrols2 | 0:c584a588c24f | 388 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 389 | //function to initiate the conversion of a sample |
cfscontrols2 | 0:c584a588c24f | 390 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 391 | int AD7730::startConversion(bool wait){ |
cfscontrols2 | 0:c584a588c24f | 392 | |
cfscontrols2 | 0:c584a588c24f | 393 | //set the mode to do a single conversion |
cfscontrols2 | 0:c584a588c24f | 394 | //0101000100000000 (0x5000) Single Conversion, unipolar, short data, low reference, 0-10mv, channel 0 |
cfscontrols2 | 0:c584a588c24f | 395 | int mode = 0x5100; |
cfscontrols2 | 0:c584a588c24f | 396 | |
cfscontrols2 | 0:c584a588c24f | 397 | writeRegistry(MODE_REG, mode); |
cfscontrols2 | 0:c584a588c24f | 398 | |
cfscontrols2 | 0:c584a588c24f | 399 | if(wait){ |
cfscontrols2 | 0:c584a588c24f | 400 | //wait for conversion to complete |
cfscontrols2 | 0:c584a588c24f | 401 | |
cfscontrols2 | 0:c584a588c24f | 402 | wait_us(1); //give time for ready to go high*/ |
cfscontrols2 | 0:c584a588c24f | 403 | |
cfscontrols2 | 0:c584a588c24f | 404 | int time = 0; |
cfscontrols2 | 0:c584a588c24f | 405 | while(_readyDig && time < 2000000){ |
cfscontrols2 | 0:c584a588c24f | 406 | time += 2; |
cfscontrols2 | 0:c584a588c24f | 407 | wait_us(2); |
cfscontrols2 | 0:c584a588c24f | 408 | }//wait for ready pin to go low.*/ |
cfscontrols2 | 0:c584a588c24f | 409 | |
cfscontrols2 | 0:c584a588c24f | 410 | if(time >= 2000000){ |
cfscontrols2 | 0:c584a588c24f | 411 | //printf("Convert Timeout\r\n"); |
cfscontrols2 | 0:c584a588c24f | 412 | _exeError = 56; |
cfscontrols2 | 0:c584a588c24f | 413 | return 1; |
cfscontrols2 | 0:c584a588c24f | 414 | } |
cfscontrols2 | 0:c584a588c24f | 415 | } |
cfscontrols2 | 0:c584a588c24f | 416 | |
cfscontrols2 | 0:c584a588c24f | 417 | return 0; |
cfscontrols2 | 0:c584a588c24f | 418 | } |
cfscontrols2 | 0:c584a588c24f | 419 | |
cfscontrols2 | 0:c584a588c24f | 420 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 421 | //function to do a single read with conversion |
cfscontrols2 | 0:c584a588c24f | 422 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 423 | int AD7730::read(){ |
cfscontrols2 | 0:c584a588c24f | 424 | |
cfscontrols2 | 0:c584a588c24f | 425 | if(_continous){ |
cfscontrols2 | 0:c584a588c24f | 426 | //chip is running in continous conversion mode |
cfscontrols2 | 0:c584a588c24f | 427 | return _lastValue; |
cfscontrols2 | 0:c584a588c24f | 428 | } |
cfscontrols2 | 0:c584a588c24f | 429 | else { |
cfscontrols2 | 0:c584a588c24f | 430 | //a new conversion must be started |
cfscontrols2 | 0:c584a588c24f | 431 | startConversion(true); |
cfscontrols2 | 0:c584a588c24f | 432 | return readRegistry(DATA_REG); |
cfscontrols2 | 0:c584a588c24f | 433 | } |
cfscontrols2 | 0:c584a588c24f | 434 | } |
cfscontrols2 | 0:c584a588c24f | 435 | |
cfscontrols2 | 0:c584a588c24f | 436 | |
cfscontrols2 | 0:c584a588c24f | 437 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 438 | //function to set the filter settings |
cfscontrols2 | 0:c584a588c24f | 439 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 440 | void AD7730::setFilter(int SF, bool chop, int filter2){ |
cfscontrols2 | 0:c584a588c24f | 441 | |
cfscontrols2 | 0:c584a588c24f | 442 | SF = SF << 12; //slide SF settings up 12 bits |
cfscontrols2 | 0:c584a588c24f | 443 | |
cfscontrols2 | 0:c584a588c24f | 444 | switch(filter2){ |
cfscontrols2 | 0:c584a588c24f | 445 | case 2: |
cfscontrols2 | 0:c584a588c24f | 446 | SF = SF | 512; //turn on bit 10 for skip mode |
cfscontrols2 | 0:c584a588c24f | 447 | break; |
cfscontrols2 | 0:c584a588c24f | 448 | case 1: |
cfscontrols2 | 0:c584a588c24f | 449 | SF = SF | 256; //turn on bit 09 for fast mode |
cfscontrols2 | 0:c584a588c24f | 450 | break; |
cfscontrols2 | 0:c584a588c24f | 451 | default: |
cfscontrols2 | 0:c584a588c24f | 452 | break; //leave bits 9 & 10 off so secondary filter is fully enabled |
cfscontrols2 | 0:c584a588c24f | 453 | } |
cfscontrols2 | 0:c584a588c24f | 454 | |
cfscontrols2 | 0:c584a588c24f | 455 | if(chop){ |
cfscontrols2 | 0:c584a588c24f | 456 | SF = SF | 16; //turn on bit 5 to enable chop mode |
cfscontrols2 | 0:c584a588c24f | 457 | } |
cfscontrols2 | 0:c584a588c24f | 458 | |
cfscontrols2 | 0:c584a588c24f | 459 | writeRegistry(FILTER_REG,SF); |
cfscontrols2 | 0:c584a588c24f | 460 | |
cfscontrols2 | 0:c584a588c24f | 461 | } |
cfscontrols2 | 0:c584a588c24f | 462 | |
cfscontrols2 | 0:c584a588c24f | 463 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 464 | //function to reset the chip |
cfscontrols2 | 0:c584a588c24f | 465 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 466 | void AD7730::reset(bool fullReset){ |
cfscontrols2 | 0:c584a588c24f | 467 | |
cfscontrols2 | 0:c584a588c24f | 468 | _cs = 0; |
cfscontrols2 | 0:c584a588c24f | 469 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 470 | _spi.write(0xFF); |
cfscontrols2 | 0:c584a588c24f | 471 | _spi.write(0xFF); |
cfscontrols2 | 0:c584a588c24f | 472 | _spi.write(0xFF); |
cfscontrols2 | 0:c584a588c24f | 473 | _spi.write(0xFF); |
cfscontrols2 | 0:c584a588c24f | 474 | _spi.write(0xFF); |
cfscontrols2 | 0:c584a588c24f | 475 | wait_us(5); |
cfscontrols2 | 0:c584a588c24f | 476 | _cs = 1; |
cfscontrols2 | 0:c584a588c24f | 477 | |
cfscontrols2 | 0:c584a588c24f | 478 | //if not a full reset, then reload registry settings |
cfscontrols2 | 0:c584a588c24f | 479 | if(!fullReset){ |
cfscontrols2 | 0:c584a588c24f | 480 | writeRegistry(MODE_REG, _mode); |
cfscontrols2 | 0:c584a588c24f | 481 | writeRegistry(FILTER_REG, _filter); |
cfscontrols2 | 0:c584a588c24f | 482 | writeRegistry(DAC_REG, _dac); |
cfscontrols2 | 0:c584a588c24f | 483 | writeRegistry(OFFSET_REG, _offset); |
cfscontrols2 | 0:c584a588c24f | 484 | writeRegistry(GAIN_REG, _gain); |
cfscontrols2 | 0:c584a588c24f | 485 | } |
cfscontrols2 | 0:c584a588c24f | 486 | else { |
cfscontrols2 | 0:c584a588c24f | 487 | //reinitiate internal calibration |
cfscontrols2 | 0:c584a588c24f | 488 | internalFullCal(); |
cfscontrols2 | 0:c584a588c24f | 489 | wait_ms(100); |
cfscontrols2 | 0:c584a588c24f | 490 | internalZeroCal(); |
cfscontrols2 | 0:c584a588c24f | 491 | wait_ms(100); |
cfscontrols2 | 0:c584a588c24f | 492 | } |
cfscontrols2 | 0:c584a588c24f | 493 | } |
cfscontrols2 | 0:c584a588c24f | 494 | |
cfscontrols2 | 0:c584a588c24f | 495 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 496 | //function to adjust the DAC |
cfscontrols2 | 0:c584a588c24f | 497 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 498 | int AD7730::adjustDAC(int direction){ |
cfscontrols2 | 0:c584a588c24f | 499 | |
cfscontrols2 | 0:c584a588c24f | 500 | int DAC = readRegistry(DAC_REG); |
cfscontrols2 | 0:c584a588c24f | 501 | int sign = DAC & 32; //get the sign bit |
cfscontrols2 | 0:c584a588c24f | 502 | DAC &= 31; //remove sign bit |
cfscontrols2 | 0:c584a588c24f | 503 | |
cfscontrols2 | 0:c584a588c24f | 504 | |
cfscontrols2 | 0:c584a588c24f | 505 | if(direction > 0){ |
cfscontrols2 | 0:c584a588c24f | 506 | //increment DAC |
cfscontrols2 | 0:c584a588c24f | 507 | if((sign > 0) && (DAC == 1)){ //sign bit is set and DAC is already at 1 change to 0; |
cfscontrols2 | 0:c584a588c24f | 508 | DAC = 0; |
cfscontrols2 | 0:c584a588c24f | 509 | sign = 0; |
cfscontrols2 | 0:c584a588c24f | 510 | } |
cfscontrols2 | 0:c584a588c24f | 511 | else if((sign == 0) && (DAC >= 0)){ //sign bit is not set increment DAC |
cfscontrols2 | 0:c584a588c24f | 512 | DAC++; |
cfscontrols2 | 0:c584a588c24f | 513 | } |
cfscontrols2 | 0:c584a588c24f | 514 | else if ((sign > 0) && (DAC > 0)){ //sign bit is set decrement DAC because it is negative |
cfscontrols2 | 0:c584a588c24f | 515 | DAC--; |
cfscontrols2 | 0:c584a588c24f | 516 | } |
cfscontrols2 | 0:c584a588c24f | 517 | |
cfscontrols2 | 0:c584a588c24f | 518 | } |
cfscontrols2 | 0:c584a588c24f | 519 | |
cfscontrols2 | 0:c584a588c24f | 520 | else if(direction < 0){ |
cfscontrols2 | 0:c584a588c24f | 521 | //decrement DAC |
cfscontrols2 | 0:c584a588c24f | 522 | if((sign == 0) && (DAC == 0)){ //sign bit is not set and DAC is already at 0 |
cfscontrols2 | 0:c584a588c24f | 523 | DAC = 1; |
cfscontrols2 | 0:c584a588c24f | 524 | sign = 1; |
cfscontrols2 | 0:c584a588c24f | 525 | } |
cfscontrols2 | 0:c584a588c24f | 526 | else if((sign == 0) && (DAC > 0)){ //sign bit is not set increment DAC |
cfscontrols2 | 0:c584a588c24f | 527 | DAC--; |
cfscontrols2 | 0:c584a588c24f | 528 | } |
cfscontrols2 | 0:c584a588c24f | 529 | else if ((sign > 0) && (DAC >= 0)){ //sign bit is set decrement DAC because it is negative |
cfscontrols2 | 0:c584a588c24f | 530 | DAC++; |
cfscontrols2 | 0:c584a588c24f | 531 | } |
cfscontrols2 | 0:c584a588c24f | 532 | |
cfscontrols2 | 0:c584a588c24f | 533 | } |
cfscontrols2 | 0:c584a588c24f | 534 | |
cfscontrols2 | 0:c584a588c24f | 535 | else{ |
cfscontrols2 | 0:c584a588c24f | 536 | //no change in direction |
cfscontrols2 | 0:c584a588c24f | 537 | //do nothing |
cfscontrols2 | 0:c584a588c24f | 538 | return DAC; |
cfscontrols2 | 0:c584a588c24f | 539 | } |
cfscontrols2 | 0:c584a588c24f | 540 | |
cfscontrols2 | 0:c584a588c24f | 541 | if(DAC > 31){ |
cfscontrols2 | 0:c584a588c24f | 542 | DAC = 31; //limit DAC to maximum value of 31 (5 bits) |
cfscontrols2 | 0:c584a588c24f | 543 | } |
cfscontrols2 | 0:c584a588c24f | 544 | |
cfscontrols2 | 0:c584a588c24f | 545 | if(sign > 0){ |
cfscontrols2 | 0:c584a588c24f | 546 | DAC |= 32; //set the sign bit of DAC |
cfscontrols2 | 0:c584a588c24f | 547 | } |
cfscontrols2 | 0:c584a588c24f | 548 | |
cfscontrols2 | 0:c584a588c24f | 549 | //update DAC |
cfscontrols2 | 0:c584a588c24f | 550 | writeRegistry(DAC_REG, DAC); |
cfscontrols2 | 0:c584a588c24f | 551 | |
cfscontrols2 | 0:c584a588c24f | 552 | return DAC; |
cfscontrols2 | 0:c584a588c24f | 553 | } |
cfscontrols2 | 0:c584a588c24f | 554 | |
cfscontrols2 | 0:c584a588c24f | 555 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 556 | //function to set the filtering SF setting |
cfscontrols2 | 0:c584a588c24f | 557 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 558 | void AD7730::setFilterSF(int sf){ |
cfscontrols2 | 0:c584a588c24f | 559 | |
cfscontrols2 | 0:c584a588c24f | 560 | //get current filter setting |
cfscontrols2 | 0:c584a588c24f | 561 | int filter = readRegistry(FILTER_REG); |
cfscontrols2 | 0:c584a588c24f | 562 | |
cfscontrols2 | 0:c584a588c24f | 563 | //clear sf bits |
cfscontrols2 | 0:c584a588c24f | 564 | filter &= 0xFFF; |
cfscontrols2 | 0:c584a588c24f | 565 | |
cfscontrols2 | 0:c584a588c24f | 566 | //bitshift sf up by 12 bits |
cfscontrols2 | 0:c584a588c24f | 567 | sf = sf << 12; |
cfscontrols2 | 0:c584a588c24f | 568 | |
cfscontrols2 | 0:c584a588c24f | 569 | //or sf bits with filter bits |
cfscontrols2 | 0:c584a588c24f | 570 | filter = filter | sf; |
cfscontrols2 | 0:c584a588c24f | 571 | |
cfscontrols2 | 0:c584a588c24f | 572 | //apply new filter setting |
cfscontrols2 | 0:c584a588c24f | 573 | writeRegistry(FILTER_REG, filter); |
cfscontrols2 | 0:c584a588c24f | 574 | } |
cfscontrols2 | 0:c584a588c24f | 575 | |
cfscontrols2 | 0:c584a588c24f | 576 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 577 | //function to set the filtering chop mode |
cfscontrols2 | 0:c584a588c24f | 578 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 579 | void AD7730::setFilterChop(int enabled){ |
cfscontrols2 | 0:c584a588c24f | 580 | |
cfscontrols2 | 0:c584a588c24f | 581 | //get current filter setting |
cfscontrols2 | 0:c584a588c24f | 582 | int filter = readRegistry(FILTER_REG); |
cfscontrols2 | 0:c584a588c24f | 583 | |
cfscontrols2 | 0:c584a588c24f | 584 | //clear bit 5 |
cfscontrols2 | 0:c584a588c24f | 585 | filter &= ~0x10; |
cfscontrols2 | 0:c584a588c24f | 586 | |
cfscontrols2 | 0:c584a588c24f | 587 | //apply chop setting |
cfscontrols2 | 0:c584a588c24f | 588 | if(enabled) |
cfscontrols2 | 0:c584a588c24f | 589 | filter |= 0x10; |
cfscontrols2 | 0:c584a588c24f | 590 | |
cfscontrols2 | 0:c584a588c24f | 591 | //apply new filter setting |
cfscontrols2 | 0:c584a588c24f | 592 | writeRegistry(FILTER_REG, filter); |
cfscontrols2 | 0:c584a588c24f | 593 | } |
cfscontrols2 | 0:c584a588c24f | 594 | |
cfscontrols2 | 0:c584a588c24f | 595 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 596 | //function to set the mode of the second filter |
cfscontrols2 | 0:c584a588c24f | 597 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 598 | void AD7730::setFilterMode(int mode){ |
cfscontrols2 | 0:c584a588c24f | 599 | |
cfscontrols2 | 0:c584a588c24f | 600 | //get current filter setting |
cfscontrols2 | 0:c584a588c24f | 601 | int filter = readRegistry(FILTER_REG); |
cfscontrols2 | 0:c584a588c24f | 602 | |
cfscontrols2 | 0:c584a588c24f | 603 | //clear bits 9 & 10 |
cfscontrols2 | 0:c584a588c24f | 604 | filter &= ~0x300; |
cfscontrols2 | 0:c584a588c24f | 605 | |
cfscontrols2 | 0:c584a588c24f | 606 | //apply mode setting |
cfscontrols2 | 0:c584a588c24f | 607 | if(mode == 1){ |
cfscontrols2 | 0:c584a588c24f | 608 | filter |= 0x100; //apply fast mode |
cfscontrols2 | 0:c584a588c24f | 609 | } |
cfscontrols2 | 0:c584a588c24f | 610 | else if(mode == 2){ |
cfscontrols2 | 0:c584a588c24f | 611 | filter |= 0x200; //apply skip mode |
cfscontrols2 | 0:c584a588c24f | 612 | } |
cfscontrols2 | 0:c584a588c24f | 613 | else { |
cfscontrols2 | 0:c584a588c24f | 614 | //leave both bits unset |
cfscontrols2 | 0:c584a588c24f | 615 | } |
cfscontrols2 | 0:c584a588c24f | 616 | |
cfscontrols2 | 0:c584a588c24f | 617 | |
cfscontrols2 | 0:c584a588c24f | 618 | //apply new filter setting |
cfscontrols2 | 0:c584a588c24f | 619 | writeRegistry(FILTER_REG, filter); |
cfscontrols2 | 0:c584a588c24f | 620 | } |
cfscontrols2 | 0:c584a588c24f | 621 | |
cfscontrols2 | 0:c584a588c24f | 622 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 623 | //function to set the chip to continous conversion |
cfscontrols2 | 0:c584a588c24f | 624 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 625 | void AD7730::start(void){ |
cfscontrols2 | 0:c584a588c24f | 626 | |
cfscontrols2 | 0:c584a588c24f | 627 | writeRegistry(MODE_REG, 0x3100); //set to continous conversion mode |
cfscontrols2 | 0:c584a588c24f | 628 | _interruptReady = new InterruptIn(_readyPin); |
cfscontrols2 | 0:c584a588c24f | 629 | _tmr.start(); |
cfscontrols2 | 0:c584a588c24f | 630 | _frequency = 0; |
cfscontrols2 | 0:c584a588c24f | 631 | _interruptReady->fall(this, &AD7730::interruptRead); |
cfscontrols2 | 0:c584a588c24f | 632 | } |
cfscontrols2 | 0:c584a588c24f | 633 | |
cfscontrols2 | 0:c584a588c24f | 634 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 635 | //function to stop the chip running in continous conversion mode |
cfscontrols2 | 0:c584a588c24f | 636 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 637 | void AD7730::stop(void){ |
cfscontrols2 | 0:c584a588c24f | 638 | |
cfscontrols2 | 0:c584a588c24f | 639 | writeRegistry(MODE_REG, 0x1100); //set to idle mode |
cfscontrols2 | 0:c584a588c24f | 640 | |
cfscontrols2 | 0:c584a588c24f | 641 | _interruptReady = NULL; |
cfscontrols2 | 0:c584a588c24f | 642 | |
cfscontrols2 | 0:c584a588c24f | 643 | } |
cfscontrols2 | 0:c584a588c24f | 644 | |
cfscontrols2 | 0:c584a588c24f | 645 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 646 | //function to check if the ready digital line is low |
cfscontrols2 | 0:c584a588c24f | 647 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 648 | bool AD7730::isReady(void){ |
cfscontrols2 | 0:c584a588c24f | 649 | |
cfscontrols2 | 0:c584a588c24f | 650 | //if digital line is high, return not ready |
cfscontrols2 | 0:c584a588c24f | 651 | return (_readyDig)? false : true; |
cfscontrols2 | 0:c584a588c24f | 652 | |
cfscontrols2 | 0:c584a588c24f | 653 | } |
cfscontrols2 | 0:c584a588c24f | 654 | |
cfscontrols2 | 0:c584a588c24f | 655 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 656 | //function to read data on falling edge of ready pin when running in continous conversion mode |
cfscontrols2 | 0:c584a588c24f | 657 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 658 | void AD7730::interruptRead(void){ |
cfscontrols2 | 0:c584a588c24f | 659 | |
cfscontrols2 | 0:c584a588c24f | 660 | _continous = true; //set flag indicating that chip is running in continous mode |
cfscontrols2 | 0:c584a588c24f | 661 | |
cfscontrols2 | 0:c584a588c24f | 662 | _lastValue = readRegistry(DATA_REG); |
cfscontrols2 | 0:c584a588c24f | 663 | |
cfscontrols2 | 0:c584a588c24f | 664 | //store data in circular buffer |
cfscontrols2 | 0:c584a588c24f | 665 | _readBuffer[_bufferCount] = _lastValue; |
cfscontrols2 | 0:c584a588c24f | 666 | if(_bufferCount < 99){ |
cfscontrols2 | 0:c584a588c24f | 667 | _bufferCount++; |
cfscontrols2 | 0:c584a588c24f | 668 | } |
cfscontrols2 | 0:c584a588c24f | 669 | else { |
cfscontrols2 | 0:c584a588c24f | 670 | _bufferCount = 0; |
cfscontrols2 | 0:c584a588c24f | 671 | } |
cfscontrols2 | 0:c584a588c24f | 672 | |
cfscontrols2 | 0:c584a588c24f | 673 | //update conversion speed frequency |
cfscontrols2 | 0:c584a588c24f | 674 | _frequency = _tmr.read_us(); |
cfscontrols2 | 0:c584a588c24f | 675 | _tmr.reset(); |
cfscontrols2 | 0:c584a588c24f | 676 | } |
cfscontrols2 | 0:c584a588c24f | 677 | |
cfscontrols2 | 0:c584a588c24f | 678 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 679 | //function to return the hertz of the data conversion |
cfscontrols2 | 0:c584a588c24f | 680 | /************************************************************************************************************************/ |
cfscontrols2 | 0:c584a588c24f | 681 | double AD7730::getHz(void){ |
cfscontrols2 | 0:c584a588c24f | 682 | |
cfscontrols2 | 0:c584a588c24f | 683 | return (1000000 / (double)_frequency); |
cfscontrols2 | 0:c584a588c24f | 684 | } |