pcb changes
Fork of SingleFrequencyLora by
sx1276/sx1276-hal.h@11:ce0cdab5137a, 2014-10-13 (annotated)
- Committer:
- GregCr
- Date:
- Mon Oct 13 07:06:55 2014 +0000
- Revision:
- 11:ce0cdab5137a
- Parent:
- 8:0fe3e0e8007b
- Child:
- 21:2e496deb7858
Added LICENSE.txt; Minor corrections;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
GregCr | 0:e6ceb13d2d05 | 1 | /* |
GregCr | 0:e6ceb13d2d05 | 2 | / _____) _ | | |
GregCr | 0:e6ceb13d2d05 | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
GregCr | 0:e6ceb13d2d05 | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
GregCr | 0:e6ceb13d2d05 | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
GregCr | 0:e6ceb13d2d05 | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
GregCr | 8:0fe3e0e8007b | 7 | ( C )2014 Semtech |
GregCr | 0:e6ceb13d2d05 | 8 | |
GregCr | 0:e6ceb13d2d05 | 9 | Description: - |
GregCr | 0:e6ceb13d2d05 | 10 | |
GregCr | 0:e6ceb13d2d05 | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
GregCr | 0:e6ceb13d2d05 | 12 | |
GregCr | 0:e6ceb13d2d05 | 13 | Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin |
GregCr | 0:e6ceb13d2d05 | 14 | */ |
GregCr | 0:e6ceb13d2d05 | 15 | #ifndef __SX1276_HAL_H__ |
GregCr | 0:e6ceb13d2d05 | 16 | #define __SX1276_HAL_H__ |
GregCr | 0:e6ceb13d2d05 | 17 | #include "sx1276.h" |
GregCr | 0:e6ceb13d2d05 | 18 | |
GregCr | 0:e6ceb13d2d05 | 19 | /*! |
GregCr | 0:e6ceb13d2d05 | 20 | * Actual implementation of a SX1276 radio, includes some modifications to make it compatible with the MB1 LAS board |
GregCr | 0:e6ceb13d2d05 | 21 | */ |
GregCr | 0:e6ceb13d2d05 | 22 | class SX1276MB1xAS : public SX1276 |
GregCr | 0:e6ceb13d2d05 | 23 | { |
GregCr | 0:e6ceb13d2d05 | 24 | protected: |
GregCr | 0:e6ceb13d2d05 | 25 | /*! |
GregCr | 0:e6ceb13d2d05 | 26 | * Antenna switch GPIO pins objects |
GregCr | 0:e6ceb13d2d05 | 27 | */ |
GregCr | 1:f979673946c0 | 28 | DigitalInOut antSwitch; |
GregCr | 0:e6ceb13d2d05 | 29 | |
GregCr | 0:e6ceb13d2d05 | 30 | DigitalIn fake; |
GregCr | 0:e6ceb13d2d05 | 31 | |
GregCr | 0:e6ceb13d2d05 | 32 | private: |
GregCr | 0:e6ceb13d2d05 | 33 | static const RadioRegisters_t RadioRegsInit[]; |
GregCr | 0:e6ceb13d2d05 | 34 | |
GregCr | 0:e6ceb13d2d05 | 35 | public: |
GregCr | 7:2b555111463f | 36 | SX1276MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), |
GregCr | 11:ce0cdab5137a | 37 | void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ), |
GregCr | 0:e6ceb13d2d05 | 38 | PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, |
GregCr | 0:e6ceb13d2d05 | 39 | PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, |
GregCr | 0:e6ceb13d2d05 | 40 | PinName antSwitch ); |
GregCr | 7:2b555111463f | 41 | SX1276MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), |
GregCr | 11:ce0cdab5137a | 42 | void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ) ); |
GregCr | 0:e6ceb13d2d05 | 43 | virtual ~SX1276MB1xAS( ) { }; |
GregCr | 0:e6ceb13d2d05 | 44 | |
GregCr | 0:e6ceb13d2d05 | 45 | protected: |
GregCr | 0:e6ceb13d2d05 | 46 | /*! |
GregCr | 0:e6ceb13d2d05 | 47 | * @brief Initializes the radio I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 48 | */ |
GregCr | 0:e6ceb13d2d05 | 49 | virtual void IoInit( void ); |
GregCr | 0:e6ceb13d2d05 | 50 | |
GregCr | 0:e6ceb13d2d05 | 51 | /*! |
GregCr | 0:e6ceb13d2d05 | 52 | * @brief Initializes the radio registers |
GregCr | 0:e6ceb13d2d05 | 53 | */ |
GregCr | 0:e6ceb13d2d05 | 54 | virtual void RadioRegistersInit( ); |
GregCr | 0:e6ceb13d2d05 | 55 | |
GregCr | 0:e6ceb13d2d05 | 56 | /*! |
GregCr | 0:e6ceb13d2d05 | 57 | * @brief Initializes the radio SPI |
GregCr | 0:e6ceb13d2d05 | 58 | */ |
GregCr | 0:e6ceb13d2d05 | 59 | virtual void SpiInit( void ); |
GregCr | 0:e6ceb13d2d05 | 60 | |
GregCr | 0:e6ceb13d2d05 | 61 | /*! |
GregCr | 0:e6ceb13d2d05 | 62 | * @brief Initializes DIO IRQ handlers |
GregCr | 0:e6ceb13d2d05 | 63 | * |
GregCr | 0:e6ceb13d2d05 | 64 | * @param [IN] irqHandlers Array containing the IRQ callback functions |
GregCr | 0:e6ceb13d2d05 | 65 | */ |
GregCr | 0:e6ceb13d2d05 | 66 | virtual void IoIrqInit( DioIrqHandler *irqHandlers ); |
GregCr | 0:e6ceb13d2d05 | 67 | |
GregCr | 0:e6ceb13d2d05 | 68 | /*! |
GregCr | 0:e6ceb13d2d05 | 69 | * @brief De-initializes the radio I/Os pins interface. |
GregCr | 0:e6ceb13d2d05 | 70 | * |
GregCr | 0:e6ceb13d2d05 | 71 | * \remark Useful when going in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 72 | */ |
GregCr | 0:e6ceb13d2d05 | 73 | virtual void IoDeInit( void ); |
GregCr | 0:e6ceb13d2d05 | 74 | |
GregCr | 0:e6ceb13d2d05 | 75 | /*! |
GregCr | 0:e6ceb13d2d05 | 76 | * @brief Gets the board PA selection configuration |
GregCr | 0:e6ceb13d2d05 | 77 | * |
GregCr | 0:e6ceb13d2d05 | 78 | * @param [IN] channel Channel frequency in Hz |
GregCr | 0:e6ceb13d2d05 | 79 | * @retval PaSelect RegPaConfig PaSelect value |
GregCr | 0:e6ceb13d2d05 | 80 | */ |
GregCr | 0:e6ceb13d2d05 | 81 | virtual uint8_t GetPaSelect( uint32_t channel ); |
GregCr | 0:e6ceb13d2d05 | 82 | |
GregCr | 0:e6ceb13d2d05 | 83 | /*! |
GregCr | 0:e6ceb13d2d05 | 84 | * @brief Set the RF Switch I/Os pins in Low Power mode |
GregCr | 0:e6ceb13d2d05 | 85 | * |
GregCr | 0:e6ceb13d2d05 | 86 | * @param [IN] status enable or disable |
GregCr | 0:e6ceb13d2d05 | 87 | */ |
GregCr | 0:e6ceb13d2d05 | 88 | virtual void SetAntSwLowPower( bool status ); |
GregCr | 0:e6ceb13d2d05 | 89 | |
GregCr | 0:e6ceb13d2d05 | 90 | /*! |
GregCr | 0:e6ceb13d2d05 | 91 | * @brief Initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 92 | */ |
GregCr | 0:e6ceb13d2d05 | 93 | virtual void AntSwInit( void ); |
GregCr | 0:e6ceb13d2d05 | 94 | |
GregCr | 0:e6ceb13d2d05 | 95 | /*! |
GregCr | 0:e6ceb13d2d05 | 96 | * @brief De-initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 97 | * |
GregCr | 0:e6ceb13d2d05 | 98 | * \remark Needed to decrease the power consumption in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 99 | */ |
GregCr | 0:e6ceb13d2d05 | 100 | virtual void AntSwDeInit( void ); |
GregCr | 0:e6ceb13d2d05 | 101 | |
GregCr | 0:e6ceb13d2d05 | 102 | /*! |
GregCr | 0:e6ceb13d2d05 | 103 | * @brief Controls the antena switch if necessary. |
GregCr | 0:e6ceb13d2d05 | 104 | * |
GregCr | 0:e6ceb13d2d05 | 105 | * \remark see errata note |
GregCr | 0:e6ceb13d2d05 | 106 | * |
GregCr | 0:e6ceb13d2d05 | 107 | * @param [IN] rxTx [1: Tx, 0: Rx] |
GregCr | 0:e6ceb13d2d05 | 108 | */ |
GregCr | 0:e6ceb13d2d05 | 109 | virtual void SetAntSw( uint8_t rxTx ); |
GregCr | 0:e6ceb13d2d05 | 110 | |
GregCr | 0:e6ceb13d2d05 | 111 | public: |
GregCr | 0:e6ceb13d2d05 | 112 | /*! |
GregCr | 2:5eb3066446dd | 113 | * @brief Detect the board connected by reading the value of the antenna switch pin |
GregCr | 2:5eb3066446dd | 114 | */ |
GregCr | 2:5eb3066446dd | 115 | virtual uint8_t DetectBoardType( void ); |
GregCr | 2:5eb3066446dd | 116 | |
GregCr | 2:5eb3066446dd | 117 | /*! |
GregCr | 0:e6ceb13d2d05 | 118 | * @brief Checks if the given RF frequency is supported by the hardware |
GregCr | 0:e6ceb13d2d05 | 119 | * |
GregCr | 0:e6ceb13d2d05 | 120 | * @param [IN] frequency RF frequency to be checked |
GregCr | 0:e6ceb13d2d05 | 121 | * @retval isSupported [true: supported, false: unsupported] |
GregCr | 0:e6ceb13d2d05 | 122 | */ |
GregCr | 0:e6ceb13d2d05 | 123 | virtual bool CheckRfFrequency( uint32_t frequency ); |
GregCr | 0:e6ceb13d2d05 | 124 | |
GregCr | 0:e6ceb13d2d05 | 125 | /*! |
GregCr | 0:e6ceb13d2d05 | 126 | * @brief Writes the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 127 | * |
GregCr | 0:e6ceb13d2d05 | 128 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 129 | * @param [IN]: data New register value |
GregCr | 0:e6ceb13d2d05 | 130 | */ |
GregCr | 0:e6ceb13d2d05 | 131 | virtual void Write ( uint8_t addr, uint8_t data ) ; |
GregCr | 0:e6ceb13d2d05 | 132 | |
GregCr | 0:e6ceb13d2d05 | 133 | /*! |
GregCr | 0:e6ceb13d2d05 | 134 | * @brief Reads the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 135 | * |
GregCr | 0:e6ceb13d2d05 | 136 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 137 | * @retval data Register value |
GregCr | 0:e6ceb13d2d05 | 138 | */ |
GregCr | 0:e6ceb13d2d05 | 139 | virtual uint8_t Read ( uint8_t addr ) ; |
GregCr | 0:e6ceb13d2d05 | 140 | |
GregCr | 0:e6ceb13d2d05 | 141 | /*! |
GregCr | 0:e6ceb13d2d05 | 142 | * @brief Writes multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 143 | * |
GregCr | 0:e6ceb13d2d05 | 144 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 145 | * @param [IN] buffer Buffer containing the new register's values |
GregCr | 0:e6ceb13d2d05 | 146 | * @param [IN] size Number of registers to be written |
GregCr | 0:e6ceb13d2d05 | 147 | */ |
GregCr | 0:e6ceb13d2d05 | 148 | virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) ; |
GregCr | 0:e6ceb13d2d05 | 149 | |
GregCr | 0:e6ceb13d2d05 | 150 | /*! |
GregCr | 0:e6ceb13d2d05 | 151 | * @brief Reads multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 152 | * |
GregCr | 0:e6ceb13d2d05 | 153 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 154 | * @param [OUT] buffer Buffer where to copy the registers data |
GregCr | 0:e6ceb13d2d05 | 155 | * @param [IN] size Number of registers to be read |
GregCr | 0:e6ceb13d2d05 | 156 | */ |
GregCr | 0:e6ceb13d2d05 | 157 | virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) ; |
GregCr | 0:e6ceb13d2d05 | 158 | |
GregCr | 0:e6ceb13d2d05 | 159 | /*! |
GregCr | 0:e6ceb13d2d05 | 160 | * @brief Writes the buffer contents to the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 161 | * |
GregCr | 0:e6ceb13d2d05 | 162 | * @param [IN] buffer Buffer containing data to be put on the FIFO. |
GregCr | 0:e6ceb13d2d05 | 163 | * @param [IN] size Number of bytes to be written to the FIFO |
GregCr | 0:e6ceb13d2d05 | 164 | */ |
GregCr | 0:e6ceb13d2d05 | 165 | virtual void WriteFifo( uint8_t *buffer, uint8_t size ) ; |
GregCr | 0:e6ceb13d2d05 | 166 | |
GregCr | 0:e6ceb13d2d05 | 167 | /*! |
GregCr | 0:e6ceb13d2d05 | 168 | * @brief Reads the contents of the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 169 | * |
GregCr | 0:e6ceb13d2d05 | 170 | * @param [OUT] buffer Buffer where to copy the FIFO read data. |
GregCr | 0:e6ceb13d2d05 | 171 | * @param [IN] size Number of bytes to be read from the FIFO |
GregCr | 0:e6ceb13d2d05 | 172 | */ |
GregCr | 0:e6ceb13d2d05 | 173 | virtual void ReadFifo( uint8_t *buffer, uint8_t size ) ; |
GregCr | 0:e6ceb13d2d05 | 174 | |
GregCr | 0:e6ceb13d2d05 | 175 | /*! |
GregCr | 0:e6ceb13d2d05 | 176 | * @brief Reset the SX1276 |
GregCr | 0:e6ceb13d2d05 | 177 | */ |
GregCr | 0:e6ceb13d2d05 | 178 | virtual void Reset( void ); |
GregCr | 0:e6ceb13d2d05 | 179 | }; |
GregCr | 0:e6ceb13d2d05 | 180 | |
GregCr | 0:e6ceb13d2d05 | 181 | #endif // __SX1276_HAL_H__ |