pcb changes

Fork of SingleFrequencyLora by Christopher De Bank

Committer:
GregCr
Date:
Tue Aug 19 09:15:01 2014 +0000
Revision:
3:ca84be1f3fac
Parent:
2:5eb3066446dd
Child:
5:11ec8a6ba4f0
added small delay for the board detection due to capa

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e6ceb13d2d05 1 /*
GregCr 0:e6ceb13d2d05 2 / _____) _ | |
GregCr 0:e6ceb13d2d05 3 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e6ceb13d2d05 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e6ceb13d2d05 5 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e6ceb13d2d05 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 0:e6ceb13d2d05 7 ( C )2014 Semtech
GregCr 0:e6ceb13d2d05 8
GregCr 0:e6ceb13d2d05 9 Description: -
GregCr 0:e6ceb13d2d05 10
GregCr 0:e6ceb13d2d05 11 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:e6ceb13d2d05 12
GregCr 0:e6ceb13d2d05 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
GregCr 0:e6ceb13d2d05 14 */
GregCr 0:e6ceb13d2d05 15 #ifndef __ENUMS_H__
GregCr 0:e6ceb13d2d05 16 #define __ENUMS_H__
GregCr 0:e6ceb13d2d05 17
GregCr 0:e6ceb13d2d05 18 /*!
GregCr 0:e6ceb13d2d05 19 * State of the radio:
GregCr 0:e6ceb13d2d05 20 * [IDLE,
GregCr 0:e6ceb13d2d05 21 * RX_RUNNING, RX_TIMEOUT, RX_ERROR,
GregCr 0:e6ceb13d2d05 22 * TX_RUNNING, TX_TIMEOUT]
GregCr 0:e6ceb13d2d05 23 */
GregCr 0:e6ceb13d2d05 24 enum RadioState
GregCr 0:e6ceb13d2d05 25 {
GregCr 3:ca84be1f3fac 26 LOWPOWER = 0,
GregCr 0:e6ceb13d2d05 27 IDLE,
GregCr 0:e6ceb13d2d05 28
GregCr 0:e6ceb13d2d05 29 RX,
GregCr 0:e6ceb13d2d05 30 RX_TIMEOUT,
GregCr 0:e6ceb13d2d05 31 RX_ERROR,
GregCr 0:e6ceb13d2d05 32
GregCr 0:e6ceb13d2d05 33 TX,
GregCr 0:e6ceb13d2d05 34 TX_TIMEOUT
GregCr 0:e6ceb13d2d05 35 };
GregCr 0:e6ceb13d2d05 36
GregCr 0:e6ceb13d2d05 37 /*!
GregCr 0:e6ceb13d2d05 38 * Type of the modem. [LORA / FSK]
GregCr 0:e6ceb13d2d05 39 */
GregCr 0:e6ceb13d2d05 40 enum ModemType
GregCr 0:e6ceb13d2d05 41 {
GregCr 3:ca84be1f3fac 42 MODEM_FSK = 0,
GregCr 0:e6ceb13d2d05 43 MODEM_LORA
GregCr 0:e6ceb13d2d05 44 };
GregCr 0:e6ceb13d2d05 45
GregCr 2:5eb3066446dd 46 /*!
GregCr 2:5eb3066446dd 47 * Type of the supported board. [SX1276MB1MAS / SX1276MB1LAS]
GregCr 2:5eb3066446dd 48 */
GregCr 2:5eb3066446dd 49 enum BoardType
GregCr 2:5eb3066446dd 50 {
GregCr 3:ca84be1f3fac 51 SX1276MB1MAS = 0,
GregCr 2:5eb3066446dd 52 SX1276MB1LAS
GregCr 2:5eb3066446dd 53 };
GregCr 0:e6ceb13d2d05 54 /*!
GregCr 0:e6ceb13d2d05 55 * Radio FSK modem parameters
GregCr 0:e6ceb13d2d05 56 */
GregCr 0:e6ceb13d2d05 57 typedef struct
GregCr 0:e6ceb13d2d05 58 {
GregCr 0:e6ceb13d2d05 59 int8_t Power;
GregCr 0:e6ceb13d2d05 60 uint32_t Fdev;
GregCr 0:e6ceb13d2d05 61 uint32_t Bandwidth;
GregCr 0:e6ceb13d2d05 62 uint32_t BandwidthAfc;
GregCr 0:e6ceb13d2d05 63 uint32_t Datarate;
GregCr 0:e6ceb13d2d05 64 uint16_t PreambleLen;
GregCr 0:e6ceb13d2d05 65 bool FixLen;
GregCr 0:e6ceb13d2d05 66 bool CrcOn;
GregCr 0:e6ceb13d2d05 67 bool IqInverted;
GregCr 0:e6ceb13d2d05 68 bool RxContinuous;
GregCr 0:e6ceb13d2d05 69 uint32_t TxTimeout;
GregCr 0:e6ceb13d2d05 70 }RadioFskSettings_t;
GregCr 0:e6ceb13d2d05 71
GregCr 0:e6ceb13d2d05 72 /*!
GregCr 0:e6ceb13d2d05 73 * Radio FSK packet handler state
GregCr 0:e6ceb13d2d05 74 */
GregCr 0:e6ceb13d2d05 75 typedef struct
GregCr 0:e6ceb13d2d05 76 {
GregCr 0:e6ceb13d2d05 77 uint8_t PreambleDetected;
GregCr 0:e6ceb13d2d05 78 uint8_t SyncWordDetected;
GregCr 0:e6ceb13d2d05 79 int8_t RssiValue;
GregCr 0:e6ceb13d2d05 80 int32_t AfcValue;
GregCr 0:e6ceb13d2d05 81 uint8_t RxGain;
GregCr 0:e6ceb13d2d05 82 uint16_t Size;
GregCr 0:e6ceb13d2d05 83 uint16_t NbBytes;
GregCr 0:e6ceb13d2d05 84 uint8_t FifoThresh;
GregCr 0:e6ceb13d2d05 85 uint8_t ChunkSize;
GregCr 0:e6ceb13d2d05 86 }RadioFskPacketHandler_t;
GregCr 0:e6ceb13d2d05 87
GregCr 0:e6ceb13d2d05 88 /*!
GregCr 0:e6ceb13d2d05 89 * Radio LoRa modem parameters
GregCr 0:e6ceb13d2d05 90 */
GregCr 0:e6ceb13d2d05 91 typedef struct
GregCr 0:e6ceb13d2d05 92 {
GregCr 0:e6ceb13d2d05 93 int8_t Power;
GregCr 0:e6ceb13d2d05 94 uint32_t Bandwidth;
GregCr 0:e6ceb13d2d05 95 uint32_t Datarate;
GregCr 0:e6ceb13d2d05 96 bool LowDatarateOptimize;
GregCr 0:e6ceb13d2d05 97 uint8_t Coderate;
GregCr 0:e6ceb13d2d05 98 uint16_t PreambleLen;
GregCr 0:e6ceb13d2d05 99 bool FixLen;
GregCr 0:e6ceb13d2d05 100 bool CrcOn;
GregCr 0:e6ceb13d2d05 101 bool IqInverted;
GregCr 0:e6ceb13d2d05 102 bool RxContinuous;
GregCr 0:e6ceb13d2d05 103 uint32_t TxTimeout;
GregCr 0:e6ceb13d2d05 104 }RadioLoRaSettings_t;
GregCr 0:e6ceb13d2d05 105
GregCr 0:e6ceb13d2d05 106 /*!
GregCr 0:e6ceb13d2d05 107 * Radio LoRa packet handler state
GregCr 0:e6ceb13d2d05 108 */
GregCr 0:e6ceb13d2d05 109 typedef struct
GregCr 0:e6ceb13d2d05 110 {
GregCr 0:e6ceb13d2d05 111 int8_t SnrValue;
GregCr 0:e6ceb13d2d05 112 int8_t RssiValue;
GregCr 0:e6ceb13d2d05 113 uint8_t Size;
GregCr 0:e6ceb13d2d05 114 }RadioLoRaPacketHandler_t;
GregCr 0:e6ceb13d2d05 115
GregCr 0:e6ceb13d2d05 116 /*!
GregCr 0:e6ceb13d2d05 117 * Radio Settings
GregCr 0:e6ceb13d2d05 118 */
GregCr 0:e6ceb13d2d05 119 typedef struct
GregCr 0:e6ceb13d2d05 120 {
GregCr 0:e6ceb13d2d05 121 RadioState State;
GregCr 0:e6ceb13d2d05 122 ModemType Modem;
GregCr 0:e6ceb13d2d05 123 uint32_t Channel;
GregCr 0:e6ceb13d2d05 124 RadioFskSettings_t Fsk;
GregCr 0:e6ceb13d2d05 125 RadioFskPacketHandler_t FskPacketHandler;
GregCr 0:e6ceb13d2d05 126 RadioLoRaSettings_t LoRa;
GregCr 0:e6ceb13d2d05 127 RadioLoRaPacketHandler_t LoRaPacketHandler;
GregCr 0:e6ceb13d2d05 128 }RadioSettings_t;
GregCr 0:e6ceb13d2d05 129
GregCr 0:e6ceb13d2d05 130
GregCr 0:e6ceb13d2d05 131 #endif //__ENUMS_H__
GregCr 0:e6ceb13d2d05 132