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Dependencies: FXOS8700 Hexi_KW40Z Hexi_OLED_SSD1351 MAX30101
Fork of HeartRate by
main.cpp@0:33686dd26bf9, 2018-05-30 (annotated)
- Committer:
- xihan94
- Date:
- Wed May 30 10:40:47 2018 +0000
- Revision:
- 0:33686dd26bf9
- Child:
- 1:ad1b075585bc
dev
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
xihan94 | 0:33686dd26bf9 | 1 | #include "mbed.h" |
xihan94 | 0:33686dd26bf9 | 2 | #include "mbed_events.h" |
xihan94 | 0:33686dd26bf9 | 3 | #include "MAX30101.h" |
xihan94 | 0:33686dd26bf9 | 4 | |
xihan94 | 0:33686dd26bf9 | 5 | #define FIFO_DATA_MAX 288 |
xihan94 | 0:33686dd26bf9 | 6 | |
xihan94 | 0:33686dd26bf9 | 7 | DigitalOut pwr1v8(PTA29); |
xihan94 | 0:33686dd26bf9 | 8 | DigitalOut pwr3v3b(PTB12); |
xihan94 | 0:33686dd26bf9 | 9 | I2C i2c0(PTB1, PTB0); |
xihan94 | 0:33686dd26bf9 | 10 | InterruptIn maximInterrupt(PTB18); |
xihan94 | 0:33686dd26bf9 | 11 | Serial pc(USBTX, USBRX); |
xihan94 | 0:33686dd26bf9 | 12 | |
xihan94 | 0:33686dd26bf9 | 13 | EventQueue evqueue(32 * EVENTS_EVENT_SIZE); |
xihan94 | 0:33686dd26bf9 | 14 | Thread t; |
xihan94 | 0:33686dd26bf9 | 15 | |
xihan94 | 0:33686dd26bf9 | 16 | MAX30101 hr(i2c0); |
xihan94 | 0:33686dd26bf9 | 17 | |
xihan94 | 0:33686dd26bf9 | 18 | void interruptHandlerQueued() { |
xihan94 | 0:33686dd26bf9 | 19 | |
xihan94 | 0:33686dd26bf9 | 20 | MAX30101::InterruptBitField_u interruptStatus; |
xihan94 | 0:33686dd26bf9 | 21 | hr.getInterruptStatus(interruptStatus); |
xihan94 | 0:33686dd26bf9 | 22 | printf("Interrupt Status: 0x%02x\r\n", interruptStatus.all); |
xihan94 | 0:33686dd26bf9 | 23 | |
xihan94 | 0:33686dd26bf9 | 24 | if (interruptStatus.bits.pwr_rdy == 0x1) { |
xihan94 | 0:33686dd26bf9 | 25 | printf("Powered on\r\n"); |
xihan94 | 0:33686dd26bf9 | 26 | |
xihan94 | 0:33686dd26bf9 | 27 | // Configure FIFO |
xihan94 | 0:33686dd26bf9 | 28 | MAX30101::FIFO_Configuration_u fifoConf; |
xihan94 | 0:33686dd26bf9 | 29 | hr.getFIFOConfiguration(fifoConf); |
xihan94 | 0:33686dd26bf9 | 30 | pc.printf("FIFO Configuration: 0x%02x\r\n", fifoConf.all); |
xihan94 | 0:33686dd26bf9 | 31 | |
xihan94 | 0:33686dd26bf9 | 32 | // Set LED power |
xihan94 | 0:33686dd26bf9 | 33 | hr.setLEDPulseAmplitude(MAX30101::LED1_PA, 0xFF); |
xihan94 | 0:33686dd26bf9 | 34 | pc.printf("LED set\r\n"); |
xihan94 | 0:33686dd26bf9 | 35 | |
xihan94 | 0:33686dd26bf9 | 36 | MAX30101::SpO2Configuration_u spo2Conf; |
xihan94 | 0:33686dd26bf9 | 37 | hr.getSpO2Configuration(spo2Conf); |
xihan94 | 0:33686dd26bf9 | 38 | pc.printf("SpO2 Configuration: 0x%02x\r\n", spo2Conf.all); |
xihan94 | 0:33686dd26bf9 | 39 | |
xihan94 | 0:33686dd26bf9 | 40 | // Enable HR mode |
xihan94 | 0:33686dd26bf9 | 41 | MAX30101::ModeConfiguration_u modeConf; |
xihan94 | 0:33686dd26bf9 | 42 | modeConf.all = 0; |
xihan94 | 0:33686dd26bf9 | 43 | modeConf.bits.mode = MAX30101::HeartRateMode; |
xihan94 | 0:33686dd26bf9 | 44 | hr.setModeConfiguration(modeConf); |
xihan94 | 0:33686dd26bf9 | 45 | printf("Mode set\r\n"); |
xihan94 | 0:33686dd26bf9 | 46 | } |
xihan94 | 0:33686dd26bf9 | 47 | |
xihan94 | 0:33686dd26bf9 | 48 | if (interruptStatus.bits.ppg_rdy == 0x1) { |
xihan94 | 0:33686dd26bf9 | 49 | printf("PPG Ready.\r\n"); |
xihan94 | 0:33686dd26bf9 | 50 | maximInterrupt.disable_irq(); |
xihan94 | 0:33686dd26bf9 | 51 | while (true) { |
xihan94 | 0:33686dd26bf9 | 52 | hr.getInterruptStatus(interruptStatus); |
xihan94 | 0:33686dd26bf9 | 53 | printf("Interrupt Status: 0x%02x\r\n", interruptStatus.all); |
xihan94 | 0:33686dd26bf9 | 54 | if (interruptStatus.bits.ppg_rdy == 0x1) { |
xihan94 | 0:33686dd26bf9 | 55 | uint8_t byte; |
xihan94 | 0:33686dd26bf9 | 56 | hr.readRegister(MAX30101::FIFO_DataRegister, byte); |
xihan94 | 0:33686dd26bf9 | 57 | printf("Read byte: %hhu\r\n", byte); |
xihan94 | 0:33686dd26bf9 | 58 | hr.readRegister(MAX30101::FIFO_DataRegister, byte); |
xihan94 | 0:33686dd26bf9 | 59 | printf("Read byte: %hhu\r\n", byte); |
xihan94 | 0:33686dd26bf9 | 60 | hr.readRegister(MAX30101::FIFO_DataRegister, byte); |
xihan94 | 0:33686dd26bf9 | 61 | printf("Read byte: %hhu\r\n", byte); |
xihan94 | 0:33686dd26bf9 | 62 | } |
xihan94 | 0:33686dd26bf9 | 63 | } |
xihan94 | 0:33686dd26bf9 | 64 | } |
xihan94 | 0:33686dd26bf9 | 65 | |
xihan94 | 0:33686dd26bf9 | 66 | if (interruptStatus.bits.a_full == 0x1) { |
xihan94 | 0:33686dd26bf9 | 67 | printf("FIFO Almost Full.\r\n"); |
xihan94 | 0:33686dd26bf9 | 68 | // uint8_t data[FIFO_DATA_MAX]; |
xihan94 | 0:33686dd26bf9 | 69 | // uint16_t readBytes = 0; |
xihan94 | 0:33686dd26bf9 | 70 | // hr.readFIFO(MAX30101::OneLedChannel, data, readBytes); |
xihan94 | 0:33686dd26bf9 | 71 | // printf("FIFO has %hu bytes of data\r\n", readBytes); |
xihan94 | 0:33686dd26bf9 | 72 | // |
xihan94 | 0:33686dd26bf9 | 73 | // for (uint16_t i = 0; i < readBytes; i += 3) { |
xihan94 | 0:33686dd26bf9 | 74 | // uint8_t sample[4] = {0}; |
xihan94 | 0:33686dd26bf9 | 75 | // memcpy(sample, data + i, 3); |
xihan94 | 0:33686dd26bf9 | 76 | // printf("Read data: %u\r\n", *(uint32_t *) sample); |
xihan94 | 0:33686dd26bf9 | 77 | // } |
xihan94 | 0:33686dd26bf9 | 78 | } |
xihan94 | 0:33686dd26bf9 | 79 | |
xihan94 | 0:33686dd26bf9 | 80 | interruptStatus.all = 0xFF; |
xihan94 | 0:33686dd26bf9 | 81 | hr.enableInterrupts(interruptStatus); |
xihan94 | 0:33686dd26bf9 | 82 | } |
xihan94 | 0:33686dd26bf9 | 83 | |
xihan94 | 0:33686dd26bf9 | 84 | void interruptHandler() { |
xihan94 | 0:33686dd26bf9 | 85 | evqueue.call(interruptHandlerQueued); |
xihan94 | 0:33686dd26bf9 | 86 | } |
xihan94 | 0:33686dd26bf9 | 87 | |
xihan94 | 0:33686dd26bf9 | 88 | // main() runs in its own thread in the OS |
xihan94 | 0:33686dd26bf9 | 89 | int main() { |
xihan94 | 0:33686dd26bf9 | 90 | printf("Hello world.\r\n"); |
xihan94 | 0:33686dd26bf9 | 91 | |
xihan94 | 0:33686dd26bf9 | 92 | t.start(callback(&evqueue, &EventQueue::dispatch_forever)); |
xihan94 | 0:33686dd26bf9 | 93 | |
xihan94 | 0:33686dd26bf9 | 94 | pwr1v8 = 1; |
xihan94 | 0:33686dd26bf9 | 95 | pwr3v3b = 1; |
xihan94 | 0:33686dd26bf9 | 96 | |
xihan94 | 0:33686dd26bf9 | 97 | maximInterrupt.fall(interruptHandler); |
xihan94 | 0:33686dd26bf9 | 98 | maximInterrupt.enable_irq(); |
xihan94 | 0:33686dd26bf9 | 99 | |
xihan94 | 0:33686dd26bf9 | 100 | MAX30101::InterruptBitField_u interruptStatus; |
xihan94 | 0:33686dd26bf9 | 101 | interruptStatus.all = 0xFF; |
xihan94 | 0:33686dd26bf9 | 102 | hr.enableInterrupts(interruptStatus); |
xihan94 | 0:33686dd26bf9 | 103 | |
xihan94 | 0:33686dd26bf9 | 104 | // MAX30101::FIFO_Configuration_u fifoConf; |
xihan94 | 0:33686dd26bf9 | 105 | // hr.getFIFOConfiguration(fifoConf); |
xihan94 | 0:33686dd26bf9 | 106 | // pc.printf("FIFO Configuration: 0x%02x\r\n", fifoConf.all); |
xihan94 | 0:33686dd26bf9 | 107 | // |
xihan94 | 0:33686dd26bf9 | 108 | // MAX30101::ModeConfiguration_u modeConf; |
xihan94 | 0:33686dd26bf9 | 109 | // hr.getModeConfiguration(modeConf); |
xihan94 | 0:33686dd26bf9 | 110 | // pc.printf("Mode Configuration: 0x%02x\r\n", modeConf.all); |
xihan94 | 0:33686dd26bf9 | 111 | // |
xihan94 | 0:33686dd26bf9 | 112 | |
xihan94 | 0:33686dd26bf9 | 113 | // while (true) { |
xihan94 | 0:33686dd26bf9 | 114 | // wait(1); |
xihan94 | 0:33686dd26bf9 | 115 | // printf("%d\r\n", maximInterrupt.read()); |
xihan94 | 0:33686dd26bf9 | 116 | // } |
xihan94 | 0:33686dd26bf9 | 117 | return 0; |
xihan94 | 0:33686dd26bf9 | 118 | } |
xihan94 | 0:33686dd26bf9 | 119 |