first release fork of MPU9250AHRS from Kris Winer
Dependents: mbed-os-i2c-test mbed-test-i2c-PCA-biquad-peakdet Mix-code-v2 mbed-os-step-counting ... more
MPU9250.h@3:4f6c69e52534, 2019-11-06 (annotated)
- Committer:
- castlefei
- Date:
- Wed Nov 06 12:36:33 2019 +0000
- Revision:
- 3:4f6c69e52534
- Parent:
- 1:c27bb1a0deca
test changes
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
elessair | 0:76dc2aad77bc | 1 | #ifndef MPU9250_H |
elessair | 0:76dc2aad77bc | 2 | #define MPU9250_H |
elessair | 0:76dc2aad77bc | 3 | |
elessair | 0:76dc2aad77bc | 4 | #include "mbed.h" |
elessair | 0:76dc2aad77bc | 5 | #include "math.h" |
elessair | 0:76dc2aad77bc | 6 | |
elessair | 0:76dc2aad77bc | 7 | |
elessair | 0:76dc2aad77bc | 8 | class mpu9250 |
elessair | 0:76dc2aad77bc | 9 | { |
elessair | 0:76dc2aad77bc | 10 | I2C i2c; |
elessair | 0:76dc2aad77bc | 11 | public: |
elessair | 1:c27bb1a0deca | 12 | mpu9250(PinName _sda, PinName _scl, uint8_t address); |
elessair | 0:76dc2aad77bc | 13 | void writeByte(uint8_t address, uint8_t subAddress, uint8_t data); |
elessair | 0:76dc2aad77bc | 14 | char readByte(uint8_t address, uint8_t subAddress); |
elessair | 0:76dc2aad77bc | 15 | void readBytes(uint8_t address, uint8_t subAddress, uint8_t count, uint8_t * dest); |
elessair | 0:76dc2aad77bc | 16 | bool alive(); |
elessair | 0:76dc2aad77bc | 17 | void getGres(uint8_t Gscale); |
elessair | 0:76dc2aad77bc | 18 | void getAres(uint8_t Ascale); |
elessair | 0:76dc2aad77bc | 19 | void readAccelData(int16_t * destination) ; |
elessair | 0:76dc2aad77bc | 20 | void readGyroData(int16_t * destination) ; |
elessair | 0:76dc2aad77bc | 21 | void readTempData(int16_t * destination); |
elessair | 0:76dc2aad77bc | 22 | void readAll(int16_t * destinationAcc, int16_t * destinationGyro, int16_t * destinationTemp); |
elessair | 0:76dc2aad77bc | 23 | void ReadConvertAll(float * destinationAcc, float * destinationGyro, float * destinationTemp); |
elessair | 0:76dc2aad77bc | 24 | void resetMPU9250() ; |
elessair | 0:76dc2aad77bc | 25 | void initMPU9250(uint8_t Ascale, uint8_t Gscale); |
elessair | 0:76dc2aad77bc | 26 | void calibrateMPU9250(float * dest1, float * dest2); |
elessair | 0:76dc2aad77bc | 27 | |
elessair | 0:76dc2aad77bc | 28 | float aRes, gRes; // scale resolutions per LSB for the sensors |
elessair | 0:76dc2aad77bc | 29 | float gyroBias[3]; |
elessair | 0:76dc2aad77bc | 30 | float accelBias[3]; // Bias corrections for gyro and accelerometer |
elessair | 1:c27bb1a0deca | 31 | uint8_t MPU9250_ADDRESS; |
elessair | 0:76dc2aad77bc | 32 | |
elessair | 0:76dc2aad77bc | 33 | |
elessair | 0:76dc2aad77bc | 34 | private: |
elessair | 0:76dc2aad77bc | 35 | PinName _SDA_pin; |
elessair | 0:76dc2aad77bc | 36 | PinName _SCL_pin; |
elessair | 0:76dc2aad77bc | 37 | float _error; |
elessair | 0:76dc2aad77bc | 38 | }; |
elessair | 0:76dc2aad77bc | 39 | |
elessair | 0:76dc2aad77bc | 40 | #endif |
elessair | 0:76dc2aad77bc | 41 | |
elessair | 0:76dc2aad77bc | 42 | |
elessair | 0:76dc2aad77bc | 43 | #define SELF_TEST_X_GYRO 0x00 |
elessair | 0:76dc2aad77bc | 44 | #define SELF_TEST_Y_GYRO 0x01 |
elessair | 0:76dc2aad77bc | 45 | #define SELF_TEST_Z_GYRO 0x02 |
elessair | 0:76dc2aad77bc | 46 | #define SELF_TEST_X_ACCEL 0x0D |
elessair | 0:76dc2aad77bc | 47 | #define SELF_TEST_Y_ACCEL 0x0E |
elessair | 0:76dc2aad77bc | 48 | #define SELF_TEST_Z_ACCEL 0x0F |
elessair | 0:76dc2aad77bc | 49 | |
elessair | 0:76dc2aad77bc | 50 | #define SELF_TEST_A 0x10 |
elessair | 0:76dc2aad77bc | 51 | |
elessair | 0:76dc2aad77bc | 52 | #define XG_OFFSET_H 0x13 |
elessair | 0:76dc2aad77bc | 53 | #define XG_OFFSET_L 0x14 |
elessair | 0:76dc2aad77bc | 54 | #define YG_OFFSET_H 0x15 |
elessair | 0:76dc2aad77bc | 55 | #define YG_OFFSET_L 0x16 |
elessair | 0:76dc2aad77bc | 56 | #define ZG_OFFSET_H 0x17 |
elessair | 0:76dc2aad77bc | 57 | #define ZG_OFFSET_L 0x18 |
elessair | 0:76dc2aad77bc | 58 | #define SMPLRT_DIV 0x19 |
elessair | 0:76dc2aad77bc | 59 | #define CONFIG 0x1A |
elessair | 0:76dc2aad77bc | 60 | #define GYRO_CONFIG 0x1B |
elessair | 0:76dc2aad77bc | 61 | #define ACCEL_CONFIG 0x1C |
elessair | 0:76dc2aad77bc | 62 | #define ACCEL_CONFIG2 0x1D |
elessair | 0:76dc2aad77bc | 63 | #define LP_ACCEL_ODR 0x1E |
elessair | 0:76dc2aad77bc | 64 | #define WOM_THR 0x1F |
elessair | 0:76dc2aad77bc | 65 | |
elessair | 0:76dc2aad77bc | 66 | #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms |
elessair | 0:76dc2aad77bc | 67 | #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0] |
elessair | 0:76dc2aad77bc | 68 | #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms |
elessair | 0:76dc2aad77bc | 69 | |
elessair | 0:76dc2aad77bc | 70 | #define FIFO_EN 0x23 |
elessair | 0:76dc2aad77bc | 71 | #define I2C_MST_CTRL 0x24 |
elessair | 0:76dc2aad77bc | 72 | #define I2C_SLV0_ADDR 0x25 |
elessair | 0:76dc2aad77bc | 73 | #define I2C_SLV0_REG 0x26 |
elessair | 0:76dc2aad77bc | 74 | #define I2C_SLV0_CTRL 0x27 |
elessair | 0:76dc2aad77bc | 75 | #define I2C_SLV1_ADDR 0x28 |
elessair | 0:76dc2aad77bc | 76 | #define I2C_SLV1_REG 0x29 |
elessair | 0:76dc2aad77bc | 77 | #define I2C_SLV1_CTRL 0x2A |
elessair | 0:76dc2aad77bc | 78 | #define I2C_SLV2_ADDR 0x2B |
elessair | 0:76dc2aad77bc | 79 | #define I2C_SLV2_REG 0x2C |
elessair | 0:76dc2aad77bc | 80 | #define I2C_SLV2_CTRL 0x2D |
elessair | 0:76dc2aad77bc | 81 | #define I2C_SLV3_ADDR 0x2E |
elessair | 0:76dc2aad77bc | 82 | #define I2C_SLV3_REG 0x2F |
elessair | 0:76dc2aad77bc | 83 | #define I2C_SLV3_CTRL 0x30 |
elessair | 0:76dc2aad77bc | 84 | #define I2C_SLV4_ADDR 0x31 |
elessair | 0:76dc2aad77bc | 85 | #define I2C_SLV4_REG 0x32 |
elessair | 0:76dc2aad77bc | 86 | #define I2C_SLV4_DO 0x33 |
elessair | 0:76dc2aad77bc | 87 | #define I2C_SLV4_CTRL 0x34 |
elessair | 0:76dc2aad77bc | 88 | #define I2C_SLV4_DI 0x35 |
elessair | 0:76dc2aad77bc | 89 | #define I2C_MST_STATUS 0x36 |
elessair | 0:76dc2aad77bc | 90 | #define INT_PIN_CFG 0x37 |
elessair | 0:76dc2aad77bc | 91 | #define INT_ENABLE 0x38 |
elessair | 0:76dc2aad77bc | 92 | #define DMP_INT_STATUS 0x39 // Check DMP interrupt |
elessair | 0:76dc2aad77bc | 93 | #define INT_STATUS 0x3A |
elessair | 0:76dc2aad77bc | 94 | #define ACCEL_XOUT_H 0x3B |
elessair | 0:76dc2aad77bc | 95 | #define ACCEL_XOUT_L 0x3C |
elessair | 0:76dc2aad77bc | 96 | #define ACCEL_YOUT_H 0x3D |
elessair | 0:76dc2aad77bc | 97 | #define ACCEL_YOUT_L 0x3E |
elessair | 0:76dc2aad77bc | 98 | #define ACCEL_ZOUT_H 0x3F |
elessair | 0:76dc2aad77bc | 99 | #define ACCEL_ZOUT_L 0x40 |
elessair | 0:76dc2aad77bc | 100 | #define TEMP_OUT_H 0x41 |
elessair | 0:76dc2aad77bc | 101 | #define TEMP_OUT_L 0x42 |
elessair | 0:76dc2aad77bc | 102 | #define GYRO_XOUT_H 0x43 |
elessair | 0:76dc2aad77bc | 103 | #define GYRO_XOUT_L 0x44 |
elessair | 0:76dc2aad77bc | 104 | #define GYRO_YOUT_H 0x45 |
elessair | 0:76dc2aad77bc | 105 | #define GYRO_YOUT_L 0x46 |
elessair | 0:76dc2aad77bc | 106 | #define GYRO_ZOUT_H 0x47 |
elessair | 0:76dc2aad77bc | 107 | #define GYRO_ZOUT_L 0x48 |
elessair | 0:76dc2aad77bc | 108 | #define EXT_SENS_DATA_00 0x49 |
elessair | 0:76dc2aad77bc | 109 | #define EXT_SENS_DATA_01 0x4A |
elessair | 0:76dc2aad77bc | 110 | #define EXT_SENS_DATA_02 0x4B |
elessair | 0:76dc2aad77bc | 111 | #define EXT_SENS_DATA_03 0x4C |
elessair | 0:76dc2aad77bc | 112 | #define EXT_SENS_DATA_04 0x4D |
elessair | 0:76dc2aad77bc | 113 | #define EXT_SENS_DATA_05 0x4E |
elessair | 0:76dc2aad77bc | 114 | #define EXT_SENS_DATA_06 0x4F |
elessair | 0:76dc2aad77bc | 115 | #define EXT_SENS_DATA_07 0x50 |
elessair | 0:76dc2aad77bc | 116 | #define EXT_SENS_DATA_08 0x51 |
elessair | 0:76dc2aad77bc | 117 | #define EXT_SENS_DATA_09 0x52 |
elessair | 0:76dc2aad77bc | 118 | #define EXT_SENS_DATA_10 0x53 |
elessair | 0:76dc2aad77bc | 119 | #define EXT_SENS_DATA_11 0x54 |
elessair | 0:76dc2aad77bc | 120 | #define EXT_SENS_DATA_12 0x55 |
elessair | 0:76dc2aad77bc | 121 | #define EXT_SENS_DATA_13 0x56 |
elessair | 0:76dc2aad77bc | 122 | #define EXT_SENS_DATA_14 0x57 |
elessair | 0:76dc2aad77bc | 123 | #define EXT_SENS_DATA_15 0x58 |
elessair | 0:76dc2aad77bc | 124 | #define EXT_SENS_DATA_16 0x59 |
elessair | 0:76dc2aad77bc | 125 | #define EXT_SENS_DATA_17 0x5A |
elessair | 0:76dc2aad77bc | 126 | #define EXT_SENS_DATA_18 0x5B |
elessair | 0:76dc2aad77bc | 127 | #define EXT_SENS_DATA_19 0x5C |
elessair | 0:76dc2aad77bc | 128 | #define EXT_SENS_DATA_20 0x5D |
elessair | 0:76dc2aad77bc | 129 | #define EXT_SENS_DATA_21 0x5E |
elessair | 0:76dc2aad77bc | 130 | #define EXT_SENS_DATA_22 0x5F |
elessair | 0:76dc2aad77bc | 131 | #define EXT_SENS_DATA_23 0x60 |
elessair | 0:76dc2aad77bc | 132 | #define MOT_DETECT_STATUS 0x61 |
elessair | 0:76dc2aad77bc | 133 | #define I2C_SLV0_DO 0x63 |
elessair | 0:76dc2aad77bc | 134 | #define I2C_SLV1_DO 0x64 |
elessair | 0:76dc2aad77bc | 135 | #define I2C_SLV2_DO 0x65 |
elessair | 0:76dc2aad77bc | 136 | #define I2C_SLV3_DO 0x66 |
elessair | 0:76dc2aad77bc | 137 | #define I2C_MST_DELAY_CTRL 0x67 |
elessair | 0:76dc2aad77bc | 138 | #define SIGNAL_PATH_RESET 0x68 |
elessair | 0:76dc2aad77bc | 139 | #define MOT_DETECT_CTRL 0x69 |
elessair | 0:76dc2aad77bc | 140 | #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP |
elessair | 0:76dc2aad77bc | 141 | #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode |
elessair | 0:76dc2aad77bc | 142 | #define PWR_MGMT_2 0x6C |
elessair | 0:76dc2aad77bc | 143 | #define DMP_BANK 0x6D // Activates a specific bank in the DMP |
elessair | 0:76dc2aad77bc | 144 | #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank |
elessair | 0:76dc2aad77bc | 145 | #define DMP_REG 0x6F // Register in DMP from which to read or to which to write |
elessair | 0:76dc2aad77bc | 146 | #define DMP_REG_1 0x70 |
elessair | 0:76dc2aad77bc | 147 | #define DMP_REG_2 0x71 |
elessair | 0:76dc2aad77bc | 148 | #define FIFO_COUNTH 0x72 |
elessair | 0:76dc2aad77bc | 149 | #define FIFO_COUNTL 0x73 |
elessair | 0:76dc2aad77bc | 150 | #define FIFO_R_W 0x74 |
elessair | 0:76dc2aad77bc | 151 | #define WHO_AM_I_MPU9250 0x75 // Should return 0x71 |
elessair | 0:76dc2aad77bc | 152 | #define XA_OFFSET_H 0x77 |
elessair | 0:76dc2aad77bc | 153 | #define XA_OFFSET_L 0x78 |
elessair | 0:76dc2aad77bc | 154 | #define YA_OFFSET_H 0x7A |
elessair | 0:76dc2aad77bc | 155 | #define YA_OFFSET_L 0x7B |
elessair | 0:76dc2aad77bc | 156 | #define ZA_OFFSET_H 0x7D |
elessair | 0:76dc2aad77bc | 157 | #define ZA_OFFSET_L 0x7E |
elessair | 0:76dc2aad77bc | 158 | |
elessair | 0:76dc2aad77bc | 159 | #define GFS_250DPS 0x00 |
elessair | 0:76dc2aad77bc | 160 | #define GFS_500DPS 0x08 |
elessair | 0:76dc2aad77bc | 161 | #define GFS_1000DPS 0x10 |
elessair | 0:76dc2aad77bc | 162 | #define GFS_2000DPS 0x18 |
elessair | 0:76dc2aad77bc | 163 | #define AFS_2G 0x00 |
elessair | 0:76dc2aad77bc | 164 | #define AFS_4G 0x08 |
elessair | 0:76dc2aad77bc | 165 | #define AFS_8G 0x10 |
elessair | 0:76dc2aad77bc | 166 | #define AFS_16G 0x18 |
elessair | 0:76dc2aad77bc | 167 | |
elessair | 0:76dc2aad77bc | 168 | |
elessair | 0:76dc2aad77bc | 169 |