UIPEthernet library for Arduino IDE, Eclipse with arduino plugin and MBED/SMeshStudio (AVR,STM32F,ESP8266,Intel ARC32,Nordic nRF51,Teensy boards,Realtek Ameba(RTL8195A,RTL8710)), ENC28j60 network chip. Compatible with Wiznet W5100 Ethernet library API. Compiled and tested on Nucleo-F302R8. Master repository is: https://github.com/UIPEthernet/UIPEthernet/

Committer:
cassyarduino
Date:
Tue Jan 23 15:08:43 2018 +0100
Revision:
39:deeb00b81cc9
Parent:
38:645b253e6b50
Release: 2.0.4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cassyarduino 0:e3fb1267e3c3 1 /*
cassyarduino 0:e3fb1267e3c3 2 Enc28J60NetworkClass.h
cassyarduino 0:e3fb1267e3c3 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
cassyarduino 0:e3fb1267e3c3 4
cassyarduino 0:e3fb1267e3c3 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
cassyarduino 0:e3fb1267e3c3 6 All rights reserved.
cassyarduino 0:e3fb1267e3c3 7
cassyarduino 0:e3fb1267e3c3 8 inspired by enc28j60.c file from the AVRlib library by Pascal Stang.
cassyarduino 0:e3fb1267e3c3 9 For AVRlib See http://www.procyonengineering.com/
cassyarduino 0:e3fb1267e3c3 10
cassyarduino 0:e3fb1267e3c3 11 This program is free software: you can redistribute it and/or modify
cassyarduino 0:e3fb1267e3c3 12 it under the terms of the GNU General Public License as published by
cassyarduino 0:e3fb1267e3c3 13 the Free Software Foundation, either version 3 of the License, or
cassyarduino 0:e3fb1267e3c3 14 (at your option) any later version.
cassyarduino 0:e3fb1267e3c3 15
cassyarduino 0:e3fb1267e3c3 16 This program is distributed in the hope that it will be useful,
cassyarduino 0:e3fb1267e3c3 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
cassyarduino 0:e3fb1267e3c3 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cassyarduino 0:e3fb1267e3c3 19 GNU General Public License for more details.
cassyarduino 0:e3fb1267e3c3 20
cassyarduino 0:e3fb1267e3c3 21 You should have received a copy of the GNU General Public License
cassyarduino 0:e3fb1267e3c3 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
cassyarduino 0:e3fb1267e3c3 23 */
cassyarduino 0:e3fb1267e3c3 24
cassyarduino 0:e3fb1267e3c3 25 #ifndef Enc28J60Network_H_
cassyarduino 0:e3fb1267e3c3 26 #define Enc28J60Network_H_
cassyarduino 0:e3fb1267e3c3 27
cassyarduino 0:e3fb1267e3c3 28 #include "mempool.h"
cassyarduino 0:e3fb1267e3c3 29 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 30 #include <mbed.h>
cassyarduino 0:e3fb1267e3c3 31 //UIPEthernet(SPI_MOSI, SPI_MISO, SPI_SCK, SPI_CS);
cassyarduino 0:e3fb1267e3c3 32 #if defined(TARGET_LPC1768)
cassyarduino 0:e3fb1267e3c3 33 #define SPI_MOSI p11
cassyarduino 0:e3fb1267e3c3 34 #define SPI_MISO p12
cassyarduino 0:e3fb1267e3c3 35 #define SPI_SCK p13
cassyarduino 0:e3fb1267e3c3 36 #define SPI_CS p8
cassyarduino 0:e3fb1267e3c3 37 #elif defined(TARGET_LPC1114)
cassyarduino 0:e3fb1267e3c3 38 #define SPI_MOSI dp2
cassyarduino 0:e3fb1267e3c3 39 #define SPI_MISO dp1
cassyarduino 0:e3fb1267e3c3 40 #define SPI_SCK dp6
cassyarduino 0:e3fb1267e3c3 41 #define SPI_CS dp25
cassyarduino 0:e3fb1267e3c3 42 #elif defined(TARGET_LPC11U68)
cassyarduino 0:e3fb1267e3c3 43 #define SPI_MOSI P0_9
cassyarduino 0:e3fb1267e3c3 44 #define SPI_MISO P0_8
cassyarduino 0:e3fb1267e3c3 45 #define SPI_SCK P1_29
cassyarduino 0:e3fb1267e3c3 46 #define SPI_CS P0_2
cassyarduino 0:e3fb1267e3c3 47 #elif defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L152RE) || defined(TARGET_NUCLEO_F030R8) \
cassyarduino 0:e3fb1267e3c3 48 || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F302R8) || defined(TARGET_NUCLEO_L053R8) \
cassyarduino 0:e3fb1267e3c3 49 || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F334R8) || defined(TARGET_NUCLEO_F072RB) \
cassyarduino 0:e3fb1267e3c3 50 || defined(TARGET_NUCLEO_F091RC) || defined(TARGET_NUCLEO_F303RE) || defined(TARGET_NUCLEO_F070RB)
cassyarduino 0:e3fb1267e3c3 51 #define SPI_MOSI D4
cassyarduino 0:e3fb1267e3c3 52 #define SPI_MISO D5
cassyarduino 0:e3fb1267e3c3 53 #define SPI_SCK D3
cassyarduino 0:e3fb1267e3c3 54 #define SPI_CS D2
cassyarduino 0:e3fb1267e3c3 55 #endif
cassyarduino 0:e3fb1267e3c3 56 #define ENC28J60_CONTROL_CS SPI_CS
cassyarduino 0:e3fb1267e3c3 57 #endif
cassyarduino 0:e3fb1267e3c3 58
cassyarduino 39:deeb00b81cc9 59 #if defined(STM32F3) || defined(STM32F2) //This is workaround for stm32duino STM32F2, and adafruit wiced feather STM32F2
cassyarduino 19:e416943f7119 60 #define BOARD_SPI1_NSS_PIN PA4
cassyarduino 19:e416943f7119 61 #define BOARD_SPI1_SCK_PIN PA5
cassyarduino 19:e416943f7119 62 #define BOARD_SPI1_MISO_PIN PA6
cassyarduino 19:e416943f7119 63 #define BOARD_SPI1_MOSI_PIN PA7
cassyarduino 39:deeb00b81cc9 64 #endif //This is workaround for stm32duino STM32F3, and adafruit wiced feather STM32F2
cassyarduino 19:e416943f7119 65
cassyarduino 25:ef941d560208 66 #if defined(BOARD_discovery_f4)
cassyarduino 25:ef941d560208 67 #define __STM32F4__
cassyarduino 25:ef941d560208 68 #endif
cassyarduino 33:7ba5d53df0f2 69 #if defined(__MK20DX128__) || defined(__MKL26Z64__)
cassyarduino 33:7ba5d53df0f2 70 #include <SPIFIFO.h>
cassyarduino 33:7ba5d53df0f2 71 #endif
cassyarduino 25:ef941d560208 72
cassyarduino 0:e3fb1267e3c3 73 #if !defined(ENC28J60_CONTROL_CS)
cassyarduino 33:7ba5d53df0f2 74 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 75 // Arduino Uno (__AVR__) SS defined to pin 10
cassyarduino 0:e3fb1267e3c3 76 // Arduino Mega(__AVR_ATmega2560__) SS defined to pin 53
cassyarduino 0:e3fb1267e3c3 77 // ESP8266 (ESP8266) SS defined to pin 15
cassyarduino 0:e3fb1267e3c3 78 #define ENC28J60_CONTROL_CS SS
cassyarduino 36:689bcc358067 79 #elif defined(ARDUINO_ARCH_AMEBA) //Defined SS to pin 10
cassyarduino 36:689bcc358067 80 #define ENC28J60_CONTROL_CS SS //PC_0 A5 10
cassyarduino 0:e3fb1267e3c3 81 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 82 // Arduino Due (ARDUINO_ARCH_SAM) BOARD_SPI_DEFAULT_SS (SS3) defined to pin 78
cassyarduino 38:645b253e6b50 83 //#define ENC28J60_CONTROL_CS BOARD_SPI_DEFAULT_SS
cassyarduino 38:645b253e6b50 84 #define ENC28J60_CONTROL_CS BOARD_SPI_SS0
cassyarduino 33:7ba5d53df0f2 85 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 86 #define ENC28J60_CONTROL_CS SS
cassyarduino 33:7ba5d53df0f2 87 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 88 #define ENC28J60_CONTROL_CS SS
cassyarduino 39:deeb00b81cc9 89 #elif defined(ARDUINO_ARCH_STM32) // STM32duino core
cassyarduino 39:deeb00b81cc9 90 #define ENC28J60_CONTROL_CS SS
cassyarduino 39:deeb00b81cc9 91 #elif defined(STM32_MCU_SERIES) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(STM32F2)
cassyarduino 19:e416943f7119 92 #if defined(BOARD_SPI1_NSS_PIN)
cassyarduino 19:e416943f7119 93 #define ENC28J60_CONTROL_CS BOARD_SPI1_NSS_PIN
cassyarduino 19:e416943f7119 94 #elif defined(ARDUINO_STM32F4_NETDUINO2PLUS)
cassyarduino 0:e3fb1267e3c3 95 #define ENC28J60_CONTROL_CS PC8
cassyarduino 0:e3fb1267e3c3 96 #else
cassyarduino 0:e3fb1267e3c3 97 #define ENC28J60_CONTROL_CS SPI.nssPin()
cassyarduino 0:e3fb1267e3c3 98 //#define ENC28J60_CONTROL_CS PA4
cassyarduino 0:e3fb1267e3c3 99 #endif
cassyarduino 33:7ba5d53df0f2 100 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 101 #define ENC28J60_CONTROL_CS PIN_SPI_SS
cassyarduino 0:e3fb1267e3c3 102 #endif
cassyarduino 0:e3fb1267e3c3 103 #if defined(ENC28J60_CONTROL_CS)
cassyarduino 3:6b1c9bd7773a 104 #warning "Not defined ENC28J60_CONTROL_CS. Use borad default SS pin setting. You can configure in 'utility/Enc28J60Network.h'."
cassyarduino 0:e3fb1267e3c3 105 #endif
cassyarduino 0:e3fb1267e3c3 106 #endif
cassyarduino 0:e3fb1267e3c3 107 #if !defined(ENC28J60_CONTROL_CS)
cassyarduino 0:e3fb1267e3c3 108 #error "Not defined ENC28J60_CONTROL_CS!"
cassyarduino 0:e3fb1267e3c3 109 #endif
cassyarduino 0:e3fb1267e3c3 110
cassyarduino 0:e3fb1267e3c3 111 #if !defined(SPI_MOSI)
cassyarduino 33:7ba5d53df0f2 112 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 113 #define SPI_MOSI MOSI
cassyarduino 36:689bcc358067 114 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 115 #define SPI_MOSI 11 //PC_2
cassyarduino 0:e3fb1267e3c3 116 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 117 #define SPI_MOSI PIN_SPI_MOSI
cassyarduino 33:7ba5d53df0f2 118 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 119 #define SPI_MOSI MOSI
cassyarduino 33:7ba5d53df0f2 120 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 121 #define SPI_MOSI MOSI
cassyarduino 39:deeb00b81cc9 122 #elif defined(ARDUINO_ARCH_STM32) // STM32duino core
cassyarduino 39:deeb00b81cc9 123 #define SPI_MOSI MOSI
cassyarduino 39:deeb00b81cc9 124 #elif defined(STM32_MCU_SERIES) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(STM32F2)
cassyarduino 19:e416943f7119 125 #if defined(BOARD_SPI1_MOSI_PIN)
cassyarduino 19:e416943f7119 126 #define SPI_MOSI BOARD_SPI1_MOSI_PIN
cassyarduino 19:e416943f7119 127 #else
cassyarduino 19:e416943f7119 128 #define SPI_MOSI SPI.mosiPin()
cassyarduino 19:e416943f7119 129 #endif
cassyarduino 33:7ba5d53df0f2 130 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 131 #define SPI_MOSI PIN_SPI_MOSI
cassyarduino 0:e3fb1267e3c3 132 #endif
cassyarduino 0:e3fb1267e3c3 133 #endif
cassyarduino 0:e3fb1267e3c3 134 #if !defined(SPI_MOSI)
cassyarduino 0:e3fb1267e3c3 135 #error "Not defined SPI_MOSI!"
cassyarduino 0:e3fb1267e3c3 136 #endif
cassyarduino 0:e3fb1267e3c3 137
cassyarduino 0:e3fb1267e3c3 138 #if !defined(SPI_MISO)
cassyarduino 33:7ba5d53df0f2 139 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 140 #define SPI_MISO MISO
cassyarduino 36:689bcc358067 141 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 142 #define SPI_MISO 12 //PC_3
cassyarduino 0:e3fb1267e3c3 143 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 144 #define SPI_MISO PIN_SPI_MISO
cassyarduino 33:7ba5d53df0f2 145 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 146 #define SPI_MISO MISO
cassyarduino 33:7ba5d53df0f2 147 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 148 #define SPI_MISO MISO
cassyarduino 39:deeb00b81cc9 149 #elif defined(ARDUINO_ARCH_STM32) // STM32duino core
cassyarduino 39:deeb00b81cc9 150 #define SPI_MISO MISO
cassyarduino 39:deeb00b81cc9 151 #elif defined(STM32_MCU_SERIES) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(STM32F2)
cassyarduino 19:e416943f7119 152 #if defined(BOARD_SPI1_MISO_PIN)
cassyarduino 19:e416943f7119 153 #define SPI_MISO BOARD_SPI1_MISO_PIN
cassyarduino 19:e416943f7119 154 #else
cassyarduino 19:e416943f7119 155 #define SPI_MISO SPI.misoPin()
cassyarduino 19:e416943f7119 156 #endif
cassyarduino 33:7ba5d53df0f2 157 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 158 #define SPI_MISO PIN_SPI_MISO
cassyarduino 0:e3fb1267e3c3 159 #endif
cassyarduino 0:e3fb1267e3c3 160 #endif
cassyarduino 0:e3fb1267e3c3 161 #if !defined(SPI_MISO)
cassyarduino 0:e3fb1267e3c3 162 #error "Not defined SPI_MISO!"
cassyarduino 0:e3fb1267e3c3 163 #endif
cassyarduino 0:e3fb1267e3c3 164 #if !defined(SPI_SCK)
cassyarduino 33:7ba5d53df0f2 165 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 166 #define SPI_SCK SCK
cassyarduino 36:689bcc358067 167 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 168 #define SPI_SCK 13 //PC_1 A4
cassyarduino 0:e3fb1267e3c3 169 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 170 #define SPI_SCK PIN_SPI_SCK
cassyarduino 33:7ba5d53df0f2 171 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 172 #define SPI_SCK SCK
cassyarduino 33:7ba5d53df0f2 173 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 174 #define SPI_SCK SCK
cassyarduino 39:deeb00b81cc9 175 #elif defined(ARDUINO_ARCH_STM32) // STM32duino core
cassyarduino 39:deeb00b81cc9 176 #define SPI_SCK SCK
cassyarduino 39:deeb00b81cc9 177 #elif defined(STM32_MCU_SERIES) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(STM32F2)
cassyarduino 19:e416943f7119 178 #if defined(BOARD_SPI1_SCK_PIN)
cassyarduino 19:e416943f7119 179 #define SPI_SCK BOARD_SPI1_SCK_PIN
cassyarduino 19:e416943f7119 180 #else
cassyarduino 19:e416943f7119 181 #define SPI_SCK SPI.sckPin()
cassyarduino 19:e416943f7119 182 #endif
cassyarduino 33:7ba5d53df0f2 183 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 184 #define SPI_SCK PIN_SPI_SCK
cassyarduino 0:e3fb1267e3c3 185 #endif
cassyarduino 0:e3fb1267e3c3 186 #endif
cassyarduino 0:e3fb1267e3c3 187 #if !defined(SPI_SCK)
cassyarduino 0:e3fb1267e3c3 188 #error "Not defined SPI_SCK!"
cassyarduino 0:e3fb1267e3c3 189 #endif
cassyarduino 0:e3fb1267e3c3 190
cassyarduino 39:deeb00b81cc9 191 #if defined(__MBED__) || defined(ARDUINO_ARCH_SAM) || defined(__ARDUINO_ARC__) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(STM32F2) || defined(ESP8266) || defined(ARDUINO_ARCH_AMEBA) || defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__RFduino__) || defined(ARDUINO_ARCH_STM32)
cassyarduino 22:1ce14a6cd293 192 #if defined(ARDUINO) && defined(STM32F3)
cassyarduino 19:e416943f7119 193 #include "HardwareSPI.h"
cassyarduino 19:e416943f7119 194 #else
cassyarduino 19:e416943f7119 195 #include <SPI.h>
cassyarduino 19:e416943f7119 196 #endif
cassyarduino 0:e3fb1267e3c3 197 #define ENC28J60_USE_SPILIB 1
cassyarduino 0:e3fb1267e3c3 198 #endif
cassyarduino 0:e3fb1267e3c3 199
cassyarduino 0:e3fb1267e3c3 200 #define UIP_RECEIVEBUFFERHANDLE 0xff
cassyarduino 0:e3fb1267e3c3 201
cassyarduino 0:e3fb1267e3c3 202 /*
cassyarduino 0:e3fb1267e3c3 203 * Empfangen von ip-header, arp etc...
cassyarduino 0:e3fb1267e3c3 204 * wenn tcp/udp -> tcp/udp-callback -> assign new packet to connection
cassyarduino 0:e3fb1267e3c3 205 */
cassyarduino 0:e3fb1267e3c3 206
cassyarduino 33:7ba5d53df0f2 207 #define TX_COLLISION_RETRY_COUNT 10
cassyarduino 33:7ba5d53df0f2 208
cassyarduino 0:e3fb1267e3c3 209 class Enc28J60Network : public MemoryPool
cassyarduino 0:e3fb1267e3c3 210 {
cassyarduino 0:e3fb1267e3c3 211
cassyarduino 0:e3fb1267e3c3 212 private:
cassyarduino 0:e3fb1267e3c3 213 static uint16_t nextPacketPtr;
cassyarduino 0:e3fb1267e3c3 214 static uint8_t bank;
cassyarduino 0:e3fb1267e3c3 215 static uint8_t erevid;
cassyarduino 0:e3fb1267e3c3 216
cassyarduino 0:e3fb1267e3c3 217 static struct memblock receivePkt;
cassyarduino 0:e3fb1267e3c3 218
cassyarduino 0:e3fb1267e3c3 219 static bool broadcast_enabled; //!< True if broadcasts enabled (used to allow temporary disable of broadcast for DHCP or other internal functions)
cassyarduino 0:e3fb1267e3c3 220
cassyarduino 0:e3fb1267e3c3 221 static uint8_t readOp(uint8_t op, uint8_t address);
cassyarduino 0:e3fb1267e3c3 222 static void writeOp(uint8_t op, uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 223 static uint16_t setReadPtr(memhandle handle, memaddress position, uint16_t len);
cassyarduino 0:e3fb1267e3c3 224 static void setERXRDPT(void);
cassyarduino 0:e3fb1267e3c3 225 static void readBuffer(uint16_t len, uint8_t* data);
cassyarduino 0:e3fb1267e3c3 226 static void writeBuffer(uint16_t len, uint8_t* data);
cassyarduino 0:e3fb1267e3c3 227 static uint8_t readByte(uint16_t addr);
cassyarduino 0:e3fb1267e3c3 228 static void writeByte(uint16_t addr, uint8_t data);
cassyarduino 0:e3fb1267e3c3 229 static void setBank(uint8_t address);
cassyarduino 0:e3fb1267e3c3 230 static uint8_t readReg(uint8_t address);
cassyarduino 0:e3fb1267e3c3 231 static void writeReg(uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 232 static void writeRegPair(uint8_t address, uint16_t data);
cassyarduino 0:e3fb1267e3c3 233 static void phyWrite(uint8_t address, uint16_t data);
cassyarduino 0:e3fb1267e3c3 234 static uint16_t phyRead(uint8_t address);
cassyarduino 0:e3fb1267e3c3 235 static void clkout(uint8_t clk);
cassyarduino 0:e3fb1267e3c3 236
cassyarduino 0:e3fb1267e3c3 237 static void enableBroadcast (bool temporary);
cassyarduino 0:e3fb1267e3c3 238 static void disableBroadcast (bool temporary);
cassyarduino 0:e3fb1267e3c3 239 static void enableMulticast (void);
cassyarduino 0:e3fb1267e3c3 240 static void disableMulticast (void);
cassyarduino 0:e3fb1267e3c3 241
cassyarduino 0:e3fb1267e3c3 242 static uint8_t readRegByte (uint8_t address);
cassyarduino 0:e3fb1267e3c3 243 static void writeRegByte (uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 244
cassyarduino 0:e3fb1267e3c3 245 friend void enc28J60_mempool_block_move_callback(memaddress,memaddress,memaddress);
cassyarduino 0:e3fb1267e3c3 246
cassyarduino 0:e3fb1267e3c3 247 public:
cassyarduino 0:e3fb1267e3c3 248
cassyarduino 0:e3fb1267e3c3 249 void powerOn(void);
cassyarduino 0:e3fb1267e3c3 250 void powerOff(void);
cassyarduino 0:e3fb1267e3c3 251 static uint8_t geterevid(void);
cassyarduino 0:e3fb1267e3c3 252 uint16_t PhyStatus(void);
cassyarduino 0:e3fb1267e3c3 253 static bool linkStatus(void);
cassyarduino 0:e3fb1267e3c3 254
cassyarduino 0:e3fb1267e3c3 255 static void init(uint8_t* macaddr);
cassyarduino 0:e3fb1267e3c3 256 static memhandle receivePacket(void);
cassyarduino 0:e3fb1267e3c3 257 static void freePacket(void);
cassyarduino 0:e3fb1267e3c3 258 static memaddress blockSize(memhandle handle);
cassyarduino 0:e3fb1267e3c3 259 static void sendPacket(memhandle handle);
cassyarduino 0:e3fb1267e3c3 260 static uint16_t readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len);
cassyarduino 0:e3fb1267e3c3 261 static uint16_t writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len);
cassyarduino 0:e3fb1267e3c3 262 static void copyPacket(memhandle dest, memaddress dest_pos, memhandle src, memaddress src_pos, uint16_t len);
cassyarduino 0:e3fb1267e3c3 263 static uint16_t chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len);
cassyarduino 0:e3fb1267e3c3 264 };
cassyarduino 0:e3fb1267e3c3 265
cassyarduino 0:e3fb1267e3c3 266 extern Enc28J60Network Enc28J60;
cassyarduino 0:e3fb1267e3c3 267 #endif /* Enc28J60NetworkClass_H_ */