cassyarduino cassyarduino / UIPEthernet

UIPEthernet library for Arduino IDE, Eclipse with arduino plugin and MBED/SMeshStudio (AVR,STM32F,ESP8266,Intel ARC32,Nordic nRF51,Teensy boards,Realtek Ameba(RTL8195A,RTL8710)), ENC28j60 network chip. Compatible with Wiznet W5100 Ethernet library API. Compiled and tested on Nucleo-F302R8. Master repository is: https://github.com/UIPEthernet/UIPEthernet/

utility/Enc28J60Network.h@38:645b253e6b50, 2017-03-27 (annotated)

Committer:
cassyarduino
Date:
Mon Mar 27 22:31:01 2017 +0200
Revision:
38:645b253e6b50
Parent:
36:689bcc358067
Child:
39:deeb00b81cc9
Release: 2.0.4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cassyarduino 0:e3fb1267e3c3 1 /*
cassyarduino 0:e3fb1267e3c3 2 Enc28J60NetworkClass.h
cassyarduino 0:e3fb1267e3c3 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
cassyarduino 0:e3fb1267e3c3 4
cassyarduino 0:e3fb1267e3c3 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
cassyarduino 0:e3fb1267e3c3 6 All rights reserved.
cassyarduino 0:e3fb1267e3c3 7
cassyarduino 0:e3fb1267e3c3 8 inspired by enc28j60.c file from the AVRlib library by Pascal Stang.
cassyarduino 0:e3fb1267e3c3 9 For AVRlib See http://www.procyonengineering.com/
cassyarduino 0:e3fb1267e3c3 10
cassyarduino 0:e3fb1267e3c3 11 This program is free software: you can redistribute it and/or modify
cassyarduino 0:e3fb1267e3c3 12 it under the terms of the GNU General Public License as published by
cassyarduino 0:e3fb1267e3c3 13 the Free Software Foundation, either version 3 of the License, or
cassyarduino 0:e3fb1267e3c3 14 (at your option) any later version.
cassyarduino 0:e3fb1267e3c3 15
cassyarduino 0:e3fb1267e3c3 16 This program is distributed in the hope that it will be useful,
cassyarduino 0:e3fb1267e3c3 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
cassyarduino 0:e3fb1267e3c3 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cassyarduino 0:e3fb1267e3c3 19 GNU General Public License for more details.
cassyarduino 0:e3fb1267e3c3 20
cassyarduino 0:e3fb1267e3c3 21 You should have received a copy of the GNU General Public License
cassyarduino 0:e3fb1267e3c3 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
cassyarduino 0:e3fb1267e3c3 23 */
cassyarduino 0:e3fb1267e3c3 24
cassyarduino 0:e3fb1267e3c3 25 #ifndef Enc28J60Network_H_
cassyarduino 0:e3fb1267e3c3 26 #define Enc28J60Network_H_
cassyarduino 0:e3fb1267e3c3 27
cassyarduino 0:e3fb1267e3c3 28 #include "mempool.h"
cassyarduino 0:e3fb1267e3c3 29 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 30 #include <mbed.h>
cassyarduino 0:e3fb1267e3c3 31 //UIPEthernet(SPI_MOSI, SPI_MISO, SPI_SCK, SPI_CS);
cassyarduino 0:e3fb1267e3c3 32 #if defined(TARGET_LPC1768)
cassyarduino 0:e3fb1267e3c3 33 #define SPI_MOSI p11
cassyarduino 0:e3fb1267e3c3 34 #define SPI_MISO p12
cassyarduino 0:e3fb1267e3c3 35 #define SPI_SCK p13
cassyarduino 0:e3fb1267e3c3 36 #define SPI_CS p8
cassyarduino 0:e3fb1267e3c3 37 #elif defined(TARGET_LPC1114)
cassyarduino 0:e3fb1267e3c3 38 #define SPI_MOSI dp2
cassyarduino 0:e3fb1267e3c3 39 #define SPI_MISO dp1
cassyarduino 0:e3fb1267e3c3 40 #define SPI_SCK dp6
cassyarduino 0:e3fb1267e3c3 41 #define SPI_CS dp25
cassyarduino 0:e3fb1267e3c3 42 #elif defined(TARGET_LPC11U68)
cassyarduino 0:e3fb1267e3c3 43 #define SPI_MOSI P0_9
cassyarduino 0:e3fb1267e3c3 44 #define SPI_MISO P0_8
cassyarduino 0:e3fb1267e3c3 45 #define SPI_SCK P1_29
cassyarduino 0:e3fb1267e3c3 46 #define SPI_CS P0_2
cassyarduino 0:e3fb1267e3c3 47 #elif defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L152RE) || defined(TARGET_NUCLEO_F030R8) \
cassyarduino 0:e3fb1267e3c3 48 || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F302R8) || defined(TARGET_NUCLEO_L053R8) \
cassyarduino 0:e3fb1267e3c3 49 || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F334R8) || defined(TARGET_NUCLEO_F072RB) \
cassyarduino 0:e3fb1267e3c3 50 || defined(TARGET_NUCLEO_F091RC) || defined(TARGET_NUCLEO_F303RE) || defined(TARGET_NUCLEO_F070RB)
cassyarduino 0:e3fb1267e3c3 51 #define SPI_MOSI D4
cassyarduino 0:e3fb1267e3c3 52 #define SPI_MISO D5
cassyarduino 0:e3fb1267e3c3 53 #define SPI_SCK D3
cassyarduino 0:e3fb1267e3c3 54 #define SPI_CS D2
cassyarduino 0:e3fb1267e3c3 55 #endif
cassyarduino 0:e3fb1267e3c3 56 #define ENC28J60_CONTROL_CS SPI_CS
cassyarduino 0:e3fb1267e3c3 57 #endif
cassyarduino 0:e3fb1267e3c3 58
cassyarduino 19:e416943f7119 59 #if defined(STM32F3) //This is workaround for stm32duino STM32F3
cassyarduino 19:e416943f7119 60 #define BOARD_SPI1_NSS_PIN PA4
cassyarduino 19:e416943f7119 61 #define BOARD_SPI1_SCK_PIN PA5
cassyarduino 19:e416943f7119 62 #define BOARD_SPI1_MISO_PIN PA6
cassyarduino 19:e416943f7119 63 #define BOARD_SPI1_MOSI_PIN PA7
cassyarduino 19:e416943f7119 64 #endif //This is workaround for stm32duino STM32F3
cassyarduino 19:e416943f7119 65
cassyarduino 25:ef941d560208 66 #if defined(BOARD_discovery_f4)
cassyarduino 25:ef941d560208 67 #define __STM32F4__
cassyarduino 25:ef941d560208 68 #endif
cassyarduino 33:7ba5d53df0f2 69 #if defined(__MK20DX128__) || defined(__MKL26Z64__)
cassyarduino 33:7ba5d53df0f2 70 #include <SPIFIFO.h>
cassyarduino 33:7ba5d53df0f2 71 #endif
cassyarduino 25:ef941d560208 72
cassyarduino 0:e3fb1267e3c3 73 #if !defined(ENC28J60_CONTROL_CS)
cassyarduino 33:7ba5d53df0f2 74 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 75 // Arduino Uno (__AVR__) SS defined to pin 10
cassyarduino 0:e3fb1267e3c3 76 // Arduino Mega(__AVR_ATmega2560__) SS defined to pin 53
cassyarduino 0:e3fb1267e3c3 77 // ESP8266 (ESP8266) SS defined to pin 15
cassyarduino 0:e3fb1267e3c3 78 #define ENC28J60_CONTROL_CS SS
cassyarduino 36:689bcc358067 79 #elif defined(ARDUINO_ARCH_AMEBA) //Defined SS to pin 10
cassyarduino 36:689bcc358067 80 #define ENC28J60_CONTROL_CS SS //PC_0 A5 10
cassyarduino 0:e3fb1267e3c3 81 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 82 // Arduino Due (ARDUINO_ARCH_SAM) BOARD_SPI_DEFAULT_SS (SS3) defined to pin 78
cassyarduino 38:645b253e6b50 83 //#define ENC28J60_CONTROL_CS BOARD_SPI_DEFAULT_SS
cassyarduino 38:645b253e6b50 84 #define ENC28J60_CONTROL_CS BOARD_SPI_SS0
cassyarduino 33:7ba5d53df0f2 85 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 86 #define ENC28J60_CONTROL_CS SS
cassyarduino 33:7ba5d53df0f2 87 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 88 #define ENC28J60_CONTROL_CS SS
cassyarduino 19:e416943f7119 89 #elif defined(STM32_MCU_SERIES) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 90 #if defined(BOARD_SPI1_NSS_PIN)
cassyarduino 19:e416943f7119 91 #define ENC28J60_CONTROL_CS BOARD_SPI1_NSS_PIN
cassyarduino 19:e416943f7119 92 #elif defined(ARDUINO_STM32F4_NETDUINO2PLUS)
cassyarduino 0:e3fb1267e3c3 93 #define ENC28J60_CONTROL_CS PC8
cassyarduino 0:e3fb1267e3c3 94 #else
cassyarduino 0:e3fb1267e3c3 95 #define ENC28J60_CONTROL_CS SPI.nssPin()
cassyarduino 0:e3fb1267e3c3 96 //#define ENC28J60_CONTROL_CS PA4
cassyarduino 0:e3fb1267e3c3 97 #endif
cassyarduino 33:7ba5d53df0f2 98 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 99 #define ENC28J60_CONTROL_CS PIN_SPI_SS
cassyarduino 0:e3fb1267e3c3 100 #endif
cassyarduino 0:e3fb1267e3c3 101 #if defined(ENC28J60_CONTROL_CS)
cassyarduino 3:6b1c9bd7773a 102 #warning "Not defined ENC28J60_CONTROL_CS. Use borad default SS pin setting. You can configure in 'utility/Enc28J60Network.h'."
cassyarduino 0:e3fb1267e3c3 103 #endif
cassyarduino 0:e3fb1267e3c3 104 #endif
cassyarduino 0:e3fb1267e3c3 105 #if !defined(ENC28J60_CONTROL_CS)
cassyarduino 0:e3fb1267e3c3 106 #error "Not defined ENC28J60_CONTROL_CS!"
cassyarduino 0:e3fb1267e3c3 107 #endif
cassyarduino 0:e3fb1267e3c3 108
cassyarduino 0:e3fb1267e3c3 109 #if !defined(SPI_MOSI)
cassyarduino 33:7ba5d53df0f2 110 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 111 #define SPI_MOSI MOSI
cassyarduino 36:689bcc358067 112 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 113 #define SPI_MOSI 11 //PC_2
cassyarduino 0:e3fb1267e3c3 114 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 115 #define SPI_MOSI PIN_SPI_MOSI
cassyarduino 33:7ba5d53df0f2 116 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 117 #define SPI_MOSI MOSI
cassyarduino 33:7ba5d53df0f2 118 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 119 #define SPI_MOSI MOSI
cassyarduino 19:e416943f7119 120 #elif defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 121 #if defined(BOARD_SPI1_MOSI_PIN)
cassyarduino 19:e416943f7119 122 #define SPI_MOSI BOARD_SPI1_MOSI_PIN
cassyarduino 19:e416943f7119 123 #else
cassyarduino 19:e416943f7119 124 #define SPI_MOSI SPI.mosiPin()
cassyarduino 19:e416943f7119 125 #endif
cassyarduino 33:7ba5d53df0f2 126 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 127 #define SPI_MOSI PIN_SPI_MOSI
cassyarduino 0:e3fb1267e3c3 128 #endif
cassyarduino 0:e3fb1267e3c3 129 #endif
cassyarduino 0:e3fb1267e3c3 130 #if !defined(SPI_MOSI)
cassyarduino 0:e3fb1267e3c3 131 #error "Not defined SPI_MOSI!"
cassyarduino 0:e3fb1267e3c3 132 #endif
cassyarduino 0:e3fb1267e3c3 133
cassyarduino 0:e3fb1267e3c3 134 #if !defined(SPI_MISO)
cassyarduino 33:7ba5d53df0f2 135 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 136 #define SPI_MISO MISO
cassyarduino 36:689bcc358067 137 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 138 #define SPI_MISO 12 //PC_3
cassyarduino 0:e3fb1267e3c3 139 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 140 #define SPI_MISO PIN_SPI_MISO
cassyarduino 33:7ba5d53df0f2 141 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 142 #define SPI_MISO MISO
cassyarduino 33:7ba5d53df0f2 143 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 144 #define SPI_MISO MISO
cassyarduino 19:e416943f7119 145 #elif defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 146 #if defined(BOARD_SPI1_MISO_PIN)
cassyarduino 19:e416943f7119 147 #define SPI_MISO BOARD_SPI1_MISO_PIN
cassyarduino 19:e416943f7119 148 #else
cassyarduino 19:e416943f7119 149 #define SPI_MISO SPI.misoPin()
cassyarduino 19:e416943f7119 150 #endif
cassyarduino 33:7ba5d53df0f2 151 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 152 #define SPI_MISO PIN_SPI_MISO
cassyarduino 0:e3fb1267e3c3 153 #endif
cassyarduino 0:e3fb1267e3c3 154 #endif
cassyarduino 0:e3fb1267e3c3 155 #if !defined(SPI_MISO)
cassyarduino 0:e3fb1267e3c3 156 #error "Not defined SPI_MISO!"
cassyarduino 0:e3fb1267e3c3 157 #endif
cassyarduino 0:e3fb1267e3c3 158 #if !defined(SPI_SCK)
cassyarduino 33:7ba5d53df0f2 159 #if defined(__AVR__) || defined(ESP8266) || defined(__RFduino__)
cassyarduino 0:e3fb1267e3c3 160 #define SPI_SCK SCK
cassyarduino 36:689bcc358067 161 #elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 162 #define SPI_SCK 13 //PC_1 A4
cassyarduino 0:e3fb1267e3c3 163 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 164 #define SPI_SCK PIN_SPI_SCK
cassyarduino 33:7ba5d53df0f2 165 #elif defined(__ARDUINO_ARC__) //Intel ARC32 Genuino 101
cassyarduino 33:7ba5d53df0f2 166 #define SPI_SCK SCK
cassyarduino 33:7ba5d53df0f2 167 #elif defined(__RFduino__) //RFduino
cassyarduino 33:7ba5d53df0f2 168 #define SPI_SCK SCK
cassyarduino 19:e416943f7119 169 #elif defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 170 #if defined(BOARD_SPI1_SCK_PIN)
cassyarduino 19:e416943f7119 171 #define SPI_SCK BOARD_SPI1_SCK_PIN
cassyarduino 19:e416943f7119 172 #else
cassyarduino 19:e416943f7119 173 #define SPI_SCK SPI.sckPin()
cassyarduino 19:e416943f7119 174 #endif
cassyarduino 33:7ba5d53df0f2 175 #elif defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
cassyarduino 33:7ba5d53df0f2 176 #define SPI_SCK PIN_SPI_SCK
cassyarduino 0:e3fb1267e3c3 177 #endif
cassyarduino 0:e3fb1267e3c3 178 #endif
cassyarduino 0:e3fb1267e3c3 179 #if !defined(SPI_SCK)
cassyarduino 0:e3fb1267e3c3 180 #error "Not defined SPI_SCK!"
cassyarduino 0:e3fb1267e3c3 181 #endif
cassyarduino 0:e3fb1267e3c3 182
cassyarduino 36:689bcc358067 183 #if defined(__MBED__) || defined(ARDUINO_ARCH_SAM) || defined(__ARDUINO_ARC__) || defined(__STM32F1__) || defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__) || defined(ESP8266) || defined(ARDUINO_ARCH_AMEBA) || defined(__MK20DX128__) || defined(__MKL26Z64__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__RFduino__)
cassyarduino 22:1ce14a6cd293 184 #if defined(ARDUINO) && defined(STM32F3)
cassyarduino 19:e416943f7119 185 #include "HardwareSPI.h"
cassyarduino 19:e416943f7119 186 #else
cassyarduino 19:e416943f7119 187 #include <SPI.h>
cassyarduino 19:e416943f7119 188 #endif
cassyarduino 0:e3fb1267e3c3 189 #define ENC28J60_USE_SPILIB 1
cassyarduino 0:e3fb1267e3c3 190 #endif
cassyarduino 0:e3fb1267e3c3 191
cassyarduino 0:e3fb1267e3c3 192 #define UIP_RECEIVEBUFFERHANDLE 0xff
cassyarduino 0:e3fb1267e3c3 193
cassyarduino 0:e3fb1267e3c3 194 /*
cassyarduino 0:e3fb1267e3c3 195 * Empfangen von ip-header, arp etc...
cassyarduino 0:e3fb1267e3c3 196 * wenn tcp/udp -> tcp/udp-callback -> assign new packet to connection
cassyarduino 0:e3fb1267e3c3 197 */
cassyarduino 0:e3fb1267e3c3 198
cassyarduino 33:7ba5d53df0f2 199 #define TX_COLLISION_RETRY_COUNT 10
cassyarduino 33:7ba5d53df0f2 200
cassyarduino 0:e3fb1267e3c3 201 class Enc28J60Network : public MemoryPool
cassyarduino 0:e3fb1267e3c3 202 {
cassyarduino 0:e3fb1267e3c3 203
cassyarduino 0:e3fb1267e3c3 204 private:
cassyarduino 0:e3fb1267e3c3 205 static uint16_t nextPacketPtr;
cassyarduino 0:e3fb1267e3c3 206 static uint8_t bank;
cassyarduino 0:e3fb1267e3c3 207 static uint8_t erevid;
cassyarduino 0:e3fb1267e3c3 208
cassyarduino 0:e3fb1267e3c3 209 static struct memblock receivePkt;
cassyarduino 0:e3fb1267e3c3 210
cassyarduino 0:e3fb1267e3c3 211 static bool broadcast_enabled; //!< True if broadcasts enabled (used to allow temporary disable of broadcast for DHCP or other internal functions)
cassyarduino 0:e3fb1267e3c3 212
cassyarduino 0:e3fb1267e3c3 213 static uint8_t readOp(uint8_t op, uint8_t address);
cassyarduino 0:e3fb1267e3c3 214 static void writeOp(uint8_t op, uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 215 static uint16_t setReadPtr(memhandle handle, memaddress position, uint16_t len);
cassyarduino 0:e3fb1267e3c3 216 static void setERXRDPT(void);
cassyarduino 0:e3fb1267e3c3 217 static void readBuffer(uint16_t len, uint8_t* data);
cassyarduino 0:e3fb1267e3c3 218 static void writeBuffer(uint16_t len, uint8_t* data);
cassyarduino 0:e3fb1267e3c3 219 static uint8_t readByte(uint16_t addr);
cassyarduino 0:e3fb1267e3c3 220 static void writeByte(uint16_t addr, uint8_t data);
cassyarduino 0:e3fb1267e3c3 221 static void setBank(uint8_t address);
cassyarduino 0:e3fb1267e3c3 222 static uint8_t readReg(uint8_t address);
cassyarduino 0:e3fb1267e3c3 223 static void writeReg(uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 224 static void writeRegPair(uint8_t address, uint16_t data);
cassyarduino 0:e3fb1267e3c3 225 static void phyWrite(uint8_t address, uint16_t data);
cassyarduino 0:e3fb1267e3c3 226 static uint16_t phyRead(uint8_t address);
cassyarduino 0:e3fb1267e3c3 227 static void clkout(uint8_t clk);
cassyarduino 0:e3fb1267e3c3 228
cassyarduino 0:e3fb1267e3c3 229 static void enableBroadcast (bool temporary);
cassyarduino 0:e3fb1267e3c3 230 static void disableBroadcast (bool temporary);
cassyarduino 0:e3fb1267e3c3 231 static void enableMulticast (void);
cassyarduino 0:e3fb1267e3c3 232 static void disableMulticast (void);
cassyarduino 0:e3fb1267e3c3 233
cassyarduino 0:e3fb1267e3c3 234 static uint8_t readRegByte (uint8_t address);
cassyarduino 0:e3fb1267e3c3 235 static void writeRegByte (uint8_t address, uint8_t data);
cassyarduino 0:e3fb1267e3c3 236
cassyarduino 0:e3fb1267e3c3 237 friend void enc28J60_mempool_block_move_callback(memaddress,memaddress,memaddress);
cassyarduino 0:e3fb1267e3c3 238
cassyarduino 0:e3fb1267e3c3 239 public:
cassyarduino 0:e3fb1267e3c3 240
cassyarduino 0:e3fb1267e3c3 241 void powerOn(void);
cassyarduino 0:e3fb1267e3c3 242 void powerOff(void);
cassyarduino 0:e3fb1267e3c3 243 static uint8_t geterevid(void);
cassyarduino 0:e3fb1267e3c3 244 uint16_t PhyStatus(void);
cassyarduino 0:e3fb1267e3c3 245 static bool linkStatus(void);
cassyarduino 0:e3fb1267e3c3 246
cassyarduino 0:e3fb1267e3c3 247 static void init(uint8_t* macaddr);
cassyarduino 0:e3fb1267e3c3 248 static memhandle receivePacket(void);
cassyarduino 0:e3fb1267e3c3 249 static void freePacket(void);
cassyarduino 0:e3fb1267e3c3 250 static memaddress blockSize(memhandle handle);
cassyarduino 0:e3fb1267e3c3 251 static void sendPacket(memhandle handle);
cassyarduino 0:e3fb1267e3c3 252 static uint16_t readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len);
cassyarduino 0:e3fb1267e3c3 253 static uint16_t writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len);
cassyarduino 0:e3fb1267e3c3 254 static void copyPacket(memhandle dest, memaddress dest_pos, memhandle src, memaddress src_pos, uint16_t len);
cassyarduino 0:e3fb1267e3c3 255 static uint16_t chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len);
cassyarduino 0:e3fb1267e3c3 256 };
cassyarduino 0:e3fb1267e3c3 257
cassyarduino 0:e3fb1267e3c3 258 extern Enc28J60Network Enc28J60;
cassyarduino 0:e3fb1267e3c3 259 #endif /* Enc28J60NetworkClass_H_ */