Alberto Petrucci / LSM303DLHC

LSM303DLHC library with magneometer calibration support

Dependents:   IMU-9DOF-KALMAN

Fork of LSM303DLHC by brian claus

LSM303DLHC.cpp@5:ee458711d467, 2016-02-03 (annotated)

Committer:
bclaus
Date:
Wed Feb 03 20:08:41 2016 +0000
Revision:
5:ee458711d467
Parent:
3:4d9465e7e10e 
initial

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bclaus 3:4d9465e7e10e 1 /** LSM303DLHC Interface Library
bclaus 3:4d9465e7e10e 2 *
bclaus 3:4d9465e7e10e 3 * base on code by Michael Shimniok http://bot-thoughts.com
bclaus 3:4d9465e7e10e 4 *
bclaus 3:4d9465e7e10e 5 * and on test program by @tosihisa and
bclaus 3:4d9465e7e10e 6 *
bclaus 3:4d9465e7e10e 7 * and on Pololu sample library for LSM303DLHC breakout by ryantm:
bclaus 3:4d9465e7e10e 8 *
bclaus 3:4d9465e7e10e 9 * Copyright (c) 2011 Pololu Corporation. For more information, see
bclaus 3:4d9465e7e10e 10 *
bclaus 3:4d9465e7e10e 11 * http://www.pololu.com/
bclaus 3:4d9465e7e10e 12 * http://forum.pololu.com/
bclaus 3:4d9465e7e10e 13 *
bclaus 3:4d9465e7e10e 14 * Permission is hereby granted, free of charge, to any person
bclaus 3:4d9465e7e10e 15 * obtaining a copy of this software and associated documentation
bclaus 3:4d9465e7e10e 16 * files (the "Software"), to deal in the Software without
bclaus 3:4d9465e7e10e 17 * restriction, including without limitation the rights to use,
bclaus 3:4d9465e7e10e 18 * copy, modify, merge, publish, distribute, sublicense, and/or sell
bclaus 3:4d9465e7e10e 19 * copies of the Software, and to permit persons to whom the
bclaus 3:4d9465e7e10e 20 * Software is furnished to do so, subject to the following
bclaus 3:4d9465e7e10e 21 * conditions:
bclaus 3:4d9465e7e10e 22 *
bclaus 3:4d9465e7e10e 23 * The above copyright notice and this permission notice shall be
bclaus 3:4d9465e7e10e 24 * included in all copies or substantial portions of the Software.
bclaus 3:4d9465e7e10e 25 *
bclaus 3:4d9465e7e10e 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
bclaus 3:4d9465e7e10e 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
bclaus 3:4d9465e7e10e 28 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
bclaus 3:4d9465e7e10e 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
bclaus 3:4d9465e7e10e 30 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
bclaus 3:4d9465e7e10e 31 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
bclaus 3:4d9465e7e10e 32 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bclaus 3:4d9465e7e10e 33 * OTHER DEALINGS IN THE SOFTWARE.
bclaus 3:4d9465e7e10e 34 */
bclaus 3:4d9465e7e10e 35 #include "mbed.h"
bclaus 3:4d9465e7e10e 36 #include "LSM303DLHC.h"
bclaus 3:4d9465e7e10e 37
bclaus 3:4d9465e7e10e 38
bclaus 3:4d9465e7e10e 39 const int addr_acc = 0x32;
bclaus 3:4d9465e7e10e 40 const int addr_mag = 0x3c;
bclaus 3:4d9465e7e10e 41
bclaus 3:4d9465e7e10e 42 enum REG_ADDRS {
bclaus 3:4d9465e7e10e 43 /* --- Mag --- */
bclaus 3:4d9465e7e10e 44 CRA_REG_M = 0x00,
bclaus 3:4d9465e7e10e 45 CRB_REG_M = 0x01,
bclaus 3:4d9465e7e10e 46 MR_REG_M = 0x02,
bclaus 3:4d9465e7e10e 47 OUT_X_M = 0x03,
bclaus 3:4d9465e7e10e 48 OUT_Y_M = 0x05,
bclaus 3:4d9465e7e10e 49 OUT_Z_M = 0x07,
bclaus 3:4d9465e7e10e 50 /* --- Acc --- */
bclaus 3:4d9465e7e10e 51 CTRL_REG1_A = 0x20,
bclaus 3:4d9465e7e10e 52 CTRL_REG4_A = 0x23,
bclaus 3:4d9465e7e10e 53 OUT_X_A = 0x28,
bclaus 3:4d9465e7e10e 54 OUT_Y_A = 0x2A,
bclaus 3:4d9465e7e10e 55 OUT_Z_A = 0x2C,
bclaus 3:4d9465e7e10e 56 };
bclaus 3:4d9465e7e10e 57
bclaus 3:4d9465e7e10e 58 bool LSM303DLHC::write_reg(int addr_i2c,int addr_reg, char v)
bclaus 3:4d9465e7e10e 59 {
bclaus 3:4d9465e7e10e 60 char data[2] = {addr_reg, v};
bclaus 3:4d9465e7e10e 61 return LSM303DLHC::_LSM303.write(addr_i2c, data, 2) == 0;
bclaus 3:4d9465e7e10e 62 }
bclaus 3:4d9465e7e10e 63
bclaus 3:4d9465e7e10e 64 bool LSM303DLHC::read_reg(int addr_i2c,int addr_reg, char *v)
bclaus 3:4d9465e7e10e 65 {
bclaus 3:4d9465e7e10e 66 char data = addr_reg;
bclaus 3:4d9465e7e10e 67 bool result = false;
bclaus 3:4d9465e7e10e 68
bclaus 3:4d9465e7e10e 69 __disable_irq();
bclaus 3:4d9465e7e10e 70 if ((_LSM303.write(addr_i2c, &data, 1) == 0) && (_LSM303.read(addr_i2c, &data, 1) == 0)){
bclaus 3:4d9465e7e10e 71 *v = data;
bclaus 3:4d9465e7e10e 72 result = true;
bclaus 3:4d9465e7e10e 73 }
bclaus 3:4d9465e7e10e 74 __enable_irq();
bclaus 3:4d9465e7e10e 75 return result;
bclaus 3:4d9465e7e10e 76 }
bclaus 3:4d9465e7e10e 77
bclaus 3:4d9465e7e10e 78
bclaus 3:4d9465e7e10e 79 LSM303DLHC::LSM303DLHC(PinName sda, PinName scl):
bclaus 3:4d9465e7e10e 80 _LSM303(sda, scl)
bclaus 3:4d9465e7e10e 81 {
bclaus 3:4d9465e7e10e 82 char reg_v;
bclaus 5:ee458711d467 83 _LSM303.frequency(200000);
bclaus 3:4d9465e7e10e 84
bclaus 3:4d9465e7e10e 85 reg_v = 0;
bclaus 3:4d9465e7e10e 86
bclaus 5:ee458711d467 87 reg_v |= 0x37; /* X/Y/Z axis enable. */
bclaus 3:4d9465e7e10e 88 write_reg(addr_acc,CTRL_REG1_A,reg_v);
bclaus 3:4d9465e7e10e 89
bclaus 3:4d9465e7e10e 90 reg_v = 0;
bclaus 3:4d9465e7e10e 91 // reg_v |= 0x01 << 6; /* 1: data MSB @ lower address */
bclaus 3:4d9465e7e10e 92 reg_v = 0x01 << 4; /* +/- 4g */
bclaus 3:4d9465e7e10e 93 write_reg(addr_acc,CTRL_REG4_A,reg_v);
bclaus 3:4d9465e7e10e 94
bclaus 3:4d9465e7e10e 95 /* -- mag --- */
bclaus 3:4d9465e7e10e 96 reg_v = 0;
bclaus 5:ee458711d467 97 reg_v |= 0x06 << 2; /* Minimum data output rate = 15Hz */
bclaus 3:4d9465e7e10e 98 write_reg(addr_mag,CRA_REG_M,reg_v);
bclaus 3:4d9465e7e10e 99
bclaus 3:4d9465e7e10e 100 reg_v = 0;
bclaus 3:4d9465e7e10e 101 reg_v |= 0x01 << 5; /* +-1.3Gauss */
bclaus 3:4d9465e7e10e 102 //reg_v |= 0x07 << 5; /* +-8.1Gauss */
bclaus 3:4d9465e7e10e 103 write_reg(addr_mag,CRB_REG_M,reg_v);
bclaus 3:4d9465e7e10e 104
bclaus 3:4d9465e7e10e 105 reg_v = 0; /* Continuous-conversion mode */
bclaus 3:4d9465e7e10e 106 write_reg(addr_mag,MR_REG_M,reg_v);
bclaus 3:4d9465e7e10e 107 }
bclaus 3:4d9465e7e10e 108
bclaus 3:4d9465e7e10e 109
bclaus 3:4d9465e7e10e 110 bool LSM303DLHC::read(float *ax, float *ay, float *az, float *mx, float *my, float *mz) {
bclaus 3:4d9465e7e10e 111 char acc[6], mag[6];
bclaus 3:4d9465e7e10e 112
bclaus 3:4d9465e7e10e 113 if (recv(addr_acc, OUT_X_A, acc, 6) && recv(addr_mag, OUT_X_M, mag, 6)) {
bclaus 3:4d9465e7e10e 114 *ax = float(short(acc[1] << 8 | acc[0]))/8192; //32768/4=8192
bclaus 3:4d9465e7e10e 115 *ay = float(short(acc[3] << 8 | acc[2]))/8192;
bclaus 3:4d9465e7e10e 116 *az = float(short(acc[5] << 8 | acc[4]))/8192;
bclaus 3:4d9465e7e10e 117 //full scale magnetic readings are from -2048 to 2047
bclaus 3:4d9465e7e10e 118 //gain is x,y =1100; z = 980 LSB/gauss
bclaus 3:4d9465e7e10e 119 *mx = float(short(mag[0] << 8 | mag[1]))/1100;
bclaus 3:4d9465e7e10e 120 *mz = float(short(mag[2] << 8 | mag[3]))/980;
bclaus 3:4d9465e7e10e 121 *my = float(short(mag[4] << 8 | mag[5]))/1100;
bclaus 3:4d9465e7e10e 122
bclaus 3:4d9465e7e10e 123 return true;
bclaus 3:4d9465e7e10e 124 }
bclaus 3:4d9465e7e10e 125
bclaus 3:4d9465e7e10e 126 return false;
bclaus 3:4d9465e7e10e 127 }
bclaus 3:4d9465e7e10e 128
bclaus 3:4d9465e7e10e 129
bclaus 3:4d9465e7e10e 130 bool LSM303DLHC::recv(char sad, char sub, char *buf, int length) {
bclaus 3:4d9465e7e10e 131 if (length > 1) sub |= 0x80;
bclaus 3:4d9465e7e10e 132
bclaus 3:4d9465e7e10e 133 return _LSM303.write(sad, &sub, 1, true) == 0 && _LSM303.read(sad, buf, length) == 0;
bclaus 3:4d9465e7e10e 134 }