DRV.h

00001 #include "mbed.h"
00002 
00003 #ifndef DRV_H
00004 #define DRV_H
00005 
00006 /// Registers ///
00007 #define FSR1            0x0     /// Fault Status Register 1
00008 #define FSR2            0x1     /// Fault Status Register 2
00009 #define DCR             0x2     /// Drive Control Register
00010 #define HSR             0x3     /// Gate Drive HS Register 
00011 #define LSR             0x4     /// Gate Drive LS Register  
00012 #define OCPCR           0x5     /// OCP Control Register    
00013 #define CSACR           0x6     /// CSA Control Register    
00014 
00015 /// Drive Control Fields ///
00016 #define DIS_CPUV_EN         0x0     /// Charge pump UVLO fault
00017 #define DIS_CPUV_DIS        0x1
00018 #define DIS_GDF_EN          0x0     /// Gate drive fauilt
00019 #define DIS_GDF_DIS         0x1
00020 #define OTW_REP_EN          0x1     /// Over temp warning reported on nFAULT/FAULT bit
00021 #define OTW_REP_DIS         0x0
00022 #define PWM_MODE_6X         0x0     /// PWM Input Modes
00023 #define PWM_MODE_3X         0x1
00024 #define PWM_MODE_1X         0x2
00025 #define PWM_MODE_IND        0x3
00026 #define PWM_1X_COM_SYNC     0x0     /// 1x PWM Mode synchronou rectification
00027 #define PWM_1X_COM_ASYNC    0x1
00028 #define PWM_1X_DIR_0        0x0     /// In 1x PWM mode this bit is ORed with the INHC (DIR) input
00029 #define PWM_1X_DIR_1        0x1
00030 
00031 /// Gate Drive HS Fields ///
00032 #define LOCK_ON             0x6
00033 #define LOCK_OFF            0x3
00034 #define IDRIVEP_HS_10MA     0x0     /// Gate drive high side turn on current
00035 #define IDRIVEP_HS_30MA     0x1
00036 #define IDRIVEP_HS_60MA     0x2
00037 #define IDRIVEP_HS_80MA     0x3
00038 #define IDRIVEP_HS_120MA    0x4
00039 #define IDRIVEP_HS_140MA    0x5
00040 #define IDRIVEP_HS_170MA    0x6
00041 #define IDRIVEP_HS_190MA    0x7
00042 #define IDRIVEP_HS_260MA    0x8
00043 #define IDRIVEP_HS_330MA    0x9
00044 #define IDRIVEP_HS_370MA    0xA
00045 #define IDRIVEP_HS_440MA    0xB
00046 #define IDRIVEP_HS_570MA    0xC
00047 #define IDRIVEP_HS_680MA    0xD
00048 #define IDRIVEP_HS_820MA    0xE
00049 #define IDRIVEP_HS_1000MA   0xF
00050 #define IDRIVEN_HS_20MA     0x0     /// High side turn off current
00051 #define IDRIVEN_HS_60MA     0x1     
00052 #define IDRIVEN_HS_120MA    0x2
00053 #define IDRIVEN_HS_160MA    0x3
00054 #define IDRIVEN_HS_240MA    0x4
00055 #define IDRIVEN_HS_280MA    0x5
00056 #define IDRIVEN_HS_340MA    0x6
00057 #define IDRIVEN_HS_380MA    0x7
00058 #define IDRIVEN_HS_520MA    0x8
00059 #define IDRIVEN_HS_660MA    0x9
00060 #define IDRIVEN_HS_740MA    0xA
00061 #define IDRIVEN_HS_880MA    0xB
00062 #define IDRIVEN_HS_1140MA   0xC
00063 #define IDRIVEN_HS_1360MA   0xD
00064 #define IDRIVEN_HS_1640MA   0xE
00065 #define IDRIVEN_HS_2000MA   0xF
00066 
00067 /// Gate Drive LS Fields ///
00068 #define TDRIVE_500NS        0x0     /// Peak gate-current drive time
00069 #define TDRIVE_1000NS       0x1
00070 #define TDRIVE_2000NS       0x2
00071 #define TDRIVE_4000NS       0x3
00072 #define IDRIVEP_LS_10MA     0x0     /// Gate drive high side turn on current
00073 #define IDRIVEP_LS_30MA     0x1
00074 #define IDRIVEP_LS_60MA     0x2
00075 #define IDRIVEP_LS_80MA     0x3
00076 #define IDRIVEP_LS_120MA    0x4
00077 #define IDRIVEP_LS_140MA    0x5
00078 #define IDRIVEP_LS_170MA    0x6
00079 #define IDRIVEP_LS_190MA    0x7
00080 #define IDRIVEP_LS_260MA    0x8
00081 #define IDRIVEP_LS_330MA    0x9
00082 #define IDRIVEP_LS_370MA    0xA
00083 #define IDRIVEP_LS_440MA    0xB
00084 #define IDRIVEP_LS_570MA    0xC
00085 #define IDRIVEP_LS_680MA    0xD
00086 #define IDRIVEP_LS_820MA    0xE
00087 #define IDRIVEP_LS_1000MA   0xF
00088 #define IDRIVEN_LS_20MA     0x0     /// High side turn off current
00089 #define IDRIVEN_LS_60MA     0x1     
00090 #define IDRIVEN_LS_120MA    0x2
00091 #define IDRIVEN_LS_160MA    0x3
00092 #define IDRIVEN_LS_240MA    0x4
00093 #define IDRIVEN_LS_280MA    0x5
00094 #define IDRIVEN_LS_340MA    0x6
00095 #define IDRIVEN_LS_380MA    0x7
00096 #define IDRIVEN_LS_520MA    0x8
00097 #define IDRIVEN_LS_660MA    0x9
00098 #define IDRIVEN_LS_740MA    0xA
00099 #define IDRIVEN_LS_880MA    0xB
00100 #define IDRIVEN_LS_1140MA   0xC
00101 #define IDRIVEN_LS_1360MA   0xD
00102 #define IDRIVEN_LS_1640MA   0xE
00103 #define IDRIVEN_LS_2000MA   0xF
00104 
00105 /// OCP Control Fields ///
00106 #define TRETRY_4MS          0x0     /// VDS OCP and SEN OCP retry time
00107 #define TRETRY_50US         0x1
00108 #define DEADTIME_50NS       0x0     /// Deadtime
00109 #define DEADTIME_100NS      0x1
00110 #define DEADTIME_200NS      0x2
00111 #define DEADTIME_400NS      0x3
00112 #define OCP_LATCH           0x0     /// OCP Mode
00113 #define OCP_RETRY           0x1
00114 #define OCP_REPORT          0x2
00115 #define OCP_NONE            0x3
00116 #define OCP_DEG_2US         0x0     /// OCP Deglitch Time
00117 #define OCP_DEG_4US         0x1
00118 #define OCP_DEG_6US         0x2
00119 #define OCP_DEG_8US         0x3
00120 #define VDS_LVL_0_06        0x0
00121 #define VDS_LVL_0_13        0x1
00122 #define VDS_LVL_0_2         0x2
00123 #define VDS_LVL_0_26        0x3
00124 #define VDS_LVL_0_31        0x4
00125 #define VDS_LVL_0_45        0x5
00126 #define VDS_LVL_0_53        0x6
00127 #define VDS_LVL_0_6         0x7
00128 #define VDS_LVL_0_68        0x8
00129 #define VDS_LVL_0_75        0x9
00130 #define VDS_LVL_0_94        0xA
00131 #define VDS_LVL_1_13        0xB
00132 #define VDS_LVL_1_3         0xC
00133 #define VDS_LVL_1_5         0xD
00134 #define VDS_LVL_1_7         0xE
00135 #define VDS_LVL_1_88        0xF
00136 
00137 /// CSA Control Fields ///
00138 #define CSA_FET_SP          0x0     /// Current sense amplifier positive input
00139 #define CSA_FET_SH          0x1
00140 #define VREF_DIV_1          0x0     /// Amplifier reference voltage is VREV/1
00141 #define VREF_DIV_2          0x1     /// Amplifier reference voltage is VREV/2
00142 #define CSA_GAIN_5          0x0     /// Current sensor gain
00143 #define CSA_GAIN_10         0x1
00144 #define CSA_GAIN_20         0x2
00145 #define CSA_GAIN_40         0x3
00146 #define DIS_SEN_EN          0x0     /// Overcurrent Fault
00147 #define DIS_SEN_DIS         0x1
00148 #define SEN_LVL_0_25        0x0     /// Sense OCP voltage level
00149 #define SEN_LVL_0_5         0x1
00150 #define SEN_LVL_0_75        0x2
00151 #define SEN_LVL_1_0         0x3
00152 
00153 class DRV832x {
00154     public:
00155         DRV832x(SPI *spi, DigitalOut *cs);
00156         int read_FSR1();
00157         int read_FSR2();
00158         int read_register(int reg);
00159         void write_register(int reg, int val);
00160         void write_DCR(int DIS_CPUV, int DIS_GDF, int OTW_REP, int PWM_MODE, int PWM_COM, int PWM_DIR, int COAST, int BRAKE, int CLR_FLT);
00161         void write_HSR(int LOCK, int IDRIVEP_HS, int IDRIVEN_HS);
00162         void write_LSR(int CBC, int TDRIVE, int IDRIVEP_LS, int IDRIVEN_LS);
00163         void write_OCPCR(int TRETRY, int DEAD_TIME, int OCP_MODE, int OCP_DEG, int VDS_LVL);
00164         void write_CSACR(int CSA_FET, int VREF_DIV, int LS_REF, int CSA_GAIN, int DIS_SEN, int CSA_CAL_A, int CSA_CAL_B, int CSA_CAL_C, int SEN_LVL);
00165         void enable_gd(void);
00166         void disable_gd(void);
00167         void calibrate(void);
00168         void print_faults();
00169         
00170     private:
00171         SPI *_spi;
00172         DigitalOut *_cs;
00173         uint16_t spi_write(uint16_t val);
00174 };
00175 
00176 #endif