keniti akiba / Mbed 2 deprecated i2c_HT16K33_test1_767_3

stm32f767 oled hal

Dependencies:   mbed SSD1308_128x64_I2C

stm32f7xx_hal_conf.h@0:18b766aea0ef, 2022-08-04 (annotated)

Committer:
caa45040
Date:
Thu Aug 04 14:35:54 2022 +0000
Revision:
0:18b766aea0ef
stm32f767 oled hal

Who changed what in which revision?

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caa45040 0:18b766aea0ef 1 /**
caa45040 0:18b766aea0ef 2 ******************************************************************************
caa45040 0:18b766aea0ef 3 * @file stm32f7xx_hal_conf_template.h
caa45040 0:18b766aea0ef 4 * @author MCD Application Team
caa45040 0:18b766aea0ef 5 * @brief HAL configuration template file.
caa45040 0:18b766aea0ef 6 * This file should be copied to the application folder and renamed
caa45040 0:18b766aea0ef 7 * to stm32f7xx_hal_conf.h.
caa45040 0:18b766aea0ef 8 ******************************************************************************
caa45040 0:18b766aea0ef 9 * @attention
caa45040 0:18b766aea0ef 10 *
caa45040 0:18b766aea0ef 11 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
caa45040 0:18b766aea0ef 12 * All rights reserved.</center></h2>
caa45040 0:18b766aea0ef 13 *
caa45040 0:18b766aea0ef 14 * This software component is licensed by ST under BSD 3-Clause license,
caa45040 0:18b766aea0ef 15 * the "License"; You may not use this file except in compliance with the
caa45040 0:18b766aea0ef 16 * License. You may obtain a copy of the License at:
caa45040 0:18b766aea0ef 17 * opensource.org/licenses/BSD-3-Clause
caa45040 0:18b766aea0ef 18 *
caa45040 0:18b766aea0ef 19 ******************************************************************************
caa45040 0:18b766aea0ef 20 */
caa45040 0:18b766aea0ef 21
caa45040 0:18b766aea0ef 22 /* Define to prevent recursive inclusion -------------------------------------*/
caa45040 0:18b766aea0ef 23 #ifndef __STM32F7xx_HAL_CONF_H
caa45040 0:18b766aea0ef 24 #define __STM32F7xx_HAL_CONF_H
caa45040 0:18b766aea0ef 25
caa45040 0:18b766aea0ef 26 #ifdef __cplusplus
caa45040 0:18b766aea0ef 27 extern "C" {
caa45040 0:18b766aea0ef 28 #endif
caa45040 0:18b766aea0ef 29
caa45040 0:18b766aea0ef 30 /* Exported types ------------------------------------------------------------*/
caa45040 0:18b766aea0ef 31 /* Exported constants --------------------------------------------------------*/
caa45040 0:18b766aea0ef 32
caa45040 0:18b766aea0ef 33 /* ########################## Module Selection ############################## */
caa45040 0:18b766aea0ef 34 /**
caa45040 0:18b766aea0ef 35 * @brief This is the list of modules to be used in the HAL driver
caa45040 0:18b766aea0ef 36 */
caa45040 0:18b766aea0ef 37 #define HAL_MODULE_ENABLED
caa45040 0:18b766aea0ef 38
caa45040 0:18b766aea0ef 39 /* #define HAL_ADC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 40 /* #define HAL_CRYP_MODULE_ENABLED */
caa45040 0:18b766aea0ef 41 /* #define HAL_CAN_MODULE_ENABLED */
caa45040 0:18b766aea0ef 42 /* #define HAL_CEC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 43 /* #define HAL_CRC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 44 /* #define HAL_CRYP_MODULE_ENABLED */
caa45040 0:18b766aea0ef 45 /* #define HAL_DAC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 46 /* #define HAL_DCMI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 47 /* #define HAL_DMA2D_MODULE_ENABLED */
caa45040 0:18b766aea0ef 48 /* #define HAL_ETH_MODULE_ENABLED */
caa45040 0:18b766aea0ef 49 /* #define HAL_NAND_MODULE_ENABLED */
caa45040 0:18b766aea0ef 50 /* #define HAL_NOR_MODULE_ENABLED */
caa45040 0:18b766aea0ef 51 /* #define HAL_SRAM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 52 /* #define HAL_SDRAM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 53 /* #define HAL_HASH_MODULE_ENABLED */
caa45040 0:18b766aea0ef 54 /* #define HAL_I2S_MODULE_ENABLED */
caa45040 0:18b766aea0ef 55 /* #define HAL_IWDG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 56 /* #define HAL_LPTIM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 57 /* #define HAL_LTDC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 58 /* #define HAL_QSPI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 59 /* #define HAL_RNG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 60 /* #define HAL_RTC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 61 /* #define HAL_SAI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 62 /* #define HAL_SD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 63 /* #define HAL_MMC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 64 /* #define HAL_SPDIFRX_MODULE_ENABLED */
caa45040 0:18b766aea0ef 65 /* #define HAL_SPI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 66 /* #define HAL_TIM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 67 /* #define HAL_UART_MODULE_ENABLED */
caa45040 0:18b766aea0ef 68 /* #define HAL_USART_MODULE_ENABLED */
caa45040 0:18b766aea0ef 69 /* #define HAL_IRDA_MODULE_ENABLED */
caa45040 0:18b766aea0ef 70 /* #define HAL_SMARTCARD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 71 /* #define HAL_WWDG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 72 /* #define HAL_PCD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 73 /* #define HAL_HCD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 74 /* #define HAL_DFSDM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 75 /* #define HAL_DSI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 76 /* #define HAL_JPEG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 77 /* #define HAL_MDIOS_MODULE_ENABLED */
caa45040 0:18b766aea0ef 78 /* #define HAL_SMBUS_MODULE_ENABLED */
caa45040 0:18b766aea0ef 79 /* #define HAL_EXTI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 80 #define HAL_GPIO_MODULE_ENABLED
caa45040 0:18b766aea0ef 81 #define HAL_EXTI_MODULE_ENABLED
caa45040 0:18b766aea0ef 82 #define HAL_DMA_MODULE_ENABLED
caa45040 0:18b766aea0ef 83 #define HAL_RCC_MODULE_ENABLED
caa45040 0:18b766aea0ef 84 #define HAL_FLASH_MODULE_ENABLED
caa45040 0:18b766aea0ef 85 #define HAL_PWR_MODULE_ENABLED
caa45040 0:18b766aea0ef 86 #define HAL_I2C_MODULE_ENABLED
caa45040 0:18b766aea0ef 87 #define HAL_CORTEX_MODULE_ENABLED
caa45040 0:18b766aea0ef 88
caa45040 0:18b766aea0ef 89 /* ########################## HSE/HSI Values adaptation ##################### */
caa45040 0:18b766aea0ef 90 /**
caa45040 0:18b766aea0ef 91 * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
caa45040 0:18b766aea0ef 92 * This value is used by the RCC HAL module to compute the system frequency
caa45040 0:18b766aea0ef 93 * (when HSE is used as system clock source, directly or through the PLL).
caa45040 0:18b766aea0ef 94 */
caa45040 0:18b766aea0ef 95 #if !defined (HSE_VALUE)
caa45040 0:18b766aea0ef 96 #define HSE_VALUE ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
caa45040 0:18b766aea0ef 97 #endif /* HSE_VALUE */
caa45040 0:18b766aea0ef 98
caa45040 0:18b766aea0ef 99 #if !defined (HSE_STARTUP_TIMEOUT)
caa45040 0:18b766aea0ef 100 #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
caa45040 0:18b766aea0ef 101 #endif /* HSE_STARTUP_TIMEOUT */
caa45040 0:18b766aea0ef 102
caa45040 0:18b766aea0ef 103 /**
caa45040 0:18b766aea0ef 104 * @brief Internal High Speed oscillator (HSI) value.
caa45040 0:18b766aea0ef 105 * This value is used by the RCC HAL module to compute the system frequency
caa45040 0:18b766aea0ef 106 * (when HSI is used as system clock source, directly or through the PLL).
caa45040 0:18b766aea0ef 107 */
caa45040 0:18b766aea0ef 108 #if !defined (HSI_VALUE)
caa45040 0:18b766aea0ef 109 #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
caa45040 0:18b766aea0ef 110 #endif /* HSI_VALUE */
caa45040 0:18b766aea0ef 111
caa45040 0:18b766aea0ef 112 /**
caa45040 0:18b766aea0ef 113 * @brief Internal Low Speed oscillator (LSI) value.
caa45040 0:18b766aea0ef 114 */
caa45040 0:18b766aea0ef 115 #if !defined (LSI_VALUE)
caa45040 0:18b766aea0ef 116 #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
caa45040 0:18b766aea0ef 117 #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
caa45040 0:18b766aea0ef 118 The real value may vary depending on the variations
caa45040 0:18b766aea0ef 119 in voltage and temperature. */
caa45040 0:18b766aea0ef 120 /**
caa45040 0:18b766aea0ef 121 * @brief External Low Speed oscillator (LSE) value.
caa45040 0:18b766aea0ef 122 */
caa45040 0:18b766aea0ef 123 #if !defined (LSE_VALUE)
caa45040 0:18b766aea0ef 124 #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
caa45040 0:18b766aea0ef 125 #endif /* LSE_VALUE */
caa45040 0:18b766aea0ef 126
caa45040 0:18b766aea0ef 127 #if !defined (LSE_STARTUP_TIMEOUT)
caa45040 0:18b766aea0ef 128 #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
caa45040 0:18b766aea0ef 129 #endif /* LSE_STARTUP_TIMEOUT */
caa45040 0:18b766aea0ef 130
caa45040 0:18b766aea0ef 131 /**
caa45040 0:18b766aea0ef 132 * @brief External clock source for I2S peripheral
caa45040 0:18b766aea0ef 133 * This value is used by the I2S HAL module to compute the I2S clock source
caa45040 0:18b766aea0ef 134 * frequency, this source is inserted directly through I2S_CKIN pad.
caa45040 0:18b766aea0ef 135 */
caa45040 0:18b766aea0ef 136 #if !defined (EXTERNAL_CLOCK_VALUE)
caa45040 0:18b766aea0ef 137 #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
caa45040 0:18b766aea0ef 138 #endif /* EXTERNAL_CLOCK_VALUE */
caa45040 0:18b766aea0ef 139
caa45040 0:18b766aea0ef 140 /* Tip: To avoid modifying this file each time you need to use different HSE,
caa45040 0:18b766aea0ef 141 === you can define the HSE value in your toolchain compiler preprocessor. */
caa45040 0:18b766aea0ef 142
caa45040 0:18b766aea0ef 143 /* ########################### System Configuration ######################### */
caa45040 0:18b766aea0ef 144 /**
caa45040 0:18b766aea0ef 145 * @brief This is the HAL system configuration section
caa45040 0:18b766aea0ef 146 */
caa45040 0:18b766aea0ef 147 #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
caa45040 0:18b766aea0ef 148 #define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
caa45040 0:18b766aea0ef 149 #define USE_RTOS 0U
caa45040 0:18b766aea0ef 150 #define PREFETCH_ENABLE 0U
caa45040 0:18b766aea0ef 151 #define ART_ACCLERATOR_ENABLE 0U /* To enable instruction cache and prefetch */
caa45040 0:18b766aea0ef 152
caa45040 0:18b766aea0ef 153 #define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
caa45040 0:18b766aea0ef 154 #define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
caa45040 0:18b766aea0ef 155 #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
caa45040 0:18b766aea0ef 156 #define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
caa45040 0:18b766aea0ef 157 #define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
caa45040 0:18b766aea0ef 158 #define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
caa45040 0:18b766aea0ef 159 #define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
caa45040 0:18b766aea0ef 160 #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
caa45040 0:18b766aea0ef 161 #define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
caa45040 0:18b766aea0ef 162 #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
caa45040 0:18b766aea0ef 163 #define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
caa45040 0:18b766aea0ef 164 #define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
caa45040 0:18b766aea0ef 165 #define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
caa45040 0:18b766aea0ef 166 #define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
caa45040 0:18b766aea0ef 167 #define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
caa45040 0:18b766aea0ef 168 #define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
caa45040 0:18b766aea0ef 169 #define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
caa45040 0:18b766aea0ef 170 #define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
caa45040 0:18b766aea0ef 171 #define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */
caa45040 0:18b766aea0ef 172 #define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
caa45040 0:18b766aea0ef 173 #define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
caa45040 0:18b766aea0ef 174 #define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
caa45040 0:18b766aea0ef 175 #define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
caa45040 0:18b766aea0ef 176 #define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
caa45040 0:18b766aea0ef 177 #define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
caa45040 0:18b766aea0ef 178 #define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
caa45040 0:18b766aea0ef 179 #define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
caa45040 0:18b766aea0ef 180 #define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
caa45040 0:18b766aea0ef 181 #define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
caa45040 0:18b766aea0ef 182 #define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
caa45040 0:18b766aea0ef 183 #define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
caa45040 0:18b766aea0ef 184 #define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
caa45040 0:18b766aea0ef 185 #define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
caa45040 0:18b766aea0ef 186 #define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
caa45040 0:18b766aea0ef 187 #define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
caa45040 0:18b766aea0ef 188 #define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
caa45040 0:18b766aea0ef 189 #define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
caa45040 0:18b766aea0ef 190 #define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
caa45040 0:18b766aea0ef 191
caa45040 0:18b766aea0ef 192 /* ########################## Assert Selection ############################## */
caa45040 0:18b766aea0ef 193 /**
caa45040 0:18b766aea0ef 194 * @brief Uncomment the line below to expanse the "assert_param" macro in the
caa45040 0:18b766aea0ef 195 * HAL drivers code
caa45040 0:18b766aea0ef 196 */
caa45040 0:18b766aea0ef 197 /* #define USE_FULL_ASSERT 1U */
caa45040 0:18b766aea0ef 198
caa45040 0:18b766aea0ef 199 /* ################## Ethernet peripheral configuration ##################### */
caa45040 0:18b766aea0ef 200
caa45040 0:18b766aea0ef 201 /* Section 1 : Ethernet peripheral configuration */
caa45040 0:18b766aea0ef 202
caa45040 0:18b766aea0ef 203 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
caa45040 0:18b766aea0ef 204 #define MAC_ADDR0 2U
caa45040 0:18b766aea0ef 205 #define MAC_ADDR1 0U
caa45040 0:18b766aea0ef 206 #define MAC_ADDR2 0U
caa45040 0:18b766aea0ef 207 #define MAC_ADDR3 0U
caa45040 0:18b766aea0ef 208 #define MAC_ADDR4 0U
caa45040 0:18b766aea0ef 209 #define MAC_ADDR5 0U
caa45040 0:18b766aea0ef 210
caa45040 0:18b766aea0ef 211 /* Definition of the Ethernet driver buffers size and count */
caa45040 0:18b766aea0ef 212 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
caa45040 0:18b766aea0ef 213 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
caa45040 0:18b766aea0ef 214 #define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
caa45040 0:18b766aea0ef 215 #define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
caa45040 0:18b766aea0ef 216
caa45040 0:18b766aea0ef 217 /* Section 2: PHY configuration section */
caa45040 0:18b766aea0ef 218
caa45040 0:18b766aea0ef 219 /* DP83848_PHY_ADDRESS Address*/
caa45040 0:18b766aea0ef 220 #define DP83848_PHY_ADDRESS 0x01U
caa45040 0:18b766aea0ef 221 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
caa45040 0:18b766aea0ef 222 #define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
caa45040 0:18b766aea0ef 223 /* PHY Configuration delay */
caa45040 0:18b766aea0ef 224 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
caa45040 0:18b766aea0ef 225
caa45040 0:18b766aea0ef 226 #define PHY_READ_TO ((uint32_t)0x0000FFFFU)
caa45040 0:18b766aea0ef 227 #define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
caa45040 0:18b766aea0ef 228
caa45040 0:18b766aea0ef 229 /* Section 3: Common PHY Registers */
caa45040 0:18b766aea0ef 230
caa45040 0:18b766aea0ef 231 #define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
caa45040 0:18b766aea0ef 232 #define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
caa45040 0:18b766aea0ef 233
caa45040 0:18b766aea0ef 234 #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
caa45040 0:18b766aea0ef 235 #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
caa45040 0:18b766aea0ef 236 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
caa45040 0:18b766aea0ef 237 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
caa45040 0:18b766aea0ef 238 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
caa45040 0:18b766aea0ef 239 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
caa45040 0:18b766aea0ef 240 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
caa45040 0:18b766aea0ef 241 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
caa45040 0:18b766aea0ef 242 #define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
caa45040 0:18b766aea0ef 243 #define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
caa45040 0:18b766aea0ef 244
caa45040 0:18b766aea0ef 245 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
caa45040 0:18b766aea0ef 246 #define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
caa45040 0:18b766aea0ef 247 #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
caa45040 0:18b766aea0ef 248
caa45040 0:18b766aea0ef 249 /* Section 4: Extended PHY Registers */
caa45040 0:18b766aea0ef 250 #define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
caa45040 0:18b766aea0ef 251
caa45040 0:18b766aea0ef 252 #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
caa45040 0:18b766aea0ef 253 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
caa45040 0:18b766aea0ef 254
caa45040 0:18b766aea0ef 255 /* ################## SPI peripheral configuration ########################## */
caa45040 0:18b766aea0ef 256
caa45040 0:18b766aea0ef 257 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
caa45040 0:18b766aea0ef 258 * Activated: CRC code is present inside driver
caa45040 0:18b766aea0ef 259 * Deactivated: CRC code cleaned from driver
caa45040 0:18b766aea0ef 260 */
caa45040 0:18b766aea0ef 261
caa45040 0:18b766aea0ef 262 #define USE_SPI_CRC 0U
caa45040 0:18b766aea0ef 263
caa45040 0:18b766aea0ef 264 /* Includes ------------------------------------------------------------------*/
caa45040 0:18b766aea0ef 265 /**
caa45040 0:18b766aea0ef 266 * @brief Include module's header file
caa45040 0:18b766aea0ef 267 */
caa45040 0:18b766aea0ef 268
caa45040 0:18b766aea0ef 269 #ifdef HAL_RCC_MODULE_ENABLED
caa45040 0:18b766aea0ef 270 #include "stm32f7xx_hal_rcc.h"
caa45040 0:18b766aea0ef 271 #endif /* HAL_RCC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 272
caa45040 0:18b766aea0ef 273 #ifdef HAL_EXTI_MODULE_ENABLED
caa45040 0:18b766aea0ef 274 #include "stm32f7xx_hal_exti.h"
caa45040 0:18b766aea0ef 275 #endif /* HAL_EXTI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 276
caa45040 0:18b766aea0ef 277 #ifdef HAL_GPIO_MODULE_ENABLED
caa45040 0:18b766aea0ef 278 #include "stm32f7xx_hal_gpio.h"
caa45040 0:18b766aea0ef 279 #endif /* HAL_GPIO_MODULE_ENABLED */
caa45040 0:18b766aea0ef 280
caa45040 0:18b766aea0ef 281 #ifdef HAL_DMA_MODULE_ENABLED
caa45040 0:18b766aea0ef 282 #include "stm32f7xx_hal_dma.h"
caa45040 0:18b766aea0ef 283 #endif /* HAL_DMA_MODULE_ENABLED */
caa45040 0:18b766aea0ef 284
caa45040 0:18b766aea0ef 285 #ifdef HAL_CORTEX_MODULE_ENABLED
caa45040 0:18b766aea0ef 286 #include "stm32f7xx_hal_cortex.h"
caa45040 0:18b766aea0ef 287 #endif /* HAL_CORTEX_MODULE_ENABLED */
caa45040 0:18b766aea0ef 288
caa45040 0:18b766aea0ef 289 #ifdef HAL_ADC_MODULE_ENABLED
caa45040 0:18b766aea0ef 290 #include "stm32f7xx_hal_adc.h"
caa45040 0:18b766aea0ef 291 #endif /* HAL_ADC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 292
caa45040 0:18b766aea0ef 293 #ifdef HAL_CAN_MODULE_ENABLED
caa45040 0:18b766aea0ef 294 #include "stm32f7xx_hal_can.h"
caa45040 0:18b766aea0ef 295 #endif /* HAL_CAN_MODULE_ENABLED */
caa45040 0:18b766aea0ef 296
caa45040 0:18b766aea0ef 297 #ifdef HAL_CEC_MODULE_ENABLED
caa45040 0:18b766aea0ef 298 #include "stm32f7xx_hal_cec.h"
caa45040 0:18b766aea0ef 299 #endif /* HAL_CEC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 300
caa45040 0:18b766aea0ef 301 #ifdef HAL_CRC_MODULE_ENABLED
caa45040 0:18b766aea0ef 302 #include "stm32f7xx_hal_crc.h"
caa45040 0:18b766aea0ef 303 #endif /* HAL_CRC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 304
caa45040 0:18b766aea0ef 305 #ifdef HAL_CRYP_MODULE_ENABLED
caa45040 0:18b766aea0ef 306 #include "stm32f7xx_hal_cryp.h"
caa45040 0:18b766aea0ef 307 #endif /* HAL_CRYP_MODULE_ENABLED */
caa45040 0:18b766aea0ef 308
caa45040 0:18b766aea0ef 309 #ifdef HAL_DMA2D_MODULE_ENABLED
caa45040 0:18b766aea0ef 310 #include "stm32f7xx_hal_dma2d.h"
caa45040 0:18b766aea0ef 311 #endif /* HAL_DMA2D_MODULE_ENABLED */
caa45040 0:18b766aea0ef 312
caa45040 0:18b766aea0ef 313 #ifdef HAL_DAC_MODULE_ENABLED
caa45040 0:18b766aea0ef 314 #include "stm32f7xx_hal_dac.h"
caa45040 0:18b766aea0ef 315 #endif /* HAL_DAC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 316
caa45040 0:18b766aea0ef 317 #ifdef HAL_DCMI_MODULE_ENABLED
caa45040 0:18b766aea0ef 318 #include "stm32f7xx_hal_dcmi.h"
caa45040 0:18b766aea0ef 319 #endif /* HAL_DCMI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 320
caa45040 0:18b766aea0ef 321 #ifdef HAL_ETH_MODULE_ENABLED
caa45040 0:18b766aea0ef 322 #include "stm32f7xx_hal_eth.h"
caa45040 0:18b766aea0ef 323 #endif /* HAL_ETH_MODULE_ENABLED */
caa45040 0:18b766aea0ef 324
caa45040 0:18b766aea0ef 325 #ifdef HAL_FLASH_MODULE_ENABLED
caa45040 0:18b766aea0ef 326 #include "stm32f7xx_hal_flash.h"
caa45040 0:18b766aea0ef 327 #endif /* HAL_FLASH_MODULE_ENABLED */
caa45040 0:18b766aea0ef 328
caa45040 0:18b766aea0ef 329 #ifdef HAL_SRAM_MODULE_ENABLED
caa45040 0:18b766aea0ef 330 #include "stm32f7xx_hal_sram.h"
caa45040 0:18b766aea0ef 331 #endif /* HAL_SRAM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 332
caa45040 0:18b766aea0ef 333 #ifdef HAL_NOR_MODULE_ENABLED
caa45040 0:18b766aea0ef 334 #include "stm32f7xx_hal_nor.h"
caa45040 0:18b766aea0ef 335 #endif /* HAL_NOR_MODULE_ENABLED */
caa45040 0:18b766aea0ef 336
caa45040 0:18b766aea0ef 337 #ifdef HAL_NAND_MODULE_ENABLED
caa45040 0:18b766aea0ef 338 #include "stm32f7xx_hal_nand.h"
caa45040 0:18b766aea0ef 339 #endif /* HAL_NAND_MODULE_ENABLED */
caa45040 0:18b766aea0ef 340
caa45040 0:18b766aea0ef 341 #ifdef HAL_SDRAM_MODULE_ENABLED
caa45040 0:18b766aea0ef 342 #include "stm32f7xx_hal_sdram.h"
caa45040 0:18b766aea0ef 343 #endif /* HAL_SDRAM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 344
caa45040 0:18b766aea0ef 345 #ifdef HAL_HASH_MODULE_ENABLED
caa45040 0:18b766aea0ef 346 #include "stm32f7xx_hal_hash.h"
caa45040 0:18b766aea0ef 347 #endif /* HAL_HASH_MODULE_ENABLED */
caa45040 0:18b766aea0ef 348
caa45040 0:18b766aea0ef 349 #ifdef HAL_I2C_MODULE_ENABLED
caa45040 0:18b766aea0ef 350 #include "stm32f7xx_hal_i2c.h"
caa45040 0:18b766aea0ef 351 #endif /* HAL_I2C_MODULE_ENABLED */
caa45040 0:18b766aea0ef 352
caa45040 0:18b766aea0ef 353 #ifdef HAL_I2S_MODULE_ENABLED
caa45040 0:18b766aea0ef 354 #include "stm32f7xx_hal_i2s.h"
caa45040 0:18b766aea0ef 355 #endif /* HAL_I2S_MODULE_ENABLED */
caa45040 0:18b766aea0ef 356
caa45040 0:18b766aea0ef 357 #ifdef HAL_IWDG_MODULE_ENABLED
caa45040 0:18b766aea0ef 358 #include "stm32f7xx_hal_iwdg.h"
caa45040 0:18b766aea0ef 359 #endif /* HAL_IWDG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 360
caa45040 0:18b766aea0ef 361 #ifdef HAL_LPTIM_MODULE_ENABLED
caa45040 0:18b766aea0ef 362 #include "stm32f7xx_hal_lptim.h"
caa45040 0:18b766aea0ef 363 #endif /* HAL_LPTIM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 364
caa45040 0:18b766aea0ef 365 #ifdef HAL_LTDC_MODULE_ENABLED
caa45040 0:18b766aea0ef 366 #include "stm32f7xx_hal_ltdc.h"
caa45040 0:18b766aea0ef 367 #endif /* HAL_LTDC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 368
caa45040 0:18b766aea0ef 369 #ifdef HAL_PWR_MODULE_ENABLED
caa45040 0:18b766aea0ef 370 #include "stm32f7xx_hal_pwr.h"
caa45040 0:18b766aea0ef 371 #endif /* HAL_PWR_MODULE_ENABLED */
caa45040 0:18b766aea0ef 372
caa45040 0:18b766aea0ef 373 #ifdef HAL_QSPI_MODULE_ENABLED
caa45040 0:18b766aea0ef 374 #include "stm32f7xx_hal_qspi.h"
caa45040 0:18b766aea0ef 375 #endif /* HAL_QSPI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 376
caa45040 0:18b766aea0ef 377 #ifdef HAL_RNG_MODULE_ENABLED
caa45040 0:18b766aea0ef 378 #include "stm32f7xx_hal_rng.h"
caa45040 0:18b766aea0ef 379 #endif /* HAL_RNG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 380
caa45040 0:18b766aea0ef 381 #ifdef HAL_RTC_MODULE_ENABLED
caa45040 0:18b766aea0ef 382 #include "stm32f7xx_hal_rtc.h"
caa45040 0:18b766aea0ef 383 #endif /* HAL_RTC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 384
caa45040 0:18b766aea0ef 385 #ifdef HAL_SAI_MODULE_ENABLED
caa45040 0:18b766aea0ef 386 #include "stm32f7xx_hal_sai.h"
caa45040 0:18b766aea0ef 387 #endif /* HAL_SAI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 388
caa45040 0:18b766aea0ef 389 #ifdef HAL_SD_MODULE_ENABLED
caa45040 0:18b766aea0ef 390 #include "stm32f7xx_hal_sd.h"
caa45040 0:18b766aea0ef 391 #endif /* HAL_SD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 392
caa45040 0:18b766aea0ef 393 #ifdef HAL_MMC_MODULE_ENABLED
caa45040 0:18b766aea0ef 394 #include "stm32f7xx_hal_mmc.h"
caa45040 0:18b766aea0ef 395 #endif /* HAL_MMC_MODULE_ENABLED */
caa45040 0:18b766aea0ef 396
caa45040 0:18b766aea0ef 397 #ifdef HAL_SPDIFRX_MODULE_ENABLED
caa45040 0:18b766aea0ef 398 #include "stm32f7xx_hal_spdifrx.h"
caa45040 0:18b766aea0ef 399 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
caa45040 0:18b766aea0ef 400
caa45040 0:18b766aea0ef 401 #ifdef HAL_SPI_MODULE_ENABLED
caa45040 0:18b766aea0ef 402 #include "stm32f7xx_hal_spi.h"
caa45040 0:18b766aea0ef 403 #endif /* HAL_SPI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 404
caa45040 0:18b766aea0ef 405 #ifdef HAL_TIM_MODULE_ENABLED
caa45040 0:18b766aea0ef 406 #include "stm32f7xx_hal_tim.h"
caa45040 0:18b766aea0ef 407 #endif /* HAL_TIM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 408
caa45040 0:18b766aea0ef 409 #ifdef HAL_UART_MODULE_ENABLED
caa45040 0:18b766aea0ef 410 #include "stm32f7xx_hal_uart.h"
caa45040 0:18b766aea0ef 411 #endif /* HAL_UART_MODULE_ENABLED */
caa45040 0:18b766aea0ef 412
caa45040 0:18b766aea0ef 413 #ifdef HAL_USART_MODULE_ENABLED
caa45040 0:18b766aea0ef 414 #include "stm32f7xx_hal_usart.h"
caa45040 0:18b766aea0ef 415 #endif /* HAL_USART_MODULE_ENABLED */
caa45040 0:18b766aea0ef 416
caa45040 0:18b766aea0ef 417 #ifdef HAL_IRDA_MODULE_ENABLED
caa45040 0:18b766aea0ef 418 #include "stm32f7xx_hal_irda.h"
caa45040 0:18b766aea0ef 419 #endif /* HAL_IRDA_MODULE_ENABLED */
caa45040 0:18b766aea0ef 420
caa45040 0:18b766aea0ef 421 #ifdef HAL_SMARTCARD_MODULE_ENABLED
caa45040 0:18b766aea0ef 422 #include "stm32f7xx_hal_smartcard.h"
caa45040 0:18b766aea0ef 423 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 424
caa45040 0:18b766aea0ef 425 #ifdef HAL_WWDG_MODULE_ENABLED
caa45040 0:18b766aea0ef 426 #include "stm32f7xx_hal_wwdg.h"
caa45040 0:18b766aea0ef 427 #endif /* HAL_WWDG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 428
caa45040 0:18b766aea0ef 429 #ifdef HAL_PCD_MODULE_ENABLED
caa45040 0:18b766aea0ef 430 #include "stm32f7xx_hal_pcd.h"
caa45040 0:18b766aea0ef 431 #endif /* HAL_PCD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 432
caa45040 0:18b766aea0ef 433 #ifdef HAL_HCD_MODULE_ENABLED
caa45040 0:18b766aea0ef 434 #include "stm32f7xx_hal_hcd.h"
caa45040 0:18b766aea0ef 435 #endif /* HAL_HCD_MODULE_ENABLED */
caa45040 0:18b766aea0ef 436
caa45040 0:18b766aea0ef 437 #ifdef HAL_DFSDM_MODULE_ENABLED
caa45040 0:18b766aea0ef 438 #include "stm32f7xx_hal_dfsdm.h"
caa45040 0:18b766aea0ef 439 #endif /* HAL_DFSDM_MODULE_ENABLED */
caa45040 0:18b766aea0ef 440
caa45040 0:18b766aea0ef 441 #ifdef HAL_DSI_MODULE_ENABLED
caa45040 0:18b766aea0ef 442 #include "stm32f7xx_hal_dsi.h"
caa45040 0:18b766aea0ef 443 #endif /* HAL_DSI_MODULE_ENABLED */
caa45040 0:18b766aea0ef 444
caa45040 0:18b766aea0ef 445 #ifdef HAL_JPEG_MODULE_ENABLED
caa45040 0:18b766aea0ef 446 #include "stm32f7xx_hal_jpeg.h"
caa45040 0:18b766aea0ef 447 #endif /* HAL_JPEG_MODULE_ENABLED */
caa45040 0:18b766aea0ef 448
caa45040 0:18b766aea0ef 449 #ifdef HAL_MDIOS_MODULE_ENABLED
caa45040 0:18b766aea0ef 450 #include "stm32f7xx_hal_mdios.h"
caa45040 0:18b766aea0ef 451 #endif /* HAL_MDIOS_MODULE_ENABLED */
caa45040 0:18b766aea0ef 452
caa45040 0:18b766aea0ef 453 #ifdef HAL_SMBUS_MODULE_ENABLED
caa45040 0:18b766aea0ef 454 #include "stm32f7xx_hal_smbus.h"
caa45040 0:18b766aea0ef 455 #endif /* HAL_SMBUS_MODULE_ENABLED */
caa45040 0:18b766aea0ef 456
caa45040 0:18b766aea0ef 457 /* Exported macro ------------------------------------------------------------*/
caa45040 0:18b766aea0ef 458 #ifdef USE_FULL_ASSERT
caa45040 0:18b766aea0ef 459 /**
caa45040 0:18b766aea0ef 460 * @brief The assert_param macro is used for function's parameters check.
caa45040 0:18b766aea0ef 461 * @param expr: If expr is false, it calls assert_failed function
caa45040 0:18b766aea0ef 462 * which reports the name of the source file and the source
caa45040 0:18b766aea0ef 463 * line number of the call that failed.
caa45040 0:18b766aea0ef 464 * If expr is true, it returns no value.
caa45040 0:18b766aea0ef 465 * @retval None
caa45040 0:18b766aea0ef 466 */
caa45040 0:18b766aea0ef 467 #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
caa45040 0:18b766aea0ef 468 /* Exported functions ------------------------------------------------------- */
caa45040 0:18b766aea0ef 469 void assert_failed(uint8_t* file, uint32_t line);
caa45040 0:18b766aea0ef 470 #else
caa45040 0:18b766aea0ef 471 #define assert_param(expr) ((void)0U)
caa45040 0:18b766aea0ef 472 #endif /* USE_FULL_ASSERT */
caa45040 0:18b766aea0ef 473
caa45040 0:18b766aea0ef 474 #ifdef __cplusplus
caa45040 0:18b766aea0ef 475 }
caa45040 0:18b766aea0ef 476 #endif
caa45040 0:18b766aea0ef 477
caa45040 0:18b766aea0ef 478 #endif /* __STM32F7xx_HAL_CONF_H */
caa45040 0:18b766aea0ef 479
caa45040 0:18b766aea0ef 480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
caa45040 0:18b766aea0ef 481