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stm32l010_lpuart1_1/system_stm32l0xx.c@14:4b2aa14add81, 2021-11-30 (annotated)
- Committer:
- caa45040
- Date:
- Tue Nov 30 19:38:14 2021 +0000
- Revision:
- 14:4b2aa14add81
stm32l010_lpuart1_1
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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caa45040 | 14:4b2aa14add81 | 1 | /** |
caa45040 | 14:4b2aa14add81 | 2 | ****************************************************************************** |
caa45040 | 14:4b2aa14add81 | 3 | * @file system_stm32l0xx.c |
caa45040 | 14:4b2aa14add81 | 4 | * @author MCD Application Team |
caa45040 | 14:4b2aa14add81 | 5 | * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File. |
caa45040 | 14:4b2aa14add81 | 6 | * |
caa45040 | 14:4b2aa14add81 | 7 | * This file provides two functions and one global variable to be called from |
caa45040 | 14:4b2aa14add81 | 8 | * user application: |
caa45040 | 14:4b2aa14add81 | 9 | * - SystemInit(): This function is called at startup just after reset and |
caa45040 | 14:4b2aa14add81 | 10 | * before branch to main program. This call is made inside |
caa45040 | 14:4b2aa14add81 | 11 | * the "startup_stm32l0xx.s" file. |
caa45040 | 14:4b2aa14add81 | 12 | * |
caa45040 | 14:4b2aa14add81 | 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
caa45040 | 14:4b2aa14add81 | 14 | * by the user application to setup the SysTick |
caa45040 | 14:4b2aa14add81 | 15 | * timer or configure other parameters. |
caa45040 | 14:4b2aa14add81 | 16 | * |
caa45040 | 14:4b2aa14add81 | 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
caa45040 | 14:4b2aa14add81 | 18 | * be called whenever the core clock is changed |
caa45040 | 14:4b2aa14add81 | 19 | * during program execution. |
caa45040 | 14:4b2aa14add81 | 20 | * |
caa45040 | 14:4b2aa14add81 | 21 | * |
caa45040 | 14:4b2aa14add81 | 22 | ****************************************************************************** |
caa45040 | 14:4b2aa14add81 | 23 | * @attention |
caa45040 | 14:4b2aa14add81 | 24 | * |
caa45040 | 14:4b2aa14add81 | 25 | * <h2><center>© Copyright(c) 2016 STMicroelectronics. |
caa45040 | 14:4b2aa14add81 | 26 | * All rights reserved.</center></h2> |
caa45040 | 14:4b2aa14add81 | 27 | * |
caa45040 | 14:4b2aa14add81 | 28 | * This software component is licensed by ST under BSD 3-Clause license, |
caa45040 | 14:4b2aa14add81 | 29 | * the "License"; You may not use this file except in compliance with the |
caa45040 | 14:4b2aa14add81 | 30 | * License. You may obtain a copy of the License at: |
caa45040 | 14:4b2aa14add81 | 31 | * opensource.org/licenses/BSD-3-Clause |
caa45040 | 14:4b2aa14add81 | 32 | * |
caa45040 | 14:4b2aa14add81 | 33 | ****************************************************************************** |
caa45040 | 14:4b2aa14add81 | 34 | */ |
caa45040 | 14:4b2aa14add81 | 35 | |
caa45040 | 14:4b2aa14add81 | 36 | /** @addtogroup CMSIS |
caa45040 | 14:4b2aa14add81 | 37 | * @{ |
caa45040 | 14:4b2aa14add81 | 38 | */ |
caa45040 | 14:4b2aa14add81 | 39 | |
caa45040 | 14:4b2aa14add81 | 40 | /** @addtogroup stm32l0xx_system |
caa45040 | 14:4b2aa14add81 | 41 | * @{ |
caa45040 | 14:4b2aa14add81 | 42 | */ |
caa45040 | 14:4b2aa14add81 | 43 | |
caa45040 | 14:4b2aa14add81 | 44 | /** @addtogroup STM32L0xx_System_Private_Includes |
caa45040 | 14:4b2aa14add81 | 45 | * @{ |
caa45040 | 14:4b2aa14add81 | 46 | */ |
caa45040 | 14:4b2aa14add81 | 47 | |
caa45040 | 14:4b2aa14add81 | 48 | #include "stm32l0xx.h" |
caa45040 | 14:4b2aa14add81 | 49 | |
caa45040 | 14:4b2aa14add81 | 50 | #if !defined (HSE_VALUE) |
caa45040 | 14:4b2aa14add81 | 51 | #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ |
caa45040 | 14:4b2aa14add81 | 52 | #endif /* HSE_VALUE */ |
caa45040 | 14:4b2aa14add81 | 53 | |
caa45040 | 14:4b2aa14add81 | 54 | #if !defined (MSI_VALUE) |
caa45040 | 14:4b2aa14add81 | 55 | #define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/ |
caa45040 | 14:4b2aa14add81 | 56 | #endif /* MSI_VALUE */ |
caa45040 | 14:4b2aa14add81 | 57 | |
caa45040 | 14:4b2aa14add81 | 58 | #if !defined (HSI_VALUE) |
caa45040 | 14:4b2aa14add81 | 59 | #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ |
caa45040 | 14:4b2aa14add81 | 60 | #endif /* HSI_VALUE */ |
caa45040 | 14:4b2aa14add81 | 61 | |
caa45040 | 14:4b2aa14add81 | 62 | |
caa45040 | 14:4b2aa14add81 | 63 | /** |
caa45040 | 14:4b2aa14add81 | 64 | * @} |
caa45040 | 14:4b2aa14add81 | 65 | */ |
caa45040 | 14:4b2aa14add81 | 66 | |
caa45040 | 14:4b2aa14add81 | 67 | /** @addtogroup STM32L0xx_System_Private_TypesDefinitions |
caa45040 | 14:4b2aa14add81 | 68 | * @{ |
caa45040 | 14:4b2aa14add81 | 69 | */ |
caa45040 | 14:4b2aa14add81 | 70 | |
caa45040 | 14:4b2aa14add81 | 71 | /** |
caa45040 | 14:4b2aa14add81 | 72 | * @} |
caa45040 | 14:4b2aa14add81 | 73 | */ |
caa45040 | 14:4b2aa14add81 | 74 | |
caa45040 | 14:4b2aa14add81 | 75 | /** @addtogroup STM32L0xx_System_Private_Defines |
caa45040 | 14:4b2aa14add81 | 76 | * @{ |
caa45040 | 14:4b2aa14add81 | 77 | */ |
caa45040 | 14:4b2aa14add81 | 78 | /************************* Miscellaneous Configuration ************************/ |
caa45040 | 14:4b2aa14add81 | 79 | |
caa45040 | 14:4b2aa14add81 | 80 | /* Note: Following vector table addresses must be defined in line with linker |
caa45040 | 14:4b2aa14add81 | 81 | configuration. */ |
caa45040 | 14:4b2aa14add81 | 82 | /*!< Uncomment the following line if you need to relocate the vector table |
caa45040 | 14:4b2aa14add81 | 83 | anywhere in Flash or Sram, else the vector table is kept at the automatic |
caa45040 | 14:4b2aa14add81 | 84 | remap of boot address selected */ |
caa45040 | 14:4b2aa14add81 | 85 | /* #define USER_VECT_TAB_ADDRESS */ |
caa45040 | 14:4b2aa14add81 | 86 | |
caa45040 | 14:4b2aa14add81 | 87 | #if defined(USER_VECT_TAB_ADDRESS) |
caa45040 | 14:4b2aa14add81 | 88 | /*!< Uncomment the following line if you need to relocate your vector Table |
caa45040 | 14:4b2aa14add81 | 89 | in Sram else user remap will be done in Flash. */ |
caa45040 | 14:4b2aa14add81 | 90 | /* #define VECT_TAB_SRAM */ |
caa45040 | 14:4b2aa14add81 | 91 | #if defined(VECT_TAB_SRAM) |
caa45040 | 14:4b2aa14add81 | 92 | #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. |
caa45040 | 14:4b2aa14add81 | 93 | This value must be a multiple of 0x200. */ |
caa45040 | 14:4b2aa14add81 | 94 | #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. |
caa45040 | 14:4b2aa14add81 | 95 | This value must be a multiple of 0x200. */ |
caa45040 | 14:4b2aa14add81 | 96 | #else |
caa45040 | 14:4b2aa14add81 | 97 | #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. |
caa45040 | 14:4b2aa14add81 | 98 | This value must be a multiple of 0x200. */ |
caa45040 | 14:4b2aa14add81 | 99 | #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. |
caa45040 | 14:4b2aa14add81 | 100 | This value must be a multiple of 0x200. */ |
caa45040 | 14:4b2aa14add81 | 101 | #endif /* VECT_TAB_SRAM */ |
caa45040 | 14:4b2aa14add81 | 102 | #endif /* USER_VECT_TAB_ADDRESS */ |
caa45040 | 14:4b2aa14add81 | 103 | |
caa45040 | 14:4b2aa14add81 | 104 | /******************************************************************************/ |
caa45040 | 14:4b2aa14add81 | 105 | /** |
caa45040 | 14:4b2aa14add81 | 106 | * @} |
caa45040 | 14:4b2aa14add81 | 107 | */ |
caa45040 | 14:4b2aa14add81 | 108 | |
caa45040 | 14:4b2aa14add81 | 109 | /** @addtogroup STM32L0xx_System_Private_Macros |
caa45040 | 14:4b2aa14add81 | 110 | * @{ |
caa45040 | 14:4b2aa14add81 | 111 | */ |
caa45040 | 14:4b2aa14add81 | 112 | |
caa45040 | 14:4b2aa14add81 | 113 | /** |
caa45040 | 14:4b2aa14add81 | 114 | * @} |
caa45040 | 14:4b2aa14add81 | 115 | */ |
caa45040 | 14:4b2aa14add81 | 116 | |
caa45040 | 14:4b2aa14add81 | 117 | /** @addtogroup STM32L0xx_System_Private_Variables |
caa45040 | 14:4b2aa14add81 | 118 | * @{ |
caa45040 | 14:4b2aa14add81 | 119 | */ |
caa45040 | 14:4b2aa14add81 | 120 | /* This variable is updated in three ways: |
caa45040 | 14:4b2aa14add81 | 121 | 1) by calling CMSIS function SystemCoreClockUpdate() |
caa45040 | 14:4b2aa14add81 | 122 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() |
caa45040 | 14:4b2aa14add81 | 123 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
caa45040 | 14:4b2aa14add81 | 124 | Note: If you use this function to configure the system clock; then there |
caa45040 | 14:4b2aa14add81 | 125 | is no need to call the 2 first functions listed above, since SystemCoreClock |
caa45040 | 14:4b2aa14add81 | 126 | variable is updated automatically. |
caa45040 | 14:4b2aa14add81 | 127 | */ |
caa45040 | 14:4b2aa14add81 | 128 | uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */ |
caa45040 | 14:4b2aa14add81 | 129 | const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; |
caa45040 | 14:4b2aa14add81 | 130 | const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; |
caa45040 | 14:4b2aa14add81 | 131 | const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; |
caa45040 | 14:4b2aa14add81 | 132 | |
caa45040 | 14:4b2aa14add81 | 133 | /** |
caa45040 | 14:4b2aa14add81 | 134 | * @} |
caa45040 | 14:4b2aa14add81 | 135 | */ |
caa45040 | 14:4b2aa14add81 | 136 | |
caa45040 | 14:4b2aa14add81 | 137 | /** @addtogroup STM32L0xx_System_Private_FunctionPrototypes |
caa45040 | 14:4b2aa14add81 | 138 | * @{ |
caa45040 | 14:4b2aa14add81 | 139 | */ |
caa45040 | 14:4b2aa14add81 | 140 | |
caa45040 | 14:4b2aa14add81 | 141 | /** |
caa45040 | 14:4b2aa14add81 | 142 | * @} |
caa45040 | 14:4b2aa14add81 | 143 | */ |
caa45040 | 14:4b2aa14add81 | 144 | |
caa45040 | 14:4b2aa14add81 | 145 | /** @addtogroup STM32L0xx_System_Private_Functions |
caa45040 | 14:4b2aa14add81 | 146 | * @{ |
caa45040 | 14:4b2aa14add81 | 147 | */ |
caa45040 | 14:4b2aa14add81 | 148 | |
caa45040 | 14:4b2aa14add81 | 149 | /** |
caa45040 | 14:4b2aa14add81 | 150 | * @brief Setup the microcontroller system. |
caa45040 | 14:4b2aa14add81 | 151 | * @param None |
caa45040 | 14:4b2aa14add81 | 152 | * @retval None |
caa45040 | 14:4b2aa14add81 | 153 | */ |
caa45040 | 14:4b2aa14add81 | 154 | void SystemInit (void) |
caa45040 | 14:4b2aa14add81 | 155 | { |
caa45040 | 14:4b2aa14add81 | 156 | /* Configure the Vector Table location add offset address ------------------*/ |
caa45040 | 14:4b2aa14add81 | 157 | #if defined (USER_VECT_TAB_ADDRESS) |
caa45040 | 14:4b2aa14add81 | 158 | SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ |
caa45040 | 14:4b2aa14add81 | 159 | #endif /* USER_VECT_TAB_ADDRESS */ |
caa45040 | 14:4b2aa14add81 | 160 | } |
caa45040 | 14:4b2aa14add81 | 161 | |
caa45040 | 14:4b2aa14add81 | 162 | /** |
caa45040 | 14:4b2aa14add81 | 163 | * @brief Update SystemCoreClock variable according to Clock Register Values. |
caa45040 | 14:4b2aa14add81 | 164 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
caa45040 | 14:4b2aa14add81 | 165 | * be used by the user application to setup the SysTick timer or configure |
caa45040 | 14:4b2aa14add81 | 166 | * other parameters. |
caa45040 | 14:4b2aa14add81 | 167 | * |
caa45040 | 14:4b2aa14add81 | 168 | * @note Each time the core clock (HCLK) changes, this function must be called |
caa45040 | 14:4b2aa14add81 | 169 | * to update SystemCoreClock variable value. Otherwise, any configuration |
caa45040 | 14:4b2aa14add81 | 170 | * based on this variable will be incorrect. |
caa45040 | 14:4b2aa14add81 | 171 | * |
caa45040 | 14:4b2aa14add81 | 172 | * @note - The system frequency computed by this function is not the real |
caa45040 | 14:4b2aa14add81 | 173 | * frequency in the chip. It is calculated based on the predefined |
caa45040 | 14:4b2aa14add81 | 174 | * constant and the selected clock source: |
caa45040 | 14:4b2aa14add81 | 175 | * |
caa45040 | 14:4b2aa14add81 | 176 | * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI |
caa45040 | 14:4b2aa14add81 | 177 | * value as defined by the MSI range. |
caa45040 | 14:4b2aa14add81 | 178 | * |
caa45040 | 14:4b2aa14add81 | 179 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) |
caa45040 | 14:4b2aa14add81 | 180 | * |
caa45040 | 14:4b2aa14add81 | 181 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) |
caa45040 | 14:4b2aa14add81 | 182 | * |
caa45040 | 14:4b2aa14add81 | 183 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) |
caa45040 | 14:4b2aa14add81 | 184 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. |
caa45040 | 14:4b2aa14add81 | 185 | * |
caa45040 | 14:4b2aa14add81 | 186 | * (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value |
caa45040 | 14:4b2aa14add81 | 187 | * 16 MHz) but the real value may vary depending on the variations |
caa45040 | 14:4b2aa14add81 | 188 | * in voltage and temperature. |
caa45040 | 14:4b2aa14add81 | 189 | * |
caa45040 | 14:4b2aa14add81 | 190 | * (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value |
caa45040 | 14:4b2aa14add81 | 191 | * 8 MHz), user has to ensure that HSE_VALUE is same as the real |
caa45040 | 14:4b2aa14add81 | 192 | * frequency of the crystal used. Otherwise, this function may |
caa45040 | 14:4b2aa14add81 | 193 | * have wrong result. |
caa45040 | 14:4b2aa14add81 | 194 | * |
caa45040 | 14:4b2aa14add81 | 195 | * - The result of this function could be not correct when using fractional |
caa45040 | 14:4b2aa14add81 | 196 | * value for HSE crystal. |
caa45040 | 14:4b2aa14add81 | 197 | * @param None |
caa45040 | 14:4b2aa14add81 | 198 | * @retval None |
caa45040 | 14:4b2aa14add81 | 199 | */ |
caa45040 | 14:4b2aa14add81 | 200 | void SystemCoreClockUpdate (void) |
caa45040 | 14:4b2aa14add81 | 201 | { |
caa45040 | 14:4b2aa14add81 | 202 | uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U; |
caa45040 | 14:4b2aa14add81 | 203 | |
caa45040 | 14:4b2aa14add81 | 204 | /* Get SYSCLK source -------------------------------------------------------*/ |
caa45040 | 14:4b2aa14add81 | 205 | tmp = RCC->CFGR & RCC_CFGR_SWS; |
caa45040 | 14:4b2aa14add81 | 206 | |
caa45040 | 14:4b2aa14add81 | 207 | switch (tmp) |
caa45040 | 14:4b2aa14add81 | 208 | { |
caa45040 | 14:4b2aa14add81 | 209 | case 0x00U: /* MSI used as system clock */ |
caa45040 | 14:4b2aa14add81 | 210 | msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos; |
caa45040 | 14:4b2aa14add81 | 211 | SystemCoreClock = (32768U * (1U << (msirange + 1U))); |
caa45040 | 14:4b2aa14add81 | 212 | break; |
caa45040 | 14:4b2aa14add81 | 213 | case 0x04U: /* HSI used as system clock */ |
caa45040 | 14:4b2aa14add81 | 214 | if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) |
caa45040 | 14:4b2aa14add81 | 215 | { |
caa45040 | 14:4b2aa14add81 | 216 | SystemCoreClock = HSI_VALUE / 4U; |
caa45040 | 14:4b2aa14add81 | 217 | } |
caa45040 | 14:4b2aa14add81 | 218 | else |
caa45040 | 14:4b2aa14add81 | 219 | { |
caa45040 | 14:4b2aa14add81 | 220 | SystemCoreClock = HSI_VALUE; |
caa45040 | 14:4b2aa14add81 | 221 | } |
caa45040 | 14:4b2aa14add81 | 222 | break; |
caa45040 | 14:4b2aa14add81 | 223 | case 0x08U: /* HSE used as system clock */ |
caa45040 | 14:4b2aa14add81 | 224 | SystemCoreClock = HSE_VALUE; |
caa45040 | 14:4b2aa14add81 | 225 | break; |
caa45040 | 14:4b2aa14add81 | 226 | default: /* PLL used as system clock */ |
caa45040 | 14:4b2aa14add81 | 227 | /* Get PLL clock source and multiplication factor ----------------------*/ |
caa45040 | 14:4b2aa14add81 | 228 | pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; |
caa45040 | 14:4b2aa14add81 | 229 | plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; |
caa45040 | 14:4b2aa14add81 | 230 | pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; |
caa45040 | 14:4b2aa14add81 | 231 | plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U; |
caa45040 | 14:4b2aa14add81 | 232 | |
caa45040 | 14:4b2aa14add81 | 233 | pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; |
caa45040 | 14:4b2aa14add81 | 234 | |
caa45040 | 14:4b2aa14add81 | 235 | if (pllsource == 0x00U) |
caa45040 | 14:4b2aa14add81 | 236 | { |
caa45040 | 14:4b2aa14add81 | 237 | /* HSI oscillator clock selected as PLL clock entry */ |
caa45040 | 14:4b2aa14add81 | 238 | if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) |
caa45040 | 14:4b2aa14add81 | 239 | { |
caa45040 | 14:4b2aa14add81 | 240 | SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv); |
caa45040 | 14:4b2aa14add81 | 241 | } |
caa45040 | 14:4b2aa14add81 | 242 | else |
caa45040 | 14:4b2aa14add81 | 243 | { |
caa45040 | 14:4b2aa14add81 | 244 | SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); |
caa45040 | 14:4b2aa14add81 | 245 | } |
caa45040 | 14:4b2aa14add81 | 246 | } |
caa45040 | 14:4b2aa14add81 | 247 | else |
caa45040 | 14:4b2aa14add81 | 248 | { |
caa45040 | 14:4b2aa14add81 | 249 | /* HSE selected as PLL clock entry */ |
caa45040 | 14:4b2aa14add81 | 250 | SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); |
caa45040 | 14:4b2aa14add81 | 251 | } |
caa45040 | 14:4b2aa14add81 | 252 | break; |
caa45040 | 14:4b2aa14add81 | 253 | } |
caa45040 | 14:4b2aa14add81 | 254 | /* Compute HCLK clock frequency --------------------------------------------*/ |
caa45040 | 14:4b2aa14add81 | 255 | /* Get HCLK prescaler */ |
caa45040 | 14:4b2aa14add81 | 256 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; |
caa45040 | 14:4b2aa14add81 | 257 | /* HCLK clock frequency */ |
caa45040 | 14:4b2aa14add81 | 258 | SystemCoreClock >>= tmp; |
caa45040 | 14:4b2aa14add81 | 259 | } |
caa45040 | 14:4b2aa14add81 | 260 | |
caa45040 | 14:4b2aa14add81 | 261 | |
caa45040 | 14:4b2aa14add81 | 262 | |
caa45040 | 14:4b2aa14add81 | 263 | /** |
caa45040 | 14:4b2aa14add81 | 264 | * @} |
caa45040 | 14:4b2aa14add81 | 265 | */ |
caa45040 | 14:4b2aa14add81 | 266 | |
caa45040 | 14:4b2aa14add81 | 267 | /** |
caa45040 | 14:4b2aa14add81 | 268 | * @} |
caa45040 | 14:4b2aa14add81 | 269 | */ |
caa45040 | 14:4b2aa14add81 | 270 | |
caa45040 | 14:4b2aa14add81 | 271 | /** |
caa45040 | 14:4b2aa14add81 | 272 | * @} |
caa45040 | 14:4b2aa14add81 | 273 | */ |
caa45040 | 14:4b2aa14add81 | 274 | |
caa45040 | 14:4b2aa14add81 | 275 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
caa45040 | 14:4b2aa14add81 | 276 |