keniti akiba / Mbed 2 deprecated f303_h_p1

f303_h_p1 1

Dependencies:   mbed

nu_l010_pb1_1/main.c@26:a047b389adfd, 2022-05-06 (annotated)

Committer:
caa45040
Date:
Fri May 06 14:22:30 2022 +0000
Revision:
26:a047b389adfd
Parent:
2:b834786c903e 
i2c_slave_HC_SR04_010_BIN re

Who changed what in which revision?

UserRevisionLine numberNew contents of line
caa45040 2:b834786c903e 1 /* USER CODE BEGIN Header */
caa45040 2:b834786c903e 2 /**
caa45040 2:b834786c903e 3 ******************************************************************************
caa45040 2:b834786c903e 4 * @file : main.c
caa45040 2:b834786c903e 5 * @brief : Main program body
caa45040 2:b834786c903e 6 ******************************************************************************
caa45040 2:b834786c903e 7 * @attention
caa45040 2:b834786c903e 8 *
caa45040 2:b834786c903e 9 * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
caa45040 2:b834786c903e 10 * All rights reserved.</center></h2>
caa45040 2:b834786c903e 11 *
caa45040 2:b834786c903e 12 * This software component is licensed by ST under BSD 3-Clause license,
caa45040 2:b834786c903e 13 * the "License"; You may not use this file except in compliance with the
caa45040 2:b834786c903e 14 * License. You may obtain a copy of the License at:
caa45040 2:b834786c903e 15 * opensource.org/licenses/BSD-3-Clause
caa45040 2:b834786c903e 16 *
caa45040 2:b834786c903e 17 ******************************************************************************
caa45040 2:b834786c903e 18 */
caa45040 2:b834786c903e 19 /* USER CODE END Header */
caa45040 2:b834786c903e 20 /* Includes ------------------------------------------------------------------*/
caa45040 2:b834786c903e 21 #include "main.h"
caa45040 2:b834786c903e 22
caa45040 2:b834786c903e 23 /* Private includes ----------------------------------------------------------*/
caa45040 2:b834786c903e 24 /* USER CODE BEGIN Includes */
caa45040 2:b834786c903e 25
caa45040 2:b834786c903e 26 /* USER CODE END Includes */
caa45040 2:b834786c903e 27
caa45040 2:b834786c903e 28 /* Private typedef -----------------------------------------------------------*/
caa45040 2:b834786c903e 29 /* USER CODE BEGIN PTD */
caa45040 2:b834786c903e 30
caa45040 2:b834786c903e 31 /* USER CODE END PTD */
caa45040 2:b834786c903e 32
caa45040 2:b834786c903e 33 /* Private define ------------------------------------------------------------*/
caa45040 2:b834786c903e 34 /* USER CODE BEGIN PD */
caa45040 2:b834786c903e 35 /* USER CODE END PD */
caa45040 2:b834786c903e 36
caa45040 2:b834786c903e 37 /* Private macro -------------------------------------------------------------*/
caa45040 2:b834786c903e 38 /* USER CODE BEGIN PM */
caa45040 2:b834786c903e 39
caa45040 2:b834786c903e 40 /* USER CODE END PM */
caa45040 2:b834786c903e 41
caa45040 2:b834786c903e 42 /* Private variables ---------------------------------------------------------*/
caa45040 2:b834786c903e 43 UART_HandleTypeDef huart2;
caa45040 2:b834786c903e 44
caa45040 2:b834786c903e 45 /* USER CODE BEGIN PV */
caa45040 2:b834786c903e 46
caa45040 2:b834786c903e 47 /* USER CODE END PV */
caa45040 2:b834786c903e 48
caa45040 2:b834786c903e 49 /* Private function prototypes -----------------------------------------------*/
caa45040 2:b834786c903e 50 void SystemClock_Config(void);
caa45040 2:b834786c903e 51 static void MX_GPIO_Init(void);
caa45040 2:b834786c903e 52 static void MX_USART2_UART_Init(void);
caa45040 2:b834786c903e 53 /* USER CODE BEGIN PFP */
caa45040 2:b834786c903e 54
caa45040 2:b834786c903e 55 /* USER CODE END PFP */
caa45040 2:b834786c903e 56
caa45040 2:b834786c903e 57 /* Private user code ---------------------------------------------------------*/
caa45040 2:b834786c903e 58 /* USER CODE BEGIN 0 */
caa45040 2:b834786c903e 59
caa45040 2:b834786c903e 60 /* USER CODE END 0 */
caa45040 2:b834786c903e 61
caa45040 2:b834786c903e 62 /**
caa45040 2:b834786c903e 63 * @brief The application entry point.
caa45040 2:b834786c903e 64 * @retval int
caa45040 2:b834786c903e 65 */
caa45040 2:b834786c903e 66 int main(void)
caa45040 2:b834786c903e 67 {
caa45040 2:b834786c903e 68 /* USER CODE BEGIN 1 */
caa45040 2:b834786c903e 69
caa45040 2:b834786c903e 70 /* USER CODE END 1 */
caa45040 2:b834786c903e 71
caa45040 2:b834786c903e 72 /* MCU Configuration--------------------------------------------------------*/
caa45040 2:b834786c903e 73
caa45040 2:b834786c903e 74 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
caa45040 2:b834786c903e 75 HAL_Init();
caa45040 2:b834786c903e 76
caa45040 2:b834786c903e 77 /* USER CODE BEGIN Init */
caa45040 2:b834786c903e 78
caa45040 2:b834786c903e 79 /* USER CODE END Init */
caa45040 2:b834786c903e 80
caa45040 2:b834786c903e 81 /* Configure the system clock */
caa45040 2:b834786c903e 82 SystemClock_Config();
caa45040 2:b834786c903e 83
caa45040 2:b834786c903e 84 /* USER CODE BEGIN SysInit */
caa45040 2:b834786c903e 85
caa45040 2:b834786c903e 86 /* USER CODE END SysInit */
caa45040 2:b834786c903e 87
caa45040 2:b834786c903e 88 /* Initialize all configured peripherals */
caa45040 2:b834786c903e 89 MX_GPIO_Init();
caa45040 2:b834786c903e 90 MX_USART2_UART_Init();
caa45040 2:b834786c903e 91 /* USER CODE BEGIN 2 */
caa45040 2:b834786c903e 92
caa45040 2:b834786c903e 93 /* USER CODE END 2 */
caa45040 2:b834786c903e 94
caa45040 2:b834786c903e 95 /* Infinite loop */
caa45040 2:b834786c903e 96 /* USER CODE BEGIN WHILE */
caa45040 2:b834786c903e 97 while (1)
caa45040 2:b834786c903e 98 {
caa45040 2:b834786c903e 99 /* USER CODE END WHILE */
caa45040 2:b834786c903e 100
caa45040 2:b834786c903e 101 HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_SET);
caa45040 2:b834786c903e 102
caa45040 2:b834786c903e 103 HAL_Delay(1000);
caa45040 2:b834786c903e 104
caa45040 2:b834786c903e 105 HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_RESET);
caa45040 2:b834786c903e 106
caa45040 2:b834786c903e 107 HAL_Delay(1000);
caa45040 2:b834786c903e 108
caa45040 2:b834786c903e 109 /* USER CODE BEGIN 3 */
caa45040 2:b834786c903e 110 }
caa45040 2:b834786c903e 111 /* USER CODE END 3 */
caa45040 2:b834786c903e 112 }
caa45040 2:b834786c903e 113
caa45040 2:b834786c903e 114 /**
caa45040 2:b834786c903e 115 * @brief System Clock Configuration
caa45040 2:b834786c903e 116 * @retval None
caa45040 2:b834786c903e 117 */
caa45040 2:b834786c903e 118 void SystemClock_Config(void)
caa45040 2:b834786c903e 119 {
caa45040 2:b834786c903e 120 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
caa45040 2:b834786c903e 121 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
caa45040 2:b834786c903e 122 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
caa45040 2:b834786c903e 123
caa45040 2:b834786c903e 124 /** Configure the main internal regulator output voltage
caa45040 2:b834786c903e 125 */
caa45040 2:b834786c903e 126 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
caa45040 2:b834786c903e 127 /** Initializes the RCC Oscillators according to the specified parameters
caa45040 2:b834786c903e 128 * in the RCC_OscInitTypeDef structure.
caa45040 2:b834786c903e 129 */
caa45040 2:b834786c903e 130 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
caa45040 2:b834786c903e 131 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
caa45040 2:b834786c903e 132 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
caa45040 2:b834786c903e 133 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
caa45040 2:b834786c903e 134 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
caa45040 2:b834786c903e 135 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_4;
caa45040 2:b834786c903e 136 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
caa45040 2:b834786c903e 137 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
caa45040 2:b834786c903e 138 {
caa45040 2:b834786c903e 139 Error_Handler();
caa45040 2:b834786c903e 140 }
caa45040 2:b834786c903e 141 /** Initializes the CPU, AHB and APB buses clocks
caa45040 2:b834786c903e 142 */
caa45040 2:b834786c903e 143 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
caa45040 2:b834786c903e 144 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
caa45040 2:b834786c903e 145 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
caa45040 2:b834786c903e 146 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
caa45040 2:b834786c903e 147 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
caa45040 2:b834786c903e 148 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
caa45040 2:b834786c903e 149
caa45040 2:b834786c903e 150 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
caa45040 2:b834786c903e 151 {
caa45040 2:b834786c903e 152 Error_Handler();
caa45040 2:b834786c903e 153 }
caa45040 2:b834786c903e 154 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
caa45040 2:b834786c903e 155 PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
caa45040 2:b834786c903e 156 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
caa45040 2:b834786c903e 157 {
caa45040 2:b834786c903e 158 Error_Handler();
caa45040 2:b834786c903e 159 }
caa45040 2:b834786c903e 160 }
caa45040 2:b834786c903e 161
caa45040 2:b834786c903e 162 /**
caa45040 2:b834786c903e 163 * @brief USART2 Initialization Function
caa45040 2:b834786c903e 164 * @param None
caa45040 2:b834786c903e 165 * @retval None
caa45040 2:b834786c903e 166 */
caa45040 2:b834786c903e 167 static void MX_USART2_UART_Init(void)
caa45040 2:b834786c903e 168 {
caa45040 2:b834786c903e 169
caa45040 2:b834786c903e 170 /* USER CODE BEGIN USART2_Init 0 */
caa45040 2:b834786c903e 171
caa45040 2:b834786c903e 172 /* USER CODE END USART2_Init 0 */
caa45040 2:b834786c903e 173
caa45040 2:b834786c903e 174 /* USER CODE BEGIN USART2_Init 1 */
caa45040 2:b834786c903e 175
caa45040 2:b834786c903e 176 /* USER CODE END USART2_Init 1 */
caa45040 2:b834786c903e 177 huart2.Instance = USART2;
caa45040 2:b834786c903e 178 huart2.Init.BaudRate = 115200;
caa45040 2:b834786c903e 179 huart2.Init.WordLength = UART_WORDLENGTH_8B;
caa45040 2:b834786c903e 180 huart2.Init.StopBits = UART_STOPBITS_1;
caa45040 2:b834786c903e 181 huart2.Init.Parity = UART_PARITY_NONE;
caa45040 2:b834786c903e 182 huart2.Init.Mode = UART_MODE_TX_RX;
caa45040 2:b834786c903e 183 huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
caa45040 2:b834786c903e 184 huart2.Init.OverSampling = UART_OVERSAMPLING_16;
caa45040 2:b834786c903e 185 huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
caa45040 2:b834786c903e 186 huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
caa45040 2:b834786c903e 187 if (HAL_UART_Init(&huart2) != HAL_OK)
caa45040 2:b834786c903e 188 {
caa45040 2:b834786c903e 189 Error_Handler();
caa45040 2:b834786c903e 190 }
caa45040 2:b834786c903e 191 /* USER CODE BEGIN USART2_Init 2 */
caa45040 2:b834786c903e 192
caa45040 2:b834786c903e 193 /* USER CODE END USART2_Init 2 */
caa45040 2:b834786c903e 194
caa45040 2:b834786c903e 195 }
caa45040 2:b834786c903e 196
caa45040 2:b834786c903e 197 /**
caa45040 2:b834786c903e 198 * @brief GPIO Initialization Function
caa45040 2:b834786c903e 199 * @param None
caa45040 2:b834786c903e 200 * @retval None
caa45040 2:b834786c903e 201 */
caa45040 2:b834786c903e 202 static void MX_GPIO_Init(void)
caa45040 2:b834786c903e 203 {
caa45040 2:b834786c903e 204 GPIO_InitTypeDef GPIO_InitStruct = {0};
caa45040 2:b834786c903e 205
caa45040 2:b834786c903e 206 /* GPIO Ports Clock Enable */
caa45040 2:b834786c903e 207 __HAL_RCC_GPIOC_CLK_ENABLE();
caa45040 2:b834786c903e 208 __HAL_RCC_GPIOA_CLK_ENABLE();
caa45040 2:b834786c903e 209 __HAL_RCC_GPIOB_CLK_ENABLE();
caa45040 2:b834786c903e 210
caa45040 2:b834786c903e 211 /*Configure GPIO pin Output Level */
caa45040 2:b834786c903e 212 HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_RESET);
caa45040 2:b834786c903e 213
caa45040 2:b834786c903e 214 /*Configure GPIO pin : LD3_Pin */
caa45040 2:b834786c903e 215 GPIO_InitStruct.Pin = LD3_Pin;
caa45040 2:b834786c903e 216 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
caa45040 2:b834786c903e 217 GPIO_InitStruct.Pull = GPIO_NOPULL;
caa45040 2:b834786c903e 218 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
caa45040 2:b834786c903e 219 HAL_GPIO_Init(LD3_GPIO_Port, &GPIO_InitStruct);
caa45040 2:b834786c903e 220
caa45040 2:b834786c903e 221 }
caa45040 2:b834786c903e 222
caa45040 2:b834786c903e 223 /* USER CODE BEGIN 4 */
caa45040 2:b834786c903e 224
caa45040 2:b834786c903e 225 /* USER CODE END 4 */
caa45040 2:b834786c903e 226
caa45040 2:b834786c903e 227 /**
caa45040 2:b834786c903e 228 * @brief This function is executed in case of error occurrence.
caa45040 2:b834786c903e 229 * @retval None
caa45040 2:b834786c903e 230 */
caa45040 2:b834786c903e 231 void Error_Handler(void)
caa45040 2:b834786c903e 232 {
caa45040 2:b834786c903e 233 /* USER CODE BEGIN Error_Handler_Debug */
caa45040 2:b834786c903e 234 /* User can add his own implementation to report the HAL error return state */
caa45040 2:b834786c903e 235 __disable_irq();
caa45040 2:b834786c903e 236 while (1)
caa45040 2:b834786c903e 237 {
caa45040 2:b834786c903e 238 }
caa45040 2:b834786c903e 239 /* USER CODE END Error_Handler_Debug */
caa45040 2:b834786c903e 240 }
caa45040 2:b834786c903e 241
caa45040 2:b834786c903e 242 #ifdef USE_FULL_ASSERT
caa45040 2:b834786c903e 243 /**
caa45040 2:b834786c903e 244 * @brief Reports the name of the source file and the source line number
caa45040 2:b834786c903e 245 * where the assert_param error has occurred.
caa45040 2:b834786c903e 246 * @param file: pointer to the source file name
caa45040 2:b834786c903e 247 * @param line: assert_param error line source number
caa45040 2:b834786c903e 248 * @retval None
caa45040 2:b834786c903e 249 */
caa45040 2:b834786c903e 250 void assert_failed(uint8_t *file, uint32_t line)
caa45040 2:b834786c903e 251 {
caa45040 2:b834786c903e 252 /* USER CODE BEGIN 6 */
caa45040 2:b834786c903e 253 /* User can add his own implementation to report the file name and line number,
caa45040 2:b834786c903e 254 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
caa45040 2:b834786c903e 255 /* USER CODE END 6 */
caa45040 2:b834786c903e 256 }
caa45040 2:b834786c903e 257 #endif /* USE_FULL_ASSERT */
caa45040 2:b834786c903e 258
caa45040 2:b834786c903e 259 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
caa45040 2:b834786c903e 260