keniti akiba / Mbed 2 deprecated f303_h_p1

f303_h_p1 1

Dependencies:   mbed

stm32g031_lpusrt1_1/main.c@13:3defea0d9a9e, 2021-11-28 (annotated)

Committer:
caa45040
Date:
Sun Nov 28 01:28:50 2021 +0000
Revision:
13:3defea0d9a9e
stm32g031_lpusrt1_1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
caa45040 13:3defea0d9a9e 1 /* USER CODE BEGIN Header */
caa45040 13:3defea0d9a9e 2 /**
caa45040 13:3defea0d9a9e 3 ******************************************************************************
caa45040 13:3defea0d9a9e 4 * @file : main.c
caa45040 13:3defea0d9a9e 5 * @brief : Main program body
caa45040 13:3defea0d9a9e 6 ******************************************************************************
caa45040 13:3defea0d9a9e 7 * @attention
caa45040 13:3defea0d9a9e 8 *
caa45040 13:3defea0d9a9e 9 * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
caa45040 13:3defea0d9a9e 10 * All rights reserved.</center></h2>
caa45040 13:3defea0d9a9e 11 *
caa45040 13:3defea0d9a9e 12 * This software component is licensed by ST under BSD 3-Clause license,
caa45040 13:3defea0d9a9e 13 * the "License"; You may not use this file except in compliance with the
caa45040 13:3defea0d9a9e 14 * License. You may obtain a copy of the License at:
caa45040 13:3defea0d9a9e 15 * opensource.org/licenses/BSD-3-Clause
caa45040 13:3defea0d9a9e 16 *
caa45040 13:3defea0d9a9e 17 ******************************************************************************
caa45040 13:3defea0d9a9e 18 */
caa45040 13:3defea0d9a9e 19 /* USER CODE END Header */
caa45040 13:3defea0d9a9e 20 /* Includes ------------------------------------------------------------------*/
caa45040 13:3defea0d9a9e 21 #include "main.h"
caa45040 13:3defea0d9a9e 22
caa45040 13:3defea0d9a9e 23 /* Private includes ----------------------------------------------------------*/
caa45040 13:3defea0d9a9e 24 /* USER CODE BEGIN Includes */
caa45040 13:3defea0d9a9e 25
caa45040 13:3defea0d9a9e 26 /* USER CODE END Includes */
caa45040 13:3defea0d9a9e 27
caa45040 13:3defea0d9a9e 28 /* Private typedef -----------------------------------------------------------*/
caa45040 13:3defea0d9a9e 29 /* USER CODE BEGIN PTD */
caa45040 13:3defea0d9a9e 30
caa45040 13:3defea0d9a9e 31 /* USER CODE END PTD */
caa45040 13:3defea0d9a9e 32
caa45040 13:3defea0d9a9e 33 /* Private define ------------------------------------------------------------*/
caa45040 13:3defea0d9a9e 34 /* USER CODE BEGIN PD */
caa45040 13:3defea0d9a9e 35 /* USER CODE END PD */
caa45040 13:3defea0d9a9e 36
caa45040 13:3defea0d9a9e 37 /* Private macro -------------------------------------------------------------*/
caa45040 13:3defea0d9a9e 38 /* USER CODE BEGIN PM */
caa45040 13:3defea0d9a9e 39
caa45040 13:3defea0d9a9e 40 /* USER CODE END PM */
caa45040 13:3defea0d9a9e 41
caa45040 13:3defea0d9a9e 42 /* Private variables ---------------------------------------------------------*/
caa45040 13:3defea0d9a9e 43 UART_HandleTypeDef hlpuart1;
caa45040 13:3defea0d9a9e 44
caa45040 13:3defea0d9a9e 45 /* USER CODE BEGIN PV */
caa45040 13:3defea0d9a9e 46
caa45040 13:3defea0d9a9e 47 /* USER CODE END PV */
caa45040 13:3defea0d9a9e 48
caa45040 13:3defea0d9a9e 49 /* Private function prototypes -----------------------------------------------*/
caa45040 13:3defea0d9a9e 50 void SystemClock_Config(void);
caa45040 13:3defea0d9a9e 51 static void MX_GPIO_Init(void);
caa45040 13:3defea0d9a9e 52 static void MX_LPUART1_UART_Init(void);
caa45040 13:3defea0d9a9e 53 /* USER CODE BEGIN PFP */
caa45040 13:3defea0d9a9e 54
caa45040 13:3defea0d9a9e 55 /* USER CODE END PFP */
caa45040 13:3defea0d9a9e 56
caa45040 13:3defea0d9a9e 57 /* Private user code ---------------------------------------------------------*/
caa45040 13:3defea0d9a9e 58 /* USER CODE BEGIN 0 */
caa45040 13:3defea0d9a9e 59
caa45040 13:3defea0d9a9e 60 /* USER CODE END 0 */
caa45040 13:3defea0d9a9e 61
caa45040 13:3defea0d9a9e 62 /**
caa45040 13:3defea0d9a9e 63 * @brief The application entry point.
caa45040 13:3defea0d9a9e 64 * @retval int
caa45040 13:3defea0d9a9e 65 */
caa45040 13:3defea0d9a9e 66 int main(void)
caa45040 13:3defea0d9a9e 67 {
caa45040 13:3defea0d9a9e 68 /* USER CODE BEGIN 1 */
caa45040 13:3defea0d9a9e 69
caa45040 13:3defea0d9a9e 70 /* USER CODE END 1 */
caa45040 13:3defea0d9a9e 71
caa45040 13:3defea0d9a9e 72 /* MCU Configuration--------------------------------------------------------*/
caa45040 13:3defea0d9a9e 73
caa45040 13:3defea0d9a9e 74 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
caa45040 13:3defea0d9a9e 75 HAL_Init();
caa45040 13:3defea0d9a9e 76
caa45040 13:3defea0d9a9e 77 /* USER CODE BEGIN Init */
caa45040 13:3defea0d9a9e 78
caa45040 13:3defea0d9a9e 79 /* USER CODE END Init */
caa45040 13:3defea0d9a9e 80
caa45040 13:3defea0d9a9e 81 /* Configure the system clock */
caa45040 13:3defea0d9a9e 82 SystemClock_Config();
caa45040 13:3defea0d9a9e 83
caa45040 13:3defea0d9a9e 84 /* USER CODE BEGIN SysInit */
caa45040 13:3defea0d9a9e 85
caa45040 13:3defea0d9a9e 86 /* USER CODE END SysInit */
caa45040 13:3defea0d9a9e 87
caa45040 13:3defea0d9a9e 88 /* Initialize all configured peripherals */
caa45040 13:3defea0d9a9e 89 MX_GPIO_Init();
caa45040 13:3defea0d9a9e 90 MX_LPUART1_UART_Init();
caa45040 13:3defea0d9a9e 91 /* USER CODE BEGIN 2 */
caa45040 13:3defea0d9a9e 92
caa45040 13:3defea0d9a9e 93 /* USER CODE END 2 */
caa45040 13:3defea0d9a9e 94
caa45040 13:3defea0d9a9e 95 /* Infinite loop */
caa45040 13:3defea0d9a9e 96 /* USER CODE BEGIN WHILE */
caa45040 13:3defea0d9a9e 97 while (1)
caa45040 13:3defea0d9a9e 98 {
caa45040 13:3defea0d9a9e 99 /* USER CODE END WHILE */
caa45040 13:3defea0d9a9e 100
caa45040 13:3defea0d9a9e 101 HAL_UART_Transmit(&hlpuart1, (uint8_t *)"hello world\r\n", 13, 10);
caa45040 13:3defea0d9a9e 102
caa45040 13:3defea0d9a9e 103 //HAL_Delay(500);
caa45040 13:3defea0d9a9e 104
caa45040 13:3defea0d9a9e 105
caa45040 13:3defea0d9a9e 106
caa45040 13:3defea0d9a9e 107
caa45040 13:3defea0d9a9e 108
caa45040 13:3defea0d9a9e 109
caa45040 13:3defea0d9a9e 110 HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_SET);
caa45040 13:3defea0d9a9e 111 HAL_Delay(500);
caa45040 13:3defea0d9a9e 112
caa45040 13:3defea0d9a9e 113 HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET);
caa45040 13:3defea0d9a9e 114 HAL_Delay(500);
caa45040 13:3defea0d9a9e 115
caa45040 13:3defea0d9a9e 116
caa45040 13:3defea0d9a9e 117
caa45040 13:3defea0d9a9e 118
caa45040 13:3defea0d9a9e 119 /* USER CODE BEGIN 3 */
caa45040 13:3defea0d9a9e 120 }
caa45040 13:3defea0d9a9e 121 /* USER CODE END 3 */
caa45040 13:3defea0d9a9e 122 }
caa45040 13:3defea0d9a9e 123
caa45040 13:3defea0d9a9e 124 /**
caa45040 13:3defea0d9a9e 125 * @brief System Clock Configuration
caa45040 13:3defea0d9a9e 126 * @retval None
caa45040 13:3defea0d9a9e 127 */
caa45040 13:3defea0d9a9e 128 void SystemClock_Config(void)
caa45040 13:3defea0d9a9e 129 {
caa45040 13:3defea0d9a9e 130 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
caa45040 13:3defea0d9a9e 131 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
caa45040 13:3defea0d9a9e 132 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
caa45040 13:3defea0d9a9e 133
caa45040 13:3defea0d9a9e 134 /** Configure the main internal regulator output voltage
caa45040 13:3defea0d9a9e 135 */
caa45040 13:3defea0d9a9e 136 HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
caa45040 13:3defea0d9a9e 137 /** Initializes the RCC Oscillators according to the specified parameters
caa45040 13:3defea0d9a9e 138 * in the RCC_OscInitTypeDef structure.
caa45040 13:3defea0d9a9e 139 */
caa45040 13:3defea0d9a9e 140 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
caa45040 13:3defea0d9a9e 141 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
caa45040 13:3defea0d9a9e 142 RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
caa45040 13:3defea0d9a9e 143 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
caa45040 13:3defea0d9a9e 144 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
caa45040 13:3defea0d9a9e 145 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
caa45040 13:3defea0d9a9e 146 {
caa45040 13:3defea0d9a9e 147 Error_Handler();
caa45040 13:3defea0d9a9e 148 }
caa45040 13:3defea0d9a9e 149 /** Initializes the CPU, AHB and APB buses clocks
caa45040 13:3defea0d9a9e 150 */
caa45040 13:3defea0d9a9e 151 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
caa45040 13:3defea0d9a9e 152 |RCC_CLOCKTYPE_PCLK1;
caa45040 13:3defea0d9a9e 153 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
caa45040 13:3defea0d9a9e 154 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
caa45040 13:3defea0d9a9e 155 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
caa45040 13:3defea0d9a9e 156
caa45040 13:3defea0d9a9e 157 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
caa45040 13:3defea0d9a9e 158 {
caa45040 13:3defea0d9a9e 159 Error_Handler();
caa45040 13:3defea0d9a9e 160 }
caa45040 13:3defea0d9a9e 161 /** Initializes the peripherals clocks
caa45040 13:3defea0d9a9e 162 */
caa45040 13:3defea0d9a9e 163 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
caa45040 13:3defea0d9a9e 164 PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
caa45040 13:3defea0d9a9e 165 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
caa45040 13:3defea0d9a9e 166 {
caa45040 13:3defea0d9a9e 167 Error_Handler();
caa45040 13:3defea0d9a9e 168 }
caa45040 13:3defea0d9a9e 169 }
caa45040 13:3defea0d9a9e 170
caa45040 13:3defea0d9a9e 171 /**
caa45040 13:3defea0d9a9e 172 * @brief LPUART1 Initialization Function
caa45040 13:3defea0d9a9e 173 * @param None
caa45040 13:3defea0d9a9e 174 * @retval None
caa45040 13:3defea0d9a9e 175 */
caa45040 13:3defea0d9a9e 176 static void MX_LPUART1_UART_Init(void)
caa45040 13:3defea0d9a9e 177 {
caa45040 13:3defea0d9a9e 178
caa45040 13:3defea0d9a9e 179 /* USER CODE BEGIN LPUART1_Init 0 */
caa45040 13:3defea0d9a9e 180
caa45040 13:3defea0d9a9e 181 /* USER CODE END LPUART1_Init 0 */
caa45040 13:3defea0d9a9e 182
caa45040 13:3defea0d9a9e 183 /* USER CODE BEGIN LPUART1_Init 1 */
caa45040 13:3defea0d9a9e 184
caa45040 13:3defea0d9a9e 185 /* USER CODE END LPUART1_Init 1 */
caa45040 13:3defea0d9a9e 186 hlpuart1.Instance = LPUART1;
caa45040 13:3defea0d9a9e 187 hlpuart1.Init.BaudRate = 209700;
caa45040 13:3defea0d9a9e 188 hlpuart1.Init.WordLength = UART_WORDLENGTH_7B;
caa45040 13:3defea0d9a9e 189 hlpuart1.Init.StopBits = UART_STOPBITS_1;
caa45040 13:3defea0d9a9e 190 hlpuart1.Init.Parity = UART_PARITY_NONE;
caa45040 13:3defea0d9a9e 191 hlpuart1.Init.Mode = UART_MODE_TX_RX;
caa45040 13:3defea0d9a9e 192 hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
caa45040 13:3defea0d9a9e 193 hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
caa45040 13:3defea0d9a9e 194 hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
caa45040 13:3defea0d9a9e 195 hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
caa45040 13:3defea0d9a9e 196 hlpuart1.FifoMode = UART_FIFOMODE_DISABLE;
caa45040 13:3defea0d9a9e 197 if (HAL_HalfDuplex_Init(&hlpuart1) != HAL_OK)
caa45040 13:3defea0d9a9e 198 {
caa45040 13:3defea0d9a9e 199 Error_Handler();
caa45040 13:3defea0d9a9e 200 }
caa45040 13:3defea0d9a9e 201 if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
caa45040 13:3defea0d9a9e 202 {
caa45040 13:3defea0d9a9e 203 Error_Handler();
caa45040 13:3defea0d9a9e 204 }
caa45040 13:3defea0d9a9e 205 if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
caa45040 13:3defea0d9a9e 206 {
caa45040 13:3defea0d9a9e 207 Error_Handler();
caa45040 13:3defea0d9a9e 208 }
caa45040 13:3defea0d9a9e 209 if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK)
caa45040 13:3defea0d9a9e 210 {
caa45040 13:3defea0d9a9e 211 Error_Handler();
caa45040 13:3defea0d9a9e 212 }
caa45040 13:3defea0d9a9e 213 /* USER CODE BEGIN LPUART1_Init 2 */
caa45040 13:3defea0d9a9e 214
caa45040 13:3defea0d9a9e 215 /* USER CODE END LPUART1_Init 2 */
caa45040 13:3defea0d9a9e 216
caa45040 13:3defea0d9a9e 217 }
caa45040 13:3defea0d9a9e 218
caa45040 13:3defea0d9a9e 219 /**
caa45040 13:3defea0d9a9e 220 * @brief GPIO Initialization Function
caa45040 13:3defea0d9a9e 221 * @param None
caa45040 13:3defea0d9a9e 222 * @retval None
caa45040 13:3defea0d9a9e 223 */
caa45040 13:3defea0d9a9e 224 static void MX_GPIO_Init(void)
caa45040 13:3defea0d9a9e 225 {
caa45040 13:3defea0d9a9e 226 GPIO_InitTypeDef GPIO_InitStruct = {0};
caa45040 13:3defea0d9a9e 227
caa45040 13:3defea0d9a9e 228 /* GPIO Ports Clock Enable */
caa45040 13:3defea0d9a9e 229 __HAL_RCC_GPIOA_CLK_ENABLE();
caa45040 13:3defea0d9a9e 230
caa45040 13:3defea0d9a9e 231 /*Configure GPIO pin Output Level */
caa45040 13:3defea0d9a9e 232 HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET);
caa45040 13:3defea0d9a9e 233
caa45040 13:3defea0d9a9e 234 /*Configure GPIO pin : LD2_Pin */
caa45040 13:3defea0d9a9e 235 GPIO_InitStruct.Pin = LD2_Pin;
caa45040 13:3defea0d9a9e 236 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
caa45040 13:3defea0d9a9e 237 GPIO_InitStruct.Pull = GPIO_NOPULL;
caa45040 13:3defea0d9a9e 238 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
caa45040 13:3defea0d9a9e 239 HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
caa45040 13:3defea0d9a9e 240
caa45040 13:3defea0d9a9e 241 }
caa45040 13:3defea0d9a9e 242
caa45040 13:3defea0d9a9e 243 /* USER CODE BEGIN 4 */
caa45040 13:3defea0d9a9e 244
caa45040 13:3defea0d9a9e 245 /* USER CODE END 4 */
caa45040 13:3defea0d9a9e 246
caa45040 13:3defea0d9a9e 247 /**
caa45040 13:3defea0d9a9e 248 * @brief This function is executed in case of error occurrence.
caa45040 13:3defea0d9a9e 249 * @retval None
caa45040 13:3defea0d9a9e 250 */
caa45040 13:3defea0d9a9e 251 void Error_Handler(void)
caa45040 13:3defea0d9a9e 252 {
caa45040 13:3defea0d9a9e 253 /* USER CODE BEGIN Error_Handler_Debug */
caa45040 13:3defea0d9a9e 254 /* User can add his own implementation to report the HAL error return state */
caa45040 13:3defea0d9a9e 255 __disable_irq();
caa45040 13:3defea0d9a9e 256 while (1)
caa45040 13:3defea0d9a9e 257 {
caa45040 13:3defea0d9a9e 258 }
caa45040 13:3defea0d9a9e 259 /* USER CODE END Error_Handler_Debug */
caa45040 13:3defea0d9a9e 260 }
caa45040 13:3defea0d9a9e 261
caa45040 13:3defea0d9a9e 262 #ifdef USE_FULL_ASSERT
caa45040 13:3defea0d9a9e 263 /**
caa45040 13:3defea0d9a9e 264 * @brief Reports the name of the source file and the source line number
caa45040 13:3defea0d9a9e 265 * where the assert_param error has occurred.
caa45040 13:3defea0d9a9e 266 * @param file: pointer to the source file name
caa45040 13:3defea0d9a9e 267 * @param line: assert_param error line source number
caa45040 13:3defea0d9a9e 268 * @retval None
caa45040 13:3defea0d9a9e 269 */
caa45040 13:3defea0d9a9e 270 void assert_failed(uint8_t *file, uint32_t line)
caa45040 13:3defea0d9a9e 271 {
caa45040 13:3defea0d9a9e 272 /* USER CODE BEGIN 6 */
caa45040 13:3defea0d9a9e 273 /* User can add his own implementation to report the file name and line number,
caa45040 13:3defea0d9a9e 274 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
caa45040 13:3defea0d9a9e 275 /* USER CODE END 6 */
caa45040 13:3defea0d9a9e 276 }
caa45040 13:3defea0d9a9e 277 #endif /* USE_FULL_ASSERT */
caa45040 13:3defea0d9a9e 278
caa45040 13:3defea0d9a9e 279 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
caa45040 13:3defea0d9a9e 280