Giuseppe Giglio
Added support to TARGET_NUCLEO_L073RZ
Diff: sx1272/sx1272.cpp
- Revision:
- 4:90bd79f1b458
- Parent:
- 3:5baff45eb3c5
- Child:
- 5:e90cbf646eb1
--- a/sx1272/sx1272.cpp Thu Mar 10 10:20:44 2016 +0000
+++ b/sx1272/sx1272.cpp Fri May 13 14:49:34 2016 +0000
@@ -98,19 +98,19 @@
bool SX1272::IsChannelFree( RadioModems_t modem, uint32_t freq, int16_t rssiThresh )
{
int16_t rssi = 0;
-
+
SetModem( modem );
SetChannel( freq );
-
+
SetOpMode( RF_OPMODE_RECEIVER );
wait_ms( 1 );
-
+
rssi = GetRssi( modem );
-
+
Sleep( );
-
+
if( rssi > rssiThresh )
{
return false;
@@ -124,7 +124,7 @@
uint32_t rnd = 0;
/*
- * Radio setup for random number generation
+ * Radio setup for random number generation
*/
// Set LoRa modem ON
SetModem( MODEM_LORA );
@@ -198,7 +198,7 @@
this->settings.Fsk.IqInverted = iqInverted;
this->settings.Fsk.RxContinuous = rxContinuous;
this->settings.Fsk.PreambleLen = preambleLen;
-
+
datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
@@ -208,18 +208,18 @@
Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
-
+
if( fixLen == 1 )
{
Write( REG_PAYLOADLENGTH, payloadLen );
}
else
{
- Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
+ Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
}
Write( REG_PACKETCONFIG1,
- ( Read( REG_PACKETCONFIG1 ) &
+ ( Read( REG_PACKETCONFIG1 ) &
RF_PACKETCONFIG1_CRC_MASK &
RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
@@ -248,7 +248,7 @@
{
datarate = 6;
}
-
+
if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
{
@@ -259,14 +259,14 @@
this->settings.LoRa.LowDatarateOptimize = 0x00;
}
- Write( REG_LR_MODEMCONFIG1,
+ Write( REG_LR_MODEMCONFIG1,
( Read( REG_LR_MODEMCONFIG1 ) &
RFLR_MODEMCONFIG1_BW_MASK &
RFLR_MODEMCONFIG1_CODINGRATE_MASK &
RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
- ( bandwidth << 6 ) | ( coderate << 3 ) |
+ ( bandwidth << 6 ) | ( coderate << 3 ) |
( fixLen << 2 ) | ( crcOn << 1 ) |
this->settings.LoRa.LowDatarateOptimize );
@@ -278,7 +278,7 @@
( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
-
+
Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
@@ -295,11 +295,11 @@
if( datarate == 6 )
{
- Write( REG_LR_DETECTOPTIMIZE,
+ Write( REG_LR_DETECTOPTIMIZE,
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF6 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF6 );
}
else
@@ -308,7 +308,7 @@
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
}
}
@@ -342,17 +342,17 @@
static const uint8_t RfoTable[11] = { 1, 1, 1, 2, 2, 3, 4, 5, 6, 8, 9 };
#endif
-void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
+void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
uint32_t bandwidth, uint32_t datarate,
uint8_t coderate, uint16_t preambleLen,
- bool fixLen, bool crcOn, bool freqHopOn,
+ bool fixLen, bool crcOn, bool freqHopOn,
uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
{
uint8_t paConfig = 0;
uint8_t paDac = 0;
SetModem( modem );
-
+
paConfig = Read( REG_PACONFIG );
paDac = Read( REG_PADAC );
@@ -418,7 +418,6 @@
paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
}
#endif
-
Write( REG_PACONFIG, paConfig );
Write( REG_PADAC, paDac );
@@ -435,7 +434,7 @@
this->settings.Fsk.CrcOn = crcOn;
this->settings.Fsk.IqInverted = iqInverted;
this->settings.Fsk.TxTimeout = timeout;
-
+
fdev = ( uint16_t )( ( double )fdev / ( double )FREQ_STEP );
Write( REG_FDEVMSB, ( uint8_t )( fdev >> 8 ) );
Write( REG_FDEVLSB, ( uint8_t )( fdev & 0xFF ) );
@@ -448,12 +447,12 @@
Write( REG_PREAMBLELSB, preambleLen & 0xFF );
Write( REG_PACKETCONFIG1,
- ( Read( REG_PACKETCONFIG1 ) &
+ ( Read( REG_PACKETCONFIG1 ) &
RF_PACKETCONFIG1_CRC_MASK &
RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
( crcOn << 4 ) );
-
+
}
break;
case MODEM_LORA:
@@ -494,14 +493,14 @@
Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
}
- Write( REG_LR_MODEMCONFIG1,
+ Write( REG_LR_MODEMCONFIG1,
( Read( REG_LR_MODEMCONFIG1 ) &
RFLR_MODEMCONFIG1_BW_MASK &
RFLR_MODEMCONFIG1_CODINGRATE_MASK &
RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
- ( bandwidth << 6 ) | ( coderate << 3 ) |
+ ( bandwidth << 6 ) | ( coderate << 3 ) |
( fixLen << 2 ) | ( crcOn << 1 ) |
this->settings.LoRa.LowDatarateOptimize );
@@ -510,17 +509,17 @@
RFLR_MODEMCONFIG2_SF_MASK ) |
( datarate << 4 ) );
-
+
Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
-
+
if( datarate == 6 )
{
- Write( REG_LR_DETECTOPTIMIZE,
+ Write( REG_LR_DETECTOPTIMIZE,
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF6 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF6 );
}
else
@@ -529,7 +528,7 @@
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
}
}
@@ -584,7 +583,7 @@
( this->settings.LoRa.Coderate + 4 );
double nPayload = 8 + ( ( tmp > 0 ) ? tmp : 0 );
double tPayload = nPayload * ts;
- // Time on air
+ // Time on air
double tOnAir = tPreamble + tPayload;
// return us secs
airTime = floor( tOnAir * 1e6 + 0.999 );
@@ -612,8 +611,8 @@
else
{
Write( REG_PAYLOADLENGTH, size );
- }
-
+ }
+
if( ( size > 0 ) && ( size <= 64 ) )
{
this->settings.FskPacketHandler.ChunkSize = size;
@@ -641,14 +640,14 @@
{
Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
- }
-
+ }
+
this->settings.LoRaPacketHandler.Size = size;
// Initializes the payload size
Write( REG_LR_PAYLOADLENGTH, size );
- // Full buffer used for Tx
+ // Full buffer used for Tx
Write( REG_LR_FIFOTXBASEADDR, 0 );
Write( REG_LR_FIFOADDRPTR, 0 );
@@ -695,7 +694,7 @@
case MODEM_FSK:
{
rxContinuous = this->settings.Fsk.RxContinuous;
-
+
// DIO0=PayloadReady
// DIO1=FifoLevel
// DIO2=SyncAddr
@@ -706,15 +705,18 @@
RF_DIOMAPPING1_DIO1_MASK &
RF_DIOMAPPING1_DIO2_MASK ) |
RF_DIOMAPPING1_DIO0_00 |
+ RF_DIOMAPPING1_DIO1_00 |
RF_DIOMAPPING1_DIO2_11 );
-
+
Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
- RF_DIOMAPPING2_MAP_MASK ) |
+ RF_DIOMAPPING2_MAP_MASK ) |
RF_DIOMAPPING2_DIO4_11 |
RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
-
+
this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
-
+
+ Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
+
this->settings.FskPacketHandler.PreambleDetected = false;
this->settings.FskPacketHandler.SyncWordDetected = false;
this->settings.FskPacketHandler.NbBytes = 0;
@@ -732,10 +734,10 @@
{
Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
- }
-
+ }
+
rxContinuous = this->settings.LoRa.RxContinuous;
-
+
if( this->settings.LoRa.FreqHopOn == true )
{
Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
@@ -746,7 +748,7 @@
RFLR_IRQFLAGS_CADDONE |
//RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=RxDone, DIO2=FhssChangeChannel
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
}
@@ -760,7 +762,7 @@
RFLR_IRQFLAGS_CADDONE |
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=RxDone
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
}
@@ -781,14 +783,14 @@
if( this->settings.Modem == MODEM_FSK )
{
SetOpMode( RF_OPMODE_RECEIVER );
-
+
if( rxContinuous == false )
{
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 );
+ rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ceil( ( 8.0 * ( this->settings.Fsk.PreambleLen +
+ ( ( Read( REG_SYNCCONFIG ) &
+ ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
+ 1.0 ) + 10.0 ) /
+ ( double )this->settings.Fsk.Datarate ) * 1e6 ) + 4000 );
}
}
else
@@ -818,8 +820,9 @@
// DIO4=LowBat
// DIO5=ModeReady
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
- RF_DIOMAPPING1_DIO2_MASK ) |
- RF_DIOMAPPING1_DIO1_01 );
+ RF_DIOMAPPING1_DIO1_MASK &
+ RF_DIOMAPPING1_DIO2_MASK ) |
+ RF_DIOMAPPING1_DIO1_01 );
Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
RF_DIOMAPPING2_MAP_MASK ) );
@@ -838,7 +841,7 @@
RFLR_IRQFLAGS_CADDONE |
//RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=TxDone, DIO2=FhssChangeChannel
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
}
@@ -871,7 +874,7 @@
{
case MODEM_FSK:
{
-
+
}
break;
case MODEM_LORA:
@@ -883,12 +886,12 @@
RFLR_IRQFLAGS_TXDONE |
//RFLR_IRQFLAGS_CADDONE |
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
- //RFLR_IRQFLAGS_CADDETECTED
+ //RFLR_IRQFLAGS_CADDETECTED
);
-
+
// DIO3=CADDone
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
-
+
this->settings.State = RF_CAD;
SetOpMode( RFLR_OPMODE_CAD );
}
@@ -919,27 +922,23 @@
void SX1272::SetOpMode( uint8_t opMode )
{
- if( opMode != currentOpMode )
+ if( opMode == RF_OPMODE_SLEEP )
{
- currentOpMode = opMode;
- if( opMode == RF_OPMODE_SLEEP )
+ SetAntSwLowPower( true );
+ }
+ else
+ {
+ SetAntSwLowPower( false );
+ if( opMode == RF_OPMODE_TRANSMITTER )
{
- SetAntSwLowPower( true );
+ SetAntSw( 1 );
}
else
{
- SetAntSwLowPower( false );
- if( opMode == RF_OPMODE_TRANSMITTER )
- {
- SetAntSw( 1 );
- }
- else
- {
- SetAntSw( 0 );
- }
+ SetAntSw( 0 );
}
- Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
}
+ Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
}
void SX1272::SetModem( RadioModems_t modem )
@@ -1001,7 +1000,7 @@
this->settings.FskPacketHandler.Size = 0;
// Clear Irqs
- Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
+ Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
RF_IRQFLAGS1_PREAMBLEDETECT |
RF_IRQFLAGS1_SYNCADDRESSMATCH );
Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
@@ -1010,6 +1009,11 @@
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ceil( ( 8.0 * ( this->settings.Fsk.PreambleLen +
+ ( ( Read( REG_SYNCCONFIG ) &
+ ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
+ 1.0 ) + 10.0 ) /
+ ( double )this->settings.Fsk.Datarate ) * 1e6 ) + 4000 );
}
else
{
@@ -1039,7 +1043,7 @@
volatile uint8_t irqFlags = 0;
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
//TimerStop( &RxTimeoutTimer );
// RxDone interrupt
@@ -1052,27 +1056,30 @@
if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
{
// Clear Irqs
- Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
+ Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
RF_IRQFLAGS1_PREAMBLEDETECT |
RF_IRQFLAGS1_SYNCADDRESSMATCH );
Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
-
+
+ rxTimeoutTimer.detach( );
+
if( this->settings.Fsk.RxContinuous == false )
{
+ rxTimeoutSyncWord.detach( );
this->settings.State = RF_IDLE;
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 ) ;
}
else
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ceil( ( 8.0 * ( this->settings.Fsk.PreambleLen +
+ ( ( Read( REG_SYNCCONFIG ) &
+ ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
+ 1.0 ) + 10.0 ) /
+ ( double )this->settings.Fsk.Datarate ) * 1e6 ) + 4000 );
}
- rxTimeoutTimer.detach( );
-
+
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
{
this->RadioEvents->RxError( );
@@ -1105,26 +1112,28 @@
this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
}
+ rxTimeoutTimer.detach( );
+
if( this->settings.Fsk.RxContinuous == false )
{
this->settings.State = RF_IDLE;
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 ) ;
+ rxTimeoutSyncWord.detach( );
}
else
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ceil( ( 8.0 * ( this->settings.Fsk.PreambleLen +
+ ( ( Read( REG_SYNCCONFIG ) &
+ ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
+ 1.0 ) + 10.0 ) /
+ ( double )this->settings.Fsk.Datarate ) * 1e6 ) + 4000 );
}
- rxTimeoutTimer.detach( );
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
{
- this->RadioEvents->RxDone( rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );
- }
+ this->RadioEvents->RxDone( rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );
+ }
this->settings.FskPacketHandler.PreambleDetected = false;
this->settings.FskPacketHandler.SyncWordDetected = false;
this->settings.FskPacketHandler.NbBytes = 0;
@@ -1176,13 +1185,13 @@
snr;
}
else
- {
+ {
this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 );
}
this->settings.LoRaPacketHandler.Size = Read( REG_LR_RXNBBYTES );
ReadFifo( rxtxBuffer, this->settings.LoRaPacketHandler.Size );
-
+
if( this->settings.LoRa.RxContinuous == false )
{
this->settings.State = RF_IDLE;
@@ -1200,7 +1209,7 @@
}
break;
case RF_TX_RUNNING:
- txTimeoutTimer.detach( );
+ txTimeoutTimer.detach( );
// TxDone interrupt
switch( this->settings.Modem )
{
@@ -1214,7 +1223,7 @@
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxDone != NULL ) )
{
this->RadioEvents->TxDone( );
- }
+ }
break;
}
break;
@@ -1226,7 +1235,7 @@
void SX1272::OnDio1Irq( void )
{
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
switch( this->settings.Modem )
{
@@ -1273,13 +1282,13 @@
switch( this->settings.Modem )
{
case MODEM_FSK:
- // FifoLevel interrupt
+ // FifoEmpty interrupt
if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.ChunkSize )
{
WriteFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.ChunkSize );
this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
}
- else
+ else
{
// Write the last chunk of data
WriteFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
@@ -1300,7 +1309,7 @@
void SX1272::OnDio2Irq( void )
{
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
switch( this->settings.Modem )
{
@@ -1308,9 +1317,9 @@
if( ( this->settings.FskPacketHandler.PreambleDetected == true ) && ( this->settings.FskPacketHandler.SyncWordDetected == false ) )
{
rxTimeoutSyncWord.detach( );
-
+
this->settings.FskPacketHandler.SyncWordDetected = true;
-
+
this->settings.FskPacketHandler.RssiValue = -( Read( REG_RSSIVALUE ) >> 1 );
this->settings.FskPacketHandler.AfcValue = ( int32_t )( double )( ( ( uint16_t )Read( REG_AFCMSB ) << 8 ) |
@@ -1324,7 +1333,7 @@
{
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
-
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
{
this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
@@ -1345,7 +1354,7 @@
{
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
-
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
{
this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
@@ -1378,7 +1387,7 @@
}
}
else
- {
+ {
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
@@ -1401,7 +1410,7 @@
if( this->settings.FskPacketHandler.PreambleDetected == false )
{
this->settings.FskPacketHandler.PreambleDetected = true;
- }
+ }
}
break;
case MODEM_LORA: