Diff: i2c_mbed_fpga.cpp

Revision:

11:b86aea372744

Parent:

10:a8390614edcc

Child:

12:9f8c7f4da5f6

--- a/i2c_mbed_fpga.cpp	Fri Feb 26 10:16:32 2021 +0000
+++ b/i2c_mbed_fpga.cpp	Wed Mar 03 14:55:01 2021 +0000
@@ -250,6 +250,29 @@
     return ack; 
 }
 
+/** i2c to clean the I2C controller settins
+*/
+int i2c_mbed_fpga::i2c_clear_spd_ctrl(){
+    int ack = 0;
+    nv_spd_control_1_val = 0;
+    nv_spd_control_2_val = 0;
+    char i2cMessage[4];
+    *(i2cMessage+0) = (char)(NVADDR_NV_SPD_CTRL_1 >> 8)& 0xff;
+    *(i2cMessage+1) = (char)(NVADDR_NV_SPD_CTRL_1 >> 0)& 0xff;
+    *(i2cMessage+2) = (char)(nv_spd_control_1_val >> 8)& 0xff;
+    *(i2cMessage+3) = (char)(nv_spd_control_1_val >> 0)& 0xff;  
+    ack += i2c_word_safe_write(i2cMessage);
+    
+    *(i2cMessage+0) = (char)(NVADDR_NV_SPD_CTRL_2 >> 8)& 0xff;
+    *(i2cMessage+1) = (char)(NVADDR_NV_SPD_CTRL_2 >> 0)& 0xff;
+    *(i2cMessage+2) = (char)(nv_spd_control_2_val >> 8)& 0xff;
+    *(i2cMessage+3) = (char)(nv_spd_control_2_val >> 0)& 0xff;  
+    ack += i2c_word_safe_write(i2cMessage);
+    
+    return ack; 
+}
+
+
 /** i2c to set the open loop mode
 */
 int i2c_mbed_fpga::i2c_set_loop_mode(unsigned int openloop){
@@ -266,6 +289,54 @@
     return ack; 
 }
 
+/** i2c to set the speed curve type
+*/
+int i2c_mbed_fpga::i2c_set_curve_type(unsigned int curvetype){
+    int ack = 0;
+    nv_spd_control_1_val &= ~NV_CURVE_MODE_MASK;
+    nv_spd_control_1_val |= curvetype << NV_CURVE_MODE_OFFSET;
+    char i2cMessage[4];
+    *(i2cMessage+0) = (char)(NVADDR_NV_SPD_CTRL_1 >> 8)& 0xff;
+    *(i2cMessage+1) = (char)(NVADDR_NV_SPD_CTRL_1 >> 0)& 0xff;
+    *(i2cMessage+2) = (char)(nv_spd_control_1_val >> 8)& 0xff;
+    *(i2cMessage+3) = (char)(nv_spd_control_1_val >> 0)& 0xff;  
+    ack += i2c_word_safe_write(i2cMessage);
+    
+    return ack; 
+}
+
+/** i2c to set the open dc ini
+*/
+int i2c_mbed_fpga::i2c_set_dc_ini(unsigned int ini){
+    int ack = 0;
+    nv_spd_control_2_val &= ~NV_DC_OPENLOOP_INI_MASK;
+    nv_spd_control_2_val |= ini << NV_DC_OPENLOOP_INI_OFFSET;
+    char i2cMessage[4];
+    *(i2cMessage+0) = (char)(NVADDR_NV_SPD_CTRL_2 >> 8)& 0xff;
+    *(i2cMessage+1) = (char)(NVADDR_NV_SPD_CTRL_2 >> 0)& 0xff;
+    *(i2cMessage+2) = (char)(nv_spd_control_2_val >> 8)& 0xff;
+    *(i2cMessage+3) = (char)(nv_spd_control_2_val >> 0)& 0xff;  
+    ack += i2c_word_safe_write(i2cMessage);
+    
+    return ack; 
+}
+
+/** i2c to set the open dc slew rate
+*/
+int i2c_mbed_fpga::i2c_set_dc_sr(unsigned int sr){
+    int ack = 0;
+    nv_spd_control_2_val &= ~NV_DC_OPENLOOP_SR_MASK;
+    nv_spd_control_2_val |= sr << NV_DC_OPENLOOP_SR_OFFSET;
+    char i2cMessage[4];
+    *(i2cMessage+0) = (char)(NVADDR_NV_SPD_CTRL_2 >> 8)& 0xff;
+    *(i2cMessage+1) = (char)(NVADDR_NV_SPD_CTRL_2 >> 0)& 0xff;
+    *(i2cMessage+2) = (char)(nv_spd_control_2_val >> 8)& 0xff;
+    *(i2cMessage+3) = (char)(nv_spd_control_2_val >> 0)& 0xff;  
+    ack += i2c_word_safe_write(i2cMessage);
+    
+    return ack; 
+}
+
 /** i2c to set the Single Pulse Start Up (pulse train)
 */
 int i2c_mbed_fpga::i2c_set_open_loop_duty(unsigned int duty){