Ben Willems / Mbed 2 deprecated MLX90418_I2C_master_bwi

Dependencies:   mbed

Committer:
wuliqunyy
Date:
Fri May 21 12:42:56 2021 +0000
Revision:
16:a0bfe33f8a4a
Parent:
15:83bbc18cccbc
Child:
17:5b17c9dc85b2
CLIM is working

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wuliqunyy 0:fe3c7dde9771 1 #include "mbed.h"
wuliqunyy 5:daab0e0e67e2 2 #include "main_init.h"
wuliqunyy 6:019ab407ac3c 3 #include "i2c_mbed_fpga.h"
wuliqunyy 16:a0bfe33f8a4a 4 #include "uart_mbed.h"
wuliqunyy 0:fe3c7dde9771 5
wuliqunyy 16:a0bfe33f8a4a 6 #define RAM_END_ADDR 0x4B
wuliqunyy 16:a0bfe33f8a4a 7
wuliqunyy 16:a0bfe33f8a4a 8 #define CLIM_LEVEL 0x1F
wuliqunyy 16:a0bfe33f8a4a 9 // I_LIM (A) = 4A * CLIM_LEVEL/127
wuliqunyy 0:fe3c7dde9771 10
wuliqunyy 0:fe3c7dde9771 11 /* Main function */
wuliqunyy 0:fe3c7dde9771 12 int main() {
wuliqunyy 16:a0bfe33f8a4a 13 char i2cBuffer[3];
wuliqunyy 16:a0bfe33f8a4a 14 char i2cTestPassFlag = 0;
wuliqunyy 16:a0bfe33f8a4a 15 char i2cRamDumpFlag = 0;
wuliqunyy 6:019ab407ac3c 16
wuliqunyy 6:019ab407ac3c 17 /*init funcitons*/
wuliqunyy 5:daab0e0e67e2 18 i2c_mbed_fpga i2c;
wuliqunyy 6:019ab407ac3c 19 main_init(); /*reset the FPGA!*/
wuliqunyy 3:557d5725b1bb 20
wuliqunyy 6:019ab407ac3c 21 /*control codes*/
wuliqunyy 14:062850afdf38 22 wait_ms(2000); /* keep FPGA in reset for 5s, to let motor stop*/
wuliqunyy 14:062850afdf38 23 enbale_fpga(); /* enable FPGA */
wuliqunyy 16:a0bfe33f8a4a 24 wait_ms(40);
wuliqunyy 16:a0bfe33f8a4a 25 i2c.i2c_config_mode_entry();
wuliqunyy 14:062850afdf38 26 wait_ms(1);
wuliqunyy 14:062850afdf38 27 i2c.i2c_clear_spd_ctrl();
wuliqunyy 14:062850afdf38 28 wait_ms(1);
wuliqunyy 15:83bbc18cccbc 29 i2c.i2c_set_comm_i_thres(0x0fff,1); //note, 0fff is -1 signed
wuliqunyy 14:062850afdf38 30 wait_ms(1);
wuliqunyy 14:062850afdf38 31 i2c.i2c_set_comm_di_thres(0,1);
wuliqunyy 14:062850afdf38 32 wait_ms(1);
wuliqunyy 14:062850afdf38 33 i2c.i2c_set_fall_time_blank(4);
wuliqunyy 14:062850afdf38 34 wait_ms(1);
wuliqunyy 13:1faffc2dc651 35 i2c.i2c_set_50k_pwm(1);
wuliqunyy 14:062850afdf38 36 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 37 i2c.i2c_set_position_pulse_width(2,5); /*unsigned int mantisaa_2b, unsigned int exponent_3b*/
wuliqunyy 14:062850afdf38 38 wait_ms(1);
wuliqunyy 12:9f8c7f4da5f6 39 // i2c.i2c_set_position_duty(3);
wuliqunyy 12:9f8c7f4da5f6 40 // wait_ms(10);
wuliqunyy 12:9f8c7f4da5f6 41 // i2c.i2c_set_position_anti_cog(0);
wuliqunyy 12:9f8c7f4da5f6 42 // wait_ms(10);
wuliqunyy 12:9f8c7f4da5f6 43 // i2c.i2c_set_start_up_duty(3);
wuliqunyy 12:9f8c7f4da5f6 44 // wait_ms(10);
wuliqunyy 12:9f8c7f4da5f6 45 i2c.i2c_set_start_up_pulse_width(3,5); /*(unsigned int mantisaa_3b, unsigned int exponent_3b*/
wuliqunyy 14:062850afdf38 46 wait_ms(1);
wuliqunyy 12:9f8c7f4da5f6 47 // i2c.i2c_set_start_up_num_comm(3);
wuliqunyy 12:9f8c7f4da5f6 48 // wait_ms(10);
wuliqunyy 12:9f8c7f4da5f6 49 // //led4 = i2c.i2c_set_soft_start_up(1, 1, 0, 1, 1);
wuliqunyy 12:9f8c7f4da5f6 50 // wait_ms(10);
wuliqunyy 12:9f8c7f4da5f6 51 // i2c.i2c_clear_spd_ctrl();
wuliqunyy 14:062850afdf38 52 wait_ms(1);
wuliqunyy 14:062850afdf38 53 i2c.i2c_set_loop_mode(0);
wuliqunyy 14:062850afdf38 54 wait_ms(1);
wuliqunyy 14:062850afdf38 55 i2c.i2c_set_curve_type(3);
wuliqunyy 14:062850afdf38 56 wait_ms(1);
wuliqunyy 14:062850afdf38 57 i2c.i2c_set_dc_ini(2);
wuliqunyy 14:062850afdf38 58 wait_ms(1);
wuliqunyy 14:062850afdf38 59 i2c.i2c_set_dc_sr(0);
wuliqunyy 14:062850afdf38 60 wait_ms(1);
wuliqunyy 12:9f8c7f4da5f6 61 i2c.i2c_set_rough_gain(0);
wuliqunyy 14:062850afdf38 62 wait_ms(1);
wuliqunyy 14:062850afdf38 63 i2c.i2c_set_ehp_reg_gain(0);
wuliqunyy 14:062850afdf38 64 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 65 i2c.i2c_set_clim_start_up(CLIM_LEVEL);
wuliqunyy 16:a0bfe33f8a4a 66 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 67 i2c.i2c_set_clim_brake(CLIM_LEVEL);
wuliqunyy 16:a0bfe33f8a4a 68 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 69 i2c.i2c_set_clim_run_time(CLIM_LEVEL);
wuliqunyy 16:a0bfe33f8a4a 70 wait_ms(1);
wuliqunyy 15:83bbc18cccbc 71 i2c.i2c_skip_app_copy();
wuliqunyy 15:83bbc18cccbc 72 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 73
wuliqunyy 16:a0bfe33f8a4a 74 if(i2cRamDumpFlag == 1){
wuliqunyy 16:a0bfe33f8a4a 75 /*dump calibration data start*/
wuliqunyy 16:a0bfe33f8a4a 76 i2c.i2c_mlx_mode_entry();
wuliqunyy 16:a0bfe33f8a4a 77 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 78 *(i2cBuffer+0) = (char)(I2C_STATUS)& 0xff;
wuliqunyy 16:a0bfe33f8a4a 79 i2c.i2c_word_read(i2cBuffer);
wuliqunyy 16:a0bfe33f8a4a 80 uart_print(i2cBuffer);
wuliqunyy 16:a0bfe33f8a4a 81
wuliqunyy 16:a0bfe33f8a4a 82 if( i2cBuffer[2] == 0xC0 ){
wuliqunyy 16:a0bfe33f8a4a 83 uart_I2C_test_pass();
wuliqunyy 16:a0bfe33f8a4a 84 i2cTestPassFlag = 1;
wuliqunyy 16:a0bfe33f8a4a 85 led4 = 0;
wuliqunyy 16:a0bfe33f8a4a 86 }
wuliqunyy 16:a0bfe33f8a4a 87 else {
wuliqunyy 16:a0bfe33f8a4a 88 uart_I2C_test_fail();
wuliqunyy 16:a0bfe33f8a4a 89 i2cTestPassFlag = 0;
wuliqunyy 16:a0bfe33f8a4a 90 led4 = 1;
wuliqunyy 16:a0bfe33f8a4a 91 }
wuliqunyy 16:a0bfe33f8a4a 92
wuliqunyy 16:a0bfe33f8a4a 93 if(i2cTestPassFlag == 1){
wuliqunyy 16:a0bfe33f8a4a 94 char i;
wuliqunyy 16:a0bfe33f8a4a 95 for(i=0;i<=RAM_END_ADDR;i++) {
wuliqunyy 16:a0bfe33f8a4a 96 *(i2cBuffer+0) = i;
wuliqunyy 16:a0bfe33f8a4a 97 i2c.i2c_word_read(i2cBuffer);
wuliqunyy 16:a0bfe33f8a4a 98 uart_print(i2cBuffer);
wuliqunyy 16:a0bfe33f8a4a 99 wait_ms(300);
wuliqunyy 16:a0bfe33f8a4a 100 }
wuliqunyy 16:a0bfe33f8a4a 101 uart_ram_dump_finish();
wuliqunyy 16:a0bfe33f8a4a 102 }
wuliqunyy 16:a0bfe33f8a4a 103 }
wuliqunyy 16:a0bfe33f8a4a 104
wuliqunyy 16:a0bfe33f8a4a 105
wuliqunyy 16:a0bfe33f8a4a 106 wait_ms(1);
wuliqunyy 16:a0bfe33f8a4a 107 i2c.i2c_soft_reset();
wuliqunyy 15:83bbc18cccbc 108 wait_ms(40);
wuliqunyy 15:83bbc18cccbc 109 i2c.i2c_set_open_loop_duty(0xffff);
wuliqunyy 6:019ab407ac3c 110
wuliqunyy 6:019ab407ac3c 111 /*enter infinite loop, motor should be running*/
wuliqunyy 5:daab0e0e67e2 112 while (1) {}
wuliqunyy 0:fe3c7dde9771 113
wuliqunyy 0:fe3c7dde9771 114 }