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i2c_mbed_fpga.h@12:9f8c7f4da5f6, 2021-03-24 (annotated)
- Committer:
- wuliqunyy
- Date:
- Wed Mar 24 14:17:25 2021 +0000
- Revision:
- 12:9f8c7f4da5f6
- Parent:
- 11:b86aea372744
- Child:
- 14:062850afdf38
doe2 version
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
wuliqunyy | 0:fe3c7dde9771 | 1 | #ifndef I2C_MBED_FPGA_H |
wuliqunyy | 0:fe3c7dde9771 | 2 | #define I2C_MBED_FPGA_H |
wuliqunyy | 0:fe3c7dde9771 | 3 | |
wuliqunyy | 6:019ab407ac3c | 4 | #include "nv_bitfield_map.h" |
wuliqunyy | 6:019ab407ac3c | 5 | #include "nv_defines.h" |
wuliqunyy | 6:019ab407ac3c | 6 | #include "nv_defaults.h" |
wuliqunyy | 6:019ab407ac3c | 7 | |
wuliqunyy | 6:019ab407ac3c | 8 | |
wuliqunyy | 6:019ab407ac3c | 9 | #define I2C_SLAVE_ADDR 0x18<<1 |
wuliqunyy | 0:fe3c7dde9771 | 10 | |
wuliqunyy | 5:daab0e0e67e2 | 11 | //Class delclarations |
wuliqunyy | 5:daab0e0e67e2 | 12 | class i2c_mbed_fpga { |
wuliqunyy | 5:daab0e0e67e2 | 13 | |
wuliqunyy | 5:daab0e0e67e2 | 14 | public: |
wuliqunyy | 12:9f8c7f4da5f6 | 15 | /*constructor*/ |
wuliqunyy | 12:9f8c7f4da5f6 | 16 | // {p28:sda, p27:scl} |
wuliqunyy | 12:9f8c7f4da5f6 | 17 | // {p9: sda, p10:scl} |
wuliqunyy | 12:9f8c7f4da5f6 | 18 | i2c_mbed_fpga(): i2c_master(p28, p27){ |
wuliqunyy | 12:9f8c7f4da5f6 | 19 | i2c_master.frequency(70000); |
wuliqunyy | 12:9f8c7f4da5f6 | 20 | nv_positin_val = NV_POSITION_DEFAULT; |
wuliqunyy | 6:019ab407ac3c | 21 | nv_start_up_val = NV_START_UP_DEFAULT; |
wuliqunyy | 9:76a0b9f29a2d | 22 | nv_wind_brake_val = NV_WIND_BRAKE_DEFAULT; |
wuliqunyy | 10:a8390614edcc | 23 | ram_open_duty_val = RAM_OPEN_DUTY_DEFAULT; |
wuliqunyy | 11:b86aea372744 | 24 | nv_spd_control_1_val = NV_SPD_CONTROL_1_DEFAULT; |
wuliqunyy | 12:9f8c7f4da5f6 | 25 | nv_spd_control_2_val = NV_SPD_CONTROL_1_DEFAULT; |
wuliqunyy | 12:9f8c7f4da5f6 | 26 | nv_gen_ctrl_val = NV_GEN_CTRL_DEFAULT; |
wuliqunyy | 12:9f8c7f4da5f6 | 27 | nv_comm_ctrl_val = NV_COMM_CTRL_DEFAULT; |
wuliqunyy | 5:daab0e0e67e2 | 28 | }; |
wuliqunyy | 6:019ab407ac3c | 29 | |
wuliqunyy | 6:019ab407ac3c | 30 | int i2c_word_read(char *word); |
wuliqunyy | 12:9f8c7f4da5f6 | 31 | int i2c_word_read_by_byte(char *word); |
wuliqunyy | 5:daab0e0e67e2 | 32 | int i2c_word_write(char *word); |
wuliqunyy | 12:9f8c7f4da5f6 | 33 | int i2c_word_write_by_byte(char *word); |
wuliqunyy | 6:019ab407ac3c | 34 | int i2c_word_safe_write(char *word); |
wuliqunyy | 6:019ab407ac3c | 35 | |
wuliqunyy | 5:daab0e0e67e2 | 36 | int i2c_window_open(); |
wuliqunyy | 5:daab0e0e67e2 | 37 | int i2c_motor_start(); |
wuliqunyy | 5:daab0e0e67e2 | 38 | |
wuliqunyy | 12:9f8c7f4da5f6 | 39 | int i2c_set_50k_pwm(unsigned int pwm50k); |
wuliqunyy | 12:9f8c7f4da5f6 | 40 | |
wuliqunyy | 6:019ab407ac3c | 41 | int i2c_set_position_pulse_width(unsigned int manstisa_2b, unsigned int exponenet_3b); |
wuliqunyy | 6:019ab407ac3c | 42 | int i2c_set_position_duty(unsigned int duty_2b); |
wuliqunyy | 6:019ab407ac3c | 43 | int i2c_set_position_maj_vote(unsigned int maj_1b); |
wuliqunyy | 6:019ab407ac3c | 44 | int i2c_set_position_anti_cog(unsigned int cog_1b); |
wuliqunyy | 6:019ab407ac3c | 45 | |
wuliqunyy | 6:019ab407ac3c | 46 | int i2c_set_start_up_pulse_width(unsigned int mantisaa_3b, unsigned int exponent_3b); |
wuliqunyy | 6:019ab407ac3c | 47 | int i2c_set_start_up_duty(unsigned int duty_2b); |
wuliqunyy | 6:019ab407ac3c | 48 | int i2c_set_start_up_num_comm(unsigned int comm); |
wuliqunyy | 6:019ab407ac3c | 49 | int i2c_set_soft_start_up(unsigned int enbale, unsigned int mantisaa_3b, unsigned int exponent_3b, unsigned int step_size, unsigned int num_steps); |
wuliqunyy | 6:019ab407ac3c | 50 | int i2c_set_high_torque_start_up(unsigned int enbale, unsigned int mantisaa_3b, unsigned int exponent_3b); |
wuliqunyy | 6:019ab407ac3c | 51 | int i2c_set_single_pulse_start_up(unsigned int enbale, unsigned int mantisaa_3b, unsigned int exponent_3b); |
wuliqunyy | 12:9f8c7f4da5f6 | 52 | |
wuliqunyy | 12:9f8c7f4da5f6 | 53 | int i2c_set_rough_gain(unsigned int rough_gain); |
wuliqunyy | 12:9f8c7f4da5f6 | 54 | int i2c_set_comm_i_thres(unsigned int i_thr_low, unsigned int i_thr_high); |
wuliqunyy | 12:9f8c7f4da5f6 | 55 | int i2c_set_comm_di_thres(unsigned int di_1st, unsigned int di_2nd); |
wuliqunyy | 12:9f8c7f4da5f6 | 56 | |
wuliqunyy | 12:9f8c7f4da5f6 | 57 | |
wuliqunyy | 11:b86aea372744 | 58 | int i2c_clear_spd_ctrl(); |
wuliqunyy | 9:76a0b9f29a2d | 59 | int i2c_set_loop_mode(unsigned int openloop); |
wuliqunyy | 11:b86aea372744 | 60 | int i2c_set_curve_type(unsigned int curvetype); |
wuliqunyy | 11:b86aea372744 | 61 | int i2c_set_dc_ini(unsigned int ini); |
wuliqunyy | 11:b86aea372744 | 62 | int i2c_set_dc_sr(unsigned int sr); |
wuliqunyy | 9:76a0b9f29a2d | 63 | int i2c_set_open_loop_duty(unsigned int duty); |
wuliqunyy | 6:019ab407ac3c | 64 | |
wuliqunyy | 5:daab0e0e67e2 | 65 | private: |
wuliqunyy | 5:daab0e0e67e2 | 66 | I2C i2c_master; |
wuliqunyy | 6:019ab407ac3c | 67 | unsigned int nv_positin_val; |
wuliqunyy | 6:019ab407ac3c | 68 | unsigned int nv_start_up_val; |
wuliqunyy | 6:019ab407ac3c | 69 | unsigned int nv_wind_brake_val; |
wuliqunyy | 9:76a0b9f29a2d | 70 | unsigned int nv_spd_control_1_val; |
wuliqunyy | 11:b86aea372744 | 71 | unsigned int nv_spd_control_2_val; |
wuliqunyy | 9:76a0b9f29a2d | 72 | unsigned int ram_open_duty_val; |
wuliqunyy | 12:9f8c7f4da5f6 | 73 | unsigned int nv_gen_ctrl_val; |
wuliqunyy | 12:9f8c7f4da5f6 | 74 | unsigned int nv_comm_ctrl_val; |
wuliqunyy | 9:76a0b9f29a2d | 75 | |
wuliqunyy | 6:019ab407ac3c | 76 | |
wuliqunyy | 6:019ab407ac3c | 77 | //Position Detection Task/Functions |
wuliqunyy | 5:daab0e0e67e2 | 78 | }; |
wuliqunyy | 5:daab0e0e67e2 | 79 | |
wuliqunyy | 0:fe3c7dde9771 | 80 | |
wuliqunyy | 0:fe3c7dde9771 | 81 | #endif |