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Dependencies:   FastPWM3 mbed

PreferenceWriter/stm32f4xx_flash.c@83:eb3704d4943f, 2017-03-11 (annotated)

Committer:
bwang
Date:
Sat Mar 11 08:51:04 2017 +0000
Revision:
83:eb3704d4943f
Parent:
FlashWriter/stm32f4xx_flash.c@82:5e741c5ffd9f 
more structural changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 82:5e741c5ffd9f 1 /**
bwang 82:5e741c5ffd9f 2 ******************************************************************************
bwang 82:5e741c5ffd9f 3 * @file stm32f4xx_flash.c
bwang 82:5e741c5ffd9f 4 * @author MCD Application Team
bwang 82:5e741c5ffd9f 5 * @version V1.7.1
bwang 82:5e741c5ffd9f 6 * @date 20-May-2016
bwang 82:5e741c5ffd9f 7 * @brief This file provides firmware functions to manage the following
bwang 82:5e741c5ffd9f 8 * functionalities of the FLASH peripheral:
bwang 82:5e741c5ffd9f 9 * + FLASH Interface configuration
bwang 82:5e741c5ffd9f 10 * + FLASH Memory Programming
bwang 82:5e741c5ffd9f 11 * + Option Bytes Programming
bwang 82:5e741c5ffd9f 12 * + Interrupts and flags management
bwang 82:5e741c5ffd9f 13 *
bwang 82:5e741c5ffd9f 14 @verbatim
bwang 82:5e741c5ffd9f 15 ===============================================================================
bwang 82:5e741c5ffd9f 16 ##### How to use this driver #####
bwang 82:5e741c5ffd9f 17 ===============================================================================
bwang 82:5e741c5ffd9f 18 [..]
bwang 82:5e741c5ffd9f 19 This driver provides functions to configure and program the FLASH memory
bwang 82:5e741c5ffd9f 20 of all STM32F4xx devices. These functions are split in 4 groups:
bwang 82:5e741c5ffd9f 21
bwang 82:5e741c5ffd9f 22 (#) FLASH Interface configuration functions: this group includes the
bwang 82:5e741c5ffd9f 23 management of the following features:
bwang 82:5e741c5ffd9f 24 (++) Set the latency
bwang 82:5e741c5ffd9f 25 (++) Enable/Disable the prefetch buffer
bwang 82:5e741c5ffd9f 26 (++) Enable/Disable the Instruction cache and the Data cache
bwang 82:5e741c5ffd9f 27 (++) Reset the Instruction cache and the Data cache
bwang 82:5e741c5ffd9f 28
bwang 82:5e741c5ffd9f 29 (#) FLASH Memory Programming functions: this group includes all needed
bwang 82:5e741c5ffd9f 30 functions to erase and program the main memory:
bwang 82:5e741c5ffd9f 31 (++) Lock and Unlock the FLASH interface
bwang 82:5e741c5ffd9f 32 (++) Erase function: Erase sector, erase all sectors
bwang 82:5e741c5ffd9f 33 (++) Program functions: byte, half word, word and double word
bwang 82:5e741c5ffd9f 34
bwang 82:5e741c5ffd9f 35 (#) Option Bytes Programming functions: this group includes all needed
bwang 82:5e741c5ffd9f 36 functions to manage the Option Bytes:
bwang 82:5e741c5ffd9f 37 (++) Set/Reset the write protection
bwang 82:5e741c5ffd9f 38 (++) Set the Read protection Level
bwang 82:5e741c5ffd9f 39 (++) Set the BOR level
bwang 82:5e741c5ffd9f 40 (++) Program the user Option Bytes
bwang 82:5e741c5ffd9f 41 (++) Launch the Option Bytes loader
bwang 82:5e741c5ffd9f 42
bwang 82:5e741c5ffd9f 43 (#) Interrupts and flags management functions: this group
bwang 82:5e741c5ffd9f 44 includes all needed functions to:
bwang 82:5e741c5ffd9f 45 (++) Enable/Disable the FLASH interrupt sources
bwang 82:5e741c5ffd9f 46 (++) Get flags status
bwang 82:5e741c5ffd9f 47 (++) Clear flags
bwang 82:5e741c5ffd9f 48 (++) Get FLASH operation status
bwang 82:5e741c5ffd9f 49 (++) Wait for last FLASH operation
bwang 82:5e741c5ffd9f 50 @endverbatim
bwang 82:5e741c5ffd9f 51 ******************************************************************************
bwang 82:5e741c5ffd9f 52 * @attention
bwang 82:5e741c5ffd9f 53 *
bwang 82:5e741c5ffd9f 54 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
bwang 82:5e741c5ffd9f 55 *
bwang 82:5e741c5ffd9f 56 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
bwang 82:5e741c5ffd9f 57 * You may not use this file except in compliance with the License.
bwang 82:5e741c5ffd9f 58 * You may obtain a copy of the License at:
bwang 82:5e741c5ffd9f 59 *
bwang 82:5e741c5ffd9f 60 * http://www.st.com/software_license_agreement_liberty_v2
bwang 82:5e741c5ffd9f 61 *
bwang 82:5e741c5ffd9f 62 * Unless required by applicable law or agreed to in writing, software
bwang 82:5e741c5ffd9f 63 * distributed under the License is distributed on an "AS IS" BASIS,
bwang 82:5e741c5ffd9f 64 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bwang 82:5e741c5ffd9f 65 * See the License for the specific language governing permissions and
bwang 82:5e741c5ffd9f 66 * limitations under the License.
bwang 82:5e741c5ffd9f 67 *
bwang 82:5e741c5ffd9f 68 ******************************************************************************
bwang 82:5e741c5ffd9f 69 */
bwang 82:5e741c5ffd9f 70
bwang 82:5e741c5ffd9f 71 /* Includes ------------------------------------------------------------------*/
bwang 82:5e741c5ffd9f 72 #include "stm32f4xx_flash.h"
bwang 82:5e741c5ffd9f 73
bwang 82:5e741c5ffd9f 74 /** @addtogroup STM32F4xx_StdPeriph_Driver
bwang 82:5e741c5ffd9f 75 * @{
bwang 82:5e741c5ffd9f 76 */
bwang 82:5e741c5ffd9f 77
bwang 82:5e741c5ffd9f 78 /** @defgroup FLASH
bwang 82:5e741c5ffd9f 79 * @brief FLASH driver modules
bwang 82:5e741c5ffd9f 80 * @{
bwang 82:5e741c5ffd9f 81 */
bwang 82:5e741c5ffd9f 82
bwang 82:5e741c5ffd9f 83 /* Private typedef -----------------------------------------------------------*/
bwang 82:5e741c5ffd9f 84 /* Private define ------------------------------------------------------------*/
bwang 82:5e741c5ffd9f 85 #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
bwang 82:5e741c5ffd9f 86
bwang 82:5e741c5ffd9f 87 /* Private macro -------------------------------------------------------------*/
bwang 82:5e741c5ffd9f 88 /* Private variables ---------------------------------------------------------*/
bwang 82:5e741c5ffd9f 89 /* Private function prototypes -----------------------------------------------*/
bwang 82:5e741c5ffd9f 90 /* Private functions ---------------------------------------------------------*/
bwang 82:5e741c5ffd9f 91
bwang 82:5e741c5ffd9f 92 /** @defgroup FLASH_Private_Functions
bwang 82:5e741c5ffd9f 93 * @{
bwang 82:5e741c5ffd9f 94 */
bwang 82:5e741c5ffd9f 95
bwang 82:5e741c5ffd9f 96 /** @defgroup FLASH_Group1 FLASH Interface configuration functions
bwang 82:5e741c5ffd9f 97 * @brief FLASH Interface configuration functions
bwang 82:5e741c5ffd9f 98 *
bwang 82:5e741c5ffd9f 99
bwang 82:5e741c5ffd9f 100 @verbatim
bwang 82:5e741c5ffd9f 101 ===============================================================================
bwang 82:5e741c5ffd9f 102 ##### FLASH Interface configuration functions #####
bwang 82:5e741c5ffd9f 103 ===============================================================================
bwang 82:5e741c5ffd9f 104 [..]
bwang 82:5e741c5ffd9f 105 This group includes the following functions:
bwang 82:5e741c5ffd9f 106 (+) void FLASH_SetLatency(uint32_t FLASH_Latency)
bwang 82:5e741c5ffd9f 107 To correctly read data from FLASH memory, the number of wait states (LATENCY)
bwang 82:5e741c5ffd9f 108 must be correctly programmed according to the frequency of the CPU clock
bwang 82:5e741c5ffd9f 109 (HCLK) and the supply voltage of the device.
bwang 82:5e741c5ffd9f 110 [..]
bwang 82:5e741c5ffd9f 111 For STM32F405xx/07xx and STM32F415xx/17xx devices
bwang 82:5e741c5ffd9f 112 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 113 | Latency | HCLK clock frequency (MHz) |
bwang 82:5e741c5ffd9f 114 | |---------------------------------------------------------------------|
bwang 82:5e741c5ffd9f 115 | | voltage range | voltage range | voltage range | voltage range |
bwang 82:5e741c5ffd9f 116 | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |
bwang 82:5e741c5ffd9f 117 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 118 |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 |
bwang 82:5e741c5ffd9f 119 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 120 |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 |
bwang 82:5e741c5ffd9f 121 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 122 |2WS(3CPU cycle)|60 < HCLK <= 90 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 |
bwang 82:5e741c5ffd9f 123 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 124 |3WS(4CPU cycle)|90 < HCLK <= 120|72 < HCLK <= 96 |66 < HCLK <= 88 |60 < HCLK <= 80 |
bwang 82:5e741c5ffd9f 125 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 126 |4WS(5CPU cycle)|120< HCLK <= 150|96 < HCLK <= 120|88 < HCLK <= 110 |80 < HCLK <= 100 |
bwang 82:5e741c5ffd9f 127 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 128 |5WS(6CPU cycle)|150< HCLK <= 168|120< HCLK <= 144|110 < HCLK <= 132|100 < HCLK <= 120|
bwang 82:5e741c5ffd9f 129 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 130 |6WS(7CPU cycle)| NA |144< HCLK <= 168|132 < HCLK <= 154|120 < HCLK <= 140|
bwang 82:5e741c5ffd9f 131 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 132 |7WS(8CPU cycle)| NA | NA |154 < HCLK <= 168|140 < HCLK <= 160|
bwang 82:5e741c5ffd9f 133 +---------------|----------------|----------------|-----------------|-----------------+
bwang 82:5e741c5ffd9f 134
bwang 82:5e741c5ffd9f 135 [..]
bwang 82:5e741c5ffd9f 136 For STM32F42xxx/43xxx devices
bwang 82:5e741c5ffd9f 137 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 138 | Latency | HCLK clock frequency (MHz) |
bwang 82:5e741c5ffd9f 139 | |---------------------------------------------------------------------|
bwang 82:5e741c5ffd9f 140 | | voltage range | voltage range | voltage range | voltage range |
bwang 82:5e741c5ffd9f 141 | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |
bwang 82:5e741c5ffd9f 142 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 143 |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 |
bwang 82:5e741c5ffd9f 144 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 145 |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 |
bwang 82:5e741c5ffd9f 146 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 147 |2WS(3CPU cycle)|60 < HCLK <= 90 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 |
bwang 82:5e741c5ffd9f 148 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 149 |3WS(4CPU cycle)|90 < HCLK <= 120|72 < HCLK <= 96 |66 < HCLK <= 88 |60 < HCLK <= 80 |
bwang 82:5e741c5ffd9f 150 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 151 |4WS(5CPU cycle)|120< HCLK <= 150|96 < HCLK <= 120|88 < HCLK <= 110 |80 < HCLK <= 100 |
bwang 82:5e741c5ffd9f 152 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 153 |5WS(6CPU cycle)|120< HCLK <= 180|120< HCLK <= 144|110 < HCLK <= 132|100 < HCLK <= 120|
bwang 82:5e741c5ffd9f 154 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 155 |6WS(7CPU cycle)| NA |144< HCLK <= 168|132 < HCLK <= 154|120 < HCLK <= 140|
bwang 82:5e741c5ffd9f 156 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 157 |7WS(8CPU cycle)| NA |168< HCLK <= 180|154 < HCLK <= 176|140 < HCLK <= 160|
bwang 82:5e741c5ffd9f 158 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 159 |8WS(9CPU cycle)| NA | NA |176 < HCLK <= 180|160 < HCLK <= 168|
bwang 82:5e741c5ffd9f 160 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 161
bwang 82:5e741c5ffd9f 162 [..]
bwang 82:5e741c5ffd9f 163 For STM32F401x devices
bwang 82:5e741c5ffd9f 164 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 165 | Latency | HCLK clock frequency (MHz) |
bwang 82:5e741c5ffd9f 166 | |---------------------------------------------------------------------|
bwang 82:5e741c5ffd9f 167 | | voltage range | voltage range | voltage range | voltage range |
bwang 82:5e741c5ffd9f 168 | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |
bwang 82:5e741c5ffd9f 169 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 170 |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 |
bwang 82:5e741c5ffd9f 171 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 172 |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 |
bwang 82:5e741c5ffd9f 173 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 174 |2WS(3CPU cycle)|60 < HCLK <= 84 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 |
bwang 82:5e741c5ffd9f 175 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 176 |3WS(4CPU cycle)| NA |72 < HCLK <= 84 |66 < HCLK <= 84 |60 < HCLK <= 80 |
bwang 82:5e741c5ffd9f 177 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 178 |4WS(5CPU cycle)| NA | NA | NA |80 < HCLK <= 84 |
bwang 82:5e741c5ffd9f 179 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 180
bwang 82:5e741c5ffd9f 181 [..]
bwang 82:5e741c5ffd9f 182 For STM32F410xx/STM32F411xE devices
bwang 82:5e741c5ffd9f 183 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 184 | Latency | HCLK clock frequency (MHz) |
bwang 82:5e741c5ffd9f 185 | |---------------------------------------------------------------------|
bwang 82:5e741c5ffd9f 186 | | voltage range | voltage range | voltage range | voltage range |
bwang 82:5e741c5ffd9f 187 | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |
bwang 82:5e741c5ffd9f 188 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 189 |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 18 |0 < HCLK <= 16 |
bwang 82:5e741c5ffd9f 190 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 191 |1WS(2CPU cycle)|30 < HCLK <= 64 |24 < HCLK <= 48 |18 < HCLK <= 36 |16 < HCLK <= 32 |
bwang 82:5e741c5ffd9f 192 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 193 |2WS(3CPU cycle)|64 < HCLK <= 90 |48 < HCLK <= 72 |36 < HCLK <= 54 |32 < HCLK <= 48 |
bwang 82:5e741c5ffd9f 194 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 195 |3WS(4CPU cycle)|90 < HCLK <= 100|72 < HCLK <= 96 |54 < HCLK <= 72 |48 < HCLK <= 64 |
bwang 82:5e741c5ffd9f 196 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 197 |4WS(5CPU cycle)| NA |96 < HCLK <= 100|72 < HCLK <= 90 |64 < HCLK <= 80 |
bwang 82:5e741c5ffd9f 198 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 199 |5WS(6CPU cycle)| NA | NA |90 < HCLK <= 100 |80 < HCLK <= 96 |
bwang 82:5e741c5ffd9f 200 |---------------|----------------|----------------|-----------------|-----------------|
bwang 82:5e741c5ffd9f 201 |6WS(7CPU cycle)| NA | NA | NA |96 < HCLK <= 100 |
bwang 82:5e741c5ffd9f 202 +-------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 203
bwang 82:5e741c5ffd9f 204 [..]
bwang 82:5e741c5ffd9f 205 +-------------------------------------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 206 | | voltage range | voltage range | voltage range | voltage range | voltage range 2.7 V - 3.6 V |
bwang 82:5e741c5ffd9f 207 | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | with External Vpp = 9V |
bwang 82:5e741c5ffd9f 208 |---------------|----------------|----------------|-----------------|-----------------|-----------------------------|
bwang 82:5e741c5ffd9f 209 |Max Parallelism| x32 | x16 | x8 | x64 |
bwang 82:5e741c5ffd9f 210 |---------------|----------------|----------------|-----------------|-----------------|-----------------------------|
bwang 82:5e741c5ffd9f 211 |PSIZE[1:0] | 10 | 01 | 00 | 11 |
bwang 82:5e741c5ffd9f 212 +-------------------------------------------------------------------------------------------------------------------+
bwang 82:5e741c5ffd9f 213
bwang 82:5e741c5ffd9f 214 -@- On STM32F405xx/407xx and STM32F415xx/417xx devices:
bwang 82:5e741c5ffd9f 215 (++) when VOS = '0' Scale 2 mode, the maximum value of fHCLK = 144MHz.
bwang 82:5e741c5ffd9f 216 (++) when VOS = '1' Scale 1 mode, the maximum value of fHCLK = 168MHz.
bwang 82:5e741c5ffd9f 217 [..]
bwang 82:5e741c5ffd9f 218 On STM32F42xxx/43xxx devices:
bwang 82:5e741c5ffd9f 219 (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 120MHz.
bwang 82:5e741c5ffd9f 220 (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 144MHz if OverDrive OFF and 168MHz if OverDrive ON.
bwang 82:5e741c5ffd9f 221 (++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 168MHz if OverDrive OFF and 180MHz if OverDrive ON.
bwang 82:5e741c5ffd9f 222 [..]
bwang 82:5e741c5ffd9f 223 On STM32F401x devices:
bwang 82:5e741c5ffd9f 224 (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 60MHz.
bwang 82:5e741c5ffd9f 225 (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
bwang 82:5e741c5ffd9f 226 [..]
bwang 82:5e741c5ffd9f 227 On STM32F410xx/STM32F411xE devices:
bwang 82:5e741c5ffd9f 228 (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 64MHz.
bwang 82:5e741c5ffd9f 229 (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
bwang 82:5e741c5ffd9f 230 (++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 100MHz.
bwang 82:5e741c5ffd9f 231
bwang 82:5e741c5ffd9f 232 For more details please refer product DataSheet
bwang 82:5e741c5ffd9f 233 You can use PWR_MainRegulatorModeConfig() function to control VOS bits.
bwang 82:5e741c5ffd9f 234
bwang 82:5e741c5ffd9f 235 (+) void FLASH_PrefetchBufferCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 236 (+) void FLASH_InstructionCacheCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 237 (+) void FLASH_DataCacheCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 238 (+) void FLASH_InstructionCacheReset(void)
bwang 82:5e741c5ffd9f 239 (+) void FLASH_DataCacheReset(void)
bwang 82:5e741c5ffd9f 240
bwang 82:5e741c5ffd9f 241 [..]
bwang 82:5e741c5ffd9f 242 The unlock sequence is not needed for these functions.
bwang 82:5e741c5ffd9f 243
bwang 82:5e741c5ffd9f 244 @endverbatim
bwang 82:5e741c5ffd9f 245 * @{
bwang 82:5e741c5ffd9f 246 */
bwang 82:5e741c5ffd9f 247
bwang 82:5e741c5ffd9f 248 /**
bwang 82:5e741c5ffd9f 249 * @brief Sets the code latency value.
bwang 82:5e741c5ffd9f 250 * @param FLASH_Latency: specifies the FLASH Latency value.
bwang 82:5e741c5ffd9f 251 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 252 * @arg FLASH_Latency_0: FLASH Zero Latency cycle
bwang 82:5e741c5ffd9f 253 * @arg FLASH_Latency_1: FLASH One Latency cycle
bwang 82:5e741c5ffd9f 254 * @arg FLASH_Latency_2: FLASH Two Latency cycles
bwang 82:5e741c5ffd9f 255 * @arg FLASH_Latency_3: FLASH Three Latency cycles
bwang 82:5e741c5ffd9f 256 * @arg FLASH_Latency_4: FLASH Four Latency cycles
bwang 82:5e741c5ffd9f 257 * @arg FLASH_Latency_5: FLASH Five Latency cycles
bwang 82:5e741c5ffd9f 258 * @arg FLASH_Latency_6: FLASH Six Latency cycles
bwang 82:5e741c5ffd9f 259 * @arg FLASH_Latency_7: FLASH Seven Latency cycles
bwang 82:5e741c5ffd9f 260 * @arg FLASH_Latency_8: FLASH Eight Latency cycles
bwang 82:5e741c5ffd9f 261 * @arg FLASH_Latency_9: FLASH Nine Latency cycles
bwang 82:5e741c5ffd9f 262 * @arg FLASH_Latency_10: FLASH Teen Latency cycles
bwang 82:5e741c5ffd9f 263 * @arg FLASH_Latency_11: FLASH Eleven Latency cycles
bwang 82:5e741c5ffd9f 264 * @arg FLASH_Latency_12: FLASH Twelve Latency cycles
bwang 82:5e741c5ffd9f 265 * @arg FLASH_Latency_13: FLASH Thirteen Latency cycles
bwang 82:5e741c5ffd9f 266 * @arg FLASH_Latency_14: FLASH Fourteen Latency cycles
bwang 82:5e741c5ffd9f 267 * @arg FLASH_Latency_15: FLASH Fifteen Latency cycles
bwang 82:5e741c5ffd9f 268 *
bwang 82:5e741c5ffd9f 269 * @note For STM32F405xx/407xx, STM32F415xx/417xx, STM32F401xx/411xE and STM32F412xG devices
bwang 82:5e741c5ffd9f 270 * this parameter can be a value between FLASH_Latency_0 and FLASH_Latency_7.
bwang 82:5e741c5ffd9f 271 *
bwang 82:5e741c5ffd9f 272 * @note For STM32F42xxx/43xxx devices this parameter can be a value between
bwang 82:5e741c5ffd9f 273 * FLASH_Latency_0 and FLASH_Latency_15.
bwang 82:5e741c5ffd9f 274 *
bwang 82:5e741c5ffd9f 275 * @retval None
bwang 82:5e741c5ffd9f 276 */
bwang 82:5e741c5ffd9f 277 void FLASH_SetLatency(uint32_t FLASH_Latency)
bwang 82:5e741c5ffd9f 278 {
bwang 82:5e741c5ffd9f 279 /* Check the parameters */
bwang 82:5e741c5ffd9f 280 assert_param(IS_FLASH_LATENCY(FLASH_Latency));
bwang 82:5e741c5ffd9f 281
bwang 82:5e741c5ffd9f 282 /* Perform Byte access to FLASH_ACR[8:0] to set the Latency value */
bwang 82:5e741c5ffd9f 283 *(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)FLASH_Latency;
bwang 82:5e741c5ffd9f 284 }
bwang 82:5e741c5ffd9f 285
bwang 82:5e741c5ffd9f 286 /**
bwang 82:5e741c5ffd9f 287 * @brief Enables or disables the Prefetch Buffer.
bwang 82:5e741c5ffd9f 288 * @param NewState: new state of the Prefetch Buffer.
bwang 82:5e741c5ffd9f 289 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 290 * @retval None
bwang 82:5e741c5ffd9f 291 */
bwang 82:5e741c5ffd9f 292 void FLASH_PrefetchBufferCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 293 {
bwang 82:5e741c5ffd9f 294 /* Check the parameters */
bwang 82:5e741c5ffd9f 295 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 296
bwang 82:5e741c5ffd9f 297 /* Enable or disable the Prefetch Buffer */
bwang 82:5e741c5ffd9f 298 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 299 {
bwang 82:5e741c5ffd9f 300 FLASH->ACR |= FLASH_ACR_PRFTEN;
bwang 82:5e741c5ffd9f 301 }
bwang 82:5e741c5ffd9f 302 else
bwang 82:5e741c5ffd9f 303 {
bwang 82:5e741c5ffd9f 304 FLASH->ACR &= (~FLASH_ACR_PRFTEN);
bwang 82:5e741c5ffd9f 305 }
bwang 82:5e741c5ffd9f 306 }
bwang 82:5e741c5ffd9f 307
bwang 82:5e741c5ffd9f 308 /**
bwang 82:5e741c5ffd9f 309 * @brief Enables or disables the Instruction Cache feature.
bwang 82:5e741c5ffd9f 310 * @param NewState: new state of the Instruction Cache.
bwang 82:5e741c5ffd9f 311 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 312 * @retval None
bwang 82:5e741c5ffd9f 313 */
bwang 82:5e741c5ffd9f 314 void FLASH_InstructionCacheCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 315 {
bwang 82:5e741c5ffd9f 316 /* Check the parameters */
bwang 82:5e741c5ffd9f 317 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 318
bwang 82:5e741c5ffd9f 319 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 320 {
bwang 82:5e741c5ffd9f 321 FLASH->ACR |= FLASH_ACR_ICEN;
bwang 82:5e741c5ffd9f 322 }
bwang 82:5e741c5ffd9f 323 else
bwang 82:5e741c5ffd9f 324 {
bwang 82:5e741c5ffd9f 325 FLASH->ACR &= (~FLASH_ACR_ICEN);
bwang 82:5e741c5ffd9f 326 }
bwang 82:5e741c5ffd9f 327 }
bwang 82:5e741c5ffd9f 328
bwang 82:5e741c5ffd9f 329 /**
bwang 82:5e741c5ffd9f 330 * @brief Enables or disables the Data Cache feature.
bwang 82:5e741c5ffd9f 331 * @param NewState: new state of the Data Cache.
bwang 82:5e741c5ffd9f 332 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 333 * @retval None
bwang 82:5e741c5ffd9f 334 */
bwang 82:5e741c5ffd9f 335 void FLASH_DataCacheCmd(FunctionalState NewState)
bwang 82:5e741c5ffd9f 336 {
bwang 82:5e741c5ffd9f 337 /* Check the parameters */
bwang 82:5e741c5ffd9f 338 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 339
bwang 82:5e741c5ffd9f 340 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 341 {
bwang 82:5e741c5ffd9f 342 FLASH->ACR |= FLASH_ACR_DCEN;
bwang 82:5e741c5ffd9f 343 }
bwang 82:5e741c5ffd9f 344 else
bwang 82:5e741c5ffd9f 345 {
bwang 82:5e741c5ffd9f 346 FLASH->ACR &= (~FLASH_ACR_DCEN);
bwang 82:5e741c5ffd9f 347 }
bwang 82:5e741c5ffd9f 348 }
bwang 82:5e741c5ffd9f 349
bwang 82:5e741c5ffd9f 350 /**
bwang 82:5e741c5ffd9f 351 * @brief Resets the Instruction Cache.
bwang 82:5e741c5ffd9f 352 * @note This function must be used only when the Instruction Cache is disabled.
bwang 82:5e741c5ffd9f 353 * @param None
bwang 82:5e741c5ffd9f 354 * @retval None
bwang 82:5e741c5ffd9f 355 */
bwang 82:5e741c5ffd9f 356 void FLASH_InstructionCacheReset(void)
bwang 82:5e741c5ffd9f 357 {
bwang 82:5e741c5ffd9f 358 FLASH->ACR |= FLASH_ACR_ICRST;
bwang 82:5e741c5ffd9f 359 }
bwang 82:5e741c5ffd9f 360
bwang 82:5e741c5ffd9f 361 /**
bwang 82:5e741c5ffd9f 362 * @brief Resets the Data Cache.
bwang 82:5e741c5ffd9f 363 * @note This function must be used only when the Data Cache is disabled.
bwang 82:5e741c5ffd9f 364 * @param None
bwang 82:5e741c5ffd9f 365 * @retval None
bwang 82:5e741c5ffd9f 366 */
bwang 82:5e741c5ffd9f 367 void FLASH_DataCacheReset(void)
bwang 82:5e741c5ffd9f 368 {
bwang 82:5e741c5ffd9f 369 FLASH->ACR |= FLASH_ACR_DCRST;
bwang 82:5e741c5ffd9f 370 }
bwang 82:5e741c5ffd9f 371
bwang 82:5e741c5ffd9f 372 /**
bwang 82:5e741c5ffd9f 373 * @}
bwang 82:5e741c5ffd9f 374 */
bwang 82:5e741c5ffd9f 375
bwang 82:5e741c5ffd9f 376 /** @defgroup FLASH_Group2 FLASH Memory Programming functions
bwang 82:5e741c5ffd9f 377 * @brief FLASH Memory Programming functions
bwang 82:5e741c5ffd9f 378 *
bwang 82:5e741c5ffd9f 379 @verbatim
bwang 82:5e741c5ffd9f 380 ===============================================================================
bwang 82:5e741c5ffd9f 381 ##### FLASH Memory Programming functions #####
bwang 82:5e741c5ffd9f 382 ===============================================================================
bwang 82:5e741c5ffd9f 383 [..]
bwang 82:5e741c5ffd9f 384 This group includes the following functions:
bwang 82:5e741c5ffd9f 385 (+) void FLASH_Unlock(void)
bwang 82:5e741c5ffd9f 386 (+) void FLASH_Lock(void)
bwang 82:5e741c5ffd9f 387 (+) FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 388 (+) FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 389 (+) FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
bwang 82:5e741c5ffd9f 390 (+) FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
bwang 82:5e741c5ffd9f 391 (+) FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
bwang 82:5e741c5ffd9f 392 (+) FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
bwang 82:5e741c5ffd9f 393 The following functions can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 394 (+) FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 395 (+) FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 396 [..]
bwang 82:5e741c5ffd9f 397 Any operation of erase or program should follow these steps:
bwang 82:5e741c5ffd9f 398 (#) Call the FLASH_Unlock() function to enable the FLASH control register access
bwang 82:5e741c5ffd9f 399
bwang 82:5e741c5ffd9f 400 (#) Call the desired function to erase sector(s) or program data
bwang 82:5e741c5ffd9f 401
bwang 82:5e741c5ffd9f 402 (#) Call the FLASH_Lock() function to disable the FLASH control register access
bwang 82:5e741c5ffd9f 403 (recommended to protect the FLASH memory against possible unwanted operation)
bwang 82:5e741c5ffd9f 404
bwang 82:5e741c5ffd9f 405 @endverbatim
bwang 82:5e741c5ffd9f 406 * @{
bwang 82:5e741c5ffd9f 407 */
bwang 82:5e741c5ffd9f 408
bwang 82:5e741c5ffd9f 409 /**
bwang 82:5e741c5ffd9f 410 * @brief Unlocks the FLASH control register access
bwang 82:5e741c5ffd9f 411 * @param None
bwang 82:5e741c5ffd9f 412 * @retval None
bwang 82:5e741c5ffd9f 413 */
bwang 82:5e741c5ffd9f 414 void FLASH_Unlock(void)
bwang 82:5e741c5ffd9f 415 {
bwang 82:5e741c5ffd9f 416 if((FLASH->CR & FLASH_CR_LOCK) != RESET)
bwang 82:5e741c5ffd9f 417 {
bwang 82:5e741c5ffd9f 418 /* Authorize the FLASH Registers access */
bwang 82:5e741c5ffd9f 419 FLASH->KEYR = FLASH_KEY1;
bwang 82:5e741c5ffd9f 420 FLASH->KEYR = FLASH_KEY2;
bwang 82:5e741c5ffd9f 421 }
bwang 82:5e741c5ffd9f 422 }
bwang 82:5e741c5ffd9f 423
bwang 82:5e741c5ffd9f 424 /**
bwang 82:5e741c5ffd9f 425 * @brief Locks the FLASH control register access
bwang 82:5e741c5ffd9f 426 * @param None
bwang 82:5e741c5ffd9f 427 * @retval None
bwang 82:5e741c5ffd9f 428 */
bwang 82:5e741c5ffd9f 429 void FLASH_Lock(void)
bwang 82:5e741c5ffd9f 430 {
bwang 82:5e741c5ffd9f 431 /* Set the LOCK Bit to lock the FLASH Registers access */
bwang 82:5e741c5ffd9f 432 FLASH->CR |= FLASH_CR_LOCK;
bwang 82:5e741c5ffd9f 433 }
bwang 82:5e741c5ffd9f 434
bwang 82:5e741c5ffd9f 435 /**
bwang 82:5e741c5ffd9f 436 * @brief Erases a specified FLASH Sector.
bwang 82:5e741c5ffd9f 437 *
bwang 82:5e741c5ffd9f 438 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 439 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 440 *
bwang 82:5e741c5ffd9f 441 * @param FLASH_Sector: The Sector number to be erased.
bwang 82:5e741c5ffd9f 442 *
bwang 82:5e741c5ffd9f 443 * @note For STM32F405xx/407xx and STM32F415xx/417xx devices this parameter can
bwang 82:5e741c5ffd9f 444 * be a value between FLASH_Sector_0 and FLASH_Sector_11.
bwang 82:5e741c5ffd9f 445 *
bwang 82:5e741c5ffd9f 446 * For STM32F42xxx/43xxx devices this parameter can be a value between
bwang 82:5e741c5ffd9f 447 * FLASH_Sector_0 and FLASH_Sector_23.
bwang 82:5e741c5ffd9f 448 *
bwang 82:5e741c5ffd9f 449 * For STM32F401xx devices this parameter can be a value between
bwang 82:5e741c5ffd9f 450 * FLASH_Sector_0 and FLASH_Sector_5.
bwang 82:5e741c5ffd9f 451 *
bwang 82:5e741c5ffd9f 452 * For STM32F411xE and STM32F412xG devices this parameter can be a value between
bwang 82:5e741c5ffd9f 453 * FLASH_Sector_0 and FLASH_Sector_7.
bwang 82:5e741c5ffd9f 454 *
bwang 82:5e741c5ffd9f 455 * For STM32F410xx devices this parameter can be a value between
bwang 82:5e741c5ffd9f 456 * FLASH_Sector_0 and FLASH_Sector_4.
bwang 82:5e741c5ffd9f 457 *
bwang 82:5e741c5ffd9f 458 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang 82:5e741c5ffd9f 459 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 460 * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang 82:5e741c5ffd9f 461 * the operation will be done by byte (8-bit)
bwang 82:5e741c5ffd9f 462 * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang 82:5e741c5ffd9f 463 * the operation will be done by half word (16-bit)
bwang 82:5e741c5ffd9f 464 * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang 82:5e741c5ffd9f 465 * the operation will be done by word (32-bit)
bwang 82:5e741c5ffd9f 466 * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang 82:5e741c5ffd9f 467 * the operation will be done by double word (64-bit)
bwang 82:5e741c5ffd9f 468 *
bwang 82:5e741c5ffd9f 469 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 470 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 471 */
bwang 82:5e741c5ffd9f 472 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 473 {
bwang 82:5e741c5ffd9f 474 uint32_t tmp_psize = 0x0;
bwang 82:5e741c5ffd9f 475 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 476
bwang 82:5e741c5ffd9f 477 /* Check the parameters */
bwang 82:5e741c5ffd9f 478 assert_param(IS_FLASH_SECTOR(FLASH_Sector));
bwang 82:5e741c5ffd9f 479 assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang 82:5e741c5ffd9f 480
bwang 82:5e741c5ffd9f 481 if(VoltageRange == VoltageRange_1)
bwang 82:5e741c5ffd9f 482 {
bwang 82:5e741c5ffd9f 483 tmp_psize = FLASH_PSIZE_BYTE;
bwang 82:5e741c5ffd9f 484 }
bwang 82:5e741c5ffd9f 485 else if(VoltageRange == VoltageRange_2)
bwang 82:5e741c5ffd9f 486 {
bwang 82:5e741c5ffd9f 487 tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang 82:5e741c5ffd9f 488 }
bwang 82:5e741c5ffd9f 489 else if(VoltageRange == VoltageRange_3)
bwang 82:5e741c5ffd9f 490 {
bwang 82:5e741c5ffd9f 491 tmp_psize = FLASH_PSIZE_WORD;
bwang 82:5e741c5ffd9f 492 }
bwang 82:5e741c5ffd9f 493 else
bwang 82:5e741c5ffd9f 494 {
bwang 82:5e741c5ffd9f 495 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang 82:5e741c5ffd9f 496 }
bwang 82:5e741c5ffd9f 497 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 498 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 499
bwang 82:5e741c5ffd9f 500 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 501 {
bwang 82:5e741c5ffd9f 502 /* if the previous operation is completed, proceed to erase the sector */
bwang 82:5e741c5ffd9f 503 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 504 FLASH->CR |= tmp_psize;
bwang 82:5e741c5ffd9f 505 FLASH->CR &= SECTOR_MASK;
bwang 82:5e741c5ffd9f 506 FLASH->CR |= FLASH_CR_SER | FLASH_Sector;
bwang 82:5e741c5ffd9f 507 FLASH->CR |= FLASH_CR_STRT;
bwang 82:5e741c5ffd9f 508
bwang 82:5e741c5ffd9f 509 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 510 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 511
bwang 82:5e741c5ffd9f 512 /* if the erase operation is completed, disable the SER Bit */
bwang 82:5e741c5ffd9f 513 FLASH->CR &= (~FLASH_CR_SER);
bwang 82:5e741c5ffd9f 514 FLASH->CR &= SECTOR_MASK;
bwang 82:5e741c5ffd9f 515 }
bwang 82:5e741c5ffd9f 516 /* Return the Erase Status */
bwang 82:5e741c5ffd9f 517 return status;
bwang 82:5e741c5ffd9f 518 }
bwang 82:5e741c5ffd9f 519
bwang 82:5e741c5ffd9f 520 /**
bwang 82:5e741c5ffd9f 521 * @brief Erases all FLASH Sectors.
bwang 82:5e741c5ffd9f 522 *
bwang 82:5e741c5ffd9f 523 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 524 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 525 *
bwang 82:5e741c5ffd9f 526 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang 82:5e741c5ffd9f 527 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 528 * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang 82:5e741c5ffd9f 529 * the operation will be done by byte (8-bit)
bwang 82:5e741c5ffd9f 530 * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang 82:5e741c5ffd9f 531 * the operation will be done by half word (16-bit)
bwang 82:5e741c5ffd9f 532 * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang 82:5e741c5ffd9f 533 * the operation will be done by word (32-bit)
bwang 82:5e741c5ffd9f 534 * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang 82:5e741c5ffd9f 535 * the operation will be done by double word (64-bit)
bwang 82:5e741c5ffd9f 536 *
bwang 82:5e741c5ffd9f 537 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 538 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 539 */
bwang 82:5e741c5ffd9f 540 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 541 {
bwang 82:5e741c5ffd9f 542 uint32_t tmp_psize = 0x0;
bwang 82:5e741c5ffd9f 543 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 544
bwang 82:5e741c5ffd9f 545 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 546 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 547 assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang 82:5e741c5ffd9f 548
bwang 82:5e741c5ffd9f 549 if(VoltageRange == VoltageRange_1)
bwang 82:5e741c5ffd9f 550 {
bwang 82:5e741c5ffd9f 551 tmp_psize = FLASH_PSIZE_BYTE;
bwang 82:5e741c5ffd9f 552 }
bwang 82:5e741c5ffd9f 553 else if(VoltageRange == VoltageRange_2)
bwang 82:5e741c5ffd9f 554 {
bwang 82:5e741c5ffd9f 555 tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang 82:5e741c5ffd9f 556 }
bwang 82:5e741c5ffd9f 557 else if(VoltageRange == VoltageRange_3)
bwang 82:5e741c5ffd9f 558 {
bwang 82:5e741c5ffd9f 559 tmp_psize = FLASH_PSIZE_WORD;
bwang 82:5e741c5ffd9f 560 }
bwang 82:5e741c5ffd9f 561 else
bwang 82:5e741c5ffd9f 562 {
bwang 82:5e741c5ffd9f 563 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang 82:5e741c5ffd9f 564 }
bwang 82:5e741c5ffd9f 565 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 566 {
bwang 82:5e741c5ffd9f 567 /* if the previous operation is completed, proceed to erase all sectors */
bwang 82:5e741c5ffd9f 568 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx)
bwang 82:5e741c5ffd9f 569 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 570 FLASH->CR |= tmp_psize;
bwang 82:5e741c5ffd9f 571 FLASH->CR |= (FLASH_CR_MER1 | FLASH_CR_MER2);
bwang 82:5e741c5ffd9f 572 FLASH->CR |= FLASH_CR_STRT;
bwang 82:5e741c5ffd9f 573
bwang 82:5e741c5ffd9f 574 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 575 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 576
bwang 82:5e741c5ffd9f 577 /* if the erase operation is completed, disable the MER Bit */
bwang 82:5e741c5ffd9f 578 FLASH->CR &= ~(FLASH_CR_MER1 | FLASH_CR_MER2);
bwang 82:5e741c5ffd9f 579 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
bwang 82:5e741c5ffd9f 580
bwang 82:5e741c5ffd9f 581 #if defined(STM32F40_41xxx) || defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F412xG) || defined(STM32F446xx)
bwang 82:5e741c5ffd9f 582 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 583 FLASH->CR |= tmp_psize;
bwang 82:5e741c5ffd9f 584 FLASH->CR |= FLASH_CR_MER;
bwang 82:5e741c5ffd9f 585 FLASH->CR |= FLASH_CR_STRT;
bwang 82:5e741c5ffd9f 586
bwang 82:5e741c5ffd9f 587 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 588 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 589
bwang 82:5e741c5ffd9f 590 /* if the erase operation is completed, disable the MER Bit */
bwang 82:5e741c5ffd9f 591 FLASH->CR &= (~FLASH_CR_MER);
bwang 82:5e741c5ffd9f 592 #endif /* STM32F40_41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412xG || STM32F446xx */
bwang 82:5e741c5ffd9f 593
bwang 82:5e741c5ffd9f 594 }
bwang 82:5e741c5ffd9f 595 /* Return the Erase Status */
bwang 82:5e741c5ffd9f 596 return status;
bwang 82:5e741c5ffd9f 597 }
bwang 82:5e741c5ffd9f 598
bwang 82:5e741c5ffd9f 599 /**
bwang 82:5e741c5ffd9f 600 * @brief Erases all FLASH Sectors in Bank 1.
bwang 82:5e741c5ffd9f 601 *
bwang 82:5e741c5ffd9f 602 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 603 *
bwang 82:5e741c5ffd9f 604 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 605 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 606 *
bwang 82:5e741c5ffd9f 607 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang 82:5e741c5ffd9f 608 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 609 * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang 82:5e741c5ffd9f 610 * the operation will be done by byte (8-bit)
bwang 82:5e741c5ffd9f 611 * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang 82:5e741c5ffd9f 612 * the operation will be done by half word (16-bit)
bwang 82:5e741c5ffd9f 613 * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang 82:5e741c5ffd9f 614 * the operation will be done by word (32-bit)
bwang 82:5e741c5ffd9f 615 * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang 82:5e741c5ffd9f 616 * the operation will be done by double word (64-bit)
bwang 82:5e741c5ffd9f 617 *
bwang 82:5e741c5ffd9f 618 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 619 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 620 */
bwang 82:5e741c5ffd9f 621 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 622 {
bwang 82:5e741c5ffd9f 623 uint32_t tmp_psize = 0x0;
bwang 82:5e741c5ffd9f 624 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 625
bwang 82:5e741c5ffd9f 626 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 627 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 628 assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang 82:5e741c5ffd9f 629
bwang 82:5e741c5ffd9f 630 if(VoltageRange == VoltageRange_1)
bwang 82:5e741c5ffd9f 631 {
bwang 82:5e741c5ffd9f 632 tmp_psize = FLASH_PSIZE_BYTE;
bwang 82:5e741c5ffd9f 633 }
bwang 82:5e741c5ffd9f 634 else if(VoltageRange == VoltageRange_2)
bwang 82:5e741c5ffd9f 635 {
bwang 82:5e741c5ffd9f 636 tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang 82:5e741c5ffd9f 637 }
bwang 82:5e741c5ffd9f 638 else if(VoltageRange == VoltageRange_3)
bwang 82:5e741c5ffd9f 639 {
bwang 82:5e741c5ffd9f 640 tmp_psize = FLASH_PSIZE_WORD;
bwang 82:5e741c5ffd9f 641 }
bwang 82:5e741c5ffd9f 642 else
bwang 82:5e741c5ffd9f 643 {
bwang 82:5e741c5ffd9f 644 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang 82:5e741c5ffd9f 645 }
bwang 82:5e741c5ffd9f 646 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 647 {
bwang 82:5e741c5ffd9f 648 /* if the previous operation is completed, proceed to erase all sectors */
bwang 82:5e741c5ffd9f 649 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 650 FLASH->CR |= tmp_psize;
bwang 82:5e741c5ffd9f 651 FLASH->CR |= FLASH_CR_MER1;
bwang 82:5e741c5ffd9f 652 FLASH->CR |= FLASH_CR_STRT;
bwang 82:5e741c5ffd9f 653
bwang 82:5e741c5ffd9f 654 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 655 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 656
bwang 82:5e741c5ffd9f 657 /* if the erase operation is completed, disable the MER Bit */
bwang 82:5e741c5ffd9f 658 FLASH->CR &= (~FLASH_CR_MER1);
bwang 82:5e741c5ffd9f 659
bwang 82:5e741c5ffd9f 660 }
bwang 82:5e741c5ffd9f 661 /* Return the Erase Status */
bwang 82:5e741c5ffd9f 662 return status;
bwang 82:5e741c5ffd9f 663 }
bwang 82:5e741c5ffd9f 664
bwang 82:5e741c5ffd9f 665
bwang 82:5e741c5ffd9f 666 /**
bwang 82:5e741c5ffd9f 667 * @brief Erases all FLASH Sectors in Bank 2.
bwang 82:5e741c5ffd9f 668 *
bwang 82:5e741c5ffd9f 669 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 670 *
bwang 82:5e741c5ffd9f 671 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 672 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 673 *
bwang 82:5e741c5ffd9f 674 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang 82:5e741c5ffd9f 675 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 676 * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang 82:5e741c5ffd9f 677 * the operation will be done by byte (8-bit)
bwang 82:5e741c5ffd9f 678 * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang 82:5e741c5ffd9f 679 * the operation will be done by half word (16-bit)
bwang 82:5e741c5ffd9f 680 * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang 82:5e741c5ffd9f 681 * the operation will be done by word (32-bit)
bwang 82:5e741c5ffd9f 682 * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang 82:5e741c5ffd9f 683 * the operation will be done by double word (64-bit)
bwang 82:5e741c5ffd9f 684 *
bwang 82:5e741c5ffd9f 685 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 686 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 687 */
bwang 82:5e741c5ffd9f 688 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
bwang 82:5e741c5ffd9f 689 {
bwang 82:5e741c5ffd9f 690 uint32_t tmp_psize = 0x0;
bwang 82:5e741c5ffd9f 691 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 692
bwang 82:5e741c5ffd9f 693 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 694 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 695 assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang 82:5e741c5ffd9f 696
bwang 82:5e741c5ffd9f 697 if(VoltageRange == VoltageRange_1)
bwang 82:5e741c5ffd9f 698 {
bwang 82:5e741c5ffd9f 699 tmp_psize = FLASH_PSIZE_BYTE;
bwang 82:5e741c5ffd9f 700 }
bwang 82:5e741c5ffd9f 701 else if(VoltageRange == VoltageRange_2)
bwang 82:5e741c5ffd9f 702 {
bwang 82:5e741c5ffd9f 703 tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang 82:5e741c5ffd9f 704 }
bwang 82:5e741c5ffd9f 705 else if(VoltageRange == VoltageRange_3)
bwang 82:5e741c5ffd9f 706 {
bwang 82:5e741c5ffd9f 707 tmp_psize = FLASH_PSIZE_WORD;
bwang 82:5e741c5ffd9f 708 }
bwang 82:5e741c5ffd9f 709 else
bwang 82:5e741c5ffd9f 710 {
bwang 82:5e741c5ffd9f 711 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang 82:5e741c5ffd9f 712 }
bwang 82:5e741c5ffd9f 713 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 714 {
bwang 82:5e741c5ffd9f 715 /* if the previous operation is completed, proceed to erase all sectors */
bwang 82:5e741c5ffd9f 716 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 717 FLASH->CR |= tmp_psize;
bwang 82:5e741c5ffd9f 718 FLASH->CR |= FLASH_CR_MER2;
bwang 82:5e741c5ffd9f 719 FLASH->CR |= FLASH_CR_STRT;
bwang 82:5e741c5ffd9f 720
bwang 82:5e741c5ffd9f 721 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 722 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 723
bwang 82:5e741c5ffd9f 724 /* if the erase operation is completed, disable the MER Bit */
bwang 82:5e741c5ffd9f 725 FLASH->CR &= (~FLASH_CR_MER2);
bwang 82:5e741c5ffd9f 726
bwang 82:5e741c5ffd9f 727 }
bwang 82:5e741c5ffd9f 728 /* Return the Erase Status */
bwang 82:5e741c5ffd9f 729 return status;
bwang 82:5e741c5ffd9f 730 }
bwang 82:5e741c5ffd9f 731
bwang 82:5e741c5ffd9f 732 /**
bwang 82:5e741c5ffd9f 733 * @brief Programs a double word (64-bit) at a specified address.
bwang 82:5e741c5ffd9f 734 * @note This function must be used when the device voltage range is from
bwang 82:5e741c5ffd9f 735 * 2.7V to 3.6V and an External Vpp is present.
bwang 82:5e741c5ffd9f 736 *
bwang 82:5e741c5ffd9f 737 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 738 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 739 *
bwang 82:5e741c5ffd9f 740 * @param Address: specifies the address to be programmed.
bwang 82:5e741c5ffd9f 741 * @param Data: specifies the data to be programmed.
bwang 82:5e741c5ffd9f 742 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 743 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 744 */
bwang 82:5e741c5ffd9f 745 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
bwang 82:5e741c5ffd9f 746 {
bwang 82:5e741c5ffd9f 747 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 748
bwang 82:5e741c5ffd9f 749 /* Check the parameters */
bwang 82:5e741c5ffd9f 750 assert_param(IS_FLASH_ADDRESS(Address));
bwang 82:5e741c5ffd9f 751
bwang 82:5e741c5ffd9f 752 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 753 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 754
bwang 82:5e741c5ffd9f 755 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 756 {
bwang 82:5e741c5ffd9f 757 /* if the previous operation is completed, proceed to program the new data */
bwang 82:5e741c5ffd9f 758 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 759 FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD;
bwang 82:5e741c5ffd9f 760 FLASH->CR |= FLASH_CR_PG;
bwang 82:5e741c5ffd9f 761
bwang 82:5e741c5ffd9f 762 *(__IO uint64_t*)Address = Data;
bwang 82:5e741c5ffd9f 763
bwang 82:5e741c5ffd9f 764 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 765 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 766
bwang 82:5e741c5ffd9f 767 /* if the program operation is completed, disable the PG Bit */
bwang 82:5e741c5ffd9f 768 FLASH->CR &= (~FLASH_CR_PG);
bwang 82:5e741c5ffd9f 769 }
bwang 82:5e741c5ffd9f 770 /* Return the Program Status */
bwang 82:5e741c5ffd9f 771 return status;
bwang 82:5e741c5ffd9f 772 }
bwang 82:5e741c5ffd9f 773
bwang 82:5e741c5ffd9f 774 /**
bwang 82:5e741c5ffd9f 775 * @brief Programs a word (32-bit) at a specified address.
bwang 82:5e741c5ffd9f 776 *
bwang 82:5e741c5ffd9f 777 * @note This function must be used when the device voltage range is from 2.7V to 3.6V.
bwang 82:5e741c5ffd9f 778 *
bwang 82:5e741c5ffd9f 779 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 780 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 781 *
bwang 82:5e741c5ffd9f 782 * @param Address: specifies the address to be programmed.
bwang 82:5e741c5ffd9f 783 * This parameter can be any address in Program memory zone or in OTP zone.
bwang 82:5e741c5ffd9f 784 * @param Data: specifies the data to be programmed.
bwang 82:5e741c5ffd9f 785 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 786 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 787 */
bwang 82:5e741c5ffd9f 788 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
bwang 82:5e741c5ffd9f 789 {
bwang 82:5e741c5ffd9f 790 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 791
bwang 82:5e741c5ffd9f 792 /* Check the parameters */
bwang 82:5e741c5ffd9f 793 assert_param(IS_FLASH_ADDRESS(Address));
bwang 82:5e741c5ffd9f 794
bwang 82:5e741c5ffd9f 795 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 796 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 797
bwang 82:5e741c5ffd9f 798 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 799 {
bwang 82:5e741c5ffd9f 800 /* if the previous operation is completed, proceed to program the new data */
bwang 82:5e741c5ffd9f 801 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 802 FLASH->CR |= FLASH_PSIZE_WORD;
bwang 82:5e741c5ffd9f 803 FLASH->CR |= FLASH_CR_PG;
bwang 82:5e741c5ffd9f 804
bwang 82:5e741c5ffd9f 805 *(__IO uint32_t*)Address = Data;
bwang 82:5e741c5ffd9f 806
bwang 82:5e741c5ffd9f 807 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 808 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 809
bwang 82:5e741c5ffd9f 810 /* if the program operation is completed, disable the PG Bit */
bwang 82:5e741c5ffd9f 811 FLASH->CR &= (~FLASH_CR_PG);
bwang 82:5e741c5ffd9f 812 }
bwang 82:5e741c5ffd9f 813 /* Return the Program Status */
bwang 82:5e741c5ffd9f 814 return status;
bwang 82:5e741c5ffd9f 815 }
bwang 82:5e741c5ffd9f 816
bwang 82:5e741c5ffd9f 817 /**
bwang 82:5e741c5ffd9f 818 * @brief Programs a half word (16-bit) at a specified address.
bwang 82:5e741c5ffd9f 819 * @note This function must be used when the device voltage range is from 2.1V to 3.6V.
bwang 82:5e741c5ffd9f 820 *
bwang 82:5e741c5ffd9f 821 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 822 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 823 *
bwang 82:5e741c5ffd9f 824 * @param Address: specifies the address to be programmed.
bwang 82:5e741c5ffd9f 825 * This parameter can be any address in Program memory zone or in OTP zone.
bwang 82:5e741c5ffd9f 826 * @param Data: specifies the data to be programmed.
bwang 82:5e741c5ffd9f 827 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 828 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 829 */
bwang 82:5e741c5ffd9f 830 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
bwang 82:5e741c5ffd9f 831 {
bwang 82:5e741c5ffd9f 832 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 833
bwang 82:5e741c5ffd9f 834 /* Check the parameters */
bwang 82:5e741c5ffd9f 835 assert_param(IS_FLASH_ADDRESS(Address));
bwang 82:5e741c5ffd9f 836
bwang 82:5e741c5ffd9f 837 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 838 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 839
bwang 82:5e741c5ffd9f 840 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 841 {
bwang 82:5e741c5ffd9f 842 /* if the previous operation is completed, proceed to program the new data */
bwang 82:5e741c5ffd9f 843 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 844 FLASH->CR |= FLASH_PSIZE_HALF_WORD;
bwang 82:5e741c5ffd9f 845 FLASH->CR |= FLASH_CR_PG;
bwang 82:5e741c5ffd9f 846
bwang 82:5e741c5ffd9f 847 *(__IO uint16_t*)Address = Data;
bwang 82:5e741c5ffd9f 848
bwang 82:5e741c5ffd9f 849 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 850 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 851
bwang 82:5e741c5ffd9f 852 /* if the program operation is completed, disable the PG Bit */
bwang 82:5e741c5ffd9f 853 FLASH->CR &= (~FLASH_CR_PG);
bwang 82:5e741c5ffd9f 854 }
bwang 82:5e741c5ffd9f 855 /* Return the Program Status */
bwang 82:5e741c5ffd9f 856 return status;
bwang 82:5e741c5ffd9f 857 }
bwang 82:5e741c5ffd9f 858
bwang 82:5e741c5ffd9f 859 /**
bwang 82:5e741c5ffd9f 860 * @brief Programs a byte (8-bit) at a specified address.
bwang 82:5e741c5ffd9f 861 * @note This function can be used within all the device supply voltage ranges.
bwang 82:5e741c5ffd9f 862 *
bwang 82:5e741c5ffd9f 863 * @note If an erase and a program operations are requested simultaneously,
bwang 82:5e741c5ffd9f 864 * the erase operation is performed before the program one.
bwang 82:5e741c5ffd9f 865 *
bwang 82:5e741c5ffd9f 866 * @param Address: specifies the address to be programmed.
bwang 82:5e741c5ffd9f 867 * This parameter can be any address in Program memory zone or in OTP zone.
bwang 82:5e741c5ffd9f 868 * @param Data: specifies the data to be programmed.
bwang 82:5e741c5ffd9f 869 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 870 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 871 */
bwang 82:5e741c5ffd9f 872 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
bwang 82:5e741c5ffd9f 873 {
bwang 82:5e741c5ffd9f 874 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 875
bwang 82:5e741c5ffd9f 876 /* Check the parameters */
bwang 82:5e741c5ffd9f 877 assert_param(IS_FLASH_ADDRESS(Address));
bwang 82:5e741c5ffd9f 878
bwang 82:5e741c5ffd9f 879 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 880 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 881
bwang 82:5e741c5ffd9f 882 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 883 {
bwang 82:5e741c5ffd9f 884 /* if the previous operation is completed, proceed to program the new data */
bwang 82:5e741c5ffd9f 885 FLASH->CR &= CR_PSIZE_MASK;
bwang 82:5e741c5ffd9f 886 FLASH->CR |= FLASH_PSIZE_BYTE;
bwang 82:5e741c5ffd9f 887 FLASH->CR |= FLASH_CR_PG;
bwang 82:5e741c5ffd9f 888
bwang 82:5e741c5ffd9f 889 *(__IO uint8_t*)Address = Data;
bwang 82:5e741c5ffd9f 890
bwang 82:5e741c5ffd9f 891 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 892 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 893
bwang 82:5e741c5ffd9f 894 /* if the program operation is completed, disable the PG Bit */
bwang 82:5e741c5ffd9f 895 FLASH->CR &= (~FLASH_CR_PG);
bwang 82:5e741c5ffd9f 896 }
bwang 82:5e741c5ffd9f 897
bwang 82:5e741c5ffd9f 898 /* Return the Program Status */
bwang 82:5e741c5ffd9f 899 return status;
bwang 82:5e741c5ffd9f 900 }
bwang 82:5e741c5ffd9f 901
bwang 82:5e741c5ffd9f 902 /**
bwang 82:5e741c5ffd9f 903 * @}
bwang 82:5e741c5ffd9f 904 */
bwang 82:5e741c5ffd9f 905
bwang 82:5e741c5ffd9f 906 /** @defgroup FLASH_Group3 Option Bytes Programming functions
bwang 82:5e741c5ffd9f 907 * @brief Option Bytes Programming functions
bwang 82:5e741c5ffd9f 908 *
bwang 82:5e741c5ffd9f 909 @verbatim
bwang 82:5e741c5ffd9f 910 ===============================================================================
bwang 82:5e741c5ffd9f 911 ##### Option Bytes Programming functions #####
bwang 82:5e741c5ffd9f 912 ===============================================================================
bwang 82:5e741c5ffd9f 913 [..]
bwang 82:5e741c5ffd9f 914 This group includes the following functions:
bwang 82:5e741c5ffd9f 915 (+) void FLASH_OB_Unlock(void)
bwang 82:5e741c5ffd9f 916 (+) void FLASH_OB_Lock(void)
bwang 82:5e741c5ffd9f 917 (+) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 918 (+) void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 919 (+) void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PCROPSelect)
bwang 82:5e741c5ffd9f 920 (+) void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 921 (+) void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 922 (+) void FLASH_OB_RDPConfig(uint8_t OB_RDP)
bwang 82:5e741c5ffd9f 923 (+) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang 82:5e741c5ffd9f 924 (+) void FLASH_OB_BORConfig(uint8_t OB_BOR)
bwang 82:5e741c5ffd9f 925 (+) FLASH_Status FLASH_ProgramOTP(uint32_t Address, uint32_t Data)
bwang 82:5e741c5ffd9f 926 (+) FLASH_Status FLASH_OB_Launch(void)
bwang 82:5e741c5ffd9f 927 (+) uint32_t FLASH_OB_GetUser(void)
bwang 82:5e741c5ffd9f 928 (+) uint8_t FLASH_OB_GetWRP(void)
bwang 82:5e741c5ffd9f 929 (+) uint8_t FLASH_OB_GetWRP1(void)
bwang 82:5e741c5ffd9f 930 (+) uint8_t FLASH_OB_GetPCROP(void)
bwang 82:5e741c5ffd9f 931 (+) uint8_t FLASH_OB_GetPCROP1(void)
bwang 82:5e741c5ffd9f 932 (+) uint8_t FLASH_OB_GetRDP(void)
bwang 82:5e741c5ffd9f 933 (+) uint8_t FLASH_OB_GetBOR(void)
bwang 82:5e741c5ffd9f 934 [..]
bwang 82:5e741c5ffd9f 935 The following function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 936 (+) void FLASH_OB_BootConfig(uint8_t OB_BOOT)
bwang 82:5e741c5ffd9f 937 [..]
bwang 82:5e741c5ffd9f 938 Any operation of erase or program should follow these steps:
bwang 82:5e741c5ffd9f 939 (#) Call the FLASH_OB_Unlock() function to enable the FLASH option control
bwang 82:5e741c5ffd9f 940 register access
bwang 82:5e741c5ffd9f 941
bwang 82:5e741c5ffd9f 942 (#) Call one or several functions to program the desired Option Bytes:
bwang 82:5e741c5ffd9f 943 (++) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 944 => to Enable/Disable the desired sector write protection
bwang 82:5e741c5ffd9f 945 (++) void FLASH_OB_RDPConfig(uint8_t OB_RDP) => to set the desired read
bwang 82:5e741c5ffd9f 946 Protection Level
bwang 82:5e741c5ffd9f 947 (++) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang 82:5e741c5ffd9f 948 => to configure the user Option Bytes.
bwang 82:5e741c5ffd9f 949 (++) void FLASH_OB_BORConfig(uint8_t OB_BOR) => to set the BOR Level
bwang 82:5e741c5ffd9f 950
bwang 82:5e741c5ffd9f 951 (#) Once all needed Option Bytes to be programmed are correctly written,
bwang 82:5e741c5ffd9f 952 call the FLASH_OB_Launch() function to launch the Option Bytes
bwang 82:5e741c5ffd9f 953 programming process.
bwang 82:5e741c5ffd9f 954
bwang 82:5e741c5ffd9f 955 -@- When changing the IWDG mode from HW to SW or from SW to HW, a system
bwang 82:5e741c5ffd9f 956 reset is needed to make the change effective.
bwang 82:5e741c5ffd9f 957
bwang 82:5e741c5ffd9f 958 (#) Call the FLASH_OB_Lock() function to disable the FLASH option control
bwang 82:5e741c5ffd9f 959 register access (recommended to protect the Option Bytes against
bwang 82:5e741c5ffd9f 960 possible unwanted operations)
bwang 82:5e741c5ffd9f 961
bwang 82:5e741c5ffd9f 962 @endverbatim
bwang 82:5e741c5ffd9f 963 * @{
bwang 82:5e741c5ffd9f 964 */
bwang 82:5e741c5ffd9f 965
bwang 82:5e741c5ffd9f 966 /**
bwang 82:5e741c5ffd9f 967 * @brief Unlocks the FLASH Option Control Registers access.
bwang 82:5e741c5ffd9f 968 * @param None
bwang 82:5e741c5ffd9f 969 * @retval None
bwang 82:5e741c5ffd9f 970 */
bwang 82:5e741c5ffd9f 971 void FLASH_OB_Unlock(void)
bwang 82:5e741c5ffd9f 972 {
bwang 82:5e741c5ffd9f 973 if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
bwang 82:5e741c5ffd9f 974 {
bwang 82:5e741c5ffd9f 975 /* Authorizes the Option Byte register programming */
bwang 82:5e741c5ffd9f 976 FLASH->OPTKEYR = FLASH_OPT_KEY1;
bwang 82:5e741c5ffd9f 977 FLASH->OPTKEYR = FLASH_OPT_KEY2;
bwang 82:5e741c5ffd9f 978 }
bwang 82:5e741c5ffd9f 979 }
bwang 82:5e741c5ffd9f 980
bwang 82:5e741c5ffd9f 981 /**
bwang 82:5e741c5ffd9f 982 * @brief Locks the FLASH Option Control Registers access.
bwang 82:5e741c5ffd9f 983 * @param None
bwang 82:5e741c5ffd9f 984 * @retval None
bwang 82:5e741c5ffd9f 985 */
bwang 82:5e741c5ffd9f 986 void FLASH_OB_Lock(void)
bwang 82:5e741c5ffd9f 987 {
bwang 82:5e741c5ffd9f 988 /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
bwang 82:5e741c5ffd9f 989 FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
bwang 82:5e741c5ffd9f 990 }
bwang 82:5e741c5ffd9f 991
bwang 82:5e741c5ffd9f 992 /**
bwang 82:5e741c5ffd9f 993 * @brief Enables or disables the write protection of the desired sectors, for the first
bwang 82:5e741c5ffd9f 994 * 1 Mb of the Flash
bwang 82:5e741c5ffd9f 995 *
bwang 82:5e741c5ffd9f 996 * @note When the memory read protection level is selected (RDP level = 1),
bwang 82:5e741c5ffd9f 997 * it is not possible to program or erase the flash sector i if CortexM4
bwang 82:5e741c5ffd9f 998 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bwang 82:5e741c5ffd9f 999 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bwang 82:5e741c5ffd9f 1000 *
bwang 82:5e741c5ffd9f 1001 * @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
bwang 82:5e741c5ffd9f 1002 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1003 * @arg OB_WRP: A value between OB_WRP_Sector0 and OB_WRP_Sector11
bwang 82:5e741c5ffd9f 1004 * @arg OB_WRP_Sector_All
bwang 82:5e741c5ffd9f 1005 * @param Newstate: new state of the Write Protection.
bwang 82:5e741c5ffd9f 1006 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 1007 * @retval None
bwang 82:5e741c5ffd9f 1008 */
bwang 82:5e741c5ffd9f 1009 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 1010 {
bwang 82:5e741c5ffd9f 1011 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1012
bwang 82:5e741c5ffd9f 1013 /* Check the parameters */
bwang 82:5e741c5ffd9f 1014 assert_param(IS_OB_WRP(OB_WRP));
bwang 82:5e741c5ffd9f 1015 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 1016
bwang 82:5e741c5ffd9f 1017 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1018
bwang 82:5e741c5ffd9f 1019 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1020 {
bwang 82:5e741c5ffd9f 1021 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 1022 {
bwang 82:5e741c5ffd9f 1023 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~OB_WRP);
bwang 82:5e741c5ffd9f 1024 }
bwang 82:5e741c5ffd9f 1025 else
bwang 82:5e741c5ffd9f 1026 {
bwang 82:5e741c5ffd9f 1027 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)OB_WRP;
bwang 82:5e741c5ffd9f 1028 }
bwang 82:5e741c5ffd9f 1029 }
bwang 82:5e741c5ffd9f 1030 }
bwang 82:5e741c5ffd9f 1031
bwang 82:5e741c5ffd9f 1032 /**
bwang 82:5e741c5ffd9f 1033 * @brief Enables or disables the write protection of the desired sectors, for the second
bwang 82:5e741c5ffd9f 1034 * 1 Mb of the Flash
bwang 82:5e741c5ffd9f 1035 *
bwang 82:5e741c5ffd9f 1036 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 1037 *
bwang 82:5e741c5ffd9f 1038 * @note When the memory read out protection is selected (RDP level = 1),
bwang 82:5e741c5ffd9f 1039 * it is not possible to program or erase the flash sector i if CortexM4
bwang 82:5e741c5ffd9f 1040 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bwang 82:5e741c5ffd9f 1041 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bwang 82:5e741c5ffd9f 1042 *
bwang 82:5e741c5ffd9f 1043 * @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
bwang 82:5e741c5ffd9f 1044 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1045 * @arg OB_WRP: A value between OB_WRP_Sector12 and OB_WRP_Sector23
bwang 82:5e741c5ffd9f 1046 * @arg OB_WRP_Sector_All
bwang 82:5e741c5ffd9f 1047 * @param Newstate: new state of the Write Protection.
bwang 82:5e741c5ffd9f 1048 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 1049 * @retval None
bwang 82:5e741c5ffd9f 1050 */
bwang 82:5e741c5ffd9f 1051 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 1052 {
bwang 82:5e741c5ffd9f 1053 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1054
bwang 82:5e741c5ffd9f 1055 /* Check the parameters */
bwang 82:5e741c5ffd9f 1056 assert_param(IS_OB_WRP(OB_WRP));
bwang 82:5e741c5ffd9f 1057 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 1058
bwang 82:5e741c5ffd9f 1059 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1060
bwang 82:5e741c5ffd9f 1061 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1062 {
bwang 82:5e741c5ffd9f 1063 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 1064 {
bwang 82:5e741c5ffd9f 1065 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~OB_WRP);
bwang 82:5e741c5ffd9f 1066 }
bwang 82:5e741c5ffd9f 1067 else
bwang 82:5e741c5ffd9f 1068 {
bwang 82:5e741c5ffd9f 1069 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)OB_WRP;
bwang 82:5e741c5ffd9f 1070 }
bwang 82:5e741c5ffd9f 1071 }
bwang 82:5e741c5ffd9f 1072 }
bwang 82:5e741c5ffd9f 1073
bwang 82:5e741c5ffd9f 1074 /**
bwang 82:5e741c5ffd9f 1075 * @brief Select the Protection Mode (SPRMOD).
bwang 82:5e741c5ffd9f 1076 *
bwang 82:5e741c5ffd9f 1077 * @note This function can be used only for STM32F42xxx/43xxx and STM32F401xx/411xE devices.
bwang 82:5e741c5ffd9f 1078 *
bwang 82:5e741c5ffd9f 1079 * @note After PCROP activation, Option Byte modification is not possible.
bwang 82:5e741c5ffd9f 1080 * Exception made for the global Read Out Protection modification level (level1 to level0)
bwang 82:5e741c5ffd9f 1081 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bwang 82:5e741c5ffd9f 1082 *
bwang 82:5e741c5ffd9f 1083 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
bwang 82:5e741c5ffd9f 1084 *
bwang 82:5e741c5ffd9f 1085 * @note Some Precautions should be taken when activating the PCROP feature :
bwang 82:5e741c5ffd9f 1086 * The active value of nWRPi bits is inverted when PCROP mode is active, this means if SPRMOD = 1
bwang 82:5e741c5ffd9f 1087 * and WRPi = 1 (default value), then the user sector i is read/write protected.
bwang 82:5e741c5ffd9f 1088 * In order to avoid activation of PCROP Mode for undesired sectors, please follow the
bwang 82:5e741c5ffd9f 1089 * below safety sequence :
bwang 82:5e741c5ffd9f 1090 * - Disable PCROP for all Sectors using FLASH_OB_PCROPConfig(OB_PCROP_Sector_All, DISABLE) function
bwang 82:5e741c5ffd9f 1091 * for Bank1 or FLASH_OB_PCROP1Config(OB_PCROP_Sector_All, DISABLE) function for Bank2
bwang 82:5e741c5ffd9f 1092 * - Enable PCROP for the desired Sector i using FLASH_OB_PCROPConfig(Sector i, ENABLE) function
bwang 82:5e741c5ffd9f 1093 * - Activate the PCROP Mode FLASH_OB_PCROPSelectionConfig() function.
bwang 82:5e741c5ffd9f 1094 *
bwang 82:5e741c5ffd9f 1095 * @param OB_PCROP: Select the Protection Mode of nWPRi bits
bwang 82:5e741c5ffd9f 1096 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1097 * @arg OB_PcROP_Disable: nWRPi control the write protection of respective user sectors.
bwang 82:5e741c5ffd9f 1098 * @arg OB_PcROP_Enable: nWRPi control the read&write protection (PCROP) of respective user sectors.
bwang 82:5e741c5ffd9f 1099 * @retval None
bwang 82:5e741c5ffd9f 1100 */
bwang 82:5e741c5ffd9f 1101 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP)
bwang 82:5e741c5ffd9f 1102 {
bwang 82:5e741c5ffd9f 1103 uint8_t optiontmp = 0xFF;
bwang 82:5e741c5ffd9f 1104
bwang 82:5e741c5ffd9f 1105 /* Check the parameters */
bwang 82:5e741c5ffd9f 1106 assert_param(IS_OB_PCROP_SELECT(OB_PcROP));
bwang 82:5e741c5ffd9f 1107
bwang 82:5e741c5ffd9f 1108 /* Mask SPRMOD bit */
bwang 82:5e741c5ffd9f 1109 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bwang 82:5e741c5ffd9f 1110 /* Update Option Byte */
bwang 82:5e741c5ffd9f 1111 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PcROP | optiontmp);
bwang 82:5e741c5ffd9f 1112
bwang 82:5e741c5ffd9f 1113 }
bwang 82:5e741c5ffd9f 1114
bwang 82:5e741c5ffd9f 1115 /**
bwang 82:5e741c5ffd9f 1116 * @brief Enables or disables the read/write protection (PCROP) of the desired
bwang 82:5e741c5ffd9f 1117 * sectors, for the first 1 MB of the Flash.
bwang 82:5e741c5ffd9f 1118 *
bwang 82:5e741c5ffd9f 1119 * @note This function can be used only for STM32F42xxx/43xxx , STM32F401xx/411xE
bwang 82:5e741c5ffd9f 1120 * and STM32F412xG devices.
bwang 82:5e741c5ffd9f 1121 *
bwang 82:5e741c5ffd9f 1122 * @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
bwang 82:5e741c5ffd9f 1123 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1124 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector11 for
bwang 82:5e741c5ffd9f 1125 * STM32F42xxx/43xxx devices and between OB_PCROP_Sector0 and
bwang 82:5e741c5ffd9f 1126 * OB_PCROP_Sector5 for STM32F401xx/411xE devices.
bwang 82:5e741c5ffd9f 1127 * @arg OB_PCROP_Sector_All
bwang 82:5e741c5ffd9f 1128 * @param Newstate: new state of the Write Protection.
bwang 82:5e741c5ffd9f 1129 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 1130 * @retval None
bwang 82:5e741c5ffd9f 1131 */
bwang 82:5e741c5ffd9f 1132 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 1133 {
bwang 82:5e741c5ffd9f 1134 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1135
bwang 82:5e741c5ffd9f 1136 /* Check the parameters */
bwang 82:5e741c5ffd9f 1137 assert_param(IS_OB_PCROP(OB_PCROP));
bwang 82:5e741c5ffd9f 1138 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 1139
bwang 82:5e741c5ffd9f 1140 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1141
bwang 82:5e741c5ffd9f 1142 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1143 {
bwang 82:5e741c5ffd9f 1144 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 1145 {
bwang 82:5e741c5ffd9f 1146 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)OB_PCROP;
bwang 82:5e741c5ffd9f 1147 }
bwang 82:5e741c5ffd9f 1148 else
bwang 82:5e741c5ffd9f 1149 {
bwang 82:5e741c5ffd9f 1150 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~OB_PCROP);
bwang 82:5e741c5ffd9f 1151 }
bwang 82:5e741c5ffd9f 1152 }
bwang 82:5e741c5ffd9f 1153 }
bwang 82:5e741c5ffd9f 1154
bwang 82:5e741c5ffd9f 1155 /**
bwang 82:5e741c5ffd9f 1156 * @brief Enables or disables the read/write protection (PCROP) of the desired
bwang 82:5e741c5ffd9f 1157 * sectors
bwang 82:5e741c5ffd9f 1158 *
bwang 82:5e741c5ffd9f 1159 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 1160 *
bwang 82:5e741c5ffd9f 1161 * @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
bwang 82:5e741c5ffd9f 1162 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1163 * @arg OB_PCROP: A value between OB_PCROP_Sector12 and OB_PCROP_Sector23
bwang 82:5e741c5ffd9f 1164 * @arg OB_PCROP_Sector_All
bwang 82:5e741c5ffd9f 1165 * @param Newstate: new state of the Write Protection.
bwang 82:5e741c5ffd9f 1166 * This parameter can be: ENABLE or DISABLE.
bwang 82:5e741c5ffd9f 1167 * @retval None
bwang 82:5e741c5ffd9f 1168 */
bwang 82:5e741c5ffd9f 1169 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
bwang 82:5e741c5ffd9f 1170 {
bwang 82:5e741c5ffd9f 1171 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1172
bwang 82:5e741c5ffd9f 1173 /* Check the parameters */
bwang 82:5e741c5ffd9f 1174 assert_param(IS_OB_PCROP(OB_PCROP));
bwang 82:5e741c5ffd9f 1175 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 1176
bwang 82:5e741c5ffd9f 1177 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1178
bwang 82:5e741c5ffd9f 1179 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1180 {
bwang 82:5e741c5ffd9f 1181 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 1182 {
bwang 82:5e741c5ffd9f 1183 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)OB_PCROP;
bwang 82:5e741c5ffd9f 1184 }
bwang 82:5e741c5ffd9f 1185 else
bwang 82:5e741c5ffd9f 1186 {
bwang 82:5e741c5ffd9f 1187 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~OB_PCROP);
bwang 82:5e741c5ffd9f 1188 }
bwang 82:5e741c5ffd9f 1189 }
bwang 82:5e741c5ffd9f 1190 }
bwang 82:5e741c5ffd9f 1191
bwang 82:5e741c5ffd9f 1192
bwang 82:5e741c5ffd9f 1193 /**
bwang 82:5e741c5ffd9f 1194 * @brief Sets the read protection level.
bwang 82:5e741c5ffd9f 1195 * @param OB_RDP: specifies the read protection level.
bwang 82:5e741c5ffd9f 1196 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1197 * @arg OB_RDP_Level_0: No protection
bwang 82:5e741c5ffd9f 1198 * @arg OB_RDP_Level_1: Read protection of the memory
bwang 82:5e741c5ffd9f 1199 * @arg OB_RDP_Level_2: Full chip protection
bwang 82:5e741c5ffd9f 1200 *
bwang 82:5e741c5ffd9f 1201 * /!\ Warning /!\ When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
bwang 82:5e741c5ffd9f 1202 *
bwang 82:5e741c5ffd9f 1203 * @retval None
bwang 82:5e741c5ffd9f 1204 */
bwang 82:5e741c5ffd9f 1205 void FLASH_OB_RDPConfig(uint8_t OB_RDP)
bwang 82:5e741c5ffd9f 1206 {
bwang 82:5e741c5ffd9f 1207 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1208
bwang 82:5e741c5ffd9f 1209 /* Check the parameters */
bwang 82:5e741c5ffd9f 1210 assert_param(IS_OB_RDP(OB_RDP));
bwang 82:5e741c5ffd9f 1211
bwang 82:5e741c5ffd9f 1212 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1213
bwang 82:5e741c5ffd9f 1214 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1215 {
bwang 82:5e741c5ffd9f 1216 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = OB_RDP;
bwang 82:5e741c5ffd9f 1217
bwang 82:5e741c5ffd9f 1218 }
bwang 82:5e741c5ffd9f 1219 }
bwang 82:5e741c5ffd9f 1220
bwang 82:5e741c5ffd9f 1221 /**
bwang 82:5e741c5ffd9f 1222 * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
bwang 82:5e741c5ffd9f 1223 * @param OB_IWDG: Selects the IWDG mode
bwang 82:5e741c5ffd9f 1224 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1225 * @arg OB_IWDG_SW: Software IWDG selected
bwang 82:5e741c5ffd9f 1226 * @arg OB_IWDG_HW: Hardware IWDG selected
bwang 82:5e741c5ffd9f 1227 * @param OB_STOP: Reset event when entering STOP mode.
bwang 82:5e741c5ffd9f 1228 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1229 * @arg OB_STOP_NoRST: No reset generated when entering in STOP
bwang 82:5e741c5ffd9f 1230 * @arg OB_STOP_RST: Reset generated when entering in STOP
bwang 82:5e741c5ffd9f 1231 * @param OB_STDBY: Reset event when entering Standby mode.
bwang 82:5e741c5ffd9f 1232 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1233 * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
bwang 82:5e741c5ffd9f 1234 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
bwang 82:5e741c5ffd9f 1235 * @retval None
bwang 82:5e741c5ffd9f 1236 */
bwang 82:5e741c5ffd9f 1237 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang 82:5e741c5ffd9f 1238 {
bwang 82:5e741c5ffd9f 1239 uint8_t optiontmp = 0xFF;
bwang 82:5e741c5ffd9f 1240 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1241
bwang 82:5e741c5ffd9f 1242 /* Check the parameters */
bwang 82:5e741c5ffd9f 1243 assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
bwang 82:5e741c5ffd9f 1244 assert_param(IS_OB_STOP_SOURCE(OB_STOP));
bwang 82:5e741c5ffd9f 1245 assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
bwang 82:5e741c5ffd9f 1246
bwang 82:5e741c5ffd9f 1247 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 1248 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1249
bwang 82:5e741c5ffd9f 1250 if(status == FLASH_COMPLETE2)
bwang 82:5e741c5ffd9f 1251 {
bwang 82:5e741c5ffd9f 1252 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx)
bwang 82:5e741c5ffd9f 1253 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
bwang 82:5e741c5ffd9f 1254 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
bwang 82:5e741c5ffd9f 1255 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
bwang 82:5e741c5ffd9f 1256
bwang 82:5e741c5ffd9f 1257 #if defined(STM32F40_41xxx) || defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F446xx)
bwang 82:5e741c5ffd9f 1258 /* Mask OPTLOCK, OPTSTRT and BOR_LEV bits */
bwang 82:5e741c5ffd9f 1259 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0F);
bwang 82:5e741c5ffd9f 1260 #endif /* STM32F40_41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
bwang 82:5e741c5ffd9f 1261
bwang 82:5e741c5ffd9f 1262 /* Update User Option Byte */
bwang 82:5e741c5ffd9f 1263 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = OB_IWDG | (uint8_t)(OB_STDBY | (uint8_t)(OB_STOP | ((uint8_t)optiontmp)));
bwang 82:5e741c5ffd9f 1264 }
bwang 82:5e741c5ffd9f 1265 }
bwang 82:5e741c5ffd9f 1266
bwang 82:5e741c5ffd9f 1267 /**
bwang 82:5e741c5ffd9f 1268 * @brief Configure the Dual Bank Boot.
bwang 82:5e741c5ffd9f 1269 *
bwang 82:5e741c5ffd9f 1270 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 1271 *
bwang 82:5e741c5ffd9f 1272 * @param OB_BOOT: specifies the Dual Bank Boot Option byte.
bwang 82:5e741c5ffd9f 1273 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1274 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
bwang 82:5e741c5ffd9f 1275 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
bwang 82:5e741c5ffd9f 1276 * @retval None
bwang 82:5e741c5ffd9f 1277 */
bwang 82:5e741c5ffd9f 1278 void FLASH_OB_BootConfig(uint8_t OB_BOOT)
bwang 82:5e741c5ffd9f 1279 {
bwang 82:5e741c5ffd9f 1280 /* Check the parameters */
bwang 82:5e741c5ffd9f 1281 assert_param(IS_OB_BOOT(OB_BOOT));
bwang 82:5e741c5ffd9f 1282
bwang 82:5e741c5ffd9f 1283 /* Set Dual Bank Boot */
bwang 82:5e741c5ffd9f 1284 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
bwang 82:5e741c5ffd9f 1285 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= OB_BOOT;
bwang 82:5e741c5ffd9f 1286
bwang 82:5e741c5ffd9f 1287 }
bwang 82:5e741c5ffd9f 1288
bwang 82:5e741c5ffd9f 1289 /**
bwang 82:5e741c5ffd9f 1290 * @brief Sets the BOR Level.
bwang 82:5e741c5ffd9f 1291 * @param OB_BOR: specifies the Option Bytes BOR Reset Level.
bwang 82:5e741c5ffd9f 1292 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1293 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bwang 82:5e741c5ffd9f 1294 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bwang 82:5e741c5ffd9f 1295 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bwang 82:5e741c5ffd9f 1296 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
bwang 82:5e741c5ffd9f 1297 * @retval None
bwang 82:5e741c5ffd9f 1298 */
bwang 82:5e741c5ffd9f 1299 void FLASH_OB_BORConfig(uint8_t OB_BOR)
bwang 82:5e741c5ffd9f 1300 {
bwang 82:5e741c5ffd9f 1301 /* Check the parameters */
bwang 82:5e741c5ffd9f 1302 assert_param(IS_OB_BOR(OB_BOR));
bwang 82:5e741c5ffd9f 1303
bwang 82:5e741c5ffd9f 1304 /* Set the BOR Level */
bwang 82:5e741c5ffd9f 1305 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
bwang 82:5e741c5ffd9f 1306 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= OB_BOR;
bwang 82:5e741c5ffd9f 1307
bwang 82:5e741c5ffd9f 1308 }
bwang 82:5e741c5ffd9f 1309
bwang 82:5e741c5ffd9f 1310 /**
bwang 82:5e741c5ffd9f 1311 * @brief Launch the option byte loading.
bwang 82:5e741c5ffd9f 1312 * @param None
bwang 82:5e741c5ffd9f 1313 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 1314 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 1315 */
bwang 82:5e741c5ffd9f 1316 FLASH_Status FLASH_OB_Launch(void)
bwang 82:5e741c5ffd9f 1317 {
bwang 82:5e741c5ffd9f 1318 FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1319
bwang 82:5e741c5ffd9f 1320 /* Set the OPTSTRT bit in OPTCR register */
bwang 82:5e741c5ffd9f 1321 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT;
bwang 82:5e741c5ffd9f 1322
bwang 82:5e741c5ffd9f 1323 /* Wait for last operation to be completed */
bwang 82:5e741c5ffd9f 1324 status = FLASH_WaitForLastOperation2();
bwang 82:5e741c5ffd9f 1325
bwang 82:5e741c5ffd9f 1326 return status;
bwang 82:5e741c5ffd9f 1327 }
bwang 82:5e741c5ffd9f 1328
bwang 82:5e741c5ffd9f 1329 /**
bwang 82:5e741c5ffd9f 1330 * @brief Returns the FLASH User Option Bytes values.
bwang 82:5e741c5ffd9f 1331 * @param None
bwang 82:5e741c5ffd9f 1332 * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
bwang 82:5e741c5ffd9f 1333 * and RST_STDBY(Bit2).
bwang 82:5e741c5ffd9f 1334 */
bwang 82:5e741c5ffd9f 1335 uint8_t FLASH_OB_GetUser(void)
bwang 82:5e741c5ffd9f 1336 {
bwang 82:5e741c5ffd9f 1337 /* Return the User Option Byte */
bwang 82:5e741c5ffd9f 1338 return (uint8_t)(FLASH->OPTCR >> 5);
bwang 82:5e741c5ffd9f 1339 }
bwang 82:5e741c5ffd9f 1340
bwang 82:5e741c5ffd9f 1341 /**
bwang 82:5e741c5ffd9f 1342 * @brief Returns the FLASH Write Protection Option Bytes value.
bwang 82:5e741c5ffd9f 1343 * @param None
bwang 82:5e741c5ffd9f 1344 * @retval The FLASH Write Protection Option Bytes value
bwang 82:5e741c5ffd9f 1345 */
bwang 82:5e741c5ffd9f 1346 uint16_t FLASH_OB_GetWRP(void)
bwang 82:5e741c5ffd9f 1347 {
bwang 82:5e741c5ffd9f 1348 /* Return the FLASH write protection Register value */
bwang 82:5e741c5ffd9f 1349 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
bwang 82:5e741c5ffd9f 1350 }
bwang 82:5e741c5ffd9f 1351
bwang 82:5e741c5ffd9f 1352 /**
bwang 82:5e741c5ffd9f 1353 * @brief Returns the FLASH Write Protection Option Bytes value.
bwang 82:5e741c5ffd9f 1354 *
bwang 82:5e741c5ffd9f 1355 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 1356 *
bwang 82:5e741c5ffd9f 1357 * @param None
bwang 82:5e741c5ffd9f 1358 * @retval The FLASH Write Protection Option Bytes value
bwang 82:5e741c5ffd9f 1359 */
bwang 82:5e741c5ffd9f 1360 uint16_t FLASH_OB_GetWRP1(void)
bwang 82:5e741c5ffd9f 1361 {
bwang 82:5e741c5ffd9f 1362 /* Return the FLASH write protection Register value */
bwang 82:5e741c5ffd9f 1363 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
bwang 82:5e741c5ffd9f 1364 }
bwang 82:5e741c5ffd9f 1365
bwang 82:5e741c5ffd9f 1366 /**
bwang 82:5e741c5ffd9f 1367 * @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
bwang 82:5e741c5ffd9f 1368 *
bwang 82:5e741c5ffd9f 1369 * @note This function can be used only for STM32F42xxx/43xxx devices and STM32F401xx/411xE devices.
bwang 82:5e741c5ffd9f 1370 *
bwang 82:5e741c5ffd9f 1371 * @param None
bwang 82:5e741c5ffd9f 1372 * @retval The FLASH PC Read/Write Protection Option Bytes value
bwang 82:5e741c5ffd9f 1373 */
bwang 82:5e741c5ffd9f 1374 uint16_t FLASH_OB_GetPCROP(void)
bwang 82:5e741c5ffd9f 1375 {
bwang 82:5e741c5ffd9f 1376 /* Return the FLASH PC Read/write protection Register value */
bwang 82:5e741c5ffd9f 1377 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
bwang 82:5e741c5ffd9f 1378 }
bwang 82:5e741c5ffd9f 1379
bwang 82:5e741c5ffd9f 1380 /**
bwang 82:5e741c5ffd9f 1381 * @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
bwang 82:5e741c5ffd9f 1382 *
bwang 82:5e741c5ffd9f 1383 * @note This function can be used only for STM32F42xxx/43xxx devices.
bwang 82:5e741c5ffd9f 1384 *
bwang 82:5e741c5ffd9f 1385 * @param None
bwang 82:5e741c5ffd9f 1386 * @retval The FLASH PC Read/Write Protection Option Bytes value
bwang 82:5e741c5ffd9f 1387 */
bwang 82:5e741c5ffd9f 1388 uint16_t FLASH_OB_GetPCROP1(void)
bwang 82:5e741c5ffd9f 1389 {
bwang 82:5e741c5ffd9f 1390 /* Return the FLASH write protection Register value */
bwang 82:5e741c5ffd9f 1391 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
bwang 82:5e741c5ffd9f 1392 }
bwang 82:5e741c5ffd9f 1393
bwang 82:5e741c5ffd9f 1394 /**
bwang 82:5e741c5ffd9f 1395 * @brief Returns the FLASH Read Protection level.
bwang 82:5e741c5ffd9f 1396 * @param None
bwang 82:5e741c5ffd9f 1397 * @retval FLASH ReadOut Protection Status:
bwang 82:5e741c5ffd9f 1398 * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
bwang 82:5e741c5ffd9f 1399 * - RESET, when OB_RDP_Level_0 is set
bwang 82:5e741c5ffd9f 1400 */
bwang 82:5e741c5ffd9f 1401 FlagStatus FLASH_OB_GetRDP(void)
bwang 82:5e741c5ffd9f 1402 {
bwang 82:5e741c5ffd9f 1403 FlagStatus readstatus = RESET;
bwang 82:5e741c5ffd9f 1404
bwang 82:5e741c5ffd9f 1405 if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_0))
bwang 82:5e741c5ffd9f 1406 {
bwang 82:5e741c5ffd9f 1407 readstatus = SET;
bwang 82:5e741c5ffd9f 1408 }
bwang 82:5e741c5ffd9f 1409 else
bwang 82:5e741c5ffd9f 1410 {
bwang 82:5e741c5ffd9f 1411 readstatus = RESET;
bwang 82:5e741c5ffd9f 1412 }
bwang 82:5e741c5ffd9f 1413 return readstatus;
bwang 82:5e741c5ffd9f 1414 }
bwang 82:5e741c5ffd9f 1415
bwang 82:5e741c5ffd9f 1416 /**
bwang 82:5e741c5ffd9f 1417 * @brief Returns the FLASH BOR level.
bwang 82:5e741c5ffd9f 1418 * @param None
bwang 82:5e741c5ffd9f 1419 * @retval The FLASH BOR level:
bwang 82:5e741c5ffd9f 1420 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bwang 82:5e741c5ffd9f 1421 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bwang 82:5e741c5ffd9f 1422 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bwang 82:5e741c5ffd9f 1423 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
bwang 82:5e741c5ffd9f 1424 */
bwang 82:5e741c5ffd9f 1425 uint8_t FLASH_OB_GetBOR(void)
bwang 82:5e741c5ffd9f 1426 {
bwang 82:5e741c5ffd9f 1427 /* Return the FLASH BOR level */
bwang 82:5e741c5ffd9f 1428 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
bwang 82:5e741c5ffd9f 1429 }
bwang 82:5e741c5ffd9f 1430
bwang 82:5e741c5ffd9f 1431 /**
bwang 82:5e741c5ffd9f 1432 * @}
bwang 82:5e741c5ffd9f 1433 */
bwang 82:5e741c5ffd9f 1434
bwang 82:5e741c5ffd9f 1435 /** @defgroup FLASH_Group4 Interrupts and flags management functions
bwang 82:5e741c5ffd9f 1436 * @brief Interrupts and flags management functions
bwang 82:5e741c5ffd9f 1437 *
bwang 82:5e741c5ffd9f 1438 @verbatim
bwang 82:5e741c5ffd9f 1439 ===============================================================================
bwang 82:5e741c5ffd9f 1440 ##### Interrupts and flags management functions #####
bwang 82:5e741c5ffd9f 1441 ===============================================================================
bwang 82:5e741c5ffd9f 1442 @endverbatim
bwang 82:5e741c5ffd9f 1443 * @{
bwang 82:5e741c5ffd9f 1444 */
bwang 82:5e741c5ffd9f 1445
bwang 82:5e741c5ffd9f 1446 /**
bwang 82:5e741c5ffd9f 1447 * @brief Enables or disables the specified FLASH interrupts.
bwang 82:5e741c5ffd9f 1448 * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled.
bwang 82:5e741c5ffd9f 1449 * This parameter can be any combination of the following values:
bwang 82:5e741c5ffd9f 1450 * @arg FLASH_IT_ERR: FLASH Error Interrupt
bwang 82:5e741c5ffd9f 1451 * @arg FLASH_IT_EOP: FLASH end of operation Interrupt
bwang 82:5e741c5ffd9f 1452 * @retval None
bwang 82:5e741c5ffd9f 1453 */
bwang 82:5e741c5ffd9f 1454 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
bwang 82:5e741c5ffd9f 1455 {
bwang 82:5e741c5ffd9f 1456 /* Check the parameters */
bwang 82:5e741c5ffd9f 1457 assert_param(IS_FLASH_IT(FLASH_IT));
bwang 82:5e741c5ffd9f 1458 assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang 82:5e741c5ffd9f 1459
bwang 82:5e741c5ffd9f 1460 if(NewState != DISABLE)
bwang 82:5e741c5ffd9f 1461 {
bwang 82:5e741c5ffd9f 1462 /* Enable the interrupt sources */
bwang 82:5e741c5ffd9f 1463 FLASH->CR |= FLASH_IT;
bwang 82:5e741c5ffd9f 1464 }
bwang 82:5e741c5ffd9f 1465 else
bwang 82:5e741c5ffd9f 1466 {
bwang 82:5e741c5ffd9f 1467 /* Disable the interrupt sources */
bwang 82:5e741c5ffd9f 1468 FLASH->CR &= ~(uint32_t)FLASH_IT;
bwang 82:5e741c5ffd9f 1469 }
bwang 82:5e741c5ffd9f 1470 }
bwang 82:5e741c5ffd9f 1471
bwang 82:5e741c5ffd9f 1472 /**
bwang 82:5e741c5ffd9f 1473 * @brief Checks whether the specified FLASH flag is set or not.
bwang 82:5e741c5ffd9f 1474 * @param FLASH_FLAG: specifies the FLASH flag to check.
bwang 82:5e741c5ffd9f 1475 * This parameter can be one of the following values:
bwang 82:5e741c5ffd9f 1476 * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
bwang 82:5e741c5ffd9f 1477 * @arg FLASH_FLAG_OPERR: FLASH operation Error flag
bwang 82:5e741c5ffd9f 1478 * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
bwang 82:5e741c5ffd9f 1479 * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
bwang 82:5e741c5ffd9f 1480 * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
bwang 82:5e741c5ffd9f 1481 * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
bwang 82:5e741c5ffd9f 1482 * @arg FLASH_FLAG_RDERR: FLASH (PCROP) Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
bwang 82:5e741c5ffd9f 1483 * @arg FLASH_FLAG_BSY: FLASH Busy flag
bwang 82:5e741c5ffd9f 1484 * @retval The new state of FLASH_FLAG (SET or RESET).
bwang 82:5e741c5ffd9f 1485 */
bwang 82:5e741c5ffd9f 1486 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
bwang 82:5e741c5ffd9f 1487 {
bwang 82:5e741c5ffd9f 1488 FlagStatus bitstatus = RESET;
bwang 82:5e741c5ffd9f 1489 /* Check the parameters */
bwang 82:5e741c5ffd9f 1490 assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG));
bwang 82:5e741c5ffd9f 1491
bwang 82:5e741c5ffd9f 1492 if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
bwang 82:5e741c5ffd9f 1493 {
bwang 82:5e741c5ffd9f 1494 bitstatus = SET;
bwang 82:5e741c5ffd9f 1495 }
bwang 82:5e741c5ffd9f 1496 else
bwang 82:5e741c5ffd9f 1497 {
bwang 82:5e741c5ffd9f 1498 bitstatus = RESET;
bwang 82:5e741c5ffd9f 1499 }
bwang 82:5e741c5ffd9f 1500 /* Return the new state of FLASH_FLAG (SET or RESET) */
bwang 82:5e741c5ffd9f 1501 return bitstatus;
bwang 82:5e741c5ffd9f 1502 }
bwang 82:5e741c5ffd9f 1503
bwang 82:5e741c5ffd9f 1504 /**
bwang 82:5e741c5ffd9f 1505 * @brief Clears the FLASH's pending flags.
bwang 82:5e741c5ffd9f 1506 * @param FLASH_FLAG: specifies the FLASH flags to clear.
bwang 82:5e741c5ffd9f 1507 * This parameter can be any combination of the following values:
bwang 82:5e741c5ffd9f 1508 * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
bwang 82:5e741c5ffd9f 1509 * @arg FLASH_FLAG_OPERR: FLASH operation Error flag
bwang 82:5e741c5ffd9f 1510 * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
bwang 82:5e741c5ffd9f 1511 * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
bwang 82:5e741c5ffd9f 1512 * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
bwang 82:5e741c5ffd9f 1513 * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
bwang 82:5e741c5ffd9f 1514 * @arg FLASH_FLAG_RDERR: FLASH Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
bwang 82:5e741c5ffd9f 1515 * @retval None
bwang 82:5e741c5ffd9f 1516 */
bwang 82:5e741c5ffd9f 1517 void FLASH_ClearFlag(uint32_t FLASH_FLAG)
bwang 82:5e741c5ffd9f 1518 {
bwang 82:5e741c5ffd9f 1519 /* Check the parameters */
bwang 82:5e741c5ffd9f 1520 assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG));
bwang 82:5e741c5ffd9f 1521
bwang 82:5e741c5ffd9f 1522 /* Clear the flags */
bwang 82:5e741c5ffd9f 1523 FLASH->SR = FLASH_FLAG;
bwang 82:5e741c5ffd9f 1524 }
bwang 82:5e741c5ffd9f 1525
bwang 82:5e741c5ffd9f 1526 /**
bwang 82:5e741c5ffd9f 1527 * @brief Returns the FLASH Status.
bwang 82:5e741c5ffd9f 1528 * @param None
bwang 82:5e741c5ffd9f 1529 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 1530 * FLASH_ERROR_WRP2, FLASH_ERROR_RD2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 1531 */
bwang 82:5e741c5ffd9f 1532 FLASH_Status FLASH_GetStatus(void)
bwang 82:5e741c5ffd9f 1533 {
bwang 82:5e741c5ffd9f 1534 FLASH_Status flashstatus = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1535
bwang 82:5e741c5ffd9f 1536 if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
bwang 82:5e741c5ffd9f 1537 {
bwang 82:5e741c5ffd9f 1538 flashstatus = FLASH_BUSY2;
bwang 82:5e741c5ffd9f 1539 }
bwang 82:5e741c5ffd9f 1540 else
bwang 82:5e741c5ffd9f 1541 {
bwang 82:5e741c5ffd9f 1542 if((FLASH->SR & FLASH_FLAG_WRPERR) != (uint32_t)0x00)
bwang 82:5e741c5ffd9f 1543 {
bwang 82:5e741c5ffd9f 1544 flashstatus = FLASH_ERROR_WRP2;
bwang 82:5e741c5ffd9f 1545 }
bwang 82:5e741c5ffd9f 1546 else
bwang 82:5e741c5ffd9f 1547 {
bwang 82:5e741c5ffd9f 1548 if((FLASH->SR & FLASH_FLAG_RDERR) != (uint32_t)0x00)
bwang 82:5e741c5ffd9f 1549 {
bwang 82:5e741c5ffd9f 1550 flashstatus = FLASH_ERROR_RD2;
bwang 82:5e741c5ffd9f 1551 }
bwang 82:5e741c5ffd9f 1552 else
bwang 82:5e741c5ffd9f 1553 {
bwang 82:5e741c5ffd9f 1554 if((FLASH->SR & (uint32_t)0xE0) != (uint32_t)0x00)
bwang 82:5e741c5ffd9f 1555 {
bwang 82:5e741c5ffd9f 1556 flashstatus = FLASH_ERROR_PROGRAM2;
bwang 82:5e741c5ffd9f 1557 }
bwang 82:5e741c5ffd9f 1558 else
bwang 82:5e741c5ffd9f 1559 {
bwang 82:5e741c5ffd9f 1560 if((FLASH->SR & FLASH_FLAG_OPERR) != (uint32_t)0x00)
bwang 82:5e741c5ffd9f 1561 {
bwang 82:5e741c5ffd9f 1562 flashstatus = FLASH_ERROR_OPERATION2;
bwang 82:5e741c5ffd9f 1563 }
bwang 82:5e741c5ffd9f 1564 else
bwang 82:5e741c5ffd9f 1565 {
bwang 82:5e741c5ffd9f 1566 flashstatus = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1567 }
bwang 82:5e741c5ffd9f 1568 }
bwang 82:5e741c5ffd9f 1569 }
bwang 82:5e741c5ffd9f 1570 }
bwang 82:5e741c5ffd9f 1571 }
bwang 82:5e741c5ffd9f 1572 /* Return the FLASH Status */
bwang 82:5e741c5ffd9f 1573 return flashstatus;
bwang 82:5e741c5ffd9f 1574 }
bwang 82:5e741c5ffd9f 1575
bwang 82:5e741c5ffd9f 1576 /**
bwang 82:5e741c5ffd9f 1577 * @brief Waits for a FLASH operation to complete.
bwang 82:5e741c5ffd9f 1578 * @param None
bwang 82:5e741c5ffd9f 1579 * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang 82:5e741c5ffd9f 1580 * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang 82:5e741c5ffd9f 1581 */
bwang 82:5e741c5ffd9f 1582 FLASH_Status FLASH_WaitForLastOperation2(void)
bwang 82:5e741c5ffd9f 1583 {
bwang 82:5e741c5ffd9f 1584 __IO FLASH_Status status = FLASH_COMPLETE2;
bwang 82:5e741c5ffd9f 1585
bwang 82:5e741c5ffd9f 1586 /* Check for the FLASH Status */
bwang 82:5e741c5ffd9f 1587 status = FLASH_GetStatus();
bwang 82:5e741c5ffd9f 1588
bwang 82:5e741c5ffd9f 1589 /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
bwang 82:5e741c5ffd9f 1590 Even if the FLASH operation fails, the BUSY flag will be reset and an error
bwang 82:5e741c5ffd9f 1591 flag will be set */
bwang 82:5e741c5ffd9f 1592 while(status == FLASH_BUSY2)
bwang 82:5e741c5ffd9f 1593 {
bwang 82:5e741c5ffd9f 1594 status = FLASH_GetStatus();
bwang 82:5e741c5ffd9f 1595 }
bwang 82:5e741c5ffd9f 1596 /* Return the operation status */
bwang 82:5e741c5ffd9f 1597 return status;
bwang 82:5e741c5ffd9f 1598 }
bwang 82:5e741c5ffd9f 1599
bwang 82:5e741c5ffd9f 1600 /**
bwang 82:5e741c5ffd9f 1601 * @}
bwang 82:5e741c5ffd9f 1602 */
bwang 82:5e741c5ffd9f 1603
bwang 82:5e741c5ffd9f 1604 /**
bwang 82:5e741c5ffd9f 1605 * @}
bwang 82:5e741c5ffd9f 1606 */
bwang 82:5e741c5ffd9f 1607
bwang 82:5e741c5ffd9f 1608 /**
bwang 82:5e741c5ffd9f 1609 * @}
bwang 82:5e741c5ffd9f 1610 */
bwang 82:5e741c5ffd9f 1611
bwang 82:5e741c5ffd9f 1612 /**
bwang 82:5e741c5ffd9f 1613 * @}
bwang 82:5e741c5ffd9f 1614 */
bwang 82:5e741c5ffd9f 1615
bwang 82:5e741c5ffd9f 1616 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/