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Dependencies:   FastPWM3 mbed

PreferenceWriter/stm32f4xx_flash.h@178:4e721c904fd7, 2018-02-08 (annotated)

Committer:
bwang
Date:
Thu Feb 08 02:16:04 2018 +0000
Revision:
178:4e721c904fd7
02/07/2018 21:15 - moved PreferenceWriter and prefs.h back from test project, code still compiles

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 178:4e721c904fd7 1 /**
bwang 178:4e721c904fd7 2 ******************************************************************************
bwang 178:4e721c904fd7 3 * @file stm32f4xx_flash.h
bwang 178:4e721c904fd7 4 * @author MCD Application Team
bwang 178:4e721c904fd7 5 * @version V1.7.1
bwang 178:4e721c904fd7 6 * @date 20-May-2016
bwang 178:4e721c904fd7 7 * @brief This file contains all the functions prototypes for the FLASH
bwang 178:4e721c904fd7 8 * firmware library.
bwang 178:4e721c904fd7 9 ******************************************************************************
bwang 178:4e721c904fd7 10 * @attention
bwang 178:4e721c904fd7 11 *
bwang 178:4e721c904fd7 12 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
bwang 178:4e721c904fd7 13 *
bwang 178:4e721c904fd7 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
bwang 178:4e721c904fd7 15 * You may not use this file except in compliance with the License.
bwang 178:4e721c904fd7 16 * You may obtain a copy of the License at:
bwang 178:4e721c904fd7 17 *
bwang 178:4e721c904fd7 18 * http://www.st.com/software_license_agreement_liberty_v2
bwang 178:4e721c904fd7 19 *
bwang 178:4e721c904fd7 20 * Unless required by applicable law or agreed to in writing, software
bwang 178:4e721c904fd7 21 * distributed under the License is distributed on an "AS IS" BASIS,
bwang 178:4e721c904fd7 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bwang 178:4e721c904fd7 23 * See the License for the specific language governing permissions and
bwang 178:4e721c904fd7 24 * limitations under the License.
bwang 178:4e721c904fd7 25 *
bwang 178:4e721c904fd7 26 ******************************************************************************
bwang 178:4e721c904fd7 27 */
bwang 178:4e721c904fd7 28
bwang 178:4e721c904fd7 29 /* Define to prevent recursive inclusion -------------------------------------*/
bwang 178:4e721c904fd7 30 #ifndef __STM32F4xx_FLASH_H
bwang 178:4e721c904fd7 31 #define __STM32F4xx_FLASH_H
bwang 178:4e721c904fd7 32
bwang 178:4e721c904fd7 33 #ifdef __cplusplus
bwang 178:4e721c904fd7 34 extern "C" {
bwang 178:4e721c904fd7 35 #endif
bwang 178:4e721c904fd7 36
bwang 178:4e721c904fd7 37 /* Includes ------------------------------------------------------------------*/
bwang 178:4e721c904fd7 38 #include "stm32f4xx.h"
bwang 178:4e721c904fd7 39
bwang 178:4e721c904fd7 40 /** @addtogroup STM32F4xx_StdPeriph_Driver
bwang 178:4e721c904fd7 41 * @{
bwang 178:4e721c904fd7 42 */
bwang 178:4e721c904fd7 43
bwang 178:4e721c904fd7 44 /** @addtogroup FLASH
bwang 178:4e721c904fd7 45 * @{
bwang 178:4e721c904fd7 46 */
bwang 178:4e721c904fd7 47
bwang 178:4e721c904fd7 48 /* Exported types ------------------------------------------------------------*/
bwang 178:4e721c904fd7 49 /**
bwang 178:4e721c904fd7 50 * @brief FLASH Status
bwang 178:4e721c904fd7 51 */
bwang 178:4e721c904fd7 52 typedef enum
bwang 178:4e721c904fd7 53 {
bwang 178:4e721c904fd7 54 FLASH_BUSY2 = 1,
bwang 178:4e721c904fd7 55 FLASH_ERROR_RD2,
bwang 178:4e721c904fd7 56 FLASH_ERROR_PGS2,
bwang 178:4e721c904fd7 57 FLASH_ERROR_PGP2,
bwang 178:4e721c904fd7 58 FLASH_ERROR_PGA2,
bwang 178:4e721c904fd7 59 FLASH_ERROR_WRP2,
bwang 178:4e721c904fd7 60 FLASH_ERROR_PROGRAM2,
bwang 178:4e721c904fd7 61 FLASH_ERROR_OPERATION2,
bwang 178:4e721c904fd7 62 FLASH_COMPLETE2
bwang 178:4e721c904fd7 63 }FLASH_Status;
bwang 178:4e721c904fd7 64
bwang 178:4e721c904fd7 65 /* Exported constants --------------------------------------------------------*/
bwang 178:4e721c904fd7 66
bwang 178:4e721c904fd7 67 /** @defgroup FLASH_Exported_Constants
bwang 178:4e721c904fd7 68 * @{
bwang 178:4e721c904fd7 69 */
bwang 178:4e721c904fd7 70
bwang 178:4e721c904fd7 71 /** @defgroup Flash_Latency
bwang 178:4e721c904fd7 72 * @{
bwang 178:4e721c904fd7 73 */
bwang 178:4e721c904fd7 74 #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
bwang 178:4e721c904fd7 75 #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
bwang 178:4e721c904fd7 76 #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
bwang 178:4e721c904fd7 77 #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
bwang 178:4e721c904fd7 78 #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
bwang 178:4e721c904fd7 79 #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
bwang 178:4e721c904fd7 80 #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
bwang 178:4e721c904fd7 81 #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
bwang 178:4e721c904fd7 82 #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */
bwang 178:4e721c904fd7 83 #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */
bwang 178:4e721c904fd7 84 #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */
bwang 178:4e721c904fd7 85 #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */
bwang 178:4e721c904fd7 86 #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */
bwang 178:4e721c904fd7 87 #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */
bwang 178:4e721c904fd7 88 #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */
bwang 178:4e721c904fd7 89 #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */
bwang 178:4e721c904fd7 90
bwang 178:4e721c904fd7 91 /**
bwang 178:4e721c904fd7 92 * @}
bwang 178:4e721c904fd7 93 */
bwang 178:4e721c904fd7 94
bwang 178:4e721c904fd7 95 /** @defgroup FLASH_Voltage_Range
bwang 178:4e721c904fd7 96 * @{
bwang 178:4e721c904fd7 97 */
bwang 178:4e721c904fd7 98 #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
bwang 178:4e721c904fd7 99 #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */
bwang 178:4e721c904fd7 100 #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */
bwang 178:4e721c904fd7 101 #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */
bwang 178:4e721c904fd7 102
bwang 178:4e721c904fd7 103 /*
bwang 178:4e721c904fd7 104 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \
bwang 178:4e721c904fd7 105 ((RANGE) == VoltageRange_2) || \
bwang 178:4e721c904fd7 106 ((RANGE) == VoltageRange_3) || \
bwang 178:4e721c904fd7 107 ((RANGE) == VoltageRange_4))
bwang 178:4e721c904fd7 108 */
bwang 178:4e721c904fd7 109
bwang 178:4e721c904fd7 110 /**
bwang 178:4e721c904fd7 111 * @}
bwang 178:4e721c904fd7 112 */
bwang 178:4e721c904fd7 113
bwang 178:4e721c904fd7 114 /** @defgroup FLASH_Sectors
bwang 178:4e721c904fd7 115 * @{
bwang 178:4e721c904fd7 116 */
bwang 178:4e721c904fd7 117 #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
bwang 178:4e721c904fd7 118 #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
bwang 178:4e721c904fd7 119 #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
bwang 178:4e721c904fd7 120 #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
bwang 178:4e721c904fd7 121 #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
bwang 178:4e721c904fd7 122 #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
bwang 178:4e721c904fd7 123 #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
bwang 178:4e721c904fd7 124 #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
bwang 178:4e721c904fd7 125 #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
bwang 178:4e721c904fd7 126 #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
bwang 178:4e721c904fd7 127 #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
bwang 178:4e721c904fd7 128 #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
bwang 178:4e721c904fd7 129 #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */
bwang 178:4e721c904fd7 130 #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */
bwang 178:4e721c904fd7 131 #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */
bwang 178:4e721c904fd7 132 #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */
bwang 178:4e721c904fd7 133 #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */
bwang 178:4e721c904fd7 134 #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */
bwang 178:4e721c904fd7 135 #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */
bwang 178:4e721c904fd7 136 #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */
bwang 178:4e721c904fd7 137 #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */
bwang 178:4e721c904fd7 138 #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */
bwang 178:4e721c904fd7 139 #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */
bwang 178:4e721c904fd7 140 #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */
bwang 178:4e721c904fd7 141
bwang 178:4e721c904fd7 142 #if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx)
bwang 178:4e721c904fd7 143 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\
bwang 178:4e721c904fd7 144 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 178:4e721c904fd7 145 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
bwang 178:4e721c904fd7 146
bwang 178:4e721c904fd7 147 #if defined (STM32F40_41xxx) || defined(STM32F412xG)
bwang 178:4e721c904fd7 148 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\
bwang 178:4e721c904fd7 149 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 178:4e721c904fd7 150 #endif /* STM32F40_41xxx || STM32F412xG */
bwang 178:4e721c904fd7 151
bwang 178:4e721c904fd7 152 #if defined (STM32F401xx)
bwang 178:4e721c904fd7 153 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\
bwang 178:4e721c904fd7 154 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 178:4e721c904fd7 155 #endif /* STM32F401xx */
bwang 178:4e721c904fd7 156
bwang 178:4e721c904fd7 157 #if defined (STM32F411xE) || defined (STM32F446xx)
bwang 178:4e721c904fd7 158 //#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\
bwang 178:4e721c904fd7 159 // (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 178:4e721c904fd7 160 #endif /* STM32F411xE || STM32F446xx */
bwang 178:4e721c904fd7 161
bwang 178:4e721c904fd7 162 #if defined (STM32F410xx)
bwang 178:4e721c904fd7 163 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\
bwang 178:4e721c904fd7 164 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 178:4e721c904fd7 165 #endif /* STM32F410xx */
bwang 178:4e721c904fd7 166
bwang 178:4e721c904fd7 167 /**
bwang 178:4e721c904fd7 168 * @}
bwang 178:4e721c904fd7 169 */
bwang 178:4e721c904fd7 170
bwang 178:4e721c904fd7 171 /** @defgroup Option_Bytes_Write_Protection
bwang 178:4e721c904fd7 172 * @{
bwang 178:4e721c904fd7 173 */
bwang 178:4e721c904fd7 174 #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
bwang 178:4e721c904fd7 175 #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
bwang 178:4e721c904fd7 176 #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
bwang 178:4e721c904fd7 177 #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
bwang 178:4e721c904fd7 178 #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
bwang 178:4e721c904fd7 179 #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
bwang 178:4e721c904fd7 180 #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
bwang 178:4e721c904fd7 181 #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
bwang 178:4e721c904fd7 182 #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
bwang 178:4e721c904fd7 183 #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
bwang 178:4e721c904fd7 184 #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
bwang 178:4e721c904fd7 185 #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
bwang 178:4e721c904fd7 186 #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */
bwang 178:4e721c904fd7 187 #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */
bwang 178:4e721c904fd7 188 #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */
bwang 178:4e721c904fd7 189 #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */
bwang 178:4e721c904fd7 190 #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */
bwang 178:4e721c904fd7 191 #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */
bwang 178:4e721c904fd7 192 #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */
bwang 178:4e721c904fd7 193 #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */
bwang 178:4e721c904fd7 194 #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */
bwang 178:4e721c904fd7 195 #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */
bwang 178:4e721c904fd7 196 #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */
bwang 178:4e721c904fd7 197 #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */
bwang 178:4e721c904fd7 198 #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
bwang 178:4e721c904fd7 199
bwang 178:4e721c904fd7 200 #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bwang 178:4e721c904fd7 201 /**
bwang 178:4e721c904fd7 202 * @}
bwang 178:4e721c904fd7 203 */
bwang 178:4e721c904fd7 204
bwang 178:4e721c904fd7 205 /** @defgroup Selection_Protection_Mode
bwang 178:4e721c904fd7 206 * @{
bwang 178:4e721c904fd7 207 */
bwang 178:4e721c904fd7 208 #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
bwang 178:4e721c904fd7 209 #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
bwang 178:4e721c904fd7 210
bwang 178:4e721c904fd7 211 /**
bwang 178:4e721c904fd7 212 * @}
bwang 178:4e721c904fd7 213 */
bwang 178:4e721c904fd7 214
bwang 178:4e721c904fd7 215 /** @defgroup Option_Bytes_PC_ReadWrite_Protection
bwang 178:4e721c904fd7 216 * @{
bwang 178:4e721c904fd7 217 */
bwang 178:4e721c904fd7 218 #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
bwang 178:4e721c904fd7 219 #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
bwang 178:4e721c904fd7 220 #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
bwang 178:4e721c904fd7 221 #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
bwang 178:4e721c904fd7 222 #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
bwang 178:4e721c904fd7 223 #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
bwang 178:4e721c904fd7 224 #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
bwang 178:4e721c904fd7 225 #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
bwang 178:4e721c904fd7 226 #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
bwang 178:4e721c904fd7 227 #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
bwang 178:4e721c904fd7 228 #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
bwang 178:4e721c904fd7 229 #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
bwang 178:4e721c904fd7 230 #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
bwang 178:4e721c904fd7 231 #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
bwang 178:4e721c904fd7 232 #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
bwang 178:4e721c904fd7 233 #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
bwang 178:4e721c904fd7 234 #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
bwang 178:4e721c904fd7 235 #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
bwang 178:4e721c904fd7 236 #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
bwang 178:4e721c904fd7 237 #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
bwang 178:4e721c904fd7 238 #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
bwang 178:4e721c904fd7 239 #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
bwang 178:4e721c904fd7 240 #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
bwang 178:4e721c904fd7 241 #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
bwang 178:4e721c904fd7 242 #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
bwang 178:4e721c904fd7 243
bwang 178:4e721c904fd7 244 /**
bwang 178:4e721c904fd7 245 * @}
bwang 178:4e721c904fd7 246 */
bwang 178:4e721c904fd7 247
bwang 178:4e721c904fd7 248 /** @defgroup FLASH_Option_Bytes_Read_Protection
bwang 178:4e721c904fd7 249 * @{
bwang 178:4e721c904fd7 250 */
bwang 178:4e721c904fd7 251 #define OB_RDP_Level_0 ((uint8_t)0xAA)
bwang 178:4e721c904fd7 252 #define OB_RDP_Level_1 ((uint8_t)0x55)
bwang 178:4e721c904fd7 253 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
bwang 178:4e721c904fd7 254 it's no more possible to go back to level 1 or 0 */
bwang 178:4e721c904fd7 255 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
bwang 178:4e721c904fd7 256 ((LEVEL) == OB_RDP_Level_1))/*||\
bwang 178:4e721c904fd7 257 ((LEVEL) == OB_RDP_Level_2))*/
bwang 178:4e721c904fd7 258 /**
bwang 178:4e721c904fd7 259 * @}
bwang 178:4e721c904fd7 260 */
bwang 178:4e721c904fd7 261
bwang 178:4e721c904fd7 262 /** @defgroup FLASH_Option_Bytes_IWatchdog
bwang 178:4e721c904fd7 263 * @{
bwang 178:4e721c904fd7 264 */
bwang 178:4e721c904fd7 265
bwang 178:4e721c904fd7 266 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
bwang 178:4e721c904fd7 267 /**
bwang 178:4e721c904fd7 268 * @}
bwang 178:4e721c904fd7 269 */
bwang 178:4e721c904fd7 270
bwang 178:4e721c904fd7 271 /** @defgroup FLASH_Option_Bytes_nRST_STOP
bwang 178:4e721c904fd7 272 * @{
bwang 178:4e721c904fd7 273 */
bwang 178:4e721c904fd7 274 #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
bwang 178:4e721c904fd7 275
bwang 178:4e721c904fd7 276 /**
bwang 178:4e721c904fd7 277 * @}
bwang 178:4e721c904fd7 278 */
bwang 178:4e721c904fd7 279
bwang 178:4e721c904fd7 280
bwang 178:4e721c904fd7 281 /** @defgroup FLASH_Option_Bytes_nRST_STDBY
bwang 178:4e721c904fd7 282 * @{
bwang 178:4e721c904fd7 283 */
bwang 178:4e721c904fd7 284 #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
bwang 178:4e721c904fd7 285 //#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
bwang 178:4e721c904fd7 286 //#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
bwang 178:4e721c904fd7 287 /**
bwang 178:4e721c904fd7 288 * @}
bwang 178:4e721c904fd7 289 */
bwang 178:4e721c904fd7 290
bwang 178:4e721c904fd7 291 /** @defgroup FLASH_BOR_Reset_Level
bwang 178:4e721c904fd7 292 * @{
bwang 178:4e721c904fd7 293 */
bwang 178:4e721c904fd7 294
bwang 178:4e721c904fd7 295 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
bwang 178:4e721c904fd7 296 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
bwang 178:4e721c904fd7 297 /**
bwang 178:4e721c904fd7 298 * @}
bwang 178:4e721c904fd7 299 */
bwang 178:4e721c904fd7 300
bwang 178:4e721c904fd7 301 /** @defgroup FLASH_Dual_Boot
bwang 178:4e721c904fd7 302 * @{
bwang 178:4e721c904fd7 303 */
bwang 178:4e721c904fd7 304 #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
bwang 178:4e721c904fd7 305 #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
bwang 178:4e721c904fd7 306 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled))
bwang 178:4e721c904fd7 307 /**
bwang 178:4e721c904fd7 308 * @}
bwang 178:4e721c904fd7 309 */
bwang 178:4e721c904fd7 310
bwang 178:4e721c904fd7 311 /** @defgroup FLASH_Interrupts
bwang 178:4e721c904fd7 312 * @{
bwang 178:4e721c904fd7 313 */
bwang 178:4e721c904fd7 314
bwang 178:4e721c904fd7 315 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000))
bwang 178:4e721c904fd7 316 /**
bwang 178:4e721c904fd7 317 * @}
bwang 178:4e721c904fd7 318 */
bwang 178:4e721c904fd7 319
bwang 178:4e721c904fd7 320 /** @defgroup FLASH_Flags
bwang 178:4e721c904fd7 321 * @{
bwang 178:4e721c904fd7 322 */
bwang 178:4e721c904fd7 323
bwang 178:4e721c904fd7 324 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000))
bwang 178:4e721c904fd7 325 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
bwang 178:4e721c904fd7 326 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
bwang 178:4e721c904fd7 327 ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
bwang 178:4e721c904fd7 328 ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR))
bwang 178:4e721c904fd7 329
bwang 178:4e721c904fd7 330 /**
bwang 178:4e721c904fd7 331 * @brief ACR register byte 0 (Bits[7:0]) base address
bwang 178:4e721c904fd7 332 */
bwang 178:4e721c904fd7 333 //#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
bwang 178:4e721c904fd7 334 /**
bwang 178:4e721c904fd7 335 * @brief OPTCR register byte 0 (Bits[7:0]) base address
bwang 178:4e721c904fd7 336 */
bwang 178:4e721c904fd7 337 //#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
bwang 178:4e721c904fd7 338 /**
bwang 178:4e721c904fd7 339 * @brief OPTCR register byte 1 (Bits[15:8]) base address
bwang 178:4e721c904fd7 340 */
bwang 178:4e721c904fd7 341 //#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
bwang 178:4e721c904fd7 342 /**
bwang 178:4e721c904fd7 343 * @brief OPTCR register byte 2 (Bits[23:16]) base address
bwang 178:4e721c904fd7 344 */
bwang 178:4e721c904fd7 345 //#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
bwang 178:4e721c904fd7 346 /**
bwang 178:4e721c904fd7 347 * @brief OPTCR register byte 3 (Bits[31:24]) base address
bwang 178:4e721c904fd7 348 */
bwang 178:4e721c904fd7 349 //#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
bwang 178:4e721c904fd7 350
bwang 178:4e721c904fd7 351 /**
bwang 178:4e721c904fd7 352 * @brief OPTCR1 register byte 0 (Bits[7:0]) base address
bwang 178:4e721c904fd7 353 */
bwang 178:4e721c904fd7 354 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
bwang 178:4e721c904fd7 355
bwang 178:4e721c904fd7 356 /**
bwang 178:4e721c904fd7 357 * @}
bwang 178:4e721c904fd7 358 */
bwang 178:4e721c904fd7 359
bwang 178:4e721c904fd7 360 /* Exported macro ------------------------------------------------------------*/
bwang 178:4e721c904fd7 361 /* Exported functions --------------------------------------------------------*/
bwang 178:4e721c904fd7 362
bwang 178:4e721c904fd7 363 /* FLASH Interface configuration functions ************************************/
bwang 178:4e721c904fd7 364 void FLASH_SetLatency(uint32_t FLASH_Latency);
bwang 178:4e721c904fd7 365 void FLASH_PrefetchBufferCmd(FunctionalState NewState);
bwang 178:4e721c904fd7 366 void FLASH_InstructionCacheCmd(FunctionalState NewState);
bwang 178:4e721c904fd7 367 void FLASH_DataCacheCmd(FunctionalState NewState);
bwang 178:4e721c904fd7 368 void FLASH_InstructionCacheReset(void);
bwang 178:4e721c904fd7 369 void FLASH_DataCacheReset(void);
bwang 178:4e721c904fd7 370
bwang 178:4e721c904fd7 371 /* FLASH Memory Programming functions *****************************************/
bwang 178:4e721c904fd7 372 void FLASH_Unlock(void);
bwang 178:4e721c904fd7 373 void FLASH_Lock(void);
bwang 178:4e721c904fd7 374 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
bwang 178:4e721c904fd7 375 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
bwang 178:4e721c904fd7 376 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange);
bwang 178:4e721c904fd7 377 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange);
bwang 178:4e721c904fd7 378 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
bwang 178:4e721c904fd7 379 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
bwang 178:4e721c904fd7 380 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
bwang 178:4e721c904fd7 381 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
bwang 178:4e721c904fd7 382
bwang 178:4e721c904fd7 383 /* Option Bytes Programming functions *****************************************/
bwang 178:4e721c904fd7 384 void FLASH_OB_Unlock(void);
bwang 178:4e721c904fd7 385 void FLASH_OB_Lock(void);
bwang 178:4e721c904fd7 386 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
bwang 178:4e721c904fd7 387 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState);
bwang 178:4e721c904fd7 388 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP);
bwang 178:4e721c904fd7 389 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState);
bwang 178:4e721c904fd7 390 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState);
bwang 178:4e721c904fd7 391 void FLASH_OB_RDPConfig(uint8_t OB_RDP);
bwang 178:4e721c904fd7 392 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
bwang 178:4e721c904fd7 393 void FLASH_OB_BORConfig(uint8_t OB_BOR);
bwang 178:4e721c904fd7 394 void FLASH_OB_BootConfig(uint8_t OB_BOOT);
bwang 178:4e721c904fd7 395 FLASH_Status FLASH_OB_Launch(void);
bwang 178:4e721c904fd7 396 uint8_t FLASH_OB_GetUser(void);
bwang 178:4e721c904fd7 397 uint16_t FLASH_OB_GetWRP(void);
bwang 178:4e721c904fd7 398 uint16_t FLASH_OB_GetWRP1(void);
bwang 178:4e721c904fd7 399 uint16_t FLASH_OB_GetPCROP(void);
bwang 178:4e721c904fd7 400 uint16_t FLASH_OB_GetPCROP1(void);
bwang 178:4e721c904fd7 401 FlagStatus FLASH_OB_GetRDP(void);
bwang 178:4e721c904fd7 402 uint8_t FLASH_OB_GetBOR(void);
bwang 178:4e721c904fd7 403
bwang 178:4e721c904fd7 404 /* Interrupts and flags management functions **********************************/
bwang 178:4e721c904fd7 405 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
bwang 178:4e721c904fd7 406 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
bwang 178:4e721c904fd7 407 void FLASH_ClearFlag(uint32_t FLASH_FLAG);
bwang 178:4e721c904fd7 408 FLASH_Status FLASH_GetStatus(void);
bwang 178:4e721c904fd7 409 FLASH_Status FLASH_WaitForLastOperation2(void);
bwang 178:4e721c904fd7 410
bwang 178:4e721c904fd7 411 #ifdef __cplusplus
bwang 178:4e721c904fd7 412 }
bwang 178:4e721c904fd7 413 #endif
bwang 178:4e721c904fd7 414
bwang 178:4e721c904fd7 415 #endif /* __STM32F4xx_FLASH_H */
bwang 178:4e721c904fd7 416
bwang 178:4e721c904fd7 417 /**
bwang 178:4e721c904fd7 418 * @}
bwang 178:4e721c904fd7 419 */
bwang 178:4e721c904fd7 420
bwang 178:4e721c904fd7 421 /**
bwang 178:4e721c904fd7 422 * @}
bwang 178:4e721c904fd7 423 */
bwang 178:4e721c904fd7 424
bwang 178:4e721c904fd7 425 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/