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Dependencies:   FastPWM3 mbed

PreferenceWriter/stm32f4xx_flash.h@252:38644631ed97, 2018-11-13 (annotated)

Committer:
bwang
Date:
Tue Nov 13 17:46:23 2018 +0000
Revision:
252:38644631ed97
Parent:
181:d3510c8beab6 
11/13/2018 12:45 - hitting <return> on empty line prints "\r>", so that hitting enter after intially connecting to the controller generates a prompt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 181:d3510c8beab6 1 /**
bwang 181:d3510c8beab6 2 ******************************************************************************
bwang 181:d3510c8beab6 3 * @file stm32f4xx_flash.h
bwang 181:d3510c8beab6 4 * @author MCD Application Team
bwang 181:d3510c8beab6 5 * @version V1.7.1
bwang 181:d3510c8beab6 6 * @date 20-May-2016
bwang 181:d3510c8beab6 7 * @brief This file contains all the functions prototypes for the FLASH
bwang 181:d3510c8beab6 8 * firmware library.
bwang 181:d3510c8beab6 9 ******************************************************************************
bwang 181:d3510c8beab6 10 * @attention
bwang 181:d3510c8beab6 11 *
bwang 181:d3510c8beab6 12 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
bwang 181:d3510c8beab6 13 *
bwang 181:d3510c8beab6 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
bwang 181:d3510c8beab6 15 * You may not use this file except in compliance with the License.
bwang 181:d3510c8beab6 16 * You may obtain a copy of the License at:
bwang 181:d3510c8beab6 17 *
bwang 181:d3510c8beab6 18 * http://www.st.com/software_license_agreement_liberty_v2
bwang 181:d3510c8beab6 19 *
bwang 181:d3510c8beab6 20 * Unless required by applicable law or agreed to in writing, software
bwang 181:d3510c8beab6 21 * distributed under the License is distributed on an "AS IS" BASIS,
bwang 181:d3510c8beab6 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bwang 181:d3510c8beab6 23 * See the License for the specific language governing permissions and
bwang 181:d3510c8beab6 24 * limitations under the License.
bwang 181:d3510c8beab6 25 *
bwang 181:d3510c8beab6 26 ******************************************************************************
bwang 181:d3510c8beab6 27 */
bwang 181:d3510c8beab6 28
bwang 181:d3510c8beab6 29 /* Define to prevent recursive inclusion -------------------------------------*/
bwang 181:d3510c8beab6 30 #ifndef __STM32F4xx_FLASH_H
bwang 181:d3510c8beab6 31 #define __STM32F4xx_FLASH_H
bwang 181:d3510c8beab6 32
bwang 181:d3510c8beab6 33 #ifdef __cplusplus
bwang 181:d3510c8beab6 34 extern "C" {
bwang 181:d3510c8beab6 35 #endif
bwang 181:d3510c8beab6 36
bwang 181:d3510c8beab6 37 /* Includes ------------------------------------------------------------------*/
bwang 181:d3510c8beab6 38 #include "stm32f4xx.h"
bwang 181:d3510c8beab6 39
bwang 181:d3510c8beab6 40 /** @addtogroup STM32F4xx_StdPeriph_Driver
bwang 181:d3510c8beab6 41 * @{
bwang 181:d3510c8beab6 42 */
bwang 181:d3510c8beab6 43
bwang 181:d3510c8beab6 44 /** @addtogroup FLASH
bwang 181:d3510c8beab6 45 * @{
bwang 181:d3510c8beab6 46 */
bwang 181:d3510c8beab6 47
bwang 181:d3510c8beab6 48 /* Exported types ------------------------------------------------------------*/
bwang 181:d3510c8beab6 49 /**
bwang 181:d3510c8beab6 50 * @brief FLASH Status
bwang 181:d3510c8beab6 51 */
bwang 181:d3510c8beab6 52 typedef enum
bwang 181:d3510c8beab6 53 {
bwang 181:d3510c8beab6 54 FLASH_BUSY2 = 1,
bwang 181:d3510c8beab6 55 FLASH_ERROR_RD2,
bwang 181:d3510c8beab6 56 FLASH_ERROR_PGS2,
bwang 181:d3510c8beab6 57 FLASH_ERROR_PGP2,
bwang 181:d3510c8beab6 58 FLASH_ERROR_PGA2,
bwang 181:d3510c8beab6 59 FLASH_ERROR_WRP2,
bwang 181:d3510c8beab6 60 FLASH_ERROR_PROGRAM2,
bwang 181:d3510c8beab6 61 FLASH_ERROR_OPERATION2,
bwang 181:d3510c8beab6 62 FLASH_COMPLETE2
bwang 181:d3510c8beab6 63 }FLASH_Status;
bwang 181:d3510c8beab6 64
bwang 181:d3510c8beab6 65 /* Exported constants --------------------------------------------------------*/
bwang 181:d3510c8beab6 66
bwang 181:d3510c8beab6 67 /** @defgroup FLASH_Exported_Constants
bwang 181:d3510c8beab6 68 * @{
bwang 181:d3510c8beab6 69 */
bwang 181:d3510c8beab6 70
bwang 181:d3510c8beab6 71 /** @defgroup Flash_Latency
bwang 181:d3510c8beab6 72 * @{
bwang 181:d3510c8beab6 73 */
bwang 181:d3510c8beab6 74 #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
bwang 181:d3510c8beab6 75 #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
bwang 181:d3510c8beab6 76 #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
bwang 181:d3510c8beab6 77 #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
bwang 181:d3510c8beab6 78 #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
bwang 181:d3510c8beab6 79 #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
bwang 181:d3510c8beab6 80 #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
bwang 181:d3510c8beab6 81 #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
bwang 181:d3510c8beab6 82 #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */
bwang 181:d3510c8beab6 83 #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */
bwang 181:d3510c8beab6 84 #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */
bwang 181:d3510c8beab6 85 #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */
bwang 181:d3510c8beab6 86 #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */
bwang 181:d3510c8beab6 87 #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */
bwang 181:d3510c8beab6 88 #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */
bwang 181:d3510c8beab6 89 #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */
bwang 181:d3510c8beab6 90
bwang 181:d3510c8beab6 91 /**
bwang 181:d3510c8beab6 92 * @}
bwang 181:d3510c8beab6 93 */
bwang 181:d3510c8beab6 94
bwang 181:d3510c8beab6 95 /** @defgroup FLASH_Voltage_Range
bwang 181:d3510c8beab6 96 * @{
bwang 181:d3510c8beab6 97 */
bwang 181:d3510c8beab6 98 #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
bwang 181:d3510c8beab6 99 #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */
bwang 181:d3510c8beab6 100 #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */
bwang 181:d3510c8beab6 101 #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */
bwang 181:d3510c8beab6 102
bwang 181:d3510c8beab6 103 /*
bwang 181:d3510c8beab6 104 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \
bwang 181:d3510c8beab6 105 ((RANGE) == VoltageRange_2) || \
bwang 181:d3510c8beab6 106 ((RANGE) == VoltageRange_3) || \
bwang 181:d3510c8beab6 107 ((RANGE) == VoltageRange_4))
bwang 181:d3510c8beab6 108 */
bwang 181:d3510c8beab6 109
bwang 181:d3510c8beab6 110 /**
bwang 181:d3510c8beab6 111 * @}
bwang 181:d3510c8beab6 112 */
bwang 181:d3510c8beab6 113
bwang 181:d3510c8beab6 114 /** @defgroup FLASH_Sectors
bwang 181:d3510c8beab6 115 * @{
bwang 181:d3510c8beab6 116 */
bwang 181:d3510c8beab6 117 #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
bwang 181:d3510c8beab6 118 #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
bwang 181:d3510c8beab6 119 #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
bwang 181:d3510c8beab6 120 #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
bwang 181:d3510c8beab6 121 #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
bwang 181:d3510c8beab6 122 #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
bwang 181:d3510c8beab6 123 #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
bwang 181:d3510c8beab6 124 #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
bwang 181:d3510c8beab6 125 #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
bwang 181:d3510c8beab6 126 #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
bwang 181:d3510c8beab6 127 #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
bwang 181:d3510c8beab6 128 #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
bwang 181:d3510c8beab6 129 #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */
bwang 181:d3510c8beab6 130 #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */
bwang 181:d3510c8beab6 131 #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */
bwang 181:d3510c8beab6 132 #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */
bwang 181:d3510c8beab6 133 #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */
bwang 181:d3510c8beab6 134 #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */
bwang 181:d3510c8beab6 135 #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */
bwang 181:d3510c8beab6 136 #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */
bwang 181:d3510c8beab6 137 #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */
bwang 181:d3510c8beab6 138 #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */
bwang 181:d3510c8beab6 139 #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */
bwang 181:d3510c8beab6 140 #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */
bwang 181:d3510c8beab6 141
bwang 181:d3510c8beab6 142 #if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx)
bwang 181:d3510c8beab6 143 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\
bwang 181:d3510c8beab6 144 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 181:d3510c8beab6 145 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
bwang 181:d3510c8beab6 146
bwang 181:d3510c8beab6 147 #if defined (STM32F40_41xxx) || defined(STM32F412xG)
bwang 181:d3510c8beab6 148 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\
bwang 181:d3510c8beab6 149 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 181:d3510c8beab6 150 #endif /* STM32F40_41xxx || STM32F412xG */
bwang 181:d3510c8beab6 151
bwang 181:d3510c8beab6 152 #if defined (STM32F401xx)
bwang 181:d3510c8beab6 153 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\
bwang 181:d3510c8beab6 154 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 181:d3510c8beab6 155 #endif /* STM32F401xx */
bwang 181:d3510c8beab6 156
bwang 181:d3510c8beab6 157 #if defined (STM32F411xE) || defined (STM32F446xx)
bwang 181:d3510c8beab6 158 //#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\
bwang 181:d3510c8beab6 159 // (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 181:d3510c8beab6 160 #endif /* STM32F411xE || STM32F446xx */
bwang 181:d3510c8beab6 161
bwang 181:d3510c8beab6 162 #if defined (STM32F410xx)
bwang 181:d3510c8beab6 163 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\
bwang 181:d3510c8beab6 164 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
bwang 181:d3510c8beab6 165 #endif /* STM32F410xx */
bwang 181:d3510c8beab6 166
bwang 181:d3510c8beab6 167 /**
bwang 181:d3510c8beab6 168 * @}
bwang 181:d3510c8beab6 169 */
bwang 181:d3510c8beab6 170
bwang 181:d3510c8beab6 171 /** @defgroup Option_Bytes_Write_Protection
bwang 181:d3510c8beab6 172 * @{
bwang 181:d3510c8beab6 173 */
bwang 181:d3510c8beab6 174 #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
bwang 181:d3510c8beab6 175 #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
bwang 181:d3510c8beab6 176 #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
bwang 181:d3510c8beab6 177 #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
bwang 181:d3510c8beab6 178 #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
bwang 181:d3510c8beab6 179 #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
bwang 181:d3510c8beab6 180 #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
bwang 181:d3510c8beab6 181 #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
bwang 181:d3510c8beab6 182 #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
bwang 181:d3510c8beab6 183 #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
bwang 181:d3510c8beab6 184 #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
bwang 181:d3510c8beab6 185 #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
bwang 181:d3510c8beab6 186 #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */
bwang 181:d3510c8beab6 187 #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */
bwang 181:d3510c8beab6 188 #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */
bwang 181:d3510c8beab6 189 #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */
bwang 181:d3510c8beab6 190 #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */
bwang 181:d3510c8beab6 191 #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */
bwang 181:d3510c8beab6 192 #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */
bwang 181:d3510c8beab6 193 #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */
bwang 181:d3510c8beab6 194 #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */
bwang 181:d3510c8beab6 195 #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */
bwang 181:d3510c8beab6 196 #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */
bwang 181:d3510c8beab6 197 #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */
bwang 181:d3510c8beab6 198 #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
bwang 181:d3510c8beab6 199
bwang 181:d3510c8beab6 200 #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bwang 181:d3510c8beab6 201 /**
bwang 181:d3510c8beab6 202 * @}
bwang 181:d3510c8beab6 203 */
bwang 181:d3510c8beab6 204
bwang 181:d3510c8beab6 205 /** @defgroup Selection_Protection_Mode
bwang 181:d3510c8beab6 206 * @{
bwang 181:d3510c8beab6 207 */
bwang 181:d3510c8beab6 208 #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
bwang 181:d3510c8beab6 209 #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
bwang 181:d3510c8beab6 210
bwang 181:d3510c8beab6 211 /**
bwang 181:d3510c8beab6 212 * @}
bwang 181:d3510c8beab6 213 */
bwang 181:d3510c8beab6 214
bwang 181:d3510c8beab6 215 /** @defgroup Option_Bytes_PC_ReadWrite_Protection
bwang 181:d3510c8beab6 216 * @{
bwang 181:d3510c8beab6 217 */
bwang 181:d3510c8beab6 218 #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
bwang 181:d3510c8beab6 219 #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
bwang 181:d3510c8beab6 220 #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
bwang 181:d3510c8beab6 221 #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
bwang 181:d3510c8beab6 222 #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
bwang 181:d3510c8beab6 223 #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
bwang 181:d3510c8beab6 224 #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
bwang 181:d3510c8beab6 225 #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
bwang 181:d3510c8beab6 226 #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
bwang 181:d3510c8beab6 227 #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
bwang 181:d3510c8beab6 228 #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
bwang 181:d3510c8beab6 229 #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
bwang 181:d3510c8beab6 230 #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
bwang 181:d3510c8beab6 231 #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
bwang 181:d3510c8beab6 232 #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
bwang 181:d3510c8beab6 233 #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
bwang 181:d3510c8beab6 234 #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
bwang 181:d3510c8beab6 235 #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
bwang 181:d3510c8beab6 236 #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
bwang 181:d3510c8beab6 237 #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
bwang 181:d3510c8beab6 238 #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
bwang 181:d3510c8beab6 239 #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
bwang 181:d3510c8beab6 240 #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
bwang 181:d3510c8beab6 241 #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
bwang 181:d3510c8beab6 242 #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
bwang 181:d3510c8beab6 243
bwang 181:d3510c8beab6 244 /**
bwang 181:d3510c8beab6 245 * @}
bwang 181:d3510c8beab6 246 */
bwang 181:d3510c8beab6 247
bwang 181:d3510c8beab6 248 /** @defgroup FLASH_Option_Bytes_Read_Protection
bwang 181:d3510c8beab6 249 * @{
bwang 181:d3510c8beab6 250 */
bwang 181:d3510c8beab6 251 #define OB_RDP_Level_0 ((uint8_t)0xAA)
bwang 181:d3510c8beab6 252 #define OB_RDP_Level_1 ((uint8_t)0x55)
bwang 181:d3510c8beab6 253 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
bwang 181:d3510c8beab6 254 it's no more possible to go back to level 1 or 0 */
bwang 181:d3510c8beab6 255 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
bwang 181:d3510c8beab6 256 ((LEVEL) == OB_RDP_Level_1))/*||\
bwang 181:d3510c8beab6 257 ((LEVEL) == OB_RDP_Level_2))*/
bwang 181:d3510c8beab6 258 /**
bwang 181:d3510c8beab6 259 * @}
bwang 181:d3510c8beab6 260 */
bwang 181:d3510c8beab6 261
bwang 181:d3510c8beab6 262 /** @defgroup FLASH_Option_Bytes_IWatchdog
bwang 181:d3510c8beab6 263 * @{
bwang 181:d3510c8beab6 264 */
bwang 181:d3510c8beab6 265
bwang 181:d3510c8beab6 266 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
bwang 181:d3510c8beab6 267 /**
bwang 181:d3510c8beab6 268 * @}
bwang 181:d3510c8beab6 269 */
bwang 181:d3510c8beab6 270
bwang 181:d3510c8beab6 271 /** @defgroup FLASH_Option_Bytes_nRST_STOP
bwang 181:d3510c8beab6 272 * @{
bwang 181:d3510c8beab6 273 */
bwang 181:d3510c8beab6 274 #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
bwang 181:d3510c8beab6 275
bwang 181:d3510c8beab6 276 /**
bwang 181:d3510c8beab6 277 * @}
bwang 181:d3510c8beab6 278 */
bwang 181:d3510c8beab6 279
bwang 181:d3510c8beab6 280
bwang 181:d3510c8beab6 281 /** @defgroup FLASH_Option_Bytes_nRST_STDBY
bwang 181:d3510c8beab6 282 * @{
bwang 181:d3510c8beab6 283 */
bwang 181:d3510c8beab6 284 #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
bwang 181:d3510c8beab6 285 //#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
bwang 181:d3510c8beab6 286 //#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
bwang 181:d3510c8beab6 287 /**
bwang 181:d3510c8beab6 288 * @}
bwang 181:d3510c8beab6 289 */
bwang 181:d3510c8beab6 290
bwang 181:d3510c8beab6 291 /** @defgroup FLASH_BOR_Reset_Level
bwang 181:d3510c8beab6 292 * @{
bwang 181:d3510c8beab6 293 */
bwang 181:d3510c8beab6 294
bwang 181:d3510c8beab6 295 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
bwang 181:d3510c8beab6 296 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
bwang 181:d3510c8beab6 297 /**
bwang 181:d3510c8beab6 298 * @}
bwang 181:d3510c8beab6 299 */
bwang 181:d3510c8beab6 300
bwang 181:d3510c8beab6 301 /** @defgroup FLASH_Dual_Boot
bwang 181:d3510c8beab6 302 * @{
bwang 181:d3510c8beab6 303 */
bwang 181:d3510c8beab6 304 #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
bwang 181:d3510c8beab6 305 #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
bwang 181:d3510c8beab6 306 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled))
bwang 181:d3510c8beab6 307 /**
bwang 181:d3510c8beab6 308 * @}
bwang 181:d3510c8beab6 309 */
bwang 181:d3510c8beab6 310
bwang 181:d3510c8beab6 311 /** @defgroup FLASH_Interrupts
bwang 181:d3510c8beab6 312 * @{
bwang 181:d3510c8beab6 313 */
bwang 181:d3510c8beab6 314
bwang 181:d3510c8beab6 315 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000))
bwang 181:d3510c8beab6 316 /**
bwang 181:d3510c8beab6 317 * @}
bwang 181:d3510c8beab6 318 */
bwang 181:d3510c8beab6 319
bwang 181:d3510c8beab6 320 /** @defgroup FLASH_Flags
bwang 181:d3510c8beab6 321 * @{
bwang 181:d3510c8beab6 322 */
bwang 181:d3510c8beab6 323
bwang 181:d3510c8beab6 324 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000))
bwang 181:d3510c8beab6 325 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
bwang 181:d3510c8beab6 326 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
bwang 181:d3510c8beab6 327 ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
bwang 181:d3510c8beab6 328 ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR))
bwang 181:d3510c8beab6 329
bwang 181:d3510c8beab6 330 /**
bwang 181:d3510c8beab6 331 * @brief ACR register byte 0 (Bits[7:0]) base address
bwang 181:d3510c8beab6 332 */
bwang 181:d3510c8beab6 333 //#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
bwang 181:d3510c8beab6 334 /**
bwang 181:d3510c8beab6 335 * @brief OPTCR register byte 0 (Bits[7:0]) base address
bwang 181:d3510c8beab6 336 */
bwang 181:d3510c8beab6 337 //#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
bwang 181:d3510c8beab6 338 /**
bwang 181:d3510c8beab6 339 * @brief OPTCR register byte 1 (Bits[15:8]) base address
bwang 181:d3510c8beab6 340 */
bwang 181:d3510c8beab6 341 //#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
bwang 181:d3510c8beab6 342 /**
bwang 181:d3510c8beab6 343 * @brief OPTCR register byte 2 (Bits[23:16]) base address
bwang 181:d3510c8beab6 344 */
bwang 181:d3510c8beab6 345 //#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
bwang 181:d3510c8beab6 346 /**
bwang 181:d3510c8beab6 347 * @brief OPTCR register byte 3 (Bits[31:24]) base address
bwang 181:d3510c8beab6 348 */
bwang 181:d3510c8beab6 349 //#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
bwang 181:d3510c8beab6 350
bwang 181:d3510c8beab6 351 /**
bwang 181:d3510c8beab6 352 * @brief OPTCR1 register byte 0 (Bits[7:0]) base address
bwang 181:d3510c8beab6 353 */
bwang 181:d3510c8beab6 354 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
bwang 181:d3510c8beab6 355
bwang 181:d3510c8beab6 356 /**
bwang 181:d3510c8beab6 357 * @}
bwang 181:d3510c8beab6 358 */
bwang 181:d3510c8beab6 359
bwang 181:d3510c8beab6 360 /* Exported macro ------------------------------------------------------------*/
bwang 181:d3510c8beab6 361 /* Exported functions --------------------------------------------------------*/
bwang 181:d3510c8beab6 362
bwang 181:d3510c8beab6 363 /* FLASH Interface configuration functions ************************************/
bwang 181:d3510c8beab6 364 void FLASH_SetLatency(uint32_t FLASH_Latency);
bwang 181:d3510c8beab6 365 void FLASH_PrefetchBufferCmd(FunctionalState NewState);
bwang 181:d3510c8beab6 366 void FLASH_InstructionCacheCmd(FunctionalState NewState);
bwang 181:d3510c8beab6 367 void FLASH_DataCacheCmd(FunctionalState NewState);
bwang 181:d3510c8beab6 368 void FLASH_InstructionCacheReset(void);
bwang 181:d3510c8beab6 369 void FLASH_DataCacheReset(void);
bwang 181:d3510c8beab6 370
bwang 181:d3510c8beab6 371 /* FLASH Memory Programming functions *****************************************/
bwang 181:d3510c8beab6 372 void FLASH_Unlock(void);
bwang 181:d3510c8beab6 373 void FLASH_Lock(void);
bwang 181:d3510c8beab6 374 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
bwang 181:d3510c8beab6 375 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
bwang 181:d3510c8beab6 376 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange);
bwang 181:d3510c8beab6 377 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange);
bwang 181:d3510c8beab6 378 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
bwang 181:d3510c8beab6 379 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
bwang 181:d3510c8beab6 380 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
bwang 181:d3510c8beab6 381 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
bwang 181:d3510c8beab6 382
bwang 181:d3510c8beab6 383 /* Option Bytes Programming functions *****************************************/
bwang 181:d3510c8beab6 384 void FLASH_OB_Unlock(void);
bwang 181:d3510c8beab6 385 void FLASH_OB_Lock(void);
bwang 181:d3510c8beab6 386 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
bwang 181:d3510c8beab6 387 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState);
bwang 181:d3510c8beab6 388 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP);
bwang 181:d3510c8beab6 389 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState);
bwang 181:d3510c8beab6 390 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState);
bwang 181:d3510c8beab6 391 void FLASH_OB_RDPConfig(uint8_t OB_RDP);
bwang 181:d3510c8beab6 392 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
bwang 181:d3510c8beab6 393 void FLASH_OB_BORConfig(uint8_t OB_BOR);
bwang 181:d3510c8beab6 394 void FLASH_OB_BootConfig(uint8_t OB_BOOT);
bwang 181:d3510c8beab6 395 FLASH_Status FLASH_OB_Launch(void);
bwang 181:d3510c8beab6 396 uint8_t FLASH_OB_GetUser(void);
bwang 181:d3510c8beab6 397 uint16_t FLASH_OB_GetWRP(void);
bwang 181:d3510c8beab6 398 uint16_t FLASH_OB_GetWRP1(void);
bwang 181:d3510c8beab6 399 uint16_t FLASH_OB_GetPCROP(void);
bwang 181:d3510c8beab6 400 uint16_t FLASH_OB_GetPCROP1(void);
bwang 181:d3510c8beab6 401 FlagStatus FLASH_OB_GetRDP(void);
bwang 181:d3510c8beab6 402 uint8_t FLASH_OB_GetBOR(void);
bwang 181:d3510c8beab6 403
bwang 181:d3510c8beab6 404 /* Interrupts and flags management functions **********************************/
bwang 181:d3510c8beab6 405 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
bwang 181:d3510c8beab6 406 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
bwang 181:d3510c8beab6 407 void FLASH_ClearFlag(uint32_t FLASH_FLAG);
bwang 181:d3510c8beab6 408 FLASH_Status FLASH_GetStatus(void);
bwang 181:d3510c8beab6 409 FLASH_Status FLASH_WaitForLastOperation2(void);
bwang 181:d3510c8beab6 410
bwang 181:d3510c8beab6 411 #ifdef __cplusplus
bwang 181:d3510c8beab6 412 }
bwang 181:d3510c8beab6 413 #endif
bwang 181:d3510c8beab6 414
bwang 181:d3510c8beab6 415 #endif /* __STM32F4xx_FLASH_H */
bwang 181:d3510c8beab6 416
bwang 181:d3510c8beab6 417 /**
bwang 181:d3510c8beab6 418 * @}
bwang 181:d3510c8beab6 419 */
bwang 181:d3510c8beab6 420
bwang 181:d3510c8beab6 421 /**
bwang 181:d3510c8beab6 422 * @}
bwang 181:d3510c8beab6 423 */
bwang 181:d3510c8beab6 424
bwang 181:d3510c8beab6 425 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/