Bayley Wang / SDFileSystem2

SD

Dependencies:   FATFileSystem2

Fork of SDFileSystem by mbed official

SDFileSystem.cpp@8:dd590d3b89bf, 2018-04-18 (annotated)

Committer:
bwang
Date:
Wed Apr 18 12:25:18 2018 +0000
Revision:
8:dd590d3b89bf
Parent:
7:115317fc2a8b
Child:
9:4f72b0753ab6
modified FATFileSystem to always return 0 for timestamp

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:7153ee70df01 1 /* mbed Microcontroller Library
emilmont 1:7153ee70df01 2 * Copyright (c) 2006-2012 ARM Limited
emilmont 1:7153ee70df01 3 *
emilmont 1:7153ee70df01 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
emilmont 1:7153ee70df01 5 * of this software and associated documentation files (the "Software"), to deal
emilmont 1:7153ee70df01 6 * in the Software without restriction, including without limitation the rights
emilmont 1:7153ee70df01 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
emilmont 1:7153ee70df01 8 * copies of the Software, and to permit persons to whom the Software is
emilmont 1:7153ee70df01 9 * furnished to do so, subject to the following conditions:
emilmont 1:7153ee70df01 10 *
emilmont 1:7153ee70df01 11 * The above copyright notice and this permission notice shall be included in
emilmont 1:7153ee70df01 12 * all copies or substantial portions of the Software.
emilmont 1:7153ee70df01 13 *
emilmont 1:7153ee70df01 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
emilmont 1:7153ee70df01 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
emilmont 1:7153ee70df01 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
emilmont 1:7153ee70df01 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
emilmont 1:7153ee70df01 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
emilmont 1:7153ee70df01 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
emilmont 1:7153ee70df01 20 * SOFTWARE.
emilmont 1:7153ee70df01 21 */
emilmont 1:7153ee70df01 22 /* Introduction
emilmont 1:7153ee70df01 23 * ------------
emilmont 1:7153ee70df01 24 * SD and MMC cards support a number of interfaces, but common to them all
emilmont 1:7153ee70df01 25 * is one based on SPI. This is the one I'm implmenting because it means
emilmont 1:7153ee70df01 26 * it is much more portable even though not so performant, and we already
emilmont 1:7153ee70df01 27 * have the mbed SPI Interface!
emilmont 1:7153ee70df01 28 *
emilmont 1:7153ee70df01 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
emilmont 1:7153ee70df01 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
emilmont 1:7153ee70df01 31 *
emilmont 1:7153ee70df01 32 * SPI Startup
emilmont 1:7153ee70df01 33 * -----------
emilmont 1:7153ee70df01 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
emilmont 1:7153ee70df01 35 * asserting CS low and sending the reset command (CMD0). The card will
emilmont 1:7153ee70df01 36 * respond with a (R1) response.
emilmont 1:7153ee70df01 37 *
emilmont 1:7153ee70df01 38 * CMD8 is optionally sent to determine the voltage range supported, and
emilmont 1:7153ee70df01 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
emilmont 1:7153ee70df01 40 * version 2.x. I'll just ignore this for now.
emilmont 1:7153ee70df01 41 *
emilmont 1:7153ee70df01 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
emilmont 1:7153ee70df01 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
emilmont 1:7153ee70df01 44 *
emilmont 1:7153ee70df01 45 * You should also indicate whether the host supports High Capicity cards,
emilmont 1:7153ee70df01 46 * and check whether the card is high capacity - i'll also ignore this
emilmont 1:7153ee70df01 47 *
emilmont 1:7153ee70df01 48 * SPI Protocol
emilmont 1:7153ee70df01 49 * ------------
emilmont 1:7153ee70df01 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
emilmont 1:7153ee70df01 51 * the host starting every bus transaction by asserting the CS signal low. The
emilmont 1:7153ee70df01 52 * card always responds to commands, data blocks and errors.
emilmont 1:7153ee70df01 53 *
emilmont 1:7153ee70df01 54 * The protocol supports a CRC, but by default it is off (except for the
emilmont 1:7153ee70df01 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
emilmont 1:7153ee70df01 56 * I'll leave the CRC off I think!
emilmont 1:7153ee70df01 57 *
emilmont 1:7153ee70df01 58 * Standard capacity cards have variable data block sizes, whereas High
emilmont 1:7153ee70df01 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
emilmont 1:7153ee70df01 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
emilmont 1:7153ee70df01 61 * This is set with CMD16.
emilmont 1:7153ee70df01 62 *
emilmont 1:7153ee70df01 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
emilmont 1:7153ee70df01 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
emilmont 1:7153ee70df01 65 * the card gets a read command, it responds with a response token, and then
emilmont 1:7153ee70df01 66 * a data token or an error.
emilmont 1:7153ee70df01 67 *
emilmont 1:7153ee70df01 68 * SPI Command Format
emilmont 1:7153ee70df01 69 * ------------------
emilmont 1:7153ee70df01 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
emilmont 1:7153ee70df01 71 *
emilmont 1:7153ee70df01 72 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
emilmont 1:7153ee70df01 74 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 75 *
emilmont 1:7153ee70df01 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
emilmont 1:7153ee70df01 77 *
emilmont 1:7153ee70df01 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
emilmont 1:7153ee70df01 79 *
emilmont 1:7153ee70df01 80 * SPI Response Format
emilmont 1:7153ee70df01 81 * -------------------
emilmont 1:7153ee70df01 82 * The main response format (R1) is a status byte (normally zero). Key flags:
emilmont 1:7153ee70df01 83 * idle - 1 if the card is in an idle state/initialising
emilmont 1:7153ee70df01 84 * cmd - 1 if an illegal command code was detected
emilmont 1:7153ee70df01 85 *
emilmont 1:7153ee70df01 86 * +-------------------------------------------------+
emilmont 1:7153ee70df01 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
emilmont 1:7153ee70df01 88 * +-------------------------------------------------+
emilmont 1:7153ee70df01 89 *
emilmont 1:7153ee70df01 90 * R1b is the same, except it is followed by a busy signal (zeros) until
emilmont 1:7153ee70df01 91 * the first non-zero byte when it is ready again.
emilmont 1:7153ee70df01 92 *
emilmont 1:7153ee70df01 93 * Data Response Token
emilmont 1:7153ee70df01 94 * -------------------
emilmont 1:7153ee70df01 95 * Every data block written to the card is acknowledged by a byte
emilmont 1:7153ee70df01 96 * response token
emilmont 1:7153ee70df01 97 *
emilmont 1:7153ee70df01 98 * +----------------------+
emilmont 1:7153ee70df01 99 * | xxx | 0 | status | 1 |
emilmont 1:7153ee70df01 100 * +----------------------+
emilmont 1:7153ee70df01 101 * 010 - OK!
emilmont 1:7153ee70df01 102 * 101 - CRC Error
emilmont 1:7153ee70df01 103 * 110 - Write Error
emilmont 1:7153ee70df01 104 *
emilmont 1:7153ee70df01 105 * Single Block Read and Write
emilmont 1:7153ee70df01 106 * ---------------------------
emilmont 1:7153ee70df01 107 *
emilmont 1:7153ee70df01 108 * Block transfers have a byte header, followed by the data, followed
emilmont 1:7153ee70df01 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
emilmont 1:7153ee70df01 110 *
emilmont 1:7153ee70df01 111 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
emilmont 1:7153ee70df01 113 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 114 */
emilmont 1:7153ee70df01 115 #include "SDFileSystem.h"
emilmont 2:c8f66dc765d4 116 #include "mbed_debug.h"
emilmont 1:7153ee70df01 117
emilmont 1:7153ee70df01 118 #define SD_COMMAND_TIMEOUT 5000
emilmont 1:7153ee70df01 119
emilmont 1:7153ee70df01 120 #define SD_DBG 0
emilmont 1:7153ee70df01 121
bwang 8:dd590d3b89bf 122 DigitalOut spi_led(PB_14);
bwang 8:dd590d3b89bf 123
emilmont 1:7153ee70df01 124 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
maclobdell 4:3f40cbfe801c 125 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
emilmont 1:7153ee70df01 126 _cs = 1;
maclobdell 4:3f40cbfe801c 127
maclobdell 4:3f40cbfe801c 128 // Set default to 100kHz for initialisation and 1MHz for data transfer
maclobdell 4:3f40cbfe801c 129 _init_sck = 100000;
bwang 8:dd590d3b89bf 130 _transfer_sck = 20000000;
emilmont 1:7153ee70df01 131 }
emilmont 1:7153ee70df01 132
emilmont 1:7153ee70df01 133 #define R1_IDLE_STATE (1 << 0)
emilmont 1:7153ee70df01 134 #define R1_ERASE_RESET (1 << 1)
emilmont 1:7153ee70df01 135 #define R1_ILLEGAL_COMMAND (1 << 2)
emilmont 1:7153ee70df01 136 #define R1_COM_CRC_ERROR (1 << 3)
emilmont 1:7153ee70df01 137 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
emilmont 1:7153ee70df01 138 #define R1_ADDRESS_ERROR (1 << 5)
emilmont 1:7153ee70df01 139 #define R1_PARAMETER_ERROR (1 << 6)
emilmont 1:7153ee70df01 140
emilmont 1:7153ee70df01 141 // Types
maclobdell 4:3f40cbfe801c 142 // - v1.x Standard Capacity
maclobdell 4:3f40cbfe801c 143 // - v2.x Standard Capacity
maclobdell 4:3f40cbfe801c 144 // - v2.x High Capacity
maclobdell 4:3f40cbfe801c 145 // - Not recognised as an SD Card
maclobdell 4:3f40cbfe801c 146 #define SDCARD_FAIL 0
maclobdell 4:3f40cbfe801c 147 #define SDCARD_V1 1
maclobdell 4:3f40cbfe801c 148 #define SDCARD_V2 2
maclobdell 4:3f40cbfe801c 149 #define SDCARD_V2HC 3
emilmont 1:7153ee70df01 150
emilmont 1:7153ee70df01 151 int SDFileSystem::initialise_card() {
maclobdell 4:3f40cbfe801c 152 // Set to SCK for initialisation, and clock card with cs = 1
maclobdell 4:3f40cbfe801c 153 _spi.frequency(_init_sck);
emilmont 1:7153ee70df01 154 _cs = 1;
emilmont 1:7153ee70df01 155 for (int i = 0; i < 16; i++) {
emilmont 1:7153ee70df01 156 _spi.write(0xFF);
emilmont 1:7153ee70df01 157 }
maclobdell 4:3f40cbfe801c 158
emilmont 1:7153ee70df01 159 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
emilmont 1:7153ee70df01 160 if (_cmd(0, 0) != R1_IDLE_STATE) {
emilmont 1:7153ee70df01 161 debug("No disk, or could not put SD card in to SPI idle state\n");
emilmont 1:7153ee70df01 162 return SDCARD_FAIL;
emilmont 1:7153ee70df01 163 }
maclobdell 4:3f40cbfe801c 164
emilmont 1:7153ee70df01 165 // send CMD8 to determine whther it is ver 2.x
emilmont 1:7153ee70df01 166 int r = _cmd8();
emilmont 1:7153ee70df01 167 if (r == R1_IDLE_STATE) {
emilmont 1:7153ee70df01 168 return initialise_card_v2();
emilmont 1:7153ee70df01 169 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
emilmont 1:7153ee70df01 170 return initialise_card_v1();
emilmont 1:7153ee70df01 171 } else {
emilmont 1:7153ee70df01 172 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
emilmont 1:7153ee70df01 173 return SDCARD_FAIL;
emilmont 1:7153ee70df01 174 }
emilmont 1:7153ee70df01 175 }
emilmont 1:7153ee70df01 176
emilmont 1:7153ee70df01 177 int SDFileSystem::initialise_card_v1() {
emilmont 1:7153ee70df01 178 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 179 _cmd(55, 0);
emilmont 1:7153ee70df01 180 if (_cmd(41, 0) == 0) {
emilmont 1:7153ee70df01 181 cdv = 512;
emilmont 1:7153ee70df01 182 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
emilmont 1:7153ee70df01 183 return SDCARD_V1;
emilmont 1:7153ee70df01 184 }
emilmont 1:7153ee70df01 185 }
maclobdell 4:3f40cbfe801c 186
emilmont 1:7153ee70df01 187 debug("Timeout waiting for v1.x card\n");
emilmont 1:7153ee70df01 188 return SDCARD_FAIL;
emilmont 1:7153ee70df01 189 }
emilmont 1:7153ee70df01 190
emilmont 1:7153ee70df01 191 int SDFileSystem::initialise_card_v2() {
emilmont 1:7153ee70df01 192 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 193 wait_ms(50);
emilmont 1:7153ee70df01 194 _cmd58();
emilmont 1:7153ee70df01 195 _cmd(55, 0);
emilmont 1:7153ee70df01 196 if (_cmd(41, 0x40000000) == 0) {
emilmont 1:7153ee70df01 197 _cmd58();
emilmont 1:7153ee70df01 198 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
emilmont 1:7153ee70df01 199 cdv = 1;
emilmont 1:7153ee70df01 200 return SDCARD_V2;
emilmont 1:7153ee70df01 201 }
emilmont 1:7153ee70df01 202 }
maclobdell 4:3f40cbfe801c 203
emilmont 1:7153ee70df01 204 debug("Timeout waiting for v2.x card\n");
emilmont 1:7153ee70df01 205 return SDCARD_FAIL;
emilmont 1:7153ee70df01 206 }
emilmont 1:7153ee70df01 207
emilmont 1:7153ee70df01 208 int SDFileSystem::disk_initialize() {
maclobdell 4:3f40cbfe801c 209 _is_initialized = initialise_card();
maclobdell 4:3f40cbfe801c 210 if (_is_initialized == 0) {
maclobdell 4:3f40cbfe801c 211 debug("Fail to initialize card\n");
maclobdell 4:3f40cbfe801c 212 return 1;
maclobdell 4:3f40cbfe801c 213 }
maclobdell 4:3f40cbfe801c 214 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
emilmont 1:7153ee70df01 215 _sectors = _sd_sectors();
maclobdell 4:3f40cbfe801c 216
emilmont 1:7153ee70df01 217 // Set block length to 512 (CMD16)
emilmont 1:7153ee70df01 218 if (_cmd(16, 512) != 0) {
emilmont 1:7153ee70df01 219 debug("Set 512-byte block timed out\n");
emilmont 1:7153ee70df01 220 return 1;
emilmont 1:7153ee70df01 221 }
maclobdell 4:3f40cbfe801c 222
maclobdell 4:3f40cbfe801c 223 // Set SCK for data transfer
maclobdell 4:3f40cbfe801c 224 _spi.frequency(_transfer_sck);
maclobdell 4:3f40cbfe801c 225 return 0;
maclobdell 4:3f40cbfe801c 226 }
maclobdell 4:3f40cbfe801c 227
maclobdell 4:3f40cbfe801c 228 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
maclobdell 4:3f40cbfe801c 229 if (!_is_initialized) {
maclobdell 4:3f40cbfe801c 230 return -1;
maclobdell 4:3f40cbfe801c 231 }
emilmont 1:7153ee70df01 232
maclobdell 4:3f40cbfe801c 233 for (uint32_t b = block_number; b < block_number + count; b++) {
maclobdell 4:3f40cbfe801c 234 // set write address for single block (CMD24)
maclobdell 4:3f40cbfe801c 235 if (_cmd(24, b * cdv) != 0) {
maclobdell 4:3f40cbfe801c 236 return 1;
maclobdell 4:3f40cbfe801c 237 }
maclobdell 4:3f40cbfe801c 238
maclobdell 4:3f40cbfe801c 239 // send the data block
maclobdell 4:3f40cbfe801c 240 _write(buffer, 512);
maclobdell 4:3f40cbfe801c 241 buffer += 512;
maclobdell 4:3f40cbfe801c 242 }
maclobdell 4:3f40cbfe801c 243
emilmont 1:7153ee70df01 244 return 0;
emilmont 1:7153ee70df01 245 }
emilmont 1:7153ee70df01 246
maclobdell 4:3f40cbfe801c 247 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
maclobdell 4:3f40cbfe801c 248 if (!_is_initialized) {
maclobdell 4:3f40cbfe801c 249 return -1;
emilmont 1:7153ee70df01 250 }
emilmont 1:7153ee70df01 251
maclobdell 4:3f40cbfe801c 252 for (uint32_t b = block_number; b < block_number + count; b++) {
maclobdell 4:3f40cbfe801c 253 // set read address for single block (CMD17)
maclobdell 4:3f40cbfe801c 254 if (_cmd(17, b * cdv) != 0) {
maclobdell 4:3f40cbfe801c 255 return 1;
maclobdell 4:3f40cbfe801c 256 }
maclobdell 4:3f40cbfe801c 257
maclobdell 4:3f40cbfe801c 258 // receive the data
maclobdell 4:3f40cbfe801c 259 _read(buffer, 512);
maclobdell 4:3f40cbfe801c 260 buffer += 512;
maclobdell 4:3f40cbfe801c 261 }
maclobdell 4:3f40cbfe801c 262
emilmont 1:7153ee70df01 263 return 0;
emilmont 1:7153ee70df01 264 }
emilmont 1:7153ee70df01 265
maclobdell 4:3f40cbfe801c 266 int SDFileSystem::disk_status() {
maclobdell 4:3f40cbfe801c 267 // FATFileSystem::disk_status() returns 0 when initialized
maclobdell 4:3f40cbfe801c 268 if (_is_initialized) {
maclobdell 4:3f40cbfe801c 269 return 0;
maclobdell 4:3f40cbfe801c 270 } else {
emilmont 1:7153ee70df01 271 return 1;
emilmont 1:7153ee70df01 272 }
emilmont 1:7153ee70df01 273 }
emilmont 1:7153ee70df01 274
emilmont 1:7153ee70df01 275 int SDFileSystem::disk_sync() { return 0; }
maclobdell 4:3f40cbfe801c 276 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
emilmont 1:7153ee70df01 277
emilmont 1:7153ee70df01 278
emilmont 1:7153ee70df01 279 // PRIVATE FUNCTIONS
emilmont 1:7153ee70df01 280 int SDFileSystem::_cmd(int cmd, int arg) {
bwang 8:dd590d3b89bf 281 spi_led = 1;
emilmont 1:7153ee70df01 282 _cs = 0;
maclobdell 4:3f40cbfe801c 283
emilmont 1:7153ee70df01 284 // send a command
emilmont 1:7153ee70df01 285 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 286 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 287 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 288 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 289 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 290 _spi.write(0x95);
maclobdell 4:3f40cbfe801c 291
emilmont 1:7153ee70df01 292 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 293 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 294 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 295 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 296 _cs = 1;
emilmont 1:7153ee70df01 297 _spi.write(0xFF);
emilmont 1:7153ee70df01 298 return response;
emilmont 1:7153ee70df01 299 }
emilmont 1:7153ee70df01 300 }
emilmont 1:7153ee70df01 301 _cs = 1;
emilmont 1:7153ee70df01 302 _spi.write(0xFF);
bwang 8:dd590d3b89bf 303 spi_led = 0;
emilmont 1:7153ee70df01 304 return -1; // timeout
emilmont 1:7153ee70df01 305 }
emilmont 1:7153ee70df01 306 int SDFileSystem::_cmdx(int cmd, int arg) {
bwang 8:dd590d3b89bf 307 spi_led = 1;
emilmont 1:7153ee70df01 308 _cs = 0;
maclobdell 4:3f40cbfe801c 309
emilmont 1:7153ee70df01 310 // send a command
emilmont 1:7153ee70df01 311 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 312 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 313 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 314 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 315 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 316 _spi.write(0x95);
maclobdell 4:3f40cbfe801c 317
emilmont 1:7153ee70df01 318 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 319 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 320 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 321 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 322 return response;
emilmont 1:7153ee70df01 323 }
emilmont 1:7153ee70df01 324 }
emilmont 1:7153ee70df01 325 _cs = 1;
emilmont 1:7153ee70df01 326 _spi.write(0xFF);
bwang 8:dd590d3b89bf 327 spi_led = 0;
emilmont 1:7153ee70df01 328 return -1; // timeout
emilmont 1:7153ee70df01 329 }
emilmont 1:7153ee70df01 330
emilmont 1:7153ee70df01 331
emilmont 1:7153ee70df01 332 int SDFileSystem::_cmd58() {
bwang 8:dd590d3b89bf 333 spi_led = 1;
emilmont 1:7153ee70df01 334 _cs = 0;
emilmont 1:7153ee70df01 335 int arg = 0;
maclobdell 4:3f40cbfe801c 336
emilmont 1:7153ee70df01 337 // send a command
emilmont 1:7153ee70df01 338 _spi.write(0x40 | 58);
emilmont 1:7153ee70df01 339 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 340 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 341 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 342 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 343 _spi.write(0x95);
maclobdell 4:3f40cbfe801c 344
emilmont 1:7153ee70df01 345 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 346 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 347 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 348 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 349 int ocr = _spi.write(0xFF) << 24;
emilmont 1:7153ee70df01 350 ocr |= _spi.write(0xFF) << 16;
emilmont 1:7153ee70df01 351 ocr |= _spi.write(0xFF) << 8;
emilmont 1:7153ee70df01 352 ocr |= _spi.write(0xFF) << 0;
emilmont 1:7153ee70df01 353 _cs = 1;
emilmont 1:7153ee70df01 354 _spi.write(0xFF);
emilmont 1:7153ee70df01 355 return response;
emilmont 1:7153ee70df01 356 }
emilmont 1:7153ee70df01 357 }
emilmont 1:7153ee70df01 358 _cs = 1;
emilmont 1:7153ee70df01 359 _spi.write(0xFF);
bwang 8:dd590d3b89bf 360 spi_led = 0;
emilmont 1:7153ee70df01 361 return -1; // timeout
emilmont 1:7153ee70df01 362 }
emilmont 1:7153ee70df01 363
emilmont 1:7153ee70df01 364 int SDFileSystem::_cmd8() {
bwang 8:dd590d3b89bf 365 spi_led = 1;
emilmont 1:7153ee70df01 366 _cs = 0;
maclobdell 4:3f40cbfe801c 367
emilmont 1:7153ee70df01 368 // send a command
emilmont 1:7153ee70df01 369 _spi.write(0x40 | 8); // CMD8
emilmont 1:7153ee70df01 370 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 371 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 372 _spi.write(0x01); // 3.3v
emilmont 1:7153ee70df01 373 _spi.write(0xAA); // check pattern
emilmont 1:7153ee70df01 374 _spi.write(0x87); // crc
maclobdell 4:3f40cbfe801c 375
emilmont 1:7153ee70df01 376 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 377 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
emilmont 1:7153ee70df01 378 char response[5];
emilmont 1:7153ee70df01 379 response[0] = _spi.write(0xFF);
emilmont 1:7153ee70df01 380 if (!(response[0] & 0x80)) {
emilmont 1:7153ee70df01 381 for (int j = 1; j < 5; j++) {
emilmont 1:7153ee70df01 382 response[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 383 }
emilmont 1:7153ee70df01 384 _cs = 1;
emilmont 1:7153ee70df01 385 _spi.write(0xFF);
emilmont 1:7153ee70df01 386 return response[0];
emilmont 1:7153ee70df01 387 }
emilmont 1:7153ee70df01 388 }
emilmont 1:7153ee70df01 389 _cs = 1;
emilmont 1:7153ee70df01 390 _spi.write(0xFF);
bwang 8:dd590d3b89bf 391 spi_led = 0;
emilmont 1:7153ee70df01 392 return -1; // timeout
emilmont 1:7153ee70df01 393 }
emilmont 1:7153ee70df01 394
emilmont 1:7153ee70df01 395 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
bwang 8:dd590d3b89bf 396 spi_led = 1;
emilmont 1:7153ee70df01 397 _cs = 0;
maclobdell 4:3f40cbfe801c 398
emilmont 1:7153ee70df01 399 // read until start byte (0xFF)
emilmont 1:7153ee70df01 400 while (_spi.write(0xFF) != 0xFE);
maclobdell 4:3f40cbfe801c 401
emilmont 1:7153ee70df01 402 // read data
maclobdell 4:3f40cbfe801c 403 for (uint32_t i = 0; i < length; i++) {
emilmont 1:7153ee70df01 404 buffer[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 405 }
emilmont 1:7153ee70df01 406 _spi.write(0xFF); // checksum
emilmont 1:7153ee70df01 407 _spi.write(0xFF);
maclobdell 4:3f40cbfe801c 408
emilmont 1:7153ee70df01 409 _cs = 1;
emilmont 1:7153ee70df01 410 _spi.write(0xFF);
bwang 8:dd590d3b89bf 411 spi_led = 0;
emilmont 1:7153ee70df01 412 return 0;
emilmont 1:7153ee70df01 413 }
emilmont 1:7153ee70df01 414
emilmont 1:7153ee70df01 415 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
bwang 8:dd590d3b89bf 416 spi_led = 1;
emilmont 1:7153ee70df01 417 _cs = 0;
maclobdell 4:3f40cbfe801c 418
emilmont 1:7153ee70df01 419 // indicate start of block
emilmont 1:7153ee70df01 420 _spi.write(0xFE);
maclobdell 4:3f40cbfe801c 421
emilmont 1:7153ee70df01 422 // write the data
maclobdell 4:3f40cbfe801c 423 for (uint32_t i = 0; i < length; i++) {
emilmont 1:7153ee70df01 424 _spi.write(buffer[i]);
emilmont 1:7153ee70df01 425 }
maclobdell 4:3f40cbfe801c 426
emilmont 1:7153ee70df01 427 // write the checksum
emilmont 1:7153ee70df01 428 _spi.write(0xFF);
emilmont 1:7153ee70df01 429 _spi.write(0xFF);
maclobdell 4:3f40cbfe801c 430
emilmont 1:7153ee70df01 431 // check the response token
emilmont 1:7153ee70df01 432 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
emilmont 1:7153ee70df01 433 _cs = 1;
emilmont 1:7153ee70df01 434 _spi.write(0xFF);
emilmont 1:7153ee70df01 435 return 1;
emilmont 1:7153ee70df01 436 }
maclobdell 4:3f40cbfe801c 437
emilmont 1:7153ee70df01 438 // wait for write to finish
emilmont 1:7153ee70df01 439 while (_spi.write(0xFF) == 0);
maclobdell 4:3f40cbfe801c 440
emilmont 1:7153ee70df01 441 _cs = 1;
emilmont 1:7153ee70df01 442 _spi.write(0xFF);
bwang 8:dd590d3b89bf 443 spi_led = 0;
emilmont 1:7153ee70df01 444 return 0;
emilmont 1:7153ee70df01 445 }
emilmont 1:7153ee70df01 446
emilmont 1:7153ee70df01 447 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
emilmont 1:7153ee70df01 448 uint32_t bits = 0;
emilmont 1:7153ee70df01 449 uint32_t size = 1 + msb - lsb;
maclobdell 4:3f40cbfe801c 450 for (uint32_t i = 0; i < size; i++) {
emilmont 1:7153ee70df01 451 uint32_t position = lsb + i;
emilmont 1:7153ee70df01 452 uint32_t byte = 15 - (position >> 3);
emilmont 1:7153ee70df01 453 uint32_t bit = position & 0x7;
emilmont 1:7153ee70df01 454 uint32_t value = (data[byte] >> bit) & 1;
emilmont 1:7153ee70df01 455 bits |= value << i;
emilmont 1:7153ee70df01 456 }
emilmont 1:7153ee70df01 457 return bits;
emilmont 1:7153ee70df01 458 }
emilmont 1:7153ee70df01 459
maclobdell 4:3f40cbfe801c 460 uint32_t SDFileSystem::_sd_sectors() {
emilmont 1:7153ee70df01 461 uint32_t c_size, c_size_mult, read_bl_len;
emilmont 1:7153ee70df01 462 uint32_t block_len, mult, blocknr, capacity;
emilmont 1:7153ee70df01 463 uint32_t hc_c_size;
maclobdell 4:3f40cbfe801c 464 uint32_t blocks;
maclobdell 4:3f40cbfe801c 465
emilmont 1:7153ee70df01 466 // CMD9, Response R2 (R1 byte + 16-byte block read)
emilmont 1:7153ee70df01 467 if (_cmdx(9, 0) != 0) {
emilmont 1:7153ee70df01 468 debug("Didn't get a response from the disk\n");
emilmont 1:7153ee70df01 469 return 0;
emilmont 1:7153ee70df01 470 }
maclobdell 4:3f40cbfe801c 471
emilmont 1:7153ee70df01 472 uint8_t csd[16];
emilmont 1:7153ee70df01 473 if (_read(csd, 16) != 0) {
emilmont 1:7153ee70df01 474 debug("Couldn't read csd response from disk\n");
emilmont 1:7153ee70df01 475 return 0;
emilmont 1:7153ee70df01 476 }
maclobdell 4:3f40cbfe801c 477
emilmont 1:7153ee70df01 478 // csd_structure : csd[127:126]
emilmont 1:7153ee70df01 479 // c_size : csd[73:62]
emilmont 1:7153ee70df01 480 // c_size_mult : csd[49:47]
emilmont 1:7153ee70df01 481 // read_bl_len : csd[83:80] - the *maximum* read block length
maclobdell 4:3f40cbfe801c 482
emilmont 1:7153ee70df01 483 int csd_structure = ext_bits(csd, 127, 126);
maclobdell 4:3f40cbfe801c 484
emilmont 1:7153ee70df01 485 switch (csd_structure) {
emilmont 1:7153ee70df01 486 case 0:
emilmont 1:7153ee70df01 487 cdv = 512;
emilmont 1:7153ee70df01 488 c_size = ext_bits(csd, 73, 62);
emilmont 1:7153ee70df01 489 c_size_mult = ext_bits(csd, 49, 47);
emilmont 1:7153ee70df01 490 read_bl_len = ext_bits(csd, 83, 80);
maclobdell 4:3f40cbfe801c 491
emilmont 1:7153ee70df01 492 block_len = 1 << read_bl_len;
emilmont 1:7153ee70df01 493 mult = 1 << (c_size_mult + 2);
emilmont 1:7153ee70df01 494 blocknr = (c_size + 1) * mult;
emilmont 1:7153ee70df01 495 capacity = blocknr * block_len;
emilmont 1:7153ee70df01 496 blocks = capacity / 512;
emilmont 1:7153ee70df01 497 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
emilmont 1:7153ee70df01 498 break;
maclobdell 4:3f40cbfe801c 499
emilmont 1:7153ee70df01 500 case 1:
emilmont 1:7153ee70df01 501 cdv = 1;
emilmont 1:7153ee70df01 502 hc_c_size = ext_bits(csd, 63, 48);
emilmont 1:7153ee70df01 503 blocks = (hc_c_size+1)*1024;
emilmont 1:7153ee70df01 504 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
emilmont 1:7153ee70df01 505 break;
maclobdell 4:3f40cbfe801c 506
emilmont 1:7153ee70df01 507 default:
emilmont 1:7153ee70df01 508 debug("CSD struct unsupported\r\n");
emilmont 1:7153ee70df01 509 return 0;
emilmont 1:7153ee70df01 510 };
emilmont 1:7153ee70df01 511 return blocks;
maclobdell 4:3f40cbfe801c 512 }