Mark Bundgus
During Deep power-down mode, the contents of the SRAM and registers are not retained except for a small amount of data which can be stored in five 32-bit general purpose registers of the power management unit block. All functional pins are tri-stated in Deep power-down mode except for the WAKEUP pin.
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| Page | Changed | Message | Modified by | Actions |
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| Homepage | 03 Jan 2015 |  Mark Bundgus |
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