bosko lekovic / Mbed OS MiWi_spi

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MiWiApp.cpp@0:c06c791ca345, 2020-07-10 (annotated)

Committer:
bosko001
Date:
Fri Jul 10 09:28:30 2020 +0000
Revision:
0:c06c791ca345
Child:
1:dd44d6b64300
miwi

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bosko001 0:c06c791ca345 1 #include "MiWiApp.h"
bosko001 0:c06c791ca345 2
bosko001 0:c06c791ca345 3
bosko001 0:c06c791ca345 4 #include "mbed.h"
bosko001 0:c06c791ca345 5
bosko001 0:c06c791ca345 6
bosko001 0:c06c791ca345 7 const char _MIWI_DEV_CFG[ 32 ] =
bosko001 0:c06c791ca345 8 {
bosko001 0:c06c791ca345 9 0x20 | 0x10 | 0, //0x08 //0x06,1
bosko001 0:c06c791ca345 10 0x80 | 0x04 | 0x00,
bosko001 0:c06c791ca345 11 0x04,
bosko001 0:c06c791ca345 12 0x07,
bosko001 0:c06c791ca345 13 0x0C,
bosko001 0:c06c791ca345 14 0xC0 | 0x02,
bosko001 0:c06c791ca345 15 0x77,
bosko001 0:c06c791ca345 16 95, //0x64,
bosko001 0:c06c791ca345 17 1, //0x32,
bosko001 0:c06c791ca345 18 0x74,
bosko001 0:c06c791ca345 19 0x62,
bosko001 0:c06c791ca345 20 0x32,
bosko001 0:c06c791ca345 21 0x20 | 0x18,
bosko001 0:c06c791ca345 22 /*0xC0*/0x0 | 0x08, //irq0=PLREADY irq1=CRCOK TXDONE
bosko001 0:c06c791ca345 23 0x20 | 0x09, // TXDONE RSSI en, PLL en
bosko001 0:c06c791ca345 24 0x30, //0x00, //// RSSI threshold = 50
bosko001 0:c06c791ca345 25 0xA0 | 0x03,
bosko001 0:c06c791ca345 26 0x08 | 0x30,
bosko001 0:c06c791ca345 27 0x20 | 0x18,
bosko001 0:c06c791ca345 28 0x7, //0x07, //reserved read only
bosko001 0:c06c791ca345 29 0, //rssi read only
bosko001 0:c06c791ca345 30 0, // OOK config reg
bosko001 0:c06c791ca345 31 0x69,
bosko001 0:c06c791ca345 32 0x81,
bosko001 0:c06c791ca345 33 0x7E,
bosko001 0:c06c791ca345 34 0x96,
bosko001 0:c06c791ca345 35 0x78, //Tx polfv = 200KHz Tx pow = 1dbm ///0xF0,
bosko001 0:c06c791ca345 36 0, //0x80,
bosko001 0:c06c791ca345 37 64,
bosko001 0:c06c791ca345 38 0x00,
bosko001 0:c06c791ca345 39 0x80 | 0x60 | 0x08, // variable packet, 4 byte preamble, CRC en
bosko001 0:c06c791ca345 40 0x00
bosko001 0:c06c791ca345 41 };
bosko001 0:c06c791ca345 42
bosko001 0:c06c791ca345 43
bosko001 0:c06c791ca345 44
bosko001 0:c06c791ca345 45 SPI spi( PTD2, PTD3, PTD1 );
bosko001 0:c06c791ca345 46 DigitalOut csdata( PTD0,1 );
bosko001 0:c06c791ca345 47 DigitalOut csconfig( PTB2,1 );
bosko001 0:c06c791ca345 48 DigitalOut MiWiReset( PTB11, 1 );
bosko001 0:c06c791ca345 49
bosko001 0:c06c791ca345 50 DigitalIn pin_irq0( PTB9 );
bosko001 0:c06c791ca345 51 DigitalIn pin_irq1( PTC2 );
bosko001 0:c06c791ca345 52
bosko001 0:c06c791ca345 53
bosko001 0:c06c791ca345 54 void inic_MiWi( void )
bosko001 0:c06c791ca345 55 {
bosko001 0:c06c791ca345 56
bosko001 0:c06c791ca345 57 spi.format( 8, 0);
bosko001 0:c06c791ca345 58 spi.frequency(1000000);
bosko001 0:c06c791ca345 59
bosko001 0:c06c791ca345 60 resetMiWi( );
bosko001 0:c06c791ca345 61
bosko001 0:c06c791ca345 62 for(int i = 0; i<0x20; i++ ) writeMiWiReg(i, _MIWI_DEV_CFG[i]);
bosko001 0:c06c791ca345 63 print_regs( );
bosko001 0:c06c791ca345 64
bosko001 0:c06c791ca345 65 lockPllMiWi( );
bosko001 0:c06c791ca345 66 printf("FTPRIREG = %x\n\r", readMiWiReg( 0xe));
bosko001 0:c06c791ca345 67
bosko001 0:c06c791ca345 68 }
bosko001 0:c06c791ca345 69
bosko001 0:c06c791ca345 70 void resetMiWi( void )
bosko001 0:c06c791ca345 71 {
bosko001 0:c06c791ca345 72 MiWiReset = 1;
bosko001 0:c06c791ca345 73 wait( 0.1 );
bosko001 0:c06c791ca345 74 MiWiReset = 0;
bosko001 0:c06c791ca345 75 wait( 0.01 );
bosko001 0:c06c791ca345 76 }
bosko001 0:c06c791ca345 77
bosko001 0:c06c791ca345 78 void set_mode( char mode )
bosko001 0:c06c791ca345 79 {
bosko001 0:c06c791ca345 80 union U_GCONFIG u_gc;
bosko001 0:c06c791ca345 81 u_gc.bajt = readMiWiReg( 0 ); // read GCONFIG
bosko001 0:c06c791ca345 82 u_gc.s_gc.CMOD = mode;
bosko001 0:c06c791ca345 83 writeMiWiReg( 0, u_gc.bajt ); // write GCONFIG
bosko001 0:c06c791ca345 84 printf("gconfig %x\n\r", readMiWiReg(0) );
bosko001 0:c06c791ca345 85 }
bosko001 0:c06c791ca345 86 char get_mode( void )
bosko001 0:c06c791ca345 87 {
bosko001 0:c06c791ca345 88 union U_GCONFIG u_gc;
bosko001 0:c06c791ca345 89 char c;
bosko001 0:c06c791ca345 90 u_gc.bajt = readMiWiReg( 0 ); // read GCONFIG
bosko001 0:c06c791ca345 91 c = u_gc.s_gc.CMOD;
bosko001 0:c06c791ca345 92 return c;
bosko001 0:c06c791ca345 93 }
bosko001 0:c06c791ca345 94
bosko001 0:c06c791ca345 95
bosko001 0:c06c791ca345 96 void print_regs( void )
bosko001 0:c06c791ca345 97 {
bosko001 0:c06c791ca345 98
bosko001 0:c06c791ca345 99 char c;
bosko001 0:c06c791ca345 100 for(int i = 0; i<0x20; i++ )
bosko001 0:c06c791ca345 101 {
bosko001 0:c06c791ca345 102 c = readMiWiReg(i);
bosko001 0:c06c791ca345 103 printf("%2x ", c );
bosko001 0:c06c791ca345 104 }
bosko001 0:c06c791ca345 105 printf(" irq0=%d irq1=%d\n\r", pin_irq0.read(), pin_irq1.read() ); fflush(stdout);
bosko001 0:c06c791ca345 106 }
bosko001 0:c06c791ca345 107
bosko001 0:c06c791ca345 108 void txMiWi( char *niz )
bosko001 0:c06c791ca345 109 {
bosko001 0:c06c791ca345 110 char old_mode = get_mode();
bosko001 0:c06c791ca345 111 set_mode(1);
bosko001 0:c06c791ca345 112 for(int i=0; i<niz[0]; i++ )
bosko001 0:c06c791ca345 113 {
bosko001 0:c06c791ca345 114 writeMiWiData( niz[i] ); // write FIFO
bosko001 0:c06c791ca345 115 }
bosko001 0:c06c791ca345 116 set_mode( 4 ); // predaja
bosko001 0:c06c791ca345 117 while( !(readMiWiReg( 0x0E ) & 0x20) ); // TXDONE ?
bosko001 0:c06c791ca345 118 set_mode( old_mode );
bosko001 0:c06c791ca345 119 // wait(0.5);
bosko001 0:c06c791ca345 120 printf("txdone = %x\n\r", readMiWiReg( 0x0E ));
bosko001 0:c06c791ca345 121 printf("mode = %x\n\r", old_mode);
bosko001 0:c06c791ca345 122 printf("config = %x\n\r", readMiWiReg( 0 ));
bosko001 0:c06c791ca345 123 // // standby
bosko001 0:c06c791ca345 124 }
bosko001 0:c06c791ca345 125
bosko001 0:c06c791ca345 126 char readMiWiReg( char reg )
bosko001 0:c06c791ca345 127 {
bosko001 0:c06c791ca345 128 char c;
bosko001 0:c06c791ca345 129 csconfig=0;
bosko001 0:c06c791ca345 130 spi.write( (reg)*2 + 0x40 );
bosko001 0:c06c791ca345 131 c = spi.write( 0 );
bosko001 0:c06c791ca345 132 csconfig = 1;
bosko001 0:c06c791ca345 133 return c;
bosko001 0:c06c791ca345 134 }
bosko001 0:c06c791ca345 135 void writeMiWiReg( char reg, char data )
bosko001 0:c06c791ca345 136 {
bosko001 0:c06c791ca345 137 char c;
bosko001 0:c06c791ca345 138 csconfig=0;
bosko001 0:c06c791ca345 139 spi.write( (reg)*2 /*& ~0x40*/ );
bosko001 0:c06c791ca345 140 spi.write( data );
bosko001 0:c06c791ca345 141 csconfig = 1;
bosko001 0:c06c791ca345 142
bosko001 0:c06c791ca345 143 }
bosko001 0:c06c791ca345 144
bosko001 0:c06c791ca345 145 void writeMiWiData( char data )
bosko001 0:c06c791ca345 146 {
bosko001 0:c06c791ca345 147 char c;
bosko001 0:c06c791ca345 148 csdata=0;
bosko001 0:c06c791ca345 149 spi.write( data );
bosko001 0:c06c791ca345 150 csdata = 1;
bosko001 0:c06c791ca345 151 }
bosko001 0:c06c791ca345 152 char readMiWiData( void )
bosko001 0:c06c791ca345 153 {
bosko001 0:c06c791ca345 154 char c;
bosko001 0:c06c791ca345 155 csdata=0;
bosko001 0:c06c791ca345 156 c = spi.write( 0x55 );
bosko001 0:c06c791ca345 157 csdata = 1;
bosko001 0:c06c791ca345 158 return c;
bosko001 0:c06c791ca345 159 }
bosko001 0:c06c791ca345 160
bosko001 0:c06c791ca345 161
bosko001 0:c06c791ca345 162
bosko001 0:c06c791ca345 163 bool lockPllMiWi( )
bosko001 0:c06c791ca345 164 {
bosko001 0:c06c791ca345 165 char old_mode;
bosko001 0:c06c791ca345 166
bosko001 0:c06c791ca345 167 union U_GCONFIG u;
bosko001 0:c06c791ca345 168 u.bajt = readMiWiReg( 0 );
bosko001 0:c06c791ca345 169 old_mode = u.s_gc.CMOD;
bosko001 0:c06c791ca345 170
bosko001 0:c06c791ca345 171 set_mode(2);
bosko001 0:c06c791ca345 172 u.bajt = readMiWiReg( 0 );
bosko001 0:c06c791ca345 173 int i;
bosko001 0:c06c791ca345 174 for( i =0; i<4 ; i++)
bosko001 0:c06c791ca345 175 {
bosko001 0:c06c791ca345 176 u.s_gc.VCOT = i;
bosko001 0:c06c791ca345 177 writeMiWiReg( 0, u.bajt );
bosko001 0:c06c791ca345 178 wait(0.001 );
bosko001 0:c06c791ca345 179
bosko001 0:c06c791ca345 180 printf("cofig[%d] = %x\n\r",i ,readMiWiReg( 0 ));
bosko001 0:c06c791ca345 181
bosko001 0:c06c791ca345 182 if( readMiWiReg( 0xe ) & 2 ) break;
bosko001 0:c06c791ca345 183 }
bosko001 0:c06c791ca345 184 set_mode( old_mode );
bosko001 0:c06c791ca345 185 if( readMiWiReg( 0xe ) & 2 ) return true;
bosko001 0:c06c791ca345 186 return false;
bosko001 0:c06c791ca345 187
bosko001 0:c06c791ca345 188 }
bosko001 0:c06c791ca345 189