Nicolas Borla / Mbed 2 deprecated PES2_mbed

PES2 Firmware for mbed2

Dependencies:   Stepper mbed Servo LSM9DS1_Library SDFileSystem

EncoderCounter.cpp@0:41afd907b7bd, 2021-03-12 (annotated)

Committer:
boro
Date:
Fri Mar 12 13:06:52 2021 +0000
Revision:
0:41afd907b7bd
d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
boro 0:41afd907b7bd 1 /*
boro 0:41afd907b7bd 2 * EncoderCounter.cpp
boro 0:41afd907b7bd 3 * Copyright (c) 2018, ZHAW
boro 0:41afd907b7bd 4 * All rights reserved.
boro 0:41afd907b7bd 5 */
boro 0:41afd907b7bd 6
boro 0:41afd907b7bd 7 #include "EncoderCounter.h"
boro 0:41afd907b7bd 8
boro 0:41afd907b7bd 9 using namespace std;
boro 0:41afd907b7bd 10
boro 0:41afd907b7bd 11 /**
boro 0:41afd907b7bd 12 * Creates and initializes the driver to read the quadrature
boro 0:41afd907b7bd 13 * encoder counter of the STM32 microcontroller.
boro 0:41afd907b7bd 14 * @param a the input pin for the channel A.
boro 0:41afd907b7bd 15 * @param b the input pin for the channel B.
boro 0:41afd907b7bd 16 */
boro 0:41afd907b7bd 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
boro 0:41afd907b7bd 18
boro 0:41afd907b7bd 19 // check pins
boro 0:41afd907b7bd 20
boro 0:41afd907b7bd 21 if ((a == PA_0) && (b == PA_1)) {
boro 0:41afd907b7bd 22
boro 0:41afd907b7bd 23 // pinmap OK for TIM2 CH1 and CH2
boro 0:41afd907b7bd 24
boro 0:41afd907b7bd 25 TIM = TIM2;
boro 0:41afd907b7bd 26
boro 0:41afd907b7bd 27 // configure general purpose I/O registers
boro 0:41afd907b7bd 28
boro 0:41afd907b7bd 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
boro 0:41afd907b7bd 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
boro 0:41afd907b7bd 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
boro 0:41afd907b7bd 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
boro 0:41afd907b7bd 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
boro 0:41afd907b7bd 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
boro 0:41afd907b7bd 35
boro 0:41afd907b7bd 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
boro 0:41afd907b7bd 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
boro 0:41afd907b7bd 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
boro 0:41afd907b7bd 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
boro 0:41afd907b7bd 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
boro 0:41afd907b7bd 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
boro 0:41afd907b7bd 42
boro 0:41afd907b7bd 43 // configure reset and clock control registers
boro 0:41afd907b7bd 44
boro 0:41afd907b7bd 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
boro 0:41afd907b7bd 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
boro 0:41afd907b7bd 47
boro 0:41afd907b7bd 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
boro 0:41afd907b7bd 49
boro 0:41afd907b7bd 50 } else if ((a == PA_6) && (b == PC_7)) {
boro 0:41afd907b7bd 51
boro 0:41afd907b7bd 52 // pinmap OK for TIM3 CH1 and CH2
boro 0:41afd907b7bd 53
boro 0:41afd907b7bd 54 TIM = TIM3;
boro 0:41afd907b7bd 55
boro 0:41afd907b7bd 56 // configure reset and clock control registers
boro 0:41afd907b7bd 57
boro 0:41afd907b7bd 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
boro 0:41afd907b7bd 59
boro 0:41afd907b7bd 60 // configure general purpose I/O registers
boro 0:41afd907b7bd 61
boro 0:41afd907b7bd 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
boro 0:41afd907b7bd 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
boro 0:41afd907b7bd 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
boro 0:41afd907b7bd 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
boro 0:41afd907b7bd 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
boro 0:41afd907b7bd 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
boro 0:41afd907b7bd 68
boro 0:41afd907b7bd 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
boro 0:41afd907b7bd 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
boro 0:41afd907b7bd 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
boro 0:41afd907b7bd 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
boro 0:41afd907b7bd 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
boro 0:41afd907b7bd 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
boro 0:41afd907b7bd 75
boro 0:41afd907b7bd 76 // configure reset and clock control registers
boro 0:41afd907b7bd 77
boro 0:41afd907b7bd 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
boro 0:41afd907b7bd 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
boro 0:41afd907b7bd 80
boro 0:41afd907b7bd 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
boro 0:41afd907b7bd 82
boro 0:41afd907b7bd 83 } else if ((a == PB_6) && (b == PB_7)) {
boro 0:41afd907b7bd 84
boro 0:41afd907b7bd 85 // pinmap OK for TIM4 CH1 and CH2
boro 0:41afd907b7bd 86
boro 0:41afd907b7bd 87 TIM = TIM4;
boro 0:41afd907b7bd 88
boro 0:41afd907b7bd 89 // configure reset and clock control registers
boro 0:41afd907b7bd 90
boro 0:41afd907b7bd 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
boro 0:41afd907b7bd 92
boro 0:41afd907b7bd 93 // configure general purpose I/O registers
boro 0:41afd907b7bd 94
boro 0:41afd907b7bd 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
boro 0:41afd907b7bd 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
boro 0:41afd907b7bd 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
boro 0:41afd907b7bd 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
boro 0:41afd907b7bd 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
boro 0:41afd907b7bd 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
boro 0:41afd907b7bd 101
boro 0:41afd907b7bd 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
boro 0:41afd907b7bd 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
boro 0:41afd907b7bd 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
boro 0:41afd907b7bd 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
boro 0:41afd907b7bd 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
boro 0:41afd907b7bd 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
boro 0:41afd907b7bd 108
boro 0:41afd907b7bd 109 // configure reset and clock control registers
boro 0:41afd907b7bd 110
boro 0:41afd907b7bd 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
boro 0:41afd907b7bd 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
boro 0:41afd907b7bd 113
boro 0:41afd907b7bd 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
boro 0:41afd907b7bd 115
boro 0:41afd907b7bd 116 } else {
boro 0:41afd907b7bd 117
boro 0:41afd907b7bd 118 printf("pinmap not found for peripheral\n");
boro 0:41afd907b7bd 119 }
boro 0:41afd907b7bd 120
boro 0:41afd907b7bd 121 // configure general purpose timer 3 or 4
boro 0:41afd907b7bd 122
boro 0:41afd907b7bd 123 TIM->CR1 = 0x0000; // counter disable
boro 0:41afd907b7bd 124 TIM->CR2 = 0x0000; // reset master mode selection
boro 0:41afd907b7bd 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
boro 0:41afd907b7bd 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
boro 0:41afd907b7bd 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
boro 0:41afd907b7bd 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
boro 0:41afd907b7bd 129 TIM->CNT = 0x0000; // reset counter value
boro 0:41afd907b7bd 130 TIM->ARR = 0xFFFF; // auto reload register
boro 0:41afd907b7bd 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
boro 0:41afd907b7bd 132 }
boro 0:41afd907b7bd 133
boro 0:41afd907b7bd 134 EncoderCounter::~EncoderCounter() {}
boro 0:41afd907b7bd 135
boro 0:41afd907b7bd 136 /**
boro 0:41afd907b7bd 137 * Resets the counter value to zero.
boro 0:41afd907b7bd 138 */
boro 0:41afd907b7bd 139 void EncoderCounter::reset() {
boro 0:41afd907b7bd 140
boro 0:41afd907b7bd 141 TIM->CNT = 0x0000;
boro 0:41afd907b7bd 142 }
boro 0:41afd907b7bd 143
boro 0:41afd907b7bd 144 /**
boro 0:41afd907b7bd 145 * Resets the counter value to a given offset value.
boro 0:41afd907b7bd 146 * @param offset the offset value to reset the counter to.
boro 0:41afd907b7bd 147 */
boro 0:41afd907b7bd 148 void EncoderCounter::reset(int16_t offset) {
boro 0:41afd907b7bd 149
boro 0:41afd907b7bd 150 TIM->CNT = -offset;
boro 0:41afd907b7bd 151 }
boro 0:41afd907b7bd 152
boro 0:41afd907b7bd 153 /**
boro 0:41afd907b7bd 154 * Reads the quadrature encoder counter value.
boro 0:41afd907b7bd 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
boro 0:41afd907b7bd 156 */
boro 0:41afd907b7bd 157 int16_t EncoderCounter::read() {
boro 0:41afd907b7bd 158
boro 0:41afd907b7bd 159 return static_cast<int16_t>(-TIM->CNT);
boro 0:41afd907b7bd 160 }
boro 0:41afd907b7bd 161
boro 0:41afd907b7bd 162 /**
boro 0:41afd907b7bd 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
boro 0:41afd907b7bd 164 */
boro 0:41afd907b7bd 165 EncoderCounter::operator int16_t() {
boro 0:41afd907b7bd 166
boro 0:41afd907b7bd 167 return read();
boro 0:41afd907b7bd 168 }
boro 0:41afd907b7bd 169
boro 0:41afd907b7bd 170
boro 0:41afd907b7bd 171