IMU measurement + Speed controller

Dependencies:   mbed

Committer:
boro
Date:
Thu May 30 13:21:44 2019 +0000
Revision:
1:17fdd812cb8d
Parent:
0:5a93e4916fb1
a

Who changed what in which revision?

UserRevisionLine numberNew contents of line
boro 0:5a93e4916fb1 1 /*
boro 0:5a93e4916fb1 2 * EncoderCounter.cpp
boro 0:5a93e4916fb1 3 * Copyright (c) 2018, ZHAW
boro 0:5a93e4916fb1 4 * All rights reserved.
boro 0:5a93e4916fb1 5 */
boro 0:5a93e4916fb1 6
boro 0:5a93e4916fb1 7 #include "EncoderCounter.h"
boro 0:5a93e4916fb1 8
boro 0:5a93e4916fb1 9 using namespace std;
boro 0:5a93e4916fb1 10
boro 0:5a93e4916fb1 11 /**
boro 0:5a93e4916fb1 12 * Creates and initializes the driver to read the quadrature
boro 0:5a93e4916fb1 13 * encoder counter of the STM32 microcontroller.
boro 0:5a93e4916fb1 14 * @param a the input pin for the channel A.
boro 0:5a93e4916fb1 15 * @param b the input pin for the channel B.
boro 0:5a93e4916fb1 16 */
boro 0:5a93e4916fb1 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
boro 0:5a93e4916fb1 18
boro 0:5a93e4916fb1 19 // check pins
boro 0:5a93e4916fb1 20
boro 0:5a93e4916fb1 21 if ((a == PA_0) && (b == PA_1)) {
boro 0:5a93e4916fb1 22
boro 0:5a93e4916fb1 23 // pinmap OK for TIM2 CH1 and CH2
boro 0:5a93e4916fb1 24
boro 0:5a93e4916fb1 25 TIM = TIM2;
boro 0:5a93e4916fb1 26
boro 0:5a93e4916fb1 27 // configure general purpose I/O registers
boro 0:5a93e4916fb1 28
boro 0:5a93e4916fb1 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
boro 0:5a93e4916fb1 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
boro 0:5a93e4916fb1 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
boro 0:5a93e4916fb1 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
boro 0:5a93e4916fb1 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
boro 0:5a93e4916fb1 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
boro 0:5a93e4916fb1 35
boro 0:5a93e4916fb1 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
boro 0:5a93e4916fb1 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
boro 0:5a93e4916fb1 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
boro 0:5a93e4916fb1 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
boro 0:5a93e4916fb1 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
boro 0:5a93e4916fb1 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
boro 0:5a93e4916fb1 42
boro 0:5a93e4916fb1 43 // configure reset and clock control registers
boro 0:5a93e4916fb1 44
boro 0:5a93e4916fb1 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
boro 0:5a93e4916fb1 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
boro 0:5a93e4916fb1 47
boro 0:5a93e4916fb1 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
boro 0:5a93e4916fb1 49
boro 0:5a93e4916fb1 50 } else if ((a == PA_6) && (b == PC_7)) {
boro 0:5a93e4916fb1 51
boro 0:5a93e4916fb1 52 // pinmap OK for TIM3 CH1 and CH2
boro 0:5a93e4916fb1 53
boro 0:5a93e4916fb1 54 TIM = TIM3;
boro 0:5a93e4916fb1 55
boro 0:5a93e4916fb1 56 // configure reset and clock control registers
boro 0:5a93e4916fb1 57
boro 0:5a93e4916fb1 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
boro 0:5a93e4916fb1 59
boro 0:5a93e4916fb1 60 // configure general purpose I/O registers
boro 0:5a93e4916fb1 61
boro 0:5a93e4916fb1 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
boro 0:5a93e4916fb1 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
boro 0:5a93e4916fb1 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
boro 0:5a93e4916fb1 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
boro 0:5a93e4916fb1 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
boro 0:5a93e4916fb1 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
boro 0:5a93e4916fb1 68
boro 0:5a93e4916fb1 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
boro 0:5a93e4916fb1 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
boro 0:5a93e4916fb1 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
boro 0:5a93e4916fb1 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
boro 0:5a93e4916fb1 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
boro 0:5a93e4916fb1 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
boro 0:5a93e4916fb1 75
boro 0:5a93e4916fb1 76 // configure reset and clock control registers
boro 0:5a93e4916fb1 77
boro 0:5a93e4916fb1 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
boro 0:5a93e4916fb1 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
boro 0:5a93e4916fb1 80
boro 0:5a93e4916fb1 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
boro 0:5a93e4916fb1 82
boro 0:5a93e4916fb1 83 } else if ((a == PB_6) && (b == PB_7)) {
boro 0:5a93e4916fb1 84
boro 0:5a93e4916fb1 85 // pinmap OK for TIM4 CH1 and CH2
boro 0:5a93e4916fb1 86
boro 0:5a93e4916fb1 87 TIM = TIM4;
boro 0:5a93e4916fb1 88
boro 0:5a93e4916fb1 89 // configure reset and clock control registers
boro 0:5a93e4916fb1 90
boro 0:5a93e4916fb1 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
boro 0:5a93e4916fb1 92
boro 0:5a93e4916fb1 93 // configure general purpose I/O registers
boro 0:5a93e4916fb1 94
boro 0:5a93e4916fb1 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
boro 0:5a93e4916fb1 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
boro 0:5a93e4916fb1 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
boro 0:5a93e4916fb1 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
boro 0:5a93e4916fb1 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
boro 0:5a93e4916fb1 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
boro 0:5a93e4916fb1 101
boro 0:5a93e4916fb1 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
boro 0:5a93e4916fb1 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
boro 0:5a93e4916fb1 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
boro 0:5a93e4916fb1 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
boro 0:5a93e4916fb1 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
boro 0:5a93e4916fb1 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
boro 0:5a93e4916fb1 108
boro 0:5a93e4916fb1 109 // configure reset and clock control registers
boro 0:5a93e4916fb1 110
boro 0:5a93e4916fb1 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
boro 0:5a93e4916fb1 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
boro 0:5a93e4916fb1 113
boro 0:5a93e4916fb1 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
boro 0:5a93e4916fb1 115
boro 0:5a93e4916fb1 116 } else {
boro 0:5a93e4916fb1 117
boro 0:5a93e4916fb1 118 printf("pinmap not found for peripheral\n");
boro 0:5a93e4916fb1 119 }
boro 0:5a93e4916fb1 120
boro 0:5a93e4916fb1 121 // configure general purpose timer 3 or 4
boro 0:5a93e4916fb1 122
boro 0:5a93e4916fb1 123 TIM->CR1 = 0x0000; // counter disable
boro 0:5a93e4916fb1 124 TIM->CR2 = 0x0000; // reset master mode selection
boro 0:5a93e4916fb1 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
boro 0:5a93e4916fb1 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
boro 0:5a93e4916fb1 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
boro 0:5a93e4916fb1 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
boro 0:5a93e4916fb1 129 TIM->CNT = 0x0000; // reset counter value
boro 0:5a93e4916fb1 130 TIM->ARR = 0xFFFF; // auto reload register
boro 0:5a93e4916fb1 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
boro 0:5a93e4916fb1 132 }
boro 0:5a93e4916fb1 133
boro 0:5a93e4916fb1 134 EncoderCounter::~EncoderCounter() {}
boro 0:5a93e4916fb1 135
boro 0:5a93e4916fb1 136 /**
boro 0:5a93e4916fb1 137 * Resets the counter value to zero.
boro 0:5a93e4916fb1 138 */
boro 0:5a93e4916fb1 139 void EncoderCounter::reset() {
boro 0:5a93e4916fb1 140
boro 0:5a93e4916fb1 141 TIM->CNT = 0x0000;
boro 0:5a93e4916fb1 142 }
boro 0:5a93e4916fb1 143
boro 0:5a93e4916fb1 144 /**
boro 0:5a93e4916fb1 145 * Resets the counter value to a given offset value.
boro 0:5a93e4916fb1 146 * @param offset the offset value to reset the counter to.
boro 0:5a93e4916fb1 147 */
boro 0:5a93e4916fb1 148 void EncoderCounter::reset(short offset) {
boro 0:5a93e4916fb1 149
boro 0:5a93e4916fb1 150 TIM->CNT = -offset;
boro 0:5a93e4916fb1 151 }
boro 0:5a93e4916fb1 152
boro 0:5a93e4916fb1 153 /**
boro 0:5a93e4916fb1 154 * Reads the quadrature encoder counter value.
boro 0:5a93e4916fb1 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
boro 0:5a93e4916fb1 156 */
boro 0:5a93e4916fb1 157 short EncoderCounter::read() {
boro 0:5a93e4916fb1 158
boro 0:5a93e4916fb1 159 return (short)(-TIM->CNT);
boro 0:5a93e4916fb1 160 }
boro 0:5a93e4916fb1 161
boro 0:5a93e4916fb1 162 /**
boro 0:5a93e4916fb1 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
boro 0:5a93e4916fb1 164 */
boro 0:5a93e4916fb1 165 EncoderCounter::operator short() {
boro 0:5a93e4916fb1 166
boro 0:5a93e4916fb1 167 return read();
boro 0:5a93e4916fb1 168 }
boro 0:5a93e4916fb1 169
boro 0:5a93e4916fb1 170
boro 0:5a93e4916fb1 171