BBR 1 Ebene

Committer:
borlanic
Date:
Mon May 14 11:29:06 2018 +0000
Revision:
0:fbdae7e6d805
BBR

Who changed what in which revision?

UserRevisionLine numberNew contents of line
borlanic 0:fbdae7e6d805 1 {
borlanic 0:fbdae7e6d805 2 "Target": {
borlanic 0:fbdae7e6d805 3 "core": null,
borlanic 0:fbdae7e6d805 4 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 5 "supported_toolchains": null,
borlanic 0:fbdae7e6d805 6 "extra_labels": [],
borlanic 0:fbdae7e6d805 7 "is_disk_virtual": false,
borlanic 0:fbdae7e6d805 8 "macros": [],
borlanic 0:fbdae7e6d805 9 "device_has": [],
borlanic 0:fbdae7e6d805 10 "features": [],
borlanic 0:fbdae7e6d805 11 "detect_code": [],
borlanic 0:fbdae7e6d805 12 "public": false,
borlanic 0:fbdae7e6d805 13 "default_lib": "std",
borlanic 0:fbdae7e6d805 14 "bootloader_supported": false,
borlanic 0:fbdae7e6d805 15 "config": {
borlanic 0:fbdae7e6d805 16 "console-uart-flow-control": {
borlanic 0:fbdae7e6d805 17 "help": "Console hardware flow control. Options: null, RTS, CTS, RTSCTS.",
borlanic 0:fbdae7e6d805 18 "value": null
borlanic 0:fbdae7e6d805 19 }
borlanic 0:fbdae7e6d805 20 }
borlanic 0:fbdae7e6d805 21 },
borlanic 0:fbdae7e6d805 22 "CM4_UARM": {
borlanic 0:fbdae7e6d805 23 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 24 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 25 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 26 "public": false,
borlanic 0:fbdae7e6d805 27 "supported_toolchains": ["uARM"],
borlanic 0:fbdae7e6d805 28 "default_lib": "small"
borlanic 0:fbdae7e6d805 29 },
borlanic 0:fbdae7e6d805 30 "CM4_ARM": {
borlanic 0:fbdae7e6d805 31 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 32 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 33 "public": false,
borlanic 0:fbdae7e6d805 34 "supported_toolchains": ["ARM"]
borlanic 0:fbdae7e6d805 35 },
borlanic 0:fbdae7e6d805 36 "CM4F_UARM": {
borlanic 0:fbdae7e6d805 37 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 38 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 39 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 40 "public": false,
borlanic 0:fbdae7e6d805 41 "supported_toolchains": ["uARM"],
borlanic 0:fbdae7e6d805 42 "default_lib": "small"
borlanic 0:fbdae7e6d805 43 },
borlanic 0:fbdae7e6d805 44 "CM4F_ARM": {
borlanic 0:fbdae7e6d805 45 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 46 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 47 "public": false,
borlanic 0:fbdae7e6d805 48 "supported_toolchains": ["ARM"]
borlanic 0:fbdae7e6d805 49 },
borlanic 0:fbdae7e6d805 50 "LPCTarget": {
borlanic 0:fbdae7e6d805 51 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 52 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
borlanic 0:fbdae7e6d805 53 "public": false
borlanic 0:fbdae7e6d805 54 },
borlanic 0:fbdae7e6d805 55 "LPC11C24": {
borlanic 0:fbdae7e6d805 56 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 57 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 58 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
borlanic 0:fbdae7e6d805 59 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 60 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 61 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 62 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 63 "device_name": "LPC11C24FBD48/301"
borlanic 0:fbdae7e6d805 64 },
borlanic 0:fbdae7e6d805 65 "LPC1114": {
borlanic 0:fbdae7e6d805 66 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 67 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 68 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 69 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
borlanic 0:fbdae7e6d805 70 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 71 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 72 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 73 "default_lib": "small",
borlanic 0:fbdae7e6d805 74 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 75 "device_name": "LPC1114FN28/102"
borlanic 0:fbdae7e6d805 76 },
borlanic 0:fbdae7e6d805 77 "LPC11U24": {
borlanic 0:fbdae7e6d805 78 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 79 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 80 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 81 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
borlanic 0:fbdae7e6d805 82 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 83 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 84 "detect_code": ["1040"],
borlanic 0:fbdae7e6d805 85 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 86 "default_lib": "small",
borlanic 0:fbdae7e6d805 87 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 88 "device_name": "LPC11U24FBD48/401"
borlanic 0:fbdae7e6d805 89 },
borlanic 0:fbdae7e6d805 90 "OC_MBUINO": {
borlanic 0:fbdae7e6d805 91 "inherits": ["LPC11U24"],
borlanic 0:fbdae7e6d805 92 "macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 93 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 94 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 95 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 96 },
borlanic 0:fbdae7e6d805 97 "LPC11U24_301": {
borlanic 0:fbdae7e6d805 98 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 99 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 100 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 101 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 102 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 103 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 104 "device_name": "LPC11U24FHI33/301"
borlanic 0:fbdae7e6d805 105 },
borlanic 0:fbdae7e6d805 106 "LPC11U34_421": {
borlanic 0:fbdae7e6d805 107 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 108 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 109 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 110 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 111 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 112 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 113 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 114 "default_lib": "small",
borlanic 0:fbdae7e6d805 115 "device_name": "LPC11U34FBD48/311"
borlanic 0:fbdae7e6d805 116 },
borlanic 0:fbdae7e6d805 117 "MICRONFCBOARD": {
borlanic 0:fbdae7e6d805 118 "inherits": ["LPC11U34_421"],
borlanic 0:fbdae7e6d805 119 "macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
borlanic 0:fbdae7e6d805 120 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
borlanic 0:fbdae7e6d805 121 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 122 "device_name": "LPC11U34FBD48/311"
borlanic 0:fbdae7e6d805 123 },
borlanic 0:fbdae7e6d805 124 "LPC11U35_401": {
borlanic 0:fbdae7e6d805 125 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 126 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 127 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 128 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 129 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 130 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 131 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 132 "default_lib": "small",
borlanic 0:fbdae7e6d805 133 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 134 "device_name": "LPC11U35FBD48/401"
borlanic 0:fbdae7e6d805 135 },
borlanic 0:fbdae7e6d805 136 "LPC11U35_501": {
borlanic 0:fbdae7e6d805 137 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 138 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 139 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 140 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
borlanic 0:fbdae7e6d805 141 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 142 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 143 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 144 "default_lib": "small",
borlanic 0:fbdae7e6d805 145 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 146 "device_name": "LPC11U35FHI33/501"
borlanic 0:fbdae7e6d805 147 },
borlanic 0:fbdae7e6d805 148 "LPC11U35_501_IBDAP": {
borlanic 0:fbdae7e6d805 149 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 150 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 151 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 152 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
borlanic 0:fbdae7e6d805 153 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 155 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 156 "default_lib": "small",
borlanic 0:fbdae7e6d805 157 "device_name": "LPC11U35FHI33/501"
borlanic 0:fbdae7e6d805 158 },
borlanic 0:fbdae7e6d805 159 "XADOW_M0": {
borlanic 0:fbdae7e6d805 160 "inherits": ["LPC11U35_501"]
borlanic 0:fbdae7e6d805 161 },
borlanic 0:fbdae7e6d805 162 "LPC11U35_Y5_MBUG": {
borlanic 0:fbdae7e6d805 163 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 164 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 165 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 166 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
borlanic 0:fbdae7e6d805 167 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 168 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 169 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 170 "default_lib": "small",
borlanic 0:fbdae7e6d805 171 "device_name": "LPC11U35FHI33/501"
borlanic 0:fbdae7e6d805 172 },
borlanic 0:fbdae7e6d805 173 "LPC11U37_501": {
borlanic 0:fbdae7e6d805 174 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 175 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 176 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 177 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 178 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 179 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 180 "default_lib": "small",
borlanic 0:fbdae7e6d805 181 "device_name": "LPC11U37FBD64/501"
borlanic 0:fbdae7e6d805 182 },
borlanic 0:fbdae7e6d805 183 "LPCCAPPUCCINO": {
borlanic 0:fbdae7e6d805 184 "inherits": ["LPC11U37_501"],
borlanic 0:fbdae7e6d805 185 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 186 "device_name": "LPC11U37FBD64/501"
borlanic 0:fbdae7e6d805 187 },
borlanic 0:fbdae7e6d805 188 "ARCH_GPRS": {
borlanic 0:fbdae7e6d805 189 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 190 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 191 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 192 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
borlanic 0:fbdae7e6d805 193 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 194 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 195 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 196 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 197 "default_lib": "small",
borlanic 0:fbdae7e6d805 198 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 199 "device_name": "LPC11U37FBD64/501"
borlanic 0:fbdae7e6d805 200 },
borlanic 0:fbdae7e6d805 201 "LPC11U68": {
borlanic 0:fbdae7e6d805 202 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 203 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 204 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 205 "extra_labels": ["NXP", "LPC11U6X"],
borlanic 0:fbdae7e6d805 206 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 207 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 208 "detect_code": ["1168"],
borlanic 0:fbdae7e6d805 209 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
borlanic 0:fbdae7e6d805 210 "default_lib": "small",
borlanic 0:fbdae7e6d805 211 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 212 "device_name": "LPC11U68JBD100"
borlanic 0:fbdae7e6d805 213 },
borlanic 0:fbdae7e6d805 214 "LPC1347": {
borlanic 0:fbdae7e6d805 215 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 216 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 217 "extra_labels": ["NXP", "LPC13XX"],
borlanic 0:fbdae7e6d805 218 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 219 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 220 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 221 "device_name": "LPC1347FBD48"
borlanic 0:fbdae7e6d805 222 },
borlanic 0:fbdae7e6d805 223 "LPC1549": {
borlanic 0:fbdae7e6d805 224 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 225 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 226 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 227 "extra_labels": ["NXP", "LPC15XX"],
borlanic 0:fbdae7e6d805 228 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 229 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 230 "detect_code": ["1549"],
borlanic 0:fbdae7e6d805 231 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 232 "default_lib": "small",
borlanic 0:fbdae7e6d805 233 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 234 "device_name": "LPC1549JBD64"
borlanic 0:fbdae7e6d805 235 },
borlanic 0:fbdae7e6d805 236 "LPC1768": {
borlanic 0:fbdae7e6d805 237 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 238 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 239 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
borlanic 0:fbdae7e6d805 240 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 241 "detect_code": ["1010"],
borlanic 0:fbdae7e6d805 242 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 243 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 244 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 245 "device_name": "LPC1768",
borlanic 0:fbdae7e6d805 246 "bootloader_supported": true
borlanic 0:fbdae7e6d805 247 },
borlanic 0:fbdae7e6d805 248 "LPC1769": {
borlanic 0:fbdae7e6d805 249 "inherits": ["LPC1768"],
borlanic 0:fbdae7e6d805 250 "device_name": "LPC1769"
borlanic 0:fbdae7e6d805 251 },
borlanic 0:fbdae7e6d805 252 "ARCH_PRO": {
borlanic 0:fbdae7e6d805 253 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 254 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 255 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 256 "extra_labels": ["NXP", "LPC176X"],
borlanic 0:fbdae7e6d805 257 "macros": ["TARGET_LPC1768"],
borlanic 0:fbdae7e6d805 258 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 259 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 260 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 261 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 262 "device_name": "LPC1768",
borlanic 0:fbdae7e6d805 263 "bootloader_supported": true
borlanic 0:fbdae7e6d805 264 },
borlanic 0:fbdae7e6d805 265 "UBLOX_C027": {
borlanic 0:fbdae7e6d805 266 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 267 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 268 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 269 "extra_labels": ["NXP", "LPC176X"],
borlanic 0:fbdae7e6d805 270 "config": {
borlanic 0:fbdae7e6d805 271 "modem_is_on_board": {
borlanic 0:fbdae7e6d805 272 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
borlanic 0:fbdae7e6d805 273 "value": 1,
borlanic 0:fbdae7e6d805 274 "macro_name": "MODEM_ON_BOARD"
borlanic 0:fbdae7e6d805 275 },
borlanic 0:fbdae7e6d805 276 "modem_data_connection_type": {
borlanic 0:fbdae7e6d805 277 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
borlanic 0:fbdae7e6d805 278 "value": 1,
borlanic 0:fbdae7e6d805 279 "macro_name": "MODEM_ON_BOARD_UART"
borlanic 0:fbdae7e6d805 280 }
borlanic 0:fbdae7e6d805 281 },
borlanic 0:fbdae7e6d805 282 "macros": ["TARGET_LPC1768"],
borlanic 0:fbdae7e6d805 283 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 284 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 285 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 286 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 287 "device_name": "LPC1768",
borlanic 0:fbdae7e6d805 288 "bootloader_supported": true
borlanic 0:fbdae7e6d805 289 },
borlanic 0:fbdae7e6d805 290 "XBED_LPC1768": {
borlanic 0:fbdae7e6d805 291 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 292 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 293 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 294 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
borlanic 0:fbdae7e6d805 295 "macros": ["TARGET_LPC1768"],
borlanic 0:fbdae7e6d805 296 "detect_code": ["1010"],
borlanic 0:fbdae7e6d805 297 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 298 "device_name": "LPC1768"
borlanic 0:fbdae7e6d805 299 },
borlanic 0:fbdae7e6d805 300 "LPC810": {
borlanic 0:fbdae7e6d805 301 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 302 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 303 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 304 "extra_labels": ["NXP", "LPC81X"],
borlanic 0:fbdae7e6d805 305 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 306 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 307 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 308 "default_lib": "small",
borlanic 0:fbdae7e6d805 309 "device_name": "LPC810M021FN8"
borlanic 0:fbdae7e6d805 310 },
borlanic 0:fbdae7e6d805 311 "LPC812": {
borlanic 0:fbdae7e6d805 312 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 313 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 314 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 315 "extra_labels": ["NXP", "LPC81X"],
borlanic 0:fbdae7e6d805 316 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 317 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 318 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 319 "detect_code": ["1050"],
borlanic 0:fbdae7e6d805 320 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 321 "default_lib": "small",
borlanic 0:fbdae7e6d805 322 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 323 "device_name": "LPC812M101JDH20"
borlanic 0:fbdae7e6d805 324 },
borlanic 0:fbdae7e6d805 325 "LPC824": {
borlanic 0:fbdae7e6d805 326 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 327 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 328 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 329 "extra_labels": ["NXP", "LPC82X"],
borlanic 0:fbdae7e6d805 330 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 331 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 332 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 333 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 334 "default_lib": "small",
borlanic 0:fbdae7e6d805 335 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 336 "device_name": "LPC824M201JDH20"
borlanic 0:fbdae7e6d805 337 },
borlanic 0:fbdae7e6d805 338 "SSCI824": {
borlanic 0:fbdae7e6d805 339 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 340 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 341 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 342 "extra_labels": ["NXP", "LPC82X"],
borlanic 0:fbdae7e6d805 343 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 344 "supported_toolchains": ["uARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 345 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 346 "default_lib": "small",
borlanic 0:fbdae7e6d805 347 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 348 },
borlanic 0:fbdae7e6d805 349 "MCU_LPC4088": {
borlanic 0:fbdae7e6d805 350 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 351 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 352 "extra_labels": ["NXP", "LPC408X"],
borlanic 0:fbdae7e6d805 353 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 354 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 355 "post_binary_hook": {
borlanic 0:fbdae7e6d805 356 "function": "LPC4088Code.binary_hook"
borlanic 0:fbdae7e6d805 357 },
borlanic 0:fbdae7e6d805 358 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 359 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 360 "device_name": "LPC4088FBD144"
borlanic 0:fbdae7e6d805 361 },
borlanic 0:fbdae7e6d805 362 "LPC4088": {
borlanic 0:fbdae7e6d805 363 "inherits": ["MCU_LPC4088"],
borlanic 0:fbdae7e6d805 364 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 365 },
borlanic 0:fbdae7e6d805 366 "LPC4088_DM": {
borlanic 0:fbdae7e6d805 367 "inherits": ["MCU_LPC4088"],
borlanic 0:fbdae7e6d805 368 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 369 },
borlanic 0:fbdae7e6d805 370 "LPC4330_M4": {
borlanic 0:fbdae7e6d805 371 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 372 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 373 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
borlanic 0:fbdae7e6d805 374 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 375 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 376 "device_name": "LPC4330"
borlanic 0:fbdae7e6d805 377 },
borlanic 0:fbdae7e6d805 378 "LPC4330_M0": {
borlanic 0:fbdae7e6d805 379 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 380 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 381 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
borlanic 0:fbdae7e6d805 382 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
borlanic 0:fbdae7e6d805 383 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
borlanic 0:fbdae7e6d805 384 },
borlanic 0:fbdae7e6d805 385 "LPC4337": {
borlanic 0:fbdae7e6d805 386 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 387 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 388 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
borlanic 0:fbdae7e6d805 389 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 390 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 391 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 392 "device_name": "LPC4337"
borlanic 0:fbdae7e6d805 393 },
borlanic 0:fbdae7e6d805 394 "LPC1800": {
borlanic 0:fbdae7e6d805 395 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 396 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 397 "extra_labels": ["NXP", "LPC43XX"],
borlanic 0:fbdae7e6d805 398 "public": false,
borlanic 0:fbdae7e6d805 399 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
borlanic 0:fbdae7e6d805 400 },
borlanic 0:fbdae7e6d805 401 "LPC11U37H_401": {
borlanic 0:fbdae7e6d805 402 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 403 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 404 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 405 "extra_labels": ["NXP", "LPC11UXX"],
borlanic 0:fbdae7e6d805 406 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 407 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
borlanic 0:fbdae7e6d805 408 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 409 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 410 "default_lib": "small",
borlanic 0:fbdae7e6d805 411 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 412 "device_name": "LPC11U37HFBD64/401"
borlanic 0:fbdae7e6d805 413 },
borlanic 0:fbdae7e6d805 414 "ELEKTOR_COCORICO": {
borlanic 0:fbdae7e6d805 415 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 416 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 417 "extra_labels": ["NXP", "LPC81X"],
borlanic 0:fbdae7e6d805 418 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 419 "inherits": ["LPCTarget"],
borlanic 0:fbdae7e6d805 420 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 421 "detect_code": ["C000"],
borlanic 0:fbdae7e6d805 422 "default_lib": "small",
borlanic 0:fbdae7e6d805 423 "device_name": "LPC812M101JDH16"
borlanic 0:fbdae7e6d805 424 },
borlanic 0:fbdae7e6d805 425 "KL05Z": {
borlanic 0:fbdae7e6d805 426 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 427 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 428 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 429 "extra_labels": ["Freescale", "KLXX"],
borlanic 0:fbdae7e6d805 430 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 431 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 432 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 433 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 434 "default_lib": "small",
borlanic 0:fbdae7e6d805 435 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 436 "device_name": "MKL05Z32xxx4"
borlanic 0:fbdae7e6d805 437 },
borlanic 0:fbdae7e6d805 438 "KL25Z": {
borlanic 0:fbdae7e6d805 439 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 440 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 441 "extra_labels": ["Freescale", "KLXX"],
borlanic 0:fbdae7e6d805 442 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 443 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 444 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 445 "detect_code": ["0200"],
borlanic 0:fbdae7e6d805 446 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 447 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 448 "device_name": "MKL25Z128xxx4"
borlanic 0:fbdae7e6d805 449 },
borlanic 0:fbdae7e6d805 450 "KL26Z": {
borlanic 0:fbdae7e6d805 451 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 452 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 453 "extra_labels": ["Freescale", "KLXX"],
borlanic 0:fbdae7e6d805 454 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 455 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 456 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 457 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 458 "device_name": "MKL26Z128xxx4"
borlanic 0:fbdae7e6d805 459 },
borlanic 0:fbdae7e6d805 460 "KL46Z": {
borlanic 0:fbdae7e6d805 461 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 462 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 463 "extra_labels": ["Freescale", "KLXX", "FLASH_CMSIS_ALGO"],
borlanic 0:fbdae7e6d805 464 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 465 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 466 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 467 "detect_code": ["0220"],
borlanic 0:fbdae7e6d805 468 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 469 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 470 "device_name": "MKL46Z256xxx4",
borlanic 0:fbdae7e6d805 471 "bootloader_supported": true
borlanic 0:fbdae7e6d805 472 },
borlanic 0:fbdae7e6d805 473 "K20D50M": {
borlanic 0:fbdae7e6d805 474 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 475 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 476 "extra_labels": ["Freescale", "K20XX"],
borlanic 0:fbdae7e6d805 477 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 478 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 479 "detect_code": ["0230"],
borlanic 0:fbdae7e6d805 480 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 481 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 482 "device_name": "MK20DX128xxx5"
borlanic 0:fbdae7e6d805 483 },
borlanic 0:fbdae7e6d805 484 "TEENSY3_1": {
borlanic 0:fbdae7e6d805 485 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 486 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 487 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
borlanic 0:fbdae7e6d805 488 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 489 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 490 "supported_toolchains": ["GCC_ARM", "ARM"],
borlanic 0:fbdae7e6d805 491 "post_binary_hook": {
borlanic 0:fbdae7e6d805 492 "function": "TEENSY3_1Code.binary_hook",
borlanic 0:fbdae7e6d805 493 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
borlanic 0:fbdae7e6d805 494 },
borlanic 0:fbdae7e6d805 495 "detect_code": ["0230"],
borlanic 0:fbdae7e6d805 496 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 497 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 498 "device_name": "MK20DX256xxx7"
borlanic 0:fbdae7e6d805 499 },
borlanic 0:fbdae7e6d805 500 "MCU_K22F512": {
borlanic 0:fbdae7e6d805 501 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 502 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 503 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
borlanic 0:fbdae7e6d805 504 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 505 "public": false,
borlanic 0:fbdae7e6d805 506 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 507 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 508 "detect_code": ["0231"],
borlanic 0:fbdae7e6d805 509 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
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borlanic 0:fbdae7e6d805 561 "device_has_add": ["LOWPOWERTIMER"],
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borlanic 0:fbdae7e6d805 581 "core": "Cortex-M0+",
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borlanic 0:fbdae7e6d805 585 "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
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borlanic 0:fbdae7e6d805 587 "detect_code": ["0201"],
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borlanic 0:fbdae7e6d805 590 "device_name": "MKW41Z512xxx4"
borlanic 0:fbdae7e6d805 591 },
borlanic 0:fbdae7e6d805 592 "MCU_K24F1M": {
borlanic 0:fbdae7e6d805 593 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 594 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 595 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K24F", "KPSDK_MCUS", "KPSDK_CODE"],
borlanic 0:fbdae7e6d805 596 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 597 "public": false,
borlanic 0:fbdae7e6d805 598 "macros": ["CPU_MK24FN1M0VDC12", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 599 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 600 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 601 "device_name": "MK24FN1M0xxx12"
borlanic 0:fbdae7e6d805 602 },
borlanic 0:fbdae7e6d805 603 "RO359B": {
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borlanic 0:fbdae7e6d805 605 "inherits": ["MCU_K24F1M"],
borlanic 0:fbdae7e6d805 606 "detect_code": ["1022"],
borlanic 0:fbdae7e6d805 607 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 608 },
borlanic 0:fbdae7e6d805 609 "K64F": {
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borlanic 0:fbdae7e6d805 611 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 612 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 613 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
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borlanic 0:fbdae7e6d805 615 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 616 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 617 "detect_code": ["0240"],
borlanic 0:fbdae7e6d805 618 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
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borlanic 0:fbdae7e6d805 624 "EV_COG_AD4050LZ": {
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borlanic 0:fbdae7e6d805 626 "core": "Cortex-M4F",
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borlanic 0:fbdae7e6d805 636 "EV_COG_AD3029LZ": {
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borlanic 0:fbdae7e6d805 640 "macros": ["__ADUCM3029__", "EV_COG_AD3029LZ"],
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borlanic 0:fbdae7e6d805 643 "device_name": "ADuCM3029",
borlanic 0:fbdae7e6d805 644 "detect_code": ["0602"],
borlanic 0:fbdae7e6d805 645 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 646 "bootloader_supported": true
borlanic 0:fbdae7e6d805 647 },
borlanic 0:fbdae7e6d805 648 "MTS_GAMBIT": {
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borlanic 0:fbdae7e6d805 650 "core": "Cortex-M4F",
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borlanic 0:fbdae7e6d805 654 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
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borlanic 0:fbdae7e6d805 656 "device_name": "MK64FN1M0xxx12"
borlanic 0:fbdae7e6d805 657 },
borlanic 0:fbdae7e6d805 658 "HEXIWEAR": {
borlanic 0:fbdae7e6d805 659 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 660 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 661 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K64F"],
borlanic 0:fbdae7e6d805 662 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 663 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
borlanic 0:fbdae7e6d805 664 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 665 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 666 "detect_code": ["0214"],
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borlanic 0:fbdae7e6d805 668 "default_lib": "std",
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borlanic 0:fbdae7e6d805 670 "device_name": "MK64FN1M0xxx12",
borlanic 0:fbdae7e6d805 671 "bootloader_supported": true
borlanic 0:fbdae7e6d805 672 },
borlanic 0:fbdae7e6d805 673 "K66F": {
borlanic 0:fbdae7e6d805 674 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 675 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 676 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 677 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
borlanic 0:fbdae7e6d805 678 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 679 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 680 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 681 "detect_code": ["0311"],
borlanic 0:fbdae7e6d805 682 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 683 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 684 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 685 "device_name": "MK66FN2M0xxx18",
borlanic 0:fbdae7e6d805 686 "bootloader_supported": true
borlanic 0:fbdae7e6d805 687 },
borlanic 0:fbdae7e6d805 688 "K82F": {
borlanic 0:fbdae7e6d805 689 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 690 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 691 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 692 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
borlanic 0:fbdae7e6d805 693 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 694 "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 695 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 696 "detect_code": ["0217"],
borlanic 0:fbdae7e6d805 697 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 698 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 699 "device_name": "MK82FN256xxx15"
borlanic 0:fbdae7e6d805 700 },
borlanic 0:fbdae7e6d805 701 "UBRIDGE": {
borlanic 0:fbdae7e6d805 702 "inherits": ["K82F"],
borlanic 0:fbdae7e6d805 703 "extra_labels_remove": ["FRDM"],
borlanic 0:fbdae7e6d805 704 "supported_form_factors": []
borlanic 0:fbdae7e6d805 705 },
borlanic 0:fbdae7e6d805 706 "FAMILY_STM32": {
borlanic 0:fbdae7e6d805 707 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 708 "public": false,
borlanic 0:fbdae7e6d805 709 "extra_labels": ["STM"],
borlanic 0:fbdae7e6d805 710 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 711 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
borlanic 0:fbdae7e6d805 712 "config": {
borlanic 0:fbdae7e6d805 713 "lse_available": {
borlanic 0:fbdae7e6d805 714 "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
borlanic 0:fbdae7e6d805 715 "value": "1"
borlanic 0:fbdae7e6d805 716 },
borlanic 0:fbdae7e6d805 717 "stdio_uart_tx": {
borlanic 0:fbdae7e6d805 718 "help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden"
borlanic 0:fbdae7e6d805 719 },
borlanic 0:fbdae7e6d805 720 "stdio_uart_rx": {
borlanic 0:fbdae7e6d805 721 "help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden"
borlanic 0:fbdae7e6d805 722 }
borlanic 0:fbdae7e6d805 723 },
borlanic 0:fbdae7e6d805 724 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
borlanic 0:fbdae7e6d805 725 },
borlanic 0:fbdae7e6d805 726 "MIMXRT1050_EVK": {
borlanic 0:fbdae7e6d805 727 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 728 "core": "Cortex-M7FD",
borlanic 0:fbdae7e6d805 729 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 730 "extra_labels": ["NXP", "MCUXpresso_MCUS", "EVK", "MIMXRT1050", "IMX"],
borlanic 0:fbdae7e6d805 731 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 732 "macros": ["CPU_MIMXRT1052DVL6A", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 733 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 734 "detect_code": ["0227"],
borlanic 0:fbdae7e6d805 735 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "ERROR_RED", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 736 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 737 "device_name": "MIMXRT1052"
borlanic 0:fbdae7e6d805 738 },
borlanic 0:fbdae7e6d805 739 "LPC54114": {
borlanic 0:fbdae7e6d805 740 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 741 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 742 "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 743 "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso", "LPC"],
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borlanic 0:fbdae7e6d805 745 "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 746 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 747 "detect_code": ["1054"],
borlanic 0:fbdae7e6d805 748 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 749 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 750 "device_name" : "LPC54114J256BD64"
borlanic 0:fbdae7e6d805 751 },
borlanic 0:fbdae7e6d805 752 "MCU_LPC546XX": {
borlanic 0:fbdae7e6d805 753 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 754 "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
borlanic 0:fbdae7e6d805 755 "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso", "LPC", "LPC546XX"],
borlanic 0:fbdae7e6d805 756 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 757 "macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"],
borlanic 0:fbdae7e6d805 758 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 759 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "TRNG"],
borlanic 0:fbdae7e6d805 760 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 761 "device_name" : "LPC54628J512ET180"
borlanic 0:fbdae7e6d805 762 },
borlanic 0:fbdae7e6d805 763 "LPC546XX": {
borlanic 0:fbdae7e6d805 764 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 765 "inherits": ["MCU_LPC546XX"],
borlanic 0:fbdae7e6d805 766 "detect_code": ["1056"],
borlanic 0:fbdae7e6d805 767 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 768 },
borlanic 0:fbdae7e6d805 769 "FF_LPC546XX": {
borlanic 0:fbdae7e6d805 770 "inherits": ["MCU_LPC546XX"],
borlanic 0:fbdae7e6d805 771 "extra_labels_remove" : ["LPCXpresso"],
borlanic 0:fbdae7e6d805 772 "detect_code": ["8081"],
borlanic 0:fbdae7e6d805 773 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 774 },
borlanic 0:fbdae7e6d805 775 "NUCLEO_F030R8": {
borlanic 0:fbdae7e6d805 776 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 777 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 778 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 779 "extra_labels_add": ["STM32F0", "STM32F030R8"],
borlanic 0:fbdae7e6d805 780 "config": {
borlanic 0:fbdae7e6d805 781 "clock_source": {
borlanic 0:fbdae7e6d805 782 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 783 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 784 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 785 }
borlanic 0:fbdae7e6d805 786 },
borlanic 0:fbdae7e6d805 787 "detect_code": ["0725"],
borlanic 0:fbdae7e6d805 788 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 789 "device_has_add": ["SERIAL_FC"],
borlanic 0:fbdae7e6d805 790 "default_lib": "small",
borlanic 0:fbdae7e6d805 791 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 792 "device_name": "STM32F030R8"
borlanic 0:fbdae7e6d805 793 },
borlanic 0:fbdae7e6d805 794 "NUCLEO_F031K6": {
borlanic 0:fbdae7e6d805 795 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 796 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 797 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 798 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 799 "extra_labels_add": ["STM32F0", "STM32F031K6"],
borlanic 0:fbdae7e6d805 800 "config": {
borlanic 0:fbdae7e6d805 801 "clock_source": {
borlanic 0:fbdae7e6d805 802 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 803 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 804 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 805 }
borlanic 0:fbdae7e6d805 806 },
borlanic 0:fbdae7e6d805 807 "detect_code": ["0791"],
borlanic 0:fbdae7e6d805 808 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 809 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 810 "device_has_add": ["SERIAL_FC"],
borlanic 0:fbdae7e6d805 811 "default_lib": "small",
borlanic 0:fbdae7e6d805 812 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 813 "device_name": "STM32F031K6"
borlanic 0:fbdae7e6d805 814 },
borlanic 0:fbdae7e6d805 815 "NUCLEO_F042K6": {
borlanic 0:fbdae7e6d805 816 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 817 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 818 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 819 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 820 "extra_labels_add": ["STM32F0", "STM32F042K6"],
borlanic 0:fbdae7e6d805 821 "config": {
borlanic 0:fbdae7e6d805 822 "clock_source": {
borlanic 0:fbdae7e6d805 823 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 824 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 825 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 826 }
borlanic 0:fbdae7e6d805 827 },
borlanic 0:fbdae7e6d805 828 "detect_code": ["0785"],
borlanic 0:fbdae7e6d805 829 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 830 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 831 "device_has_add": ["CAN", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 832 "default_lib": "small",
borlanic 0:fbdae7e6d805 833 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 834 "device_name": "STM32F042K6"
borlanic 0:fbdae7e6d805 835 },
borlanic 0:fbdae7e6d805 836 "NUCLEO_F070RB": {
borlanic 0:fbdae7e6d805 837 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 838 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 839 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 840 "extra_labels_add": ["STM32F0", "STM32F070RB"],
borlanic 0:fbdae7e6d805 841 "config": {
borlanic 0:fbdae7e6d805 842 "clock_source": {
borlanic 0:fbdae7e6d805 843 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 844 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 845 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 846 }
borlanic 0:fbdae7e6d805 847 },
borlanic 0:fbdae7e6d805 848 "detect_code": ["0755"],
borlanic 0:fbdae7e6d805 849 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 850 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
borlanic 0:fbdae7e6d805 851 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 852 "device_name": "STM32F070RB"
borlanic 0:fbdae7e6d805 853 },
borlanic 0:fbdae7e6d805 854 "NUCLEO_F072RB": {
borlanic 0:fbdae7e6d805 855 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 856 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 857 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 858 "extra_labels_add": ["STM32F0", "STM32F072RB"],
borlanic 0:fbdae7e6d805 859 "config": {
borlanic 0:fbdae7e6d805 860 "clock_source": {
borlanic 0:fbdae7e6d805 861 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 862 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 863 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 864 }
borlanic 0:fbdae7e6d805 865 },
borlanic 0:fbdae7e6d805 866 "detect_code": ["0730"],
borlanic 0:fbdae7e6d805 867 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 868 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
borlanic 0:fbdae7e6d805 869 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 870 "device_name": "STM32F072RB"
borlanic 0:fbdae7e6d805 871 },
borlanic 0:fbdae7e6d805 872 "NUCLEO_F091RC": {
borlanic 0:fbdae7e6d805 873 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 874 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 875 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 876 "extra_labels_add": ["STM32F0", "STM32F091RC"],
borlanic 0:fbdae7e6d805 877 "config": {
borlanic 0:fbdae7e6d805 878 "clock_source": {
borlanic 0:fbdae7e6d805 879 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 880 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 881 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 882 }
borlanic 0:fbdae7e6d805 883 },
borlanic 0:fbdae7e6d805 884 "detect_code": ["0750"],
borlanic 0:fbdae7e6d805 885 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 886 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
borlanic 0:fbdae7e6d805 887 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 888 "device_name": "STM32F091RC"
borlanic 0:fbdae7e6d805 889 },
borlanic 0:fbdae7e6d805 890 "NUCLEO_F103RB": {
borlanic 0:fbdae7e6d805 891 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 892 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 893 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 894 "extra_labels_add": ["STM32F1", "STM32F103RB"],
borlanic 0:fbdae7e6d805 895 "config": {
borlanic 0:fbdae7e6d805 896 "clock_source": {
borlanic 0:fbdae7e6d805 897 "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)",
borlanic 0:fbdae7e6d805 898 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 899 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 900 },
borlanic 0:fbdae7e6d805 901 "clock_source_usb": {
borlanic 0:fbdae7e6d805 902 "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
borlanic 0:fbdae7e6d805 903 "value": "0",
borlanic 0:fbdae7e6d805 904 "macro_name": "CLOCK_SOURCE_USB"
borlanic 0:fbdae7e6d805 905 }
borlanic 0:fbdae7e6d805 906 },
borlanic 0:fbdae7e6d805 907 "detect_code": ["0700"],
borlanic 0:fbdae7e6d805 908 "device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
borlanic 0:fbdae7e6d805 909 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 910 "device_name": "STM32F103RB"
borlanic 0:fbdae7e6d805 911 },
borlanic 0:fbdae7e6d805 912 "NUCLEO_F207ZG": {
borlanic 0:fbdae7e6d805 913 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 914 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 915 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 916 "extra_labels_add": ["STM32F2", "STM32F207ZG"],
borlanic 0:fbdae7e6d805 917 "config": {
borlanic 0:fbdae7e6d805 918 "d11_configuration": {
borlanic 0:fbdae7e6d805 919 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 920 "value": "PA_7",
borlanic 0:fbdae7e6d805 921 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 922 },
borlanic 0:fbdae7e6d805 923 "clock_source": {
borlanic 0:fbdae7e6d805 924 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 925 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 926 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 927 }
borlanic 0:fbdae7e6d805 928 },
borlanic 0:fbdae7e6d805 929 "detect_code": ["0835"],
borlanic 0:fbdae7e6d805 930 "macros_add": ["USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 931 "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 932 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 933 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 934 "device_name": "STM32F207ZG"
borlanic 0:fbdae7e6d805 935 },
borlanic 0:fbdae7e6d805 936 "NUCLEO_F302R8": {
borlanic 0:fbdae7e6d805 937 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 938 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 939 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 940 "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"],
borlanic 0:fbdae7e6d805 941 "config": {
borlanic 0:fbdae7e6d805 942 "clock_source": {
borlanic 0:fbdae7e6d805 943 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 944 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 945 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 946 }
borlanic 0:fbdae7e6d805 947 },
borlanic 0:fbdae7e6d805 948 "detect_code": ["0705"],
borlanic 0:fbdae7e6d805 949 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 950 "default_lib": "small",
borlanic 0:fbdae7e6d805 951 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 952 "device_name": "STM32F302R8"
borlanic 0:fbdae7e6d805 953 },
borlanic 0:fbdae7e6d805 954 "NUCLEO_F303K8": {
borlanic 0:fbdae7e6d805 955 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 956 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 957 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 958 "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"],
borlanic 0:fbdae7e6d805 959 "config": {
borlanic 0:fbdae7e6d805 960 "clock_source": {
borlanic 0:fbdae7e6d805 961 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 962 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 963 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 964 }
borlanic 0:fbdae7e6d805 965 },
borlanic 0:fbdae7e6d805 966 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 967 "detect_code": ["0775"],
borlanic 0:fbdae7e6d805 968 "default_lib": "small",
borlanic 0:fbdae7e6d805 969 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 970 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 971 "device_name": "STM32F303K8"
borlanic 0:fbdae7e6d805 972 },
borlanic 0:fbdae7e6d805 973 "NUCLEO_F303RE": {
borlanic 0:fbdae7e6d805 974 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 975 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 976 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 977 "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"],
borlanic 0:fbdae7e6d805 978 "config": {
borlanic 0:fbdae7e6d805 979 "clock_source": {
borlanic 0:fbdae7e6d805 980 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 981 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 982 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 983 }
borlanic 0:fbdae7e6d805 984 },
borlanic 0:fbdae7e6d805 985 "detect_code": ["0745"],
borlanic 0:fbdae7e6d805 986 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 987 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 988 "device_name": "STM32F303RE"
borlanic 0:fbdae7e6d805 989 },
borlanic 0:fbdae7e6d805 990 "NUCLEO_F303ZE": {
borlanic 0:fbdae7e6d805 991 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 992 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 993 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 994 "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"],
borlanic 0:fbdae7e6d805 995 "config": {
borlanic 0:fbdae7e6d805 996 "clock_source": {
borlanic 0:fbdae7e6d805 997 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 998 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 999 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1000 }
borlanic 0:fbdae7e6d805 1001 },
borlanic 0:fbdae7e6d805 1002 "detect_code": ["0747"],
borlanic 0:fbdae7e6d805 1003 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "FLASH"],
borlanic 0:fbdae7e6d805 1004 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1005 "device_name": "STM32F303ZE"
borlanic 0:fbdae7e6d805 1006 },
borlanic 0:fbdae7e6d805 1007 "NUCLEO_F334R8": {
borlanic 0:fbdae7e6d805 1008 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1009 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1010 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1011 "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"],
borlanic 0:fbdae7e6d805 1012 "config": {
borlanic 0:fbdae7e6d805 1013 "clock_source": {
borlanic 0:fbdae7e6d805 1014 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1015 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1016 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1017 }
borlanic 0:fbdae7e6d805 1018 },
borlanic 0:fbdae7e6d805 1019 "detect_code": ["0735"],
borlanic 0:fbdae7e6d805 1020 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 1021 "default_lib": "small",
borlanic 0:fbdae7e6d805 1022 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1023 "device_name": "STM32F334R8"
borlanic 0:fbdae7e6d805 1024 },
borlanic 0:fbdae7e6d805 1025 "NUCLEO_F401RE": {
borlanic 0:fbdae7e6d805 1026 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1027 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1028 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1029 "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"],
borlanic 0:fbdae7e6d805 1030 "config": {
borlanic 0:fbdae7e6d805 1031 "clock_source": {
borlanic 0:fbdae7e6d805 1032 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1033 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1034 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1035 }
borlanic 0:fbdae7e6d805 1036 },
borlanic 0:fbdae7e6d805 1037 "detect_code": ["0720"],
borlanic 0:fbdae7e6d805 1038 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1039 "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "LOWPOWERTIMER"],
borlanic 0:fbdae7e6d805 1040 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1041 "device_name": "STM32F401RE"
borlanic 0:fbdae7e6d805 1042 },
borlanic 0:fbdae7e6d805 1043 "STEVAL_3DP001V1": {
borlanic 0:fbdae7e6d805 1044 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1045 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1046 "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401VE"],
borlanic 0:fbdae7e6d805 1047 "config": {
borlanic 0:fbdae7e6d805 1048 "clock_source": {
borlanic 0:fbdae7e6d805 1049 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1050 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1051 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1052 }
borlanic 0:fbdae7e6d805 1053 },
borlanic 0:fbdae7e6d805 1054 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"],
borlanic 0:fbdae7e6d805 1055 "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "LOWPOWERTIMER"],
borlanic 0:fbdae7e6d805 1056 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1057 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1058 "device_name": "STM32F401VE"
borlanic 0:fbdae7e6d805 1059 },
borlanic 0:fbdae7e6d805 1060 "NUCLEO_F410RB": {
borlanic 0:fbdae7e6d805 1061 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1062 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1063 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1064 "extra_labels_add": ["STM32F4", "STM32F410RB","STM32F410xB", "STM32F410Rx"],
borlanic 0:fbdae7e6d805 1065 "config": {
borlanic 0:fbdae7e6d805 1066 "clock_source": {
borlanic 0:fbdae7e6d805 1067 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1068 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1069 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1070 },
borlanic 0:fbdae7e6d805 1071 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1072 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1073 "value": 1
borlanic 0:fbdae7e6d805 1074 }
borlanic 0:fbdae7e6d805 1075 },
borlanic 0:fbdae7e6d805 1076 "detect_code": ["0744"],
borlanic 0:fbdae7e6d805 1077 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1078 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1079 "device_name": "STM32F410RB"
borlanic 0:fbdae7e6d805 1080 },
borlanic 0:fbdae7e6d805 1081 "NUCLEO_F411RE": {
borlanic 0:fbdae7e6d805 1082 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1083 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1084 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1085 "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
borlanic 0:fbdae7e6d805 1086 "detect_code": ["0740"],
borlanic 0:fbdae7e6d805 1087 "config": {
borlanic 0:fbdae7e6d805 1088 "clock_source": {
borlanic 0:fbdae7e6d805 1089 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1090 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1091 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1092 },
borlanic 0:fbdae7e6d805 1093 "clock_source_usb": {
borlanic 0:fbdae7e6d805 1094 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)",
borlanic 0:fbdae7e6d805 1095 "value": "0",
borlanic 0:fbdae7e6d805 1096 "macro_name": "CLOCK_SOURCE_USB"
borlanic 0:fbdae7e6d805 1097 }
borlanic 0:fbdae7e6d805 1098 },
borlanic 0:fbdae7e6d805 1099 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1100 "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1101 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1102 "device_name": "STM32F411RE",
borlanic 0:fbdae7e6d805 1103 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1104 },
borlanic 0:fbdae7e6d805 1105 "NUCLEO_F412ZG": {
borlanic 0:fbdae7e6d805 1106 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1107 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1108 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1109 "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
borlanic 0:fbdae7e6d805 1110 "config": {
borlanic 0:fbdae7e6d805 1111 "clock_source": {
borlanic 0:fbdae7e6d805 1112 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1113 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1114 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1115 }
borlanic 0:fbdae7e6d805 1116 },
borlanic 0:fbdae7e6d805 1117 "detect_code": ["0826"],
borlanic 0:fbdae7e6d805 1118 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1119 "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1120 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1121 "device_name": "STM32F412ZG",
borlanic 0:fbdae7e6d805 1122 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1123 },
borlanic 0:fbdae7e6d805 1124 "MTB_MXCHIP_EMW3166": {
borlanic 0:fbdae7e6d805 1125 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1126 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1127 "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
borlanic 0:fbdae7e6d805 1128 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1129 "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1130 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1131 "device_name": "STM32F412ZG",
borlanic 0:fbdae7e6d805 1132 "bootloader_supported": true,
borlanic 0:fbdae7e6d805 1133 "config": {
borlanic 0:fbdae7e6d805 1134 "clock_source": {
borlanic 0:fbdae7e6d805 1135 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1136 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1137 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1138 }
borlanic 0:fbdae7e6d805 1139 }
borlanic 0:fbdae7e6d805 1140 },
borlanic 0:fbdae7e6d805 1141 "USI_WM_BN_BM_22": {
borlanic 0:fbdae7e6d805 1142 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1143 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1144 "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
borlanic 0:fbdae7e6d805 1145 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1146 "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1147 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1148 "device_name": "STM32F412ZG",
borlanic 0:fbdae7e6d805 1149 "bootloader_supported": true,
borlanic 0:fbdae7e6d805 1150 "config": {
borlanic 0:fbdae7e6d805 1151 "clock_source": {
borlanic 0:fbdae7e6d805 1152 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1153 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1154 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1155 }
borlanic 0:fbdae7e6d805 1156 }
borlanic 0:fbdae7e6d805 1157 },
borlanic 0:fbdae7e6d805 1158 "MTB_USI_WM_BN_BM_22": {
borlanic 0:fbdae7e6d805 1159 "inherits": ["USI_WM_BN_BM_22"]
borlanic 0:fbdae7e6d805 1160 },
borlanic 0:fbdae7e6d805 1161 "MTB_ADV_WISE_1530": {
borlanic 0:fbdae7e6d805 1162 "inherits": ["USI_WM_BN_BM_22"],
borlanic 0:fbdae7e6d805 1163 "overrides": {
borlanic 0:fbdae7e6d805 1164 "stdio_uart_tx": "PB_10",
borlanic 0:fbdae7e6d805 1165 "stdio_uart_rx": "PC_11"
borlanic 0:fbdae7e6d805 1166 }
borlanic 0:fbdae7e6d805 1167 },
borlanic 0:fbdae7e6d805 1168 "DISCO_F413ZH": {
borlanic 0:fbdae7e6d805 1169 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1170 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1171 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1172 "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
borlanic 0:fbdae7e6d805 1173 "config": {
borlanic 0:fbdae7e6d805 1174 "clock_source": {
borlanic 0:fbdae7e6d805 1175 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1176 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1177 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1178 },
borlanic 0:fbdae7e6d805 1179 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1180 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1181 "value": 1
borlanic 0:fbdae7e6d805 1182 }
borlanic 0:fbdae7e6d805 1183 },
borlanic 0:fbdae7e6d805 1184 "detect_code": ["0743"],
borlanic 0:fbdae7e6d805 1185 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1186 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1187 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1188 "device_name": "STM32F413ZH"
borlanic 0:fbdae7e6d805 1189 },
borlanic 0:fbdae7e6d805 1190 "NUCLEO_F413ZH": {
borlanic 0:fbdae7e6d805 1191 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1192 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1193 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1194 "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
borlanic 0:fbdae7e6d805 1195 "config": {
borlanic 0:fbdae7e6d805 1196 "clock_source": {
borlanic 0:fbdae7e6d805 1197 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1198 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1199 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1200 }
borlanic 0:fbdae7e6d805 1201 },
borlanic 0:fbdae7e6d805 1202 "detect_code": ["0743"],
borlanic 0:fbdae7e6d805 1203 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1204 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1205 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1206 "device_name": "STM32F413ZH"
borlanic 0:fbdae7e6d805 1207 },
borlanic 0:fbdae7e6d805 1208 "ELMO_F411RE": {
borlanic 0:fbdae7e6d805 1209 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1210 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1211 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1212 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 1213 "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
borlanic 0:fbdae7e6d805 1214 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 1215 "detect_code": ["----"],
borlanic 0:fbdae7e6d805 1216 "device_has_add": [],
borlanic 0:fbdae7e6d805 1217 "default_lib": "small",
borlanic 0:fbdae7e6d805 1218 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1219 "device_name": "STM32F411RE"
borlanic 0:fbdae7e6d805 1220 },
borlanic 0:fbdae7e6d805 1221 "NUCLEO_F429ZI": {
borlanic 0:fbdae7e6d805 1222 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1223 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1224 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1225 "config": {
borlanic 0:fbdae7e6d805 1226 "d11_configuration": {
borlanic 0:fbdae7e6d805 1227 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 1228 "value": "PA_7",
borlanic 0:fbdae7e6d805 1229 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 1230 },
borlanic 0:fbdae7e6d805 1231 "clock_source": {
borlanic 0:fbdae7e6d805 1232 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1233 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1234 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1235 },
borlanic 0:fbdae7e6d805 1236 "clock_source_usb": {
borlanic 0:fbdae7e6d805 1237 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
borlanic 0:fbdae7e6d805 1238 "value": "1",
borlanic 0:fbdae7e6d805 1239 "macro_name": "CLOCK_SOURCE_USB"
borlanic 0:fbdae7e6d805 1240 }
borlanic 0:fbdae7e6d805 1241 },
borlanic 0:fbdae7e6d805 1242 "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"],
borlanic 0:fbdae7e6d805 1243 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1244 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1245 "detect_code": ["0796"],
borlanic 0:fbdae7e6d805 1246 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1247 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1248 "device_name": "STM32F429ZI",
borlanic 0:fbdae7e6d805 1249 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1250 },
borlanic 0:fbdae7e6d805 1251 "NUCLEO_F439ZI": {
borlanic 0:fbdae7e6d805 1252 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1253 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1254 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1255 "config": {
borlanic 0:fbdae7e6d805 1256 "d11_configuration": {
borlanic 0:fbdae7e6d805 1257 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 1258 "value": "PA_7",
borlanic 0:fbdae7e6d805 1259 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 1260 },
borlanic 0:fbdae7e6d805 1261 "clock_source": {
borlanic 0:fbdae7e6d805 1262 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1263 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1264 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1265 },
borlanic 0:fbdae7e6d805 1266 "clock_source_usb": {
borlanic 0:fbdae7e6d805 1267 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
borlanic 0:fbdae7e6d805 1268 "value": "1",
borlanic 0:fbdae7e6d805 1269 "macro_name": "CLOCK_SOURCE_USB"
borlanic 0:fbdae7e6d805 1270 }
borlanic 0:fbdae7e6d805 1271 },
borlanic 0:fbdae7e6d805 1272 "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI"],
borlanic 0:fbdae7e6d805 1273 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1274 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1275 "detect_code": ["0797"],
borlanic 0:fbdae7e6d805 1276 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1277 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1278 "device_name" : "STM32F439ZI",
borlanic 0:fbdae7e6d805 1279 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1280 },
borlanic 0:fbdae7e6d805 1281 "NUCLEO_F446RE": {
borlanic 0:fbdae7e6d805 1282 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1283 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1284 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1285 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"],
borlanic 0:fbdae7e6d805 1286 "config": {
borlanic 0:fbdae7e6d805 1287 "clock_source": {
borlanic 0:fbdae7e6d805 1288 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1289 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1290 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1291 }
borlanic 0:fbdae7e6d805 1292 },
borlanic 0:fbdae7e6d805 1293 "detect_code": ["0777"],
borlanic 0:fbdae7e6d805 1294 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1295 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1296 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1297 "device_name": "STM32F446RE",
borlanic 0:fbdae7e6d805 1298 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1299 },
borlanic 0:fbdae7e6d805 1300 "NUCLEO_F446ZE": {
borlanic 0:fbdae7e6d805 1301 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1302 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1303 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1304 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"],
borlanic 0:fbdae7e6d805 1305 "config": {
borlanic 0:fbdae7e6d805 1306 "clock_source": {
borlanic 0:fbdae7e6d805 1307 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1308 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1309 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1310 }
borlanic 0:fbdae7e6d805 1311 },
borlanic 0:fbdae7e6d805 1312 "detect_code": ["0778"],
borlanic 0:fbdae7e6d805 1313 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1314 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1315 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1316 "device_name": "STM32F446ZE"
borlanic 0:fbdae7e6d805 1317 },
borlanic 0:fbdae7e6d805 1318 "B96B_F446VE": {
borlanic 0:fbdae7e6d805 1319 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1320 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1321 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1322 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"],
borlanic 0:fbdae7e6d805 1323 "detect_code": ["0840"],
borlanic 0:fbdae7e6d805 1324 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1325 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1326 "device_name":"STM32F446VE"
borlanic 0:fbdae7e6d805 1327 },
borlanic 0:fbdae7e6d805 1328 "NUCLEO_F746ZG": {
borlanic 0:fbdae7e6d805 1329 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1330 "core": "Cortex-M7F",
borlanic 0:fbdae7e6d805 1331 "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG"],
borlanic 0:fbdae7e6d805 1332 "config": {
borlanic 0:fbdae7e6d805 1333 "d11_configuration": {
borlanic 0:fbdae7e6d805 1334 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 1335 "value": "PA_7",
borlanic 0:fbdae7e6d805 1336 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 1337 },
borlanic 0:fbdae7e6d805 1338 "clock_source": {
borlanic 0:fbdae7e6d805 1339 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1340 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1341 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1342 },
borlanic 0:fbdae7e6d805 1343 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1344 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1345 "value": 1
borlanic 0:fbdae7e6d805 1346 }
borlanic 0:fbdae7e6d805 1347 },
borlanic 0:fbdae7e6d805 1348 "macros_add": ["USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1349 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1350 "detect_code": ["0816"],
borlanic 0:fbdae7e6d805 1351 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1352 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1353 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1354 "device_name": "STM32F746ZG",
borlanic 0:fbdae7e6d805 1355 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1356 },
borlanic 0:fbdae7e6d805 1357 "NUCLEO_F756ZG": {
borlanic 0:fbdae7e6d805 1358 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1359 "core": "Cortex-M7F",
borlanic 0:fbdae7e6d805 1360 "extra_labels_add": ["STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG"],
borlanic 0:fbdae7e6d805 1361 "config": {
borlanic 0:fbdae7e6d805 1362 "d11_configuration": {
borlanic 0:fbdae7e6d805 1363 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 1364 "value": "PA_7",
borlanic 0:fbdae7e6d805 1365 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 1366 },
borlanic 0:fbdae7e6d805 1367 "clock_source": {
borlanic 0:fbdae7e6d805 1368 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1369 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1370 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1371 },
borlanic 0:fbdae7e6d805 1372 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1373 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1374 "value": 1
borlanic 0:fbdae7e6d805 1375 }
borlanic 0:fbdae7e6d805 1376 },
borlanic 0:fbdae7e6d805 1377 "macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
borlanic 0:fbdae7e6d805 1378 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1379 "detect_code": ["0819"],
borlanic 0:fbdae7e6d805 1380 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1381 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1382 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1383 "device_name": "STM32F756ZG"
borlanic 0:fbdae7e6d805 1384 },
borlanic 0:fbdae7e6d805 1385 "NUCLEO_F767ZI": {
borlanic 0:fbdae7e6d805 1386 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1387 "core": "Cortex-M7FD",
borlanic 0:fbdae7e6d805 1388 "extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI"],
borlanic 0:fbdae7e6d805 1389 "config": {
borlanic 0:fbdae7e6d805 1390 "d11_configuration": {
borlanic 0:fbdae7e6d805 1391 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
borlanic 0:fbdae7e6d805 1392 "value": "PA_7",
borlanic 0:fbdae7e6d805 1393 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
borlanic 0:fbdae7e6d805 1394 },
borlanic 0:fbdae7e6d805 1395 "clock_source": {
borlanic 0:fbdae7e6d805 1396 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1397 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1398 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1399 },
borlanic 0:fbdae7e6d805 1400 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1401 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1402 "value": 1
borlanic 0:fbdae7e6d805 1403 }
borlanic 0:fbdae7e6d805 1404 },
borlanic 0:fbdae7e6d805 1405 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1406 "macros_add": ["USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1407 "detect_code": ["0818"],
borlanic 0:fbdae7e6d805 1408 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1409 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1410 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1411 "device_name": "STM32F767ZI",
borlanic 0:fbdae7e6d805 1412 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1413 },
borlanic 0:fbdae7e6d805 1414 "NUCLEO_L011K4": {
borlanic 0:fbdae7e6d805 1415 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1416 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1417 "extra_labels_add": ["STM32L0", "STM32L011K4"],
borlanic 0:fbdae7e6d805 1418 "supported_toolchains": ["uARM"],
borlanic 0:fbdae7e6d805 1419 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 1420 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1421 "config": {
borlanic 0:fbdae7e6d805 1422 "clock_source": {
borlanic 0:fbdae7e6d805 1423 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1424 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1425 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1426 },
borlanic 0:fbdae7e6d805 1427 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1428 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1429 "value": 1
borlanic 0:fbdae7e6d805 1430 }
borlanic 0:fbdae7e6d805 1431 },
borlanic 0:fbdae7e6d805 1432 "detect_code": ["0780"],
borlanic 0:fbdae7e6d805 1433 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1434 "default_lib": "small",
borlanic 0:fbdae7e6d805 1435 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1436 "device_name": "STM32L011K4"
borlanic 0:fbdae7e6d805 1437 },
borlanic 0:fbdae7e6d805 1438 "NUCLEO_L031K6": {
borlanic 0:fbdae7e6d805 1439 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1440 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1441 "extra_labels_add": ["STM32L0", "STM32L031K6"],
borlanic 0:fbdae7e6d805 1442 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 1443 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1444 "config": {
borlanic 0:fbdae7e6d805 1445 "clock_source": {
borlanic 0:fbdae7e6d805 1446 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1447 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1448 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1449 },
borlanic 0:fbdae7e6d805 1450 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1451 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1452 "value": 1
borlanic 0:fbdae7e6d805 1453 }
borlanic 0:fbdae7e6d805 1454 },
borlanic 0:fbdae7e6d805 1455 "detect_code": ["0790"],
borlanic 0:fbdae7e6d805 1456 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1457 "default_lib": "small",
borlanic 0:fbdae7e6d805 1458 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1459 "device_name": "STM32L031K6"
borlanic 0:fbdae7e6d805 1460 },
borlanic 0:fbdae7e6d805 1461 "NUCLEO_L053R8": {
borlanic 0:fbdae7e6d805 1462 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1463 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1464 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1465 "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"],
borlanic 0:fbdae7e6d805 1466 "config": {
borlanic 0:fbdae7e6d805 1467 "clock_source": {
borlanic 0:fbdae7e6d805 1468 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1469 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1470 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1471 },
borlanic 0:fbdae7e6d805 1472 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1473 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1474 "value": 1
borlanic 0:fbdae7e6d805 1475 }
borlanic 0:fbdae7e6d805 1476 },
borlanic 0:fbdae7e6d805 1477 "detect_code": ["0715"],
borlanic 0:fbdae7e6d805 1478 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
borlanic 0:fbdae7e6d805 1479 "default_lib": "small",
borlanic 0:fbdae7e6d805 1480 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1481 "device_name": "STM32L053R8"
borlanic 0:fbdae7e6d805 1482 },
borlanic 0:fbdae7e6d805 1483 "NUCLEO_L073RZ": {
borlanic 0:fbdae7e6d805 1484 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1485 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1486 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1487 "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"],
borlanic 0:fbdae7e6d805 1488 "config": {
borlanic 0:fbdae7e6d805 1489 "clock_source": {
borlanic 0:fbdae7e6d805 1490 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1491 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1492 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1493 },
borlanic 0:fbdae7e6d805 1494 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1495 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1496 "value": 1
borlanic 0:fbdae7e6d805 1497 }
borlanic 0:fbdae7e6d805 1498 },
borlanic 0:fbdae7e6d805 1499 "detect_code": ["0760"],
borlanic 0:fbdae7e6d805 1500 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1501 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1502 "device_name": "STM32L073RZ"
borlanic 0:fbdae7e6d805 1503 },
borlanic 0:fbdae7e6d805 1504 "NUCLEO_L152RE": {
borlanic 0:fbdae7e6d805 1505 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1506 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1507 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 1508 "extra_labels_add": ["STM32L1", "STM32L152RE"],
borlanic 0:fbdae7e6d805 1509 "config": {
borlanic 0:fbdae7e6d805 1510 "clock_source": {
borlanic 0:fbdae7e6d805 1511 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1512 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1513 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1514 }
borlanic 0:fbdae7e6d805 1515 },
borlanic 0:fbdae7e6d805 1516 "detect_code": ["0710"],
borlanic 0:fbdae7e6d805 1517 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1518 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1519 "device_name": "STM32L152RE"
borlanic 0:fbdae7e6d805 1520 },
borlanic 0:fbdae7e6d805 1521 "NUCLEO_L432KC": {
borlanic 0:fbdae7e6d805 1522 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1523 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1524 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1525 "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"],
borlanic 0:fbdae7e6d805 1526 "config": {
borlanic 0:fbdae7e6d805 1527 "clock_source": {
borlanic 0:fbdae7e6d805 1528 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1529 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1530 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1531 },
borlanic 0:fbdae7e6d805 1532 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1533 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1534 "value": 1
borlanic 0:fbdae7e6d805 1535 }
borlanic 0:fbdae7e6d805 1536 },
borlanic 0:fbdae7e6d805 1537 "detect_code": ["0770"],
borlanic 0:fbdae7e6d805 1538 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1539 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1540 "device_name": "STM32L432KC",
borlanic 0:fbdae7e6d805 1541 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1542 },
borlanic 0:fbdae7e6d805 1543 "NUCLEO_L433RC_P": {
borlanic 0:fbdae7e6d805 1544 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1545 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1546 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1547 "extra_labels_add": ["STM32L4", "STM32L433xC", "STM32L433RC"],
borlanic 0:fbdae7e6d805 1548 "config": {
borlanic 0:fbdae7e6d805 1549 "clock_source": {
borlanic 0:fbdae7e6d805 1550 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1551 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1552 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1553 },
borlanic 0:fbdae7e6d805 1554 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1555 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1556 "value": 1
borlanic 0:fbdae7e6d805 1557 }
borlanic 0:fbdae7e6d805 1558 },
borlanic 0:fbdae7e6d805 1559 "detect_code": ["0779"],
borlanic 0:fbdae7e6d805 1560 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1561 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1562 "device_name": "STM32L433RC",
borlanic 0:fbdae7e6d805 1563 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1564 },
borlanic 0:fbdae7e6d805 1565 "MTB_ADV_WISE_1510": {
borlanic 0:fbdae7e6d805 1566 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1567 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1568 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1569 "extra_labels_add": ["STM32L4", "STM32L443xC", "STM32L443RC"],
borlanic 0:fbdae7e6d805 1570 "config": {
borlanic 0:fbdae7e6d805 1571 "clock_source": {
borlanic 0:fbdae7e6d805 1572 "help": "Mask value : USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1573 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1574 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1575 }
borlanic 0:fbdae7e6d805 1576 },
borlanic 0:fbdae7e6d805 1577 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1578 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 1579 "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1580 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
borlanic 0:fbdae7e6d805 1581 "device_name" : "STM32L443RC",
borlanic 0:fbdae7e6d805 1582 "detect_code": ["0458"],
borlanic 0:fbdae7e6d805 1583 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1584 },
borlanic 0:fbdae7e6d805 1585 "NUCLEO_L476RG": {
borlanic 0:fbdae7e6d805 1586 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1587 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1588 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1589 "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"],
borlanic 0:fbdae7e6d805 1590 "config": {
borlanic 0:fbdae7e6d805 1591 "clock_source": {
borlanic 0:fbdae7e6d805 1592 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1593 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1594 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1595 },
borlanic 0:fbdae7e6d805 1596 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1597 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1598 "value": 1
borlanic 0:fbdae7e6d805 1599 }
borlanic 0:fbdae7e6d805 1600 },
borlanic 0:fbdae7e6d805 1601 "detect_code": ["0765"],
borlanic 0:fbdae7e6d805 1602 "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1603 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1604 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1605 "device_name": "STM32L476RG",
borlanic 0:fbdae7e6d805 1606 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1607 },
borlanic 0:fbdae7e6d805 1608 "SILICA_SENSOR_NODE": {
borlanic 0:fbdae7e6d805 1609 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1610 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1611 "default_toolchain": "GCC_ARM",
borlanic 0:fbdae7e6d805 1612 "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"],
borlanic 0:fbdae7e6d805 1613 "config": {
borlanic 0:fbdae7e6d805 1614 "clock_source": {
borlanic 0:fbdae7e6d805 1615 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1616 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1617 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1618 }
borlanic 0:fbdae7e6d805 1619 },
borlanic 0:fbdae7e6d805 1620 "detect_code": ["0766"],
borlanic 0:fbdae7e6d805 1621 "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1622 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1623 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 1624 "device_name": "STM32L476JG"
borlanic 0:fbdae7e6d805 1625 },
borlanic 0:fbdae7e6d805 1626 "NUCLEO_L486RG": {
borlanic 0:fbdae7e6d805 1627 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1628 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1629 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1630 "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
borlanic 0:fbdae7e6d805 1631 "config": {
borlanic 0:fbdae7e6d805 1632 "clock_source": {
borlanic 0:fbdae7e6d805 1633 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1634 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1635 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1636 },
borlanic 0:fbdae7e6d805 1637 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1638 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1639 "value": 1
borlanic 0:fbdae7e6d805 1640 }
borlanic 0:fbdae7e6d805 1641 },
borlanic 0:fbdae7e6d805 1642 "detect_code": ["0827"],
borlanic 0:fbdae7e6d805 1643 "macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1644 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1645 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1646 "device_name": "STM32L486RG"
borlanic 0:fbdae7e6d805 1647 },
borlanic 0:fbdae7e6d805 1648 "MTB_ADV_WISE_1570": {
borlanic 0:fbdae7e6d805 1649 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1650 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1651 "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG", "WISE_1570"],
borlanic 0:fbdae7e6d805 1652 "config": {
borlanic 0:fbdae7e6d805 1653 "clock_source": {
borlanic 0:fbdae7e6d805 1654 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1655 "value": "USE_PLL_HSE_XTAL",
borlanic 0:fbdae7e6d805 1656 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1657 }
borlanic 0:fbdae7e6d805 1658 },
borlanic 0:fbdae7e6d805 1659 "detect_code": ["0460"],
borlanic 0:fbdae7e6d805 1660 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1661 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1662 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 1663 "device_name": "STM32L486RG",
borlanic 0:fbdae7e6d805 1664 "OUTPUT_EXT": "hex"
borlanic 0:fbdae7e6d805 1665 },
borlanic 0:fbdae7e6d805 1666 "ARCH_MAX": {
borlanic 0:fbdae7e6d805 1667 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1668 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1669 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1670 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 1671 "program_cycle_s": 2,
borlanic 0:fbdae7e6d805 1672 "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
borlanic 0:fbdae7e6d805 1673 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 1674 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1675 "device_name": "STM32F407VG"
borlanic 0:fbdae7e6d805 1676 },
borlanic 0:fbdae7e6d805 1677 "DISCO_F051R8": {
borlanic 0:fbdae7e6d805 1678 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1679 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 1680 "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"],
borlanic 0:fbdae7e6d805 1681 "supported_toolchains": ["GCC_ARM"],
borlanic 0:fbdae7e6d805 1682 "config": {
borlanic 0:fbdae7e6d805 1683 "clock_source": {
borlanic 0:fbdae7e6d805 1684 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1685 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1686 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1687 }
borlanic 0:fbdae7e6d805 1688 },
borlanic 0:fbdae7e6d805 1689 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 1690 "device_has_add": ["SERIAL_FC"],
borlanic 0:fbdae7e6d805 1691 "device_name": "STM32F051R8"
borlanic 0:fbdae7e6d805 1692 },
borlanic 0:fbdae7e6d805 1693 "DISCO_F100RB": {
borlanic 0:fbdae7e6d805 1694 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1695 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 1696 "extra_labels_add": ["STM32F1", "STM32F100RB"],
borlanic 0:fbdae7e6d805 1697 "supported_toolchains": ["GCC_ARM"],
borlanic 0:fbdae7e6d805 1698 "device_has_add": [],
borlanic 0:fbdae7e6d805 1699 "device_name": "STM32F100RB"
borlanic 0:fbdae7e6d805 1700 },
borlanic 0:fbdae7e6d805 1701 "DISCO_F303VC": {
borlanic 0:fbdae7e6d805 1702 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1703 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1704 "extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"],
borlanic 0:fbdae7e6d805 1705 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1706 "config": {
borlanic 0:fbdae7e6d805 1707 "clock_source": {
borlanic 0:fbdae7e6d805 1708 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1709 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1710 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1711 }
borlanic 0:fbdae7e6d805 1712 },
borlanic 0:fbdae7e6d805 1713 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 1714 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1715 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 1716 "device_name": "STM32F303VC"
borlanic 0:fbdae7e6d805 1717 },
borlanic 0:fbdae7e6d805 1718 "DISCO_F334C8": {
borlanic 0:fbdae7e6d805 1719 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1720 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1721 "extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"],
borlanic 0:fbdae7e6d805 1722 "config": {
borlanic 0:fbdae7e6d805 1723 "clock_source": {
borlanic 0:fbdae7e6d805 1724 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1725 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1726 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1727 }
borlanic 0:fbdae7e6d805 1728 },
borlanic 0:fbdae7e6d805 1729 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1730 "detect_code": ["0810"],
borlanic 0:fbdae7e6d805 1731 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
borlanic 0:fbdae7e6d805 1732 "default_lib": "small",
borlanic 0:fbdae7e6d805 1733 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1734 "device_name": "STM32F334C8"
borlanic 0:fbdae7e6d805 1735 },
borlanic 0:fbdae7e6d805 1736 "DISCO_F407VG": {
borlanic 0:fbdae7e6d805 1737 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1738 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1739 "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
borlanic 0:fbdae7e6d805 1740 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 1741 "config": {
borlanic 0:fbdae7e6d805 1742 "clock_source": {
borlanic 0:fbdae7e6d805 1743 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1744 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1745 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1746 }
borlanic 0:fbdae7e6d805 1747 },
borlanic 0:fbdae7e6d805 1748 "macros_add": ["USB_STM_HAL"],
borlanic 0:fbdae7e6d805 1749 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1750 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 1751 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1752 "device_name": "STM32F407VG"
borlanic 0:fbdae7e6d805 1753 },
borlanic 0:fbdae7e6d805 1754 "DISCO_F429ZI": {
borlanic 0:fbdae7e6d805 1755 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1756 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1757 "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
borlanic 0:fbdae7e6d805 1758 "config": {
borlanic 0:fbdae7e6d805 1759 "clock_source": {
borlanic 0:fbdae7e6d805 1760 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1761 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1762 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1763 },
borlanic 0:fbdae7e6d805 1764 "clock_source_usb": {
borlanic 0:fbdae7e6d805 1765 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
borlanic 0:fbdae7e6d805 1766 "value": "1",
borlanic 0:fbdae7e6d805 1767 "macro_name": "CLOCK_SOURCE_USB"
borlanic 0:fbdae7e6d805 1768 }
borlanic 0:fbdae7e6d805 1769 },
borlanic 0:fbdae7e6d805 1770 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1771 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1772 "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1773 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1774 "device_name": "STM32F429ZI",
borlanic 0:fbdae7e6d805 1775 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1776 },
borlanic 0:fbdae7e6d805 1777 "DISCO_F469NI": {
borlanic 0:fbdae7e6d805 1778 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1779 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1780 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1781 "extra_labels_add": ["STM32F4", "STM32F469", "STM32F469NI", "STM32F469xI", "STM32F469xx"],
borlanic 0:fbdae7e6d805 1782 "config": {
borlanic 0:fbdae7e6d805 1783 "clock_source": {
borlanic 0:fbdae7e6d805 1784 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1785 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1786 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1787 }
borlanic 0:fbdae7e6d805 1788 },
borlanic 0:fbdae7e6d805 1789 "detect_code": ["0788"],
borlanic 0:fbdae7e6d805 1790 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1791 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1792 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1793 "device_name": "STM32F469NI"
borlanic 0:fbdae7e6d805 1794 },
borlanic 0:fbdae7e6d805 1795 "DISCO_L053C8": {
borlanic 0:fbdae7e6d805 1796 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1797 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1798 "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"],
borlanic 0:fbdae7e6d805 1799 "config": {
borlanic 0:fbdae7e6d805 1800 "clock_source": {
borlanic 0:fbdae7e6d805 1801 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1802 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1803 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1804 },
borlanic 0:fbdae7e6d805 1805 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1806 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1807 "value": 1
borlanic 0:fbdae7e6d805 1808
borlanic 0:fbdae7e6d805 1809 }
borlanic 0:fbdae7e6d805 1810 },
borlanic 0:fbdae7e6d805 1811 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1812 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 1813 "default_lib": "small",
borlanic 0:fbdae7e6d805 1814 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1815 "device_name": "STM32L053C8"
borlanic 0:fbdae7e6d805 1816 },
borlanic 0:fbdae7e6d805 1817 "DISCO_L072CZ_LRWAN1": {
borlanic 0:fbdae7e6d805 1818 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1819 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1820 "extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xZ", "STM32L072xx"],
borlanic 0:fbdae7e6d805 1821 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 1822 "config": {
borlanic 0:fbdae7e6d805 1823 "clock_source": {
borlanic 0:fbdae7e6d805 1824 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1825 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1826 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1827 },
borlanic 0:fbdae7e6d805 1828 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1829 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1830 "value": 1
borlanic 0:fbdae7e6d805 1831 }
borlanic 0:fbdae7e6d805 1832 },
borlanic 0:fbdae7e6d805 1833 "detect_code": ["0833"],
borlanic 0:fbdae7e6d805 1834 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1835 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1836 "device_name": "STM32L072CZ"
borlanic 0:fbdae7e6d805 1837 },
borlanic 0:fbdae7e6d805 1838 "MTB_MURATA_ABZ": {
borlanic 0:fbdae7e6d805 1839 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1840 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 1841 "extra_labels_add": ["STM32L0", "STM32L0x2xZ", "STM32L082CZ", "STM32L082xx"],
borlanic 0:fbdae7e6d805 1842 "detect_code": ["0456"],
borlanic 0:fbdae7e6d805 1843 "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1844 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 1845 "device_name": "STM32L082CZ"
borlanic 0:fbdae7e6d805 1846 },
borlanic 0:fbdae7e6d805 1847 "DISCO_F746NG": {
borlanic 0:fbdae7e6d805 1848 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1849 "core": "Cortex-M7F",
borlanic 0:fbdae7e6d805 1850 "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG"],
borlanic 0:fbdae7e6d805 1851 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1852 "config": {
borlanic 0:fbdae7e6d805 1853 "clock_source": {
borlanic 0:fbdae7e6d805 1854 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1855 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1856 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1857 },
borlanic 0:fbdae7e6d805 1858 "usb_speed": {
borlanic 0:fbdae7e6d805 1859 "help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)",
borlanic 0:fbdae7e6d805 1860 "value": "1"
borlanic 0:fbdae7e6d805 1861 },
borlanic 0:fbdae7e6d805 1862 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1863 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1864 "value": 1
borlanic 0:fbdae7e6d805 1865 }
borlanic 0:fbdae7e6d805 1866 },
borlanic 0:fbdae7e6d805 1867 "detect_code": ["0815"],
borlanic 0:fbdae7e6d805 1868 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1869 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1870 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1871 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1872 "device_name": "STM32F746NG"
borlanic 0:fbdae7e6d805 1873 },
borlanic 0:fbdae7e6d805 1874 "DISCO_F769NI": {
borlanic 0:fbdae7e6d805 1875 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1876 "core": "Cortex-M7FD",
borlanic 0:fbdae7e6d805 1877 "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI"],
borlanic 0:fbdae7e6d805 1878 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1879 "config": {
borlanic 0:fbdae7e6d805 1880 "clock_source": {
borlanic 0:fbdae7e6d805 1881 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1882 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
borlanic 0:fbdae7e6d805 1883 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1884 },
borlanic 0:fbdae7e6d805 1885 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1886 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1887 "value": 1
borlanic 0:fbdae7e6d805 1888 }
borlanic 0:fbdae7e6d805 1889 },
borlanic 0:fbdae7e6d805 1890 "detect_code": ["0817"],
borlanic 0:fbdae7e6d805 1891 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
borlanic 0:fbdae7e6d805 1892 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1893 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 1894 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1895 "device_name": "STM32F769NI"
borlanic 0:fbdae7e6d805 1896 },
borlanic 0:fbdae7e6d805 1897 "DISCO_L475VG_IOT01A": {
borlanic 0:fbdae7e6d805 1898 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1899 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1900 "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"],
borlanic 0:fbdae7e6d805 1901 "config": {
borlanic 0:fbdae7e6d805 1902 "clock_source": {
borlanic 0:fbdae7e6d805 1903 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1904 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1905 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1906 },
borlanic 0:fbdae7e6d805 1907 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1908 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1909 "value": 1
borlanic 0:fbdae7e6d805 1910 }
borlanic 0:fbdae7e6d805 1911 },
borlanic 0:fbdae7e6d805 1912 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 1913 "detect_code": ["0764"],
borlanic 0:fbdae7e6d805 1914 "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1915 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1916 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1917 "device_name": "STM32L475VG",
borlanic 0:fbdae7e6d805 1918 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1919 },
borlanic 0:fbdae7e6d805 1920 "DISCO_L476VG": {
borlanic 0:fbdae7e6d805 1921 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1922 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1923 "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"],
borlanic 0:fbdae7e6d805 1924 "config": {
borlanic 0:fbdae7e6d805 1925 "clock_source": {
borlanic 0:fbdae7e6d805 1926 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1927 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 1928 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 1929 },
borlanic 0:fbdae7e6d805 1930 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 1931 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 1932 "value": 1
borlanic 0:fbdae7e6d805 1933 }
borlanic 0:fbdae7e6d805 1934 },
borlanic 0:fbdae7e6d805 1935 "detect_code": ["0820"],
borlanic 0:fbdae7e6d805 1936 "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
borlanic 0:fbdae7e6d805 1937 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 1938 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1939 "device_name": "STM32L476VG",
borlanic 0:fbdae7e6d805 1940 "bootloader_supported": true
borlanic 0:fbdae7e6d805 1941 },
borlanic 0:fbdae7e6d805 1942 "MTS_MDOT_F405RG": {
borlanic 0:fbdae7e6d805 1943 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1944 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1945 "extra_labels_add": ["STM32F4", "STM32F405RG"],
borlanic 0:fbdae7e6d805 1946 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 1947 "macros_add": ["HSE_VALUE=26000000"],
borlanic 0:fbdae7e6d805 1948 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 1949 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 1950 "device_name": "STM32F405RG"
borlanic 0:fbdae7e6d805 1951 },
borlanic 0:fbdae7e6d805 1952 "MTS_MDOT_F411RE": {
borlanic 0:fbdae7e6d805 1953 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1954 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1955 "extra_labels_add": ["STM32F4", "STM32F411RE"],
borlanic 0:fbdae7e6d805 1956 "macros_add": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"],
borlanic 0:fbdae7e6d805 1957 "post_binary_hook": {
borlanic 0:fbdae7e6d805 1958 "function": "MTSCode.combine_bins_mts_dot",
borlanic 0:fbdae7e6d805 1959 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
borlanic 0:fbdae7e6d805 1960 },
borlanic 0:fbdae7e6d805 1961 "device_has_add": [],
borlanic 0:fbdae7e6d805 1962 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1963 "device_name": "STM32F411RE"
borlanic 0:fbdae7e6d805 1964 },
borlanic 0:fbdae7e6d805 1965 "MTS_DRAGONFLY_F411RE": {
borlanic 0:fbdae7e6d805 1966 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1967 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1968 "extra_labels_add": ["STM32F4", "STM32F411RE"],
borlanic 0:fbdae7e6d805 1969 "config": {
borlanic 0:fbdae7e6d805 1970 "modem_is_on_board": {
borlanic 0:fbdae7e6d805 1971 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
borlanic 0:fbdae7e6d805 1972 "value": 1,
borlanic 0:fbdae7e6d805 1973 "macro_name": "MODEM_ON_BOARD"
borlanic 0:fbdae7e6d805 1974 },
borlanic 0:fbdae7e6d805 1975 "modem_data_connection_type": {
borlanic 0:fbdae7e6d805 1976 "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
borlanic 0:fbdae7e6d805 1977 "value": 1,
borlanic 0:fbdae7e6d805 1978 "macro_name": "MODEM_ON_BOARD_UART"
borlanic 0:fbdae7e6d805 1979 }
borlanic 0:fbdae7e6d805 1980 },
borlanic 0:fbdae7e6d805 1981 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 1982 "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
borlanic 0:fbdae7e6d805 1983 "post_binary_hook": {
borlanic 0:fbdae7e6d805 1984 "function": "MTSCode.combine_bins_mts_dragonfly",
borlanic 0:fbdae7e6d805 1985 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
borlanic 0:fbdae7e6d805 1986 },
borlanic 0:fbdae7e6d805 1987 "device_has_add": [],
borlanic 0:fbdae7e6d805 1988 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 1989 "device_name": "STM32F411RE"
borlanic 0:fbdae7e6d805 1990 },
borlanic 0:fbdae7e6d805 1991 "MTB_MTS_DRAGONFLY": {
borlanic 0:fbdae7e6d805 1992 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 1993 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 1994 "extra_labels_add": ["STM32F4", "STM32F411RE"],
borlanic 0:fbdae7e6d805 1995 "config": {
borlanic 0:fbdae7e6d805 1996 "modem_is_on_board": {
borlanic 0:fbdae7e6d805 1997 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
borlanic 0:fbdae7e6d805 1998 "value": 1,
borlanic 0:fbdae7e6d805 1999 "macro_name": "MODEM_ON_BOARD"
borlanic 0:fbdae7e6d805 2000 },
borlanic 0:fbdae7e6d805 2001 "modem_data_connection_type": {
borlanic 0:fbdae7e6d805 2002 "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
borlanic 0:fbdae7e6d805 2003 "value": 1,
borlanic 0:fbdae7e6d805 2004 "macro_name": "MODEM_ON_BOARD_UART"
borlanic 0:fbdae7e6d805 2005 }
borlanic 0:fbdae7e6d805 2006 },
borlanic 0:fbdae7e6d805 2007 "overrides": {
borlanic 0:fbdae7e6d805 2008 "lse_available": 0
borlanic 0:fbdae7e6d805 2009 },
borlanic 0:fbdae7e6d805 2010 "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
borlanic 0:fbdae7e6d805 2011 "post_binary_hook": {
borlanic 0:fbdae7e6d805 2012 "function": "MTSCode.combine_bins_mtb_mts_dragonfly",
borlanic 0:fbdae7e6d805 2013 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
borlanic 0:fbdae7e6d805 2014 },
borlanic 0:fbdae7e6d805 2015 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2016 "device_name": "STM32F411RE",
borlanic 0:fbdae7e6d805 2017 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2018 },
borlanic 0:fbdae7e6d805 2019 "XDOT_L151CC": {
borlanic 0:fbdae7e6d805 2020 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2021 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2022 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 2023 "extra_labels_add": ["STM32L1", "STM32L151CC"],
borlanic 0:fbdae7e6d805 2024 "config": {
borlanic 0:fbdae7e6d805 2025 "hse_value": {
borlanic 0:fbdae7e6d805 2026 "value": "24000000",
borlanic 0:fbdae7e6d805 2027 "macro_name": "HSE_VALUE"
borlanic 0:fbdae7e6d805 2028 }
borlanic 0:fbdae7e6d805 2029 },
borlanic 0:fbdae7e6d805 2030 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2031 "device_has_add": ["ANALOGOUT", "FLASH"],
borlanic 0:fbdae7e6d805 2032 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 2033 "device_name": "STM32L151CC",
borlanic 0:fbdae7e6d805 2034 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2035 },
borlanic 0:fbdae7e6d805 2036 "FF1705_L151CC": {
borlanic 0:fbdae7e6d805 2037 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2038 "inherits": ["XDOT_L151CC"],
borlanic 0:fbdae7e6d805 2039 "detect_code": ["8080"]
borlanic 0:fbdae7e6d805 2040 },
borlanic 0:fbdae7e6d805 2041 "MTB_MTS_XDOT": {
borlanic 0:fbdae7e6d805 2042 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2043 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2044 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 2045 "extra_labels_add": ["STM32L1", "STM32L151CC"],
borlanic 0:fbdae7e6d805 2046 "config": {
borlanic 0:fbdae7e6d805 2047 "hse_value": {
borlanic 0:fbdae7e6d805 2048 "value": "24000000",
borlanic 0:fbdae7e6d805 2049 "macro_name": "HSE_VALUE"
borlanic 0:fbdae7e6d805 2050 }
borlanic 0:fbdae7e6d805 2051 },
borlanic 0:fbdae7e6d805 2052 "overrides": {
borlanic 0:fbdae7e6d805 2053 "stdio_uart_tx": "PA_2",
borlanic 0:fbdae7e6d805 2054 "stdio_uart_rx": "PA_3"
borlanic 0:fbdae7e6d805 2055 },
borlanic 0:fbdae7e6d805 2056 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2057 "device_has_add": ["ANALOGOUT", "FLASH"],
borlanic 0:fbdae7e6d805 2058 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 2059 "device_name": "STM32L151CC",
borlanic 0:fbdae7e6d805 2060 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2061 },
borlanic 0:fbdae7e6d805 2062 "MTB_RAK811": {
borlanic 0:fbdae7e6d805 2063 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2064 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2065 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 2066 "extra_labels_add": ["STM32L1", "STM32L151xBA", "STM32L151CBA"],
borlanic 0:fbdae7e6d805 2067 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2068 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 2069 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 2070 "device_name": "STM32L151CBxxA",
borlanic 0:fbdae7e6d805 2071 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2072 },
borlanic 0:fbdae7e6d805 2073 "MOTE_L152RC": {
borlanic 0:fbdae7e6d805 2074 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2075 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2076 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 2077 "extra_labels_add": ["STM32L1", "STM32L152RC"],
borlanic 0:fbdae7e6d805 2078 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 2079 "detect_code": ["4100"],
borlanic 0:fbdae7e6d805 2080 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 2081 "default_lib": "small",
borlanic 0:fbdae7e6d805 2082 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 2083 "device_name": "STM32L152RC"
borlanic 0:fbdae7e6d805 2084 },
borlanic 0:fbdae7e6d805 2085 "DISCO_F401VC": {
borlanic 0:fbdae7e6d805 2086 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2087 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2088 "default_toolchain": "GCC_ARM",
borlanic 0:fbdae7e6d805 2089 "extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"],
borlanic 0:fbdae7e6d805 2090 "supported_toolchains": ["GCC_ARM"],
borlanic 0:fbdae7e6d805 2091 "device_has_add": [],
borlanic 0:fbdae7e6d805 2092 "device_name": "STM32F401VC"
borlanic 0:fbdae7e6d805 2093 },
borlanic 0:fbdae7e6d805 2094 "MODULE_UBLOX_ODIN_W2": {
borlanic 0:fbdae7e6d805 2095 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2096 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2097 "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI"],
borlanic 0:fbdae7e6d805 2098 "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
borlanic 0:fbdae7e6d805 2099 "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 2100 "device_has_remove": ["RTC", "SLEEP"],
borlanic 0:fbdae7e6d805 2101 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 2102 "device_name": "STM32F439ZI",
borlanic 0:fbdae7e6d805 2103 "public": false,
borlanic 0:fbdae7e6d805 2104 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2105 },
borlanic 0:fbdae7e6d805 2106 "UBLOX_EVK_ODIN_W2": {
borlanic 0:fbdae7e6d805 2107 "inherits": ["MODULE_UBLOX_ODIN_W2"],
borlanic 0:fbdae7e6d805 2108 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2109 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 2110 "config": {
borlanic 0:fbdae7e6d805 2111 "stdio_uart_tx_help": {
borlanic 0:fbdae7e6d805 2112 "help": "Value: D8(default) or D1"
borlanic 0:fbdae7e6d805 2113 },
borlanic 0:fbdae7e6d805 2114 "stdio_uart_rx_help": {
borlanic 0:fbdae7e6d805 2115 "help": "Value: D2(default) or D0"
borlanic 0:fbdae7e6d805 2116 }
borlanic 0:fbdae7e6d805 2117 },
borlanic 0:fbdae7e6d805 2118 "overrides": {
borlanic 0:fbdae7e6d805 2119 "stdio_uart_tx": "D8",
borlanic 0:fbdae7e6d805 2120 "stdio_uart_rx": "D2"
borlanic 0:fbdae7e6d805 2121 }
borlanic 0:fbdae7e6d805 2122 },
borlanic 0:fbdae7e6d805 2123 "MBED_CONNECT_ODIN": {
borlanic 0:fbdae7e6d805 2124 "inherits": ["MODULE_UBLOX_ODIN_W2"],
borlanic 0:fbdae7e6d805 2125 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 2126 "config": {
borlanic 0:fbdae7e6d805 2127 "stdio_uart_tx_help": {
borlanic 0:fbdae7e6d805 2128 "help": "Value: PA_9(default) or PD_8"
borlanic 0:fbdae7e6d805 2129 },
borlanic 0:fbdae7e6d805 2130 "stdio_uart_rx_help": {
borlanic 0:fbdae7e6d805 2131 "help": "Value: PA_10(default) or PD_9"
borlanic 0:fbdae7e6d805 2132 }
borlanic 0:fbdae7e6d805 2133 },
borlanic 0:fbdae7e6d805 2134 "overrides": {
borlanic 0:fbdae7e6d805 2135 "stdio_uart_tx": "PA_9",
borlanic 0:fbdae7e6d805 2136 "stdio_uart_rx": "PA_10"
borlanic 0:fbdae7e6d805 2137 }
borlanic 0:fbdae7e6d805 2138 },
borlanic 0:fbdae7e6d805 2139 "MTB_UBLOX_ODIN_W2": {
borlanic 0:fbdae7e6d805 2140 "inherits": ["MODULE_UBLOX_ODIN_W2"],
borlanic 0:fbdae7e6d805 2141 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 2142 },
borlanic 0:fbdae7e6d805 2143 "UBLOX_C030": {
borlanic 0:fbdae7e6d805 2144 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2145 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2146 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2147 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 2148 "extra_labels_add": ["STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG"],
borlanic 0:fbdae7e6d805 2149 "config": {
borlanic 0:fbdae7e6d805 2150 "modem_is_on_board": {
borlanic 0:fbdae7e6d805 2151 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
borlanic 0:fbdae7e6d805 2152 "value": 1,
borlanic 0:fbdae7e6d805 2153 "macro_name": "MODEM_ON_BOARD"
borlanic 0:fbdae7e6d805 2154 },
borlanic 0:fbdae7e6d805 2155 "modem_data_connection_type": {
borlanic 0:fbdae7e6d805 2156 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
borlanic 0:fbdae7e6d805 2157 "value": 1,
borlanic 0:fbdae7e6d805 2158 "macro_name": "MODEM_ON_BOARD_UART"
borlanic 0:fbdae7e6d805 2159 }
borlanic 0:fbdae7e6d805 2160 },
borlanic 0:fbdae7e6d805 2161 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
borlanic 0:fbdae7e6d805 2162 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 2163 "device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 2164 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 2165 "public": false,
borlanic 0:fbdae7e6d805 2166 "device_name": "STM32F437VG",
borlanic 0:fbdae7e6d805 2167 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2168 },
borlanic 0:fbdae7e6d805 2169 "UBLOX_C030_U201": {
borlanic 0:fbdae7e6d805 2170 "inherits": ["UBLOX_C030"],
borlanic 0:fbdae7e6d805 2171 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 2172 },
borlanic 0:fbdae7e6d805 2173 "UBLOX_C030_N211": {
borlanic 0:fbdae7e6d805 2174 "inherits": ["UBLOX_C030"],
borlanic 0:fbdae7e6d805 2175 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 2176 },
borlanic 0:fbdae7e6d805 2177 "UBLOX_C030_R410M": {
borlanic 0:fbdae7e6d805 2178 "inherits": ["UBLOX_C030"],
borlanic 0:fbdae7e6d805 2179 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 2180 },
borlanic 0:fbdae7e6d805 2181 "NZ32_SC151": {
borlanic 0:fbdae7e6d805 2182 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 2183 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2184 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 2185 "program_cycle_s": 1.5,
borlanic 0:fbdae7e6d805 2186 "extra_labels_add": ["STM32L1", "STM32L151RC"],
borlanic 0:fbdae7e6d805 2187 "overrides": {"lse_available": 0},
borlanic 0:fbdae7e6d805 2188 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 2189 "device_has_add": ["ANALOGOUT"],
borlanic 0:fbdae7e6d805 2190 "default_lib": "small",
borlanic 0:fbdae7e6d805 2191 "device_name": "STM32L151RC"
borlanic 0:fbdae7e6d805 2192 },
borlanic 0:fbdae7e6d805 2193 "MCU_NRF51": {
borlanic 0:fbdae7e6d805 2194 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2195 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 2196 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
borlanic 0:fbdae7e6d805 2197 "macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 2198 "MERGE_BOOTLOADER": false,
borlanic 0:fbdae7e6d805 2199 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
borlanic 0:fbdae7e6d805 2200 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 2201 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 2202 "supported_toolchains": ["ARM", "GCC_ARM"],
borlanic 0:fbdae7e6d805 2203 "public": false,
borlanic 0:fbdae7e6d805 2204 "MERGE_SOFT_DEVICE": true,
borlanic 0:fbdae7e6d805 2205 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
borlanic 0:fbdae7e6d805 2206 {
borlanic 0:fbdae7e6d805 2207 "boot": "s130_nrf51_1.0.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2208 "name": "s130_nrf51_1.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2209 "offset": 114688
borlanic 0:fbdae7e6d805 2210 },
borlanic 0:fbdae7e6d805 2211 {
borlanic 0:fbdae7e6d805 2212 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2213 "name": "s110_nrf51822_8.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2214 "offset": 98304
borlanic 0:fbdae7e6d805 2215 },
borlanic 0:fbdae7e6d805 2216 {
borlanic 0:fbdae7e6d805 2217 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2218 "name": "s110_nrf51822_7.1.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2219 "offset": 90112
borlanic 0:fbdae7e6d805 2220 },
borlanic 0:fbdae7e6d805 2221 {
borlanic 0:fbdae7e6d805 2222 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2223 "name": "s110_nrf51822_7.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2224 "offset": 90112
borlanic 0:fbdae7e6d805 2225 },
borlanic 0:fbdae7e6d805 2226 {
borlanic 0:fbdae7e6d805 2227 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2228 "name": "s110_nrf51822_6.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2229 "offset": 81920
borlanic 0:fbdae7e6d805 2230 }
borlanic 0:fbdae7e6d805 2231 ],
borlanic 0:fbdae7e6d805 2232 "detect_code": ["1070"],
borlanic 0:fbdae7e6d805 2233 "post_binary_hook": {
borlanic 0:fbdae7e6d805 2234 "function": "MCU_NRF51Code.binary_hook",
borlanic 0:fbdae7e6d805 2235 "toolchains": ["ARM_STD", "GCC_ARM"]
borlanic 0:fbdae7e6d805 2236 },
borlanic 0:fbdae7e6d805 2237 "program_cycle_s": 6,
borlanic 0:fbdae7e6d805 2238 "features": ["BLE"],
borlanic 0:fbdae7e6d805 2239 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
borlanic 0:fbdae7e6d805 2240 },
borlanic 0:fbdae7e6d805 2241 "MCU_NRF51_16K_BASE": {
borlanic 0:fbdae7e6d805 2242 "inherits": ["MCU_NRF51"],
borlanic 0:fbdae7e6d805 2243 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
borlanic 0:fbdae7e6d805 2244 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
borlanic 0:fbdae7e6d805 2245 "public": false,
borlanic 0:fbdae7e6d805 2246 "default_lib": "small"
borlanic 0:fbdae7e6d805 2247 },
borlanic 0:fbdae7e6d805 2248 "MCU_NRF51_16K_BOOT_BASE": {
borlanic 0:fbdae7e6d805 2249 "inherits": ["MCU_NRF51_16K_BASE"],
borlanic 0:fbdae7e6d805 2250 "MERGE_BOOTLOADER": true,
borlanic 0:fbdae7e6d805 2251 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
borlanic 0:fbdae7e6d805 2252 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
borlanic 0:fbdae7e6d805 2253 "public": false
borlanic 0:fbdae7e6d805 2254 },
borlanic 0:fbdae7e6d805 2255 "MCU_NRF51_16K_OTA_BASE": {
borlanic 0:fbdae7e6d805 2256 "inherits": ["MCU_NRF51_16K_BASE"],
borlanic 0:fbdae7e6d805 2257 "public": false,
borlanic 0:fbdae7e6d805 2258 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
borlanic 0:fbdae7e6d805 2259 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
borlanic 0:fbdae7e6d805 2260 "MERGE_SOFT_DEVICE": false
borlanic 0:fbdae7e6d805 2261 },
borlanic 0:fbdae7e6d805 2262 "MCU_NRF51_16K": {
borlanic 0:fbdae7e6d805 2263 "inherits": ["MCU_NRF51_16K_BASE"],
borlanic 0:fbdae7e6d805 2264 "extra_labels_add": ["MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2265 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2266 "public": false
borlanic 0:fbdae7e6d805 2267 },
borlanic 0:fbdae7e6d805 2268 "MCU_NRF51_S110": {
borlanic 0:fbdae7e6d805 2269 "extra_labels_add": ["MCU_NRF51_16K_S110"],
borlanic 0:fbdae7e6d805 2270 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
borlanic 0:fbdae7e6d805 2271 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
borlanic 0:fbdae7e6d805 2272 {
borlanic 0:fbdae7e6d805 2273 "name": "s110_nrf51822_8.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2274 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2275 "offset": 98304
borlanic 0:fbdae7e6d805 2276 },
borlanic 0:fbdae7e6d805 2277 {
borlanic 0:fbdae7e6d805 2278 "name": "s110_nrf51822_7.1.0_softdevice.hex",
borlanic 0:fbdae7e6d805 2279 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
borlanic 0:fbdae7e6d805 2280 "offset": 90112
borlanic 0:fbdae7e6d805 2281 }
borlanic 0:fbdae7e6d805 2282 ],
borlanic 0:fbdae7e6d805 2283 "public": false
borlanic 0:fbdae7e6d805 2284 },
borlanic 0:fbdae7e6d805 2285 "MCU_NRF51_16K_S110": {
borlanic 0:fbdae7e6d805 2286 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
borlanic 0:fbdae7e6d805 2287 "public": false
borlanic 0:fbdae7e6d805 2288 },
borlanic 0:fbdae7e6d805 2289 "MCU_NRF51_16K_BOOT": {
borlanic 0:fbdae7e6d805 2290 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
borlanic 0:fbdae7e6d805 2291 "extra_labels_add": ["MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2292 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2293 "public": false
borlanic 0:fbdae7e6d805 2294 },
borlanic 0:fbdae7e6d805 2295 "MCU_NRF51_16K_BOOT_S110": {
borlanic 0:fbdae7e6d805 2296 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
borlanic 0:fbdae7e6d805 2297 "public": false
borlanic 0:fbdae7e6d805 2298 },
borlanic 0:fbdae7e6d805 2299 "MCU_NRF51_16K_OTA": {
borlanic 0:fbdae7e6d805 2300 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
borlanic 0:fbdae7e6d805 2301 "extra_labels_add": ["MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2302 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
borlanic 0:fbdae7e6d805 2303 "public": false
borlanic 0:fbdae7e6d805 2304 },
borlanic 0:fbdae7e6d805 2305 "MCU_NRF51_16K_OTA_S110": {
borlanic 0:fbdae7e6d805 2306 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
borlanic 0:fbdae7e6d805 2307 "public": false
borlanic 0:fbdae7e6d805 2308 },
borlanic 0:fbdae7e6d805 2309 "MCU_NRF51_32K": {
borlanic 0:fbdae7e6d805 2310 "inherits": ["MCU_NRF51"],
borlanic 0:fbdae7e6d805 2311 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 2312 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 2313 "public": false
borlanic 0:fbdae7e6d805 2314 },
borlanic 0:fbdae7e6d805 2315 "MCU_NRF51_32K_BOOT": {
borlanic 0:fbdae7e6d805 2316 "inherits": ["MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 2317 "MERGE_BOOTLOADER": true,
borlanic 0:fbdae7e6d805 2318 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
borlanic 0:fbdae7e6d805 2319 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
borlanic 0:fbdae7e6d805 2320 "public": false
borlanic 0:fbdae7e6d805 2321 },
borlanic 0:fbdae7e6d805 2322 "MCU_NRF51_32K_OTA": {
borlanic 0:fbdae7e6d805 2323 "inherits": ["MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 2324 "public": false,
borlanic 0:fbdae7e6d805 2325 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
borlanic 0:fbdae7e6d805 2326 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
borlanic 0:fbdae7e6d805 2327 "MERGE_SOFT_DEVICE": false
borlanic 0:fbdae7e6d805 2328 },
borlanic 0:fbdae7e6d805 2329 "NRF51822": {
borlanic 0:fbdae7e6d805 2330 "inherits": ["MCU_NRF51_16K"],
borlanic 0:fbdae7e6d805 2331 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
borlanic 0:fbdae7e6d805 2332 "macros_add": ["TARGET_NRF51822_MKIT"],
borlanic 0:fbdae7e6d805 2333 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 2334 "device_name": "nRF51822_xxAA"
borlanic 0:fbdae7e6d805 2335 },
borlanic 0:fbdae7e6d805 2336 "NRF51822_BOOT": {
borlanic 0:fbdae7e6d805 2337 "inherits": ["MCU_NRF51_16K_BOOT"],
borlanic 0:fbdae7e6d805 2338 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
borlanic 0:fbdae7e6d805 2339 "macros_add": ["TARGET_NRF51822_MKIT"]
borlanic 0:fbdae7e6d805 2340 },
borlanic 0:fbdae7e6d805 2341 "NRF51822_OTA": {
borlanic 0:fbdae7e6d805 2342 "inherits": ["MCU_NRF51_16K_OTA"],
borlanic 0:fbdae7e6d805 2343 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
borlanic 0:fbdae7e6d805 2344 "macros_add": ["TARGET_NRF51822_MKIT"]
borlanic 0:fbdae7e6d805 2345 },
borlanic 0:fbdae7e6d805 2346 "ARCH_BLE": {
borlanic 0:fbdae7e6d805 2347 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2348 "inherits": ["MCU_NRF51_16K"],
borlanic 0:fbdae7e6d805 2349 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 2350 "device_name": "nRF51822_xxAA"
borlanic 0:fbdae7e6d805 2351 },
borlanic 0:fbdae7e6d805 2352 "ARCH_BLE_BOOT": {
borlanic 0:fbdae7e6d805 2353 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2354 "inherits": ["MCU_NRF51_16K_BOOT"],
borlanic 0:fbdae7e6d805 2355 "extra_labels_add": ["ARCH_BLE"],
borlanic 0:fbdae7e6d805 2356 "macros_add": ["TARGET_ARCH_BLE"]
borlanic 0:fbdae7e6d805 2357 },
borlanic 0:fbdae7e6d805 2358 "ARCH_BLE_OTA": {
borlanic 0:fbdae7e6d805 2359 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2360 "inherits": ["MCU_NRF51_16K_OTA"],
borlanic 0:fbdae7e6d805 2361 "extra_labels_add": ["ARCH_BLE"],
borlanic 0:fbdae7e6d805 2362 "macros_add": ["TARGET_ARCH_BLE"]
borlanic 0:fbdae7e6d805 2363 },
borlanic 0:fbdae7e6d805 2364 "ARCH_LINK": {
borlanic 0:fbdae7e6d805 2365 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2366 "inherits": ["MCU_NRF51_16K"],
borlanic 0:fbdae7e6d805 2367 "extra_labels_add": ["ARCH_BLE"],
borlanic 0:fbdae7e6d805 2368 "macros_add": ["TARGET_ARCH_BLE"]
borlanic 0:fbdae7e6d805 2369 },
borlanic 0:fbdae7e6d805 2370 "ARCH_LINK_BOOT": {
borlanic 0:fbdae7e6d805 2371 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2372 "inherits": ["MCU_NRF51_16K_BOOT"],
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borlanic 0:fbdae7e6d805 2396 },
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borlanic 0:fbdae7e6d805 2423 "macros_add": ["TARGET_RBLAB_NRF51822"]
borlanic 0:fbdae7e6d805 2424 },
borlanic 0:fbdae7e6d805 2425 "RBLAB_NRF51822_OTA": {
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borlanic 0:fbdae7e6d805 2430 },
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borlanic 0:fbdae7e6d805 2437 "extra_labels_add": ["RBLAB_BLENANO"],
borlanic 0:fbdae7e6d805 2438 "macros_add": ["TARGET_RBLAB_BLENANO"]
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borlanic 0:fbdae7e6d805 2443 "macros_add": ["TARGET_RBLAB_BLENANO"]
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borlanic 0:fbdae7e6d805 2450 },
borlanic 0:fbdae7e6d805 2451 "NRF51822_Y5_MBUG": {
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borlanic 0:fbdae7e6d805 2453 },
borlanic 0:fbdae7e6d805 2454 "WALLBOT_BLE": {
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borlanic 0:fbdae7e6d805 2460 "extra_labels_add": ["WALLBOT_BLE"],
borlanic 0:fbdae7e6d805 2461 "macros_add": ["TARGET_WALLBOT_BLE"]
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borlanic 0:fbdae7e6d805 2463 "WALLBOT_BLE_OTA": {
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borlanic 0:fbdae7e6d805 2465 "extra_labels_add": ["WALLBOT_BLE"],
borlanic 0:fbdae7e6d805 2466 "macros_add": ["TARGET_WALLBOT_BLE"]
borlanic 0:fbdae7e6d805 2467 },
borlanic 0:fbdae7e6d805 2468 "DELTA_DFCM_NNN40": {
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borlanic 0:fbdae7e6d805 2470 "program_cycle_s": 10,
borlanic 0:fbdae7e6d805 2471 "macros_add": ["TARGET_NRF_LFCLK_RC"],
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borlanic 0:fbdae7e6d805 2479 "extra_labels_add": ["DELTA_DFCM_NNN40"],
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borlanic 0:fbdae7e6d805 2482 "DELTA_DFCM_NNN40_OTA": {
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borlanic 0:fbdae7e6d805 2487 },
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borlanic 0:fbdae7e6d805 2498 "macros_add": ["TARGET_DELTA_DFCM_NNN50"]
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borlanic 0:fbdae7e6d805 2506 "NRF51_DK_LEGACY": {
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borlanic 0:fbdae7e6d805 2517 "NRF51_DK_OTA": {
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borlanic 0:fbdae7e6d805 2523 "NRF51_DONGLE_LEGACY": {
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borlanic 0:fbdae7e6d805 2529 "NRF51_DONGLE_BOOT": {
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borlanic 0:fbdae7e6d805 2532 "macros_add": ["TARGET_NRF51_DONGLE"]
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borlanic 0:fbdae7e6d805 2534 "NRF51_DONGLE_OTA": {
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borlanic 0:fbdae7e6d805 2536 "extra_labels_add": ["NRF51_DONGLE"],
borlanic 0:fbdae7e6d805 2537 "macros_add": ["TARGET_NRF51_DONGLE"]
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borlanic 0:fbdae7e6d805 2539 "NRF51_MICROBIT": {
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borlanic 0:fbdae7e6d805 2545 "NRF51_MICROBIT_BOOT": {
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borlanic 0:fbdae7e6d805 2549 },
borlanic 0:fbdae7e6d805 2550 "NRF51_MICROBIT_OTA": {
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borlanic 0:fbdae7e6d805 2552 "extra_labels_add": ["NRF51_MICROBIT"],
borlanic 0:fbdae7e6d805 2553 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
borlanic 0:fbdae7e6d805 2554 },
borlanic 0:fbdae7e6d805 2555 "NRF51_MICROBIT_B": {
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borlanic 0:fbdae7e6d805 2557 "extra_labels_add": ["NRF51_MICROBIT"],
borlanic 0:fbdae7e6d805 2558 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
borlanic 0:fbdae7e6d805 2559 "release_versions": ["2"]
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borlanic 0:fbdae7e6d805 2561 "NRF51_MICROBIT_B_BOOT": {
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borlanic 0:fbdae7e6d805 2565 },
borlanic 0:fbdae7e6d805 2566 "NRF51_MICROBIT_B_OTA": {
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borlanic 0:fbdae7e6d805 2568 "extra_labels_add": ["NRF51_MICROBIT"],
borlanic 0:fbdae7e6d805 2569 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
borlanic 0:fbdae7e6d805 2570 },
borlanic 0:fbdae7e6d805 2571 "MTM_MTCONNECT04S": {
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borlanic 0:fbdae7e6d805 2573 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 2574 "device_name": "nRF51822_xxAA"
borlanic 0:fbdae7e6d805 2575 },
borlanic 0:fbdae7e6d805 2576 "MTM_MTCONNECT04S_BOOT": {
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borlanic 0:fbdae7e6d805 2578 "extra_labels_add": ["MTM_CONNECT04S"],
borlanic 0:fbdae7e6d805 2579 "macros_add": ["TARGET_MTM_CONNECT04S"]
borlanic 0:fbdae7e6d805 2580 },
borlanic 0:fbdae7e6d805 2581 "MTM_MTCONNECT04S_OTA": {
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borlanic 0:fbdae7e6d805 2583 "extra_labels_add": ["MTM_CONNECT04S"],
borlanic 0:fbdae7e6d805 2584 "macros_add": ["TARGET_MTM_CONNECT04S"]
borlanic 0:fbdae7e6d805 2585 },
borlanic 0:fbdae7e6d805 2586 "MTB_LAIRD_BL600": {
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borlanic 0:fbdae7e6d805 2588 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
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borlanic 0:fbdae7e6d805 2590 "release_versions" : ["5"],
borlanic 0:fbdae7e6d805 2591 "extra_labels_add": ["MTB_LAIRD_BL600"],
borlanic 0:fbdae7e6d805 2592 "config": {
borlanic 0:fbdae7e6d805 2593 "usb_tx": {
borlanic 0:fbdae7e6d805 2594 "help": "Value SIO_21",
borlanic 0:fbdae7e6d805 2595 "value": "SIO_21"
borlanic 0:fbdae7e6d805 2596 },
borlanic 0:fbdae7e6d805 2597 "usb_rx": {
borlanic 0:fbdae7e6d805 2598 "help": "Value SIO_22",
borlanic 0:fbdae7e6d805 2599 "value": "SIO_22"
borlanic 0:fbdae7e6d805 2600 },
borlanic 0:fbdae7e6d805 2601 "stdio_uart": {
borlanic 0:fbdae7e6d805 2602 "help": "Value: UART_0",
borlanic 0:fbdae7e6d805 2603 "value": "UART_0",
borlanic 0:fbdae7e6d805 2604 "macro_name": "STDIO_UART"
borlanic 0:fbdae7e6d805 2605 }
borlanic 0:fbdae7e6d805 2606 },
borlanic 0:fbdae7e6d805 2607 "overrides": {
borlanic 0:fbdae7e6d805 2608 "uart_hwfc": 0
borlanic 0:fbdae7e6d805 2609 }
borlanic 0:fbdae7e6d805 2610 },
borlanic 0:fbdae7e6d805 2611 "TY51822R3": {
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borlanic 0:fbdae7e6d805 2613 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
borlanic 0:fbdae7e6d805 2614 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
borlanic 0:fbdae7e6d805 2615 "detect_code": ["1019"],
borlanic 0:fbdae7e6d805 2616 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2617 "overrides": {"uart_hwfc": 0},
borlanic 0:fbdae7e6d805 2618 "device_name": "nRF51822_xxAA"
borlanic 0:fbdae7e6d805 2619 },
borlanic 0:fbdae7e6d805 2620 "TY51822R3_BOOT": {
borlanic 0:fbdae7e6d805 2621 "inherits": ["MCU_NRF51_32K_BOOT"],
borlanic 0:fbdae7e6d805 2622 "extra_labels_add": ["TY51822R3"],
borlanic 0:fbdae7e6d805 2623 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
borlanic 0:fbdae7e6d805 2624 },
borlanic 0:fbdae7e6d805 2625 "TY51822R3_OTA": {
borlanic 0:fbdae7e6d805 2626 "inherits": ["MCU_NRF51_32K_OTA"],
borlanic 0:fbdae7e6d805 2627 "extra_labels_add": ["NRF51_DK"],
borlanic 0:fbdae7e6d805 2628 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
borlanic 0:fbdae7e6d805 2629 },
borlanic 0:fbdae7e6d805 2630 "ARM_MPS2_Target": {
borlanic 0:fbdae7e6d805 2631 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2632 "public": false,
borlanic 0:fbdae7e6d805 2633 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
borlanic 0:fbdae7e6d805 2634 },
borlanic 0:fbdae7e6d805 2635 "ARM_MPS2_M0": {
borlanic 0:fbdae7e6d805 2636 "inherits": ["ARM_MPS2_Target"],
borlanic 0:fbdae7e6d805 2637 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 2638 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2639 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
borlanic 0:fbdae7e6d805 2640 "macros": ["CMSDK_CM0", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 2641 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2642 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2643 },
borlanic 0:fbdae7e6d805 2644 "ARM_MPS2_M0P": {
borlanic 0:fbdae7e6d805 2645 "inherits": ["ARM_MPS2_Target"],
borlanic 0:fbdae7e6d805 2646 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 2647 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2648 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
borlanic 0:fbdae7e6d805 2649 "macros": ["CMSDK_CM0plus"],
borlanic 0:fbdae7e6d805 2650 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2651 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2652 },
borlanic 0:fbdae7e6d805 2653 "ARM_MPS2_M3": {
borlanic 0:fbdae7e6d805 2654 "inherits": ["ARM_MPS2_Target"],
borlanic 0:fbdae7e6d805 2655 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2656 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2657 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
borlanic 0:fbdae7e6d805 2658 "macros": ["CMSDK_CM3"],
borlanic 0:fbdae7e6d805 2659 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2660 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2661 },
borlanic 0:fbdae7e6d805 2662 "ARM_MPS2_M4": {
borlanic 0:fbdae7e6d805 2663 "inherits": ["ARM_MPS2_Target"],
borlanic 0:fbdae7e6d805 2664 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2665 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2666 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
borlanic 0:fbdae7e6d805 2667 "macros": ["CMSDK_CM4"],
borlanic 0:fbdae7e6d805 2668 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2669 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2670 },
borlanic 0:fbdae7e6d805 2671 "ARM_MPS2_M7": {
borlanic 0:fbdae7e6d805 2672 "inherits": ["ARM_MPS2_Target"],
borlanic 0:fbdae7e6d805 2673 "core": "Cortex-M7",
borlanic 0:fbdae7e6d805 2674 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2675 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
borlanic 0:fbdae7e6d805 2676 "macros": ["CMSDK_CM7"],
borlanic 0:fbdae7e6d805 2677 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2678 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2679 },
borlanic 0:fbdae7e6d805 2680 "ARM_IOTSS_Target": {
borlanic 0:fbdae7e6d805 2681 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2682 "public": false,
borlanic 0:fbdae7e6d805 2683 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
borlanic 0:fbdae7e6d805 2684 },
borlanic 0:fbdae7e6d805 2685 "ARM_IOTSS_BEID": {
borlanic 0:fbdae7e6d805 2686 "inherits": ["ARM_IOTSS_Target"],
borlanic 0:fbdae7e6d805 2687 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2688 "supported_toolchains": ["ARM"],
borlanic 0:fbdae7e6d805 2689 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
borlanic 0:fbdae7e6d805 2690 "macros": ["CMSDK_BEID"],
borlanic 0:fbdae7e6d805 2691 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
borlanic 0:fbdae7e6d805 2692 "release_versions": ["2"]
borlanic 0:fbdae7e6d805 2693 },
borlanic 0:fbdae7e6d805 2694 "ARM_CM3DS_MPS2": {
borlanic 0:fbdae7e6d805 2695 "inherits": ["ARM_IOTSS_Target"],
borlanic 0:fbdae7e6d805 2696 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2697 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2698 "extra_labels": ["ARM_SSG", "CM3DS_MPS2"],
borlanic 0:fbdae7e6d805 2699 "OUTPUT_EXT": "elf",
borlanic 0:fbdae7e6d805 2700 "macros": ["CMSDK_CM3DS"],
borlanic 0:fbdae7e6d805 2701 "device_has": ["ANALOGIN", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SPI", "RTC", "LOWPOWERTIMER", "TRNG"],
borlanic 0:fbdae7e6d805 2702 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2703 "copy_method": "mps2",
borlanic 0:fbdae7e6d805 2704 "reset_method": "reboot.txt"
borlanic 0:fbdae7e6d805 2705 },
borlanic 0:fbdae7e6d805 2706 "ARM_BEETLE_SOC": {
borlanic 0:fbdae7e6d805 2707 "inherits": ["ARM_IOTSS_Target"],
borlanic 0:fbdae7e6d805 2708 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2709 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2710 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 2711 "extra_labels": ["ARM_SSG", "BEETLE"],
borlanic 0:fbdae7e6d805 2712 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
borlanic 0:fbdae7e6d805 2713 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
borlanic 0:fbdae7e6d805 2714 "features": ["BLE"],
borlanic 0:fbdae7e6d805 2715 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2716 },
borlanic 0:fbdae7e6d805 2717 "RZ_A1XX": {
borlanic 0:fbdae7e6d805 2718 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2719 "core": "Cortex-A9",
borlanic 0:fbdae7e6d805 2720 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 2721 "extra_labels": ["RENESAS", "RZ_A1XX"],
borlanic 0:fbdae7e6d805 2722 "device_has": ["ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2723 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 2724 "program_cycle_s": 2
borlanic 0:fbdae7e6d805 2725 },
borlanic 0:fbdae7e6d805 2726 "RZ_A1H": {
borlanic 0:fbdae7e6d805 2727 "inherits": ["RZ_A1XX"],
borlanic 0:fbdae7e6d805 2728 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2729 "extra_labels_add": ["RZA1H", "MBRZA1H"],
borlanic 0:fbdae7e6d805 2730 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2731 },
borlanic 0:fbdae7e6d805 2732 "VK_RZ_A1H": {
borlanic 0:fbdae7e6d805 2733 "inherits": ["RZ_A1XX"],
borlanic 0:fbdae7e6d805 2734 "extra_labels_add": ["RZA1H", "VKRZA1H"],
borlanic 0:fbdae7e6d805 2735 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2736 },
borlanic 0:fbdae7e6d805 2737 "GR_LYCHEE": {
borlanic 0:fbdae7e6d805 2738 "inherits": ["RZ_A1XX"],
borlanic 0:fbdae7e6d805 2739 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 2740 "extra_labels_add": ["RZA1UL", "MBRZA1LU"],
borlanic 0:fbdae7e6d805 2741 "device_has_add": ["TRNG"],
borlanic 0:fbdae7e6d805 2742 "device_has_remove": ["ETHERNET"],
borlanic 0:fbdae7e6d805 2743 "features_remove": ["LWIP"],
borlanic 0:fbdae7e6d805 2744 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2745 },
borlanic 0:fbdae7e6d805 2746 "MAXWSNENV": {
borlanic 0:fbdae7e6d805 2747 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2748 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2749 "macros": ["__SYSTEM_HFX=24000000"],
borlanic 0:fbdae7e6d805 2750 "extra_labels": ["Maxim", "MAX32610"],
borlanic 0:fbdae7e6d805 2751 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2752 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2753 "features": ["BLE"],
borlanic 0:fbdae7e6d805 2754 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2755 },
borlanic 0:fbdae7e6d805 2756 "MAX32600MBED": {
borlanic 0:fbdae7e6d805 2757 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2758 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2759 "macros": ["__SYSTEM_HFX=24000000"],
borlanic 0:fbdae7e6d805 2760 "extra_labels": ["Maxim", "MAX32600"],
borlanic 0:fbdae7e6d805 2761 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2762 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2763 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2764 },
borlanic 0:fbdae7e6d805 2765 "MAX32620HSP": {
borlanic 0:fbdae7e6d805 2766 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2767 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2768 "extra_labels": ["Maxim", "MAX32620"],
borlanic 0:fbdae7e6d805 2769 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2770 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2771 "features": ["BLE"],
borlanic 0:fbdae7e6d805 2772 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2773 },
borlanic 0:fbdae7e6d805 2774 "MAX32620FTHR": {
borlanic 0:fbdae7e6d805 2775 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2776 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2777 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32620","TARGET_REV=0x4332","OPEN_DRAIN_LEDS"],
borlanic 0:fbdae7e6d805 2778 "extra_labels": ["Maxim", "MAX32620C"],
borlanic 0:fbdae7e6d805 2779 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2780 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2781 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2782 },
borlanic 0:fbdae7e6d805 2783 "MAX32625_BASE": {
borlanic 0:fbdae7e6d805 2784 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2785 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2786 "macros": ["TARGET=MAX32625","TARGET_REV=0x4132", "OPEN_DRAIN_LEDS"],
borlanic 0:fbdae7e6d805 2787 "extra_labels": ["Maxim", "MAX32625"],
borlanic 0:fbdae7e6d805 2788 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2789 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2790 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2791 "public": false
borlanic 0:fbdae7e6d805 2792 },
borlanic 0:fbdae7e6d805 2793 "MAX32625_BOOT": {
borlanic 0:fbdae7e6d805 2794 "inherits": ["MAX32625_BASE"],
borlanic 0:fbdae7e6d805 2795 "extra_labels_add": ["MAX32625_BOOT"],
borlanic 0:fbdae7e6d805 2796 "public": false
borlanic 0:fbdae7e6d805 2797 },
borlanic 0:fbdae7e6d805 2798 "MAX32625_NO_BOOT": {
borlanic 0:fbdae7e6d805 2799 "inherits": ["MAX32625_BASE"],
borlanic 0:fbdae7e6d805 2800 "extra_labels_add": ["MAX32625_NO_BOOT"],
borlanic 0:fbdae7e6d805 2801 "public": false
borlanic 0:fbdae7e6d805 2802 },
borlanic 0:fbdae7e6d805 2803 "MAX32625MBED": {
borlanic 0:fbdae7e6d805 2804 "inherits": ["MAX32625_NO_BOOT"]
borlanic 0:fbdae7e6d805 2805 },
borlanic 0:fbdae7e6d805 2806 "MAX32625PICO": {
borlanic 0:fbdae7e6d805 2807 "inherits": ["MAX32625_BOOT"],
borlanic 0:fbdae7e6d805 2808 "extra_labels_add": ["MAX32625PICO_BASE"]
borlanic 0:fbdae7e6d805 2809 },
borlanic 0:fbdae7e6d805 2810 "MAX32625PICO_NO_BOOT": {
borlanic 0:fbdae7e6d805 2811 "inherits": ["MAX32625_NO_BOOT"],
borlanic 0:fbdae7e6d805 2812 "extra_labels_add": ["MAX32625PICO_BASE"]
borlanic 0:fbdae7e6d805 2813 },
borlanic 0:fbdae7e6d805 2814 "MAX32625NEXPAQ": {
borlanic 0:fbdae7e6d805 2815 "inherits": ["MAX32625_BASE"],
borlanic 0:fbdae7e6d805 2816 "extra_labels_add": ["MAX32625NEXPAQ"]
borlanic 0:fbdae7e6d805 2817 },
borlanic 0:fbdae7e6d805 2818 "MAX32630FTHR": {
borlanic 0:fbdae7e6d805 2819 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2820 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2821 "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"],
borlanic 0:fbdae7e6d805 2822 "extra_labels": ["Maxim", "MAX32630"],
borlanic 0:fbdae7e6d805 2823 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
borlanic 0:fbdae7e6d805 2824 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 2825 "features": ["BLE"],
borlanic 0:fbdae7e6d805 2826 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 2827 },
borlanic 0:fbdae7e6d805 2828 "EFM32": {
borlanic 0:fbdae7e6d805 2829 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 2830 "extra_labels": ["Silicon_Labs", "EFM32"],
borlanic 0:fbdae7e6d805 2831 "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "MBED_TICKLESS"],
borlanic 0:fbdae7e6d805 2832 "public": false
borlanic 0:fbdae7e6d805 2833 },
borlanic 0:fbdae7e6d805 2834 "EFM32GG990F1024": {
borlanic 0:fbdae7e6d805 2835 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 2836 "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
borlanic 0:fbdae7e6d805 2837 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2838 "macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 2839 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 2840 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2841 "device_name": "EFM32GG990F1024",
borlanic 0:fbdae7e6d805 2842 "public": false,
borlanic 0:fbdae7e6d805 2843 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2844 },
borlanic 0:fbdae7e6d805 2845 "EFM32GG_STK3700": {
borlanic 0:fbdae7e6d805 2846 "inherits": ["EFM32GG990F1024"],
borlanic 0:fbdae7e6d805 2847 "progen": {"target": "efm32gg-stk"},
borlanic 0:fbdae7e6d805 2848 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH", "ITM"],
borlanic 0:fbdae7e6d805 2849 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 2850 "config": {
borlanic 0:fbdae7e6d805 2851 "hf_clock_src": {
borlanic 0:fbdae7e6d805 2852 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 2853 "value": "HFXO",
borlanic 0:fbdae7e6d805 2854 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2855 },
borlanic 0:fbdae7e6d805 2856 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2857 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2858 "value": "48000000",
borlanic 0:fbdae7e6d805 2859 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2860 },
borlanic 0:fbdae7e6d805 2861 "lf_clock_src": {
borlanic 0:fbdae7e6d805 2862 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 2863 "value": "LFXO",
borlanic 0:fbdae7e6d805 2864 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2865 },
borlanic 0:fbdae7e6d805 2866 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2867 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2868 "value": "32768",
borlanic 0:fbdae7e6d805 2869 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2870 },
borlanic 0:fbdae7e6d805 2871 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 2872 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 2873 "value": "21000000",
borlanic 0:fbdae7e6d805 2874 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 2875 },
borlanic 0:fbdae7e6d805 2876 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 2877 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 2878 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
borlanic 0:fbdae7e6d805 2879 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 2880 },
borlanic 0:fbdae7e6d805 2881 "board_controller_enable": {
borlanic 0:fbdae7e6d805 2882 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 2883 "value": "PF7",
borlanic 0:fbdae7e6d805 2884 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 2885 }
borlanic 0:fbdae7e6d805 2886 }
borlanic 0:fbdae7e6d805 2887 },
borlanic 0:fbdae7e6d805 2888 "EFM32LG990F256": {
borlanic 0:fbdae7e6d805 2889 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 2890 "extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
borlanic 0:fbdae7e6d805 2891 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 2892 "macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 2893 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 2894 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2895 "device_name": "EFM32LG990F256",
borlanic 0:fbdae7e6d805 2896 "public": false,
borlanic 0:fbdae7e6d805 2897 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2898 },
borlanic 0:fbdae7e6d805 2899 "EFM32LG_STK3600": {
borlanic 0:fbdae7e6d805 2900 "inherits": ["EFM32LG990F256"],
borlanic 0:fbdae7e6d805 2901 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 2902 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 2903 "device_name": "EFM32LG990F256",
borlanic 0:fbdae7e6d805 2904 "config": {
borlanic 0:fbdae7e6d805 2905 "hf_clock_src": {
borlanic 0:fbdae7e6d805 2906 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 2907 "value": "HFXO",
borlanic 0:fbdae7e6d805 2908 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2909 },
borlanic 0:fbdae7e6d805 2910 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2911 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2912 "value": "48000000",
borlanic 0:fbdae7e6d805 2913 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2914 },
borlanic 0:fbdae7e6d805 2915 "lf_clock_src": {
borlanic 0:fbdae7e6d805 2916 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 2917 "value": "LFXO",
borlanic 0:fbdae7e6d805 2918 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2919 },
borlanic 0:fbdae7e6d805 2920 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2921 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2922 "value": "32768",
borlanic 0:fbdae7e6d805 2923 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2924 },
borlanic 0:fbdae7e6d805 2925 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 2926 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 2927 "value": "21000000",
borlanic 0:fbdae7e6d805 2928 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 2929 },
borlanic 0:fbdae7e6d805 2930 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 2931 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 2932 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
borlanic 0:fbdae7e6d805 2933 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 2934 },
borlanic 0:fbdae7e6d805 2935 "board_controller_enable": {
borlanic 0:fbdae7e6d805 2936 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 2937 "value": "PF7",
borlanic 0:fbdae7e6d805 2938 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 2939 }
borlanic 0:fbdae7e6d805 2940 }
borlanic 0:fbdae7e6d805 2941 },
borlanic 0:fbdae7e6d805 2942 "EFM32WG990F256": {
borlanic 0:fbdae7e6d805 2943 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 2944 "extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
borlanic 0:fbdae7e6d805 2945 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 2946 "macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 2947 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 2948 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 2949 "device_name": "EFM32WG990F256",
borlanic 0:fbdae7e6d805 2950 "public": false,
borlanic 0:fbdae7e6d805 2951 "bootloader_supported": true
borlanic 0:fbdae7e6d805 2952 },
borlanic 0:fbdae7e6d805 2953 "EFM32WG_STK3800": {
borlanic 0:fbdae7e6d805 2954 "inherits": ["EFM32WG990F256"],
borlanic 0:fbdae7e6d805 2955 "progen": {"target": "efm32wg-stk"},
borlanic 0:fbdae7e6d805 2956 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 2957 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 2958 "config": {
borlanic 0:fbdae7e6d805 2959 "hf_clock_src": {
borlanic 0:fbdae7e6d805 2960 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 2961 "value": "HFXO",
borlanic 0:fbdae7e6d805 2962 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2963 },
borlanic 0:fbdae7e6d805 2964 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2965 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2966 "value": "48000000",
borlanic 0:fbdae7e6d805 2967 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2968 },
borlanic 0:fbdae7e6d805 2969 "lf_clock_src": {
borlanic 0:fbdae7e6d805 2970 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 2971 "value": "LFXO",
borlanic 0:fbdae7e6d805 2972 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 2973 },
borlanic 0:fbdae7e6d805 2974 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 2975 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 2976 "value": "32768",
borlanic 0:fbdae7e6d805 2977 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 2978 },
borlanic 0:fbdae7e6d805 2979 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 2980 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 2981 "value": "21000000",
borlanic 0:fbdae7e6d805 2982 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 2983 },
borlanic 0:fbdae7e6d805 2984 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 2985 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 2986 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
borlanic 0:fbdae7e6d805 2987 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 2988 },
borlanic 0:fbdae7e6d805 2989 "board_controller_enable": {
borlanic 0:fbdae7e6d805 2990 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 2991 "value": "PF7",
borlanic 0:fbdae7e6d805 2992 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 2993 }
borlanic 0:fbdae7e6d805 2994 }
borlanic 0:fbdae7e6d805 2995 },
borlanic 0:fbdae7e6d805 2996 "EFM32ZG222F32": {
borlanic 0:fbdae7e6d805 2997 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 2998 "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
borlanic 0:fbdae7e6d805 2999 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3000 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 3001 "macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
borlanic 0:fbdae7e6d805 3002 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3003 "default_lib": "small",
borlanic 0:fbdae7e6d805 3004 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3005 "device_name": "EFM32ZG222F32",
borlanic 0:fbdae7e6d805 3006 "public": false
borlanic 0:fbdae7e6d805 3007 },
borlanic 0:fbdae7e6d805 3008 "EFM32ZG_STK3200": {
borlanic 0:fbdae7e6d805 3009 "inherits": ["EFM32ZG222F32"],
borlanic 0:fbdae7e6d805 3010 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3011 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 3012 "config": {
borlanic 0:fbdae7e6d805 3013 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3014 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3015 "value": "HFXO",
borlanic 0:fbdae7e6d805 3016 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3017 },
borlanic 0:fbdae7e6d805 3018 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3019 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3020 "value": "24000000",
borlanic 0:fbdae7e6d805 3021 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3022 },
borlanic 0:fbdae7e6d805 3023 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3024 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3025 "value": "LFXO",
borlanic 0:fbdae7e6d805 3026 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3027 },
borlanic 0:fbdae7e6d805 3028 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3029 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3030 "value": "32768",
borlanic 0:fbdae7e6d805 3031 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3032 },
borlanic 0:fbdae7e6d805 3033 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3034 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3035 "value": "21000000",
borlanic 0:fbdae7e6d805 3036 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3037 },
borlanic 0:fbdae7e6d805 3038 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3039 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3040 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
borlanic 0:fbdae7e6d805 3041 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3042 },
borlanic 0:fbdae7e6d805 3043 "board_controller_enable": {
borlanic 0:fbdae7e6d805 3044 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 3045 "value": "PA9",
borlanic 0:fbdae7e6d805 3046 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 3047 }
borlanic 0:fbdae7e6d805 3048 }
borlanic 0:fbdae7e6d805 3049 },
borlanic 0:fbdae7e6d805 3050 "EFM32HG322F64": {
borlanic 0:fbdae7e6d805 3051 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3052 "extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
borlanic 0:fbdae7e6d805 3053 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3054 "default_toolchain": "uARM",
borlanic 0:fbdae7e6d805 3055 "macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
borlanic 0:fbdae7e6d805 3056 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3057 "default_lib": "small",
borlanic 0:fbdae7e6d805 3058 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3059 "device_name": "EFM32HG322F64",
borlanic 0:fbdae7e6d805 3060 "public": false
borlanic 0:fbdae7e6d805 3061 },
borlanic 0:fbdae7e6d805 3062 "EFM32HG_STK3400": {
borlanic 0:fbdae7e6d805 3063 "inherits": ["EFM32HG322F64"],
borlanic 0:fbdae7e6d805 3064 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3065 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 3066 "config": {
borlanic 0:fbdae7e6d805 3067 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3068 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3069 "value": "HFXO",
borlanic 0:fbdae7e6d805 3070 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3071 },
borlanic 0:fbdae7e6d805 3072 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3073 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3074 "value": "24000000",
borlanic 0:fbdae7e6d805 3075 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3076 },
borlanic 0:fbdae7e6d805 3077 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3078 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3079 "value": "LFXO",
borlanic 0:fbdae7e6d805 3080 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3081 },
borlanic 0:fbdae7e6d805 3082 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3083 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3084 "value": "32768",
borlanic 0:fbdae7e6d805 3085 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3086 },
borlanic 0:fbdae7e6d805 3087 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3088 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3089 "value": "21000000",
borlanic 0:fbdae7e6d805 3090 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3091 },
borlanic 0:fbdae7e6d805 3092 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3093 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3094 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
borlanic 0:fbdae7e6d805 3095 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3096 },
borlanic 0:fbdae7e6d805 3097 "board_controller_enable": {
borlanic 0:fbdae7e6d805 3098 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 3099 "value": "PA9",
borlanic 0:fbdae7e6d805 3100 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 3101 }
borlanic 0:fbdae7e6d805 3102 }
borlanic 0:fbdae7e6d805 3103 },
borlanic 0:fbdae7e6d805 3104 "EFM32PG1B100F256GM32": {
borlanic 0:fbdae7e6d805 3105 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3106 "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
borlanic 0:fbdae7e6d805 3107 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3108 "macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 3109 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3110 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3111 "device_name": "EFM32PG1B100F256GM32",
borlanic 0:fbdae7e6d805 3112 "public": false,
borlanic 0:fbdae7e6d805 3113 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3114 },
borlanic 0:fbdae7e6d805 3115 "EFM32PG_STK3401": {
borlanic 0:fbdae7e6d805 3116 "inherits": ["EFM32PG1B100F256GM32"],
borlanic 0:fbdae7e6d805 3117 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 3118 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 3119 "config": {
borlanic 0:fbdae7e6d805 3120 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3121 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3122 "value": "HFXO",
borlanic 0:fbdae7e6d805 3123 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3124 },
borlanic 0:fbdae7e6d805 3125 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3126 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3127 "value": "40000000",
borlanic 0:fbdae7e6d805 3128 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3129 },
borlanic 0:fbdae7e6d805 3130 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3131 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3132 "value": "LFXO",
borlanic 0:fbdae7e6d805 3133 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3134 },
borlanic 0:fbdae7e6d805 3135 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3136 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3137 "value": "32768",
borlanic 0:fbdae7e6d805 3138 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3139 },
borlanic 0:fbdae7e6d805 3140 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3141 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3142 "value": "32000000",
borlanic 0:fbdae7e6d805 3143 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3144 },
borlanic 0:fbdae7e6d805 3145 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3146 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3147 "value": "cmuHFRCOFreq_32M0Hz",
borlanic 0:fbdae7e6d805 3148 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3149 },
borlanic 0:fbdae7e6d805 3150 "board_controller_enable": {
borlanic 0:fbdae7e6d805 3151 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 3152 "value": "PA5",
borlanic 0:fbdae7e6d805 3153 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 3154 }
borlanic 0:fbdae7e6d805 3155 }
borlanic 0:fbdae7e6d805 3156 },
borlanic 0:fbdae7e6d805 3157 "EFR32MG1P132F256GM48": {
borlanic 0:fbdae7e6d805 3158 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3159 "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
borlanic 0:fbdae7e6d805 3160 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3161 "macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 3162 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3163 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3164 "device_name": "EFR32MG1P132F256GM48",
borlanic 0:fbdae7e6d805 3165 "public": false,
borlanic 0:fbdae7e6d805 3166 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3167 },
borlanic 0:fbdae7e6d805 3168 "EFR32MG1P233F256GM48": {
borlanic 0:fbdae7e6d805 3169 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3170 "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
borlanic 0:fbdae7e6d805 3171 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3172 "macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 3173 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3174 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3175 "public": false,
borlanic 0:fbdae7e6d805 3176 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3177 },
borlanic 0:fbdae7e6d805 3178 "EFR32MG1_BRD4150": {
borlanic 0:fbdae7e6d805 3179 "inherits": ["EFR32MG1P132F256GM48"],
borlanic 0:fbdae7e6d805 3180 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 3181 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 3182 "config": {
borlanic 0:fbdae7e6d805 3183 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3184 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3185 "value": "HFXO",
borlanic 0:fbdae7e6d805 3186 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3187 },
borlanic 0:fbdae7e6d805 3188 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3189 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3190 "value": "38400000",
borlanic 0:fbdae7e6d805 3191 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3192 },
borlanic 0:fbdae7e6d805 3193 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3194 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3195 "value": "LFXO",
borlanic 0:fbdae7e6d805 3196 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3197 },
borlanic 0:fbdae7e6d805 3198 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3199 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3200 "value": "32768",
borlanic 0:fbdae7e6d805 3201 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3202 },
borlanic 0:fbdae7e6d805 3203 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3204 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3205 "value": "32000000",
borlanic 0:fbdae7e6d805 3206 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3207 },
borlanic 0:fbdae7e6d805 3208 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3209 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3210 "value": "cmuHFRCOFreq_32M0Hz",
borlanic 0:fbdae7e6d805 3211 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3212 },
borlanic 0:fbdae7e6d805 3213 "board_controller_enable": {
borlanic 0:fbdae7e6d805 3214 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 3215 "value": "PA5",
borlanic 0:fbdae7e6d805 3216 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 3217 }
borlanic 0:fbdae7e6d805 3218 },
borlanic 0:fbdae7e6d805 3219 "public": false
borlanic 0:fbdae7e6d805 3220 },
borlanic 0:fbdae7e6d805 3221 "TB_SENSE_1": {
borlanic 0:fbdae7e6d805 3222 "inherits": ["EFR32MG1P233F256GM48"],
borlanic 0:fbdae7e6d805 3223 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
borlanic 0:fbdae7e6d805 3224 "forced_reset_timeout": 5,
borlanic 0:fbdae7e6d805 3225 "config": {
borlanic 0:fbdae7e6d805 3226 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3227 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3228 "value": "HFXO",
borlanic 0:fbdae7e6d805 3229 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3230 },
borlanic 0:fbdae7e6d805 3231 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3232 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3233 "value": "38400000",
borlanic 0:fbdae7e6d805 3234 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3235 },
borlanic 0:fbdae7e6d805 3236 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3237 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3238 "value": "LFXO",
borlanic 0:fbdae7e6d805 3239 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3240 },
borlanic 0:fbdae7e6d805 3241 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3242 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3243 "value": "32768",
borlanic 0:fbdae7e6d805 3244 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3245 },
borlanic 0:fbdae7e6d805 3246 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3247 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3248 "value": "32000000",
borlanic 0:fbdae7e6d805 3249 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3250 },
borlanic 0:fbdae7e6d805 3251 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3252 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3253 "value": "cmuHFRCOFreq_32M0Hz",
borlanic 0:fbdae7e6d805 3254 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3255 }
borlanic 0:fbdae7e6d805 3256 }
borlanic 0:fbdae7e6d805 3257 },
borlanic 0:fbdae7e6d805 3258 "EFM32PG12B500F1024GL125": {
borlanic 0:fbdae7e6d805 3259 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3260 "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
borlanic 0:fbdae7e6d805 3261 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3262 "macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 3263 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3264 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3265 "device_name": "EFM32PG12B500F1024GL125",
borlanic 0:fbdae7e6d805 3266 "public": false,
borlanic 0:fbdae7e6d805 3267 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3268 },
borlanic 0:fbdae7e6d805 3269 "EFM32PG12_STK3402": {
borlanic 0:fbdae7e6d805 3270 "inherits": ["EFM32PG12B500F1024GL125"],
borlanic 0:fbdae7e6d805 3271 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 3272 "forced_reset_timeout": 2,
borlanic 0:fbdae7e6d805 3273 "config": {
borlanic 0:fbdae7e6d805 3274 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3275 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3276 "value": "HFXO",
borlanic 0:fbdae7e6d805 3277 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3278 },
borlanic 0:fbdae7e6d805 3279 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3280 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3281 "value": "40000000",
borlanic 0:fbdae7e6d805 3282 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3283 },
borlanic 0:fbdae7e6d805 3284 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3285 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3286 "value": "LFXO",
borlanic 0:fbdae7e6d805 3287 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3288 },
borlanic 0:fbdae7e6d805 3289 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3290 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3291 "value": "32768",
borlanic 0:fbdae7e6d805 3292 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3293 },
borlanic 0:fbdae7e6d805 3294 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3295 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3296 "value": "32000000",
borlanic 0:fbdae7e6d805 3297 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3298 },
borlanic 0:fbdae7e6d805 3299 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3300 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3301 "value": "cmuHFRCOFreq_32M0Hz",
borlanic 0:fbdae7e6d805 3302 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3303 },
borlanic 0:fbdae7e6d805 3304 "board_controller_enable": {
borlanic 0:fbdae7e6d805 3305 "help": "Pin to pull high for enabling the USB serial port",
borlanic 0:fbdae7e6d805 3306 "value": "PA5",
borlanic 0:fbdae7e6d805 3307 "macro_name": "EFM_BC_EN"
borlanic 0:fbdae7e6d805 3308 }
borlanic 0:fbdae7e6d805 3309 }
borlanic 0:fbdae7e6d805 3310 },
borlanic 0:fbdae7e6d805 3311 "EFR32MG12P332F1024GL125": {
borlanic 0:fbdae7e6d805 3312 "inherits": ["EFM32"],
borlanic 0:fbdae7e6d805 3313 "extra_labels_add": ["EFR32MG12", "EFR32_12", "1024K", "SL_RAIL", "SL_CRYPTO"],
borlanic 0:fbdae7e6d805 3314 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3315 "macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
borlanic 0:fbdae7e6d805 3316 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
borlanic 0:fbdae7e6d805 3317 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3318 "device_name": "EFR32MG12P332F1024GL125",
borlanic 0:fbdae7e6d805 3319 "public": false,
borlanic 0:fbdae7e6d805 3320 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3321 },
borlanic 0:fbdae7e6d805 3322 "TB_SENSE_12": {
borlanic 0:fbdae7e6d805 3323 "inherits": ["EFR32MG12P332F1024GL125"],
borlanic 0:fbdae7e6d805 3324 "device_name": "EFR32MG12P332F1024GL125",
borlanic 0:fbdae7e6d805 3325 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 3326 "forced_reset_timeout": 5,
borlanic 0:fbdae7e6d805 3327 "config": {
borlanic 0:fbdae7e6d805 3328 "hf_clock_src": {
borlanic 0:fbdae7e6d805 3329 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
borlanic 0:fbdae7e6d805 3330 "value": "HFXO",
borlanic 0:fbdae7e6d805 3331 "macro_name": "CORE_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3332 },
borlanic 0:fbdae7e6d805 3333 "hfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3334 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3335 "value": "38400000",
borlanic 0:fbdae7e6d805 3336 "macro_name": "HFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3337 },
borlanic 0:fbdae7e6d805 3338 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3339 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
borlanic 0:fbdae7e6d805 3340 "value": "LFXO",
borlanic 0:fbdae7e6d805 3341 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3342 },
borlanic 0:fbdae7e6d805 3343 "lfxo_clock_freq": {
borlanic 0:fbdae7e6d805 3344 "help": "Value: External crystal frequency in hertz",
borlanic 0:fbdae7e6d805 3345 "value": "32768",
borlanic 0:fbdae7e6d805 3346 "macro_name": "LFXO_FREQUENCY"
borlanic 0:fbdae7e6d805 3347 },
borlanic 0:fbdae7e6d805 3348 "hfrco_clock_freq": {
borlanic 0:fbdae7e6d805 3349 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
borlanic 0:fbdae7e6d805 3350 "value": "32000000",
borlanic 0:fbdae7e6d805 3351 "macro_name": "HFRCO_FREQUENCY"
borlanic 0:fbdae7e6d805 3352 },
borlanic 0:fbdae7e6d805 3353 "hfrco_band_select": {
borlanic 0:fbdae7e6d805 3354 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
borlanic 0:fbdae7e6d805 3355 "value": "cmuHFRCOFreq_32M0Hz",
borlanic 0:fbdae7e6d805 3356 "macro_name": "HFRCO_FREQUENCY_ENUM"
borlanic 0:fbdae7e6d805 3357 }
borlanic 0:fbdae7e6d805 3358 }
borlanic 0:fbdae7e6d805 3359 },
borlanic 0:fbdae7e6d805 3360 "WIZWIKI_W7500": {
borlanic 0:fbdae7e6d805 3361 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3362 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3363 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
borlanic 0:fbdae7e6d805 3364 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 3365 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3366 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3367 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3368 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 3369 },
borlanic 0:fbdae7e6d805 3370 "WIZWIKI_W7500P": {
borlanic 0:fbdae7e6d805 3371 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3372 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3373 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
borlanic 0:fbdae7e6d805 3374 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 3375 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3376 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3377 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3378 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 3379 },
borlanic 0:fbdae7e6d805 3380 "WIZWIKI_W7500ECO": {
borlanic 0:fbdae7e6d805 3381 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3382 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3383 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
borlanic 0:fbdae7e6d805 3384 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 3385 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3386 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3387 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 3388 },
borlanic 0:fbdae7e6d805 3389 "SAMR21G18A": {
borlanic 0:fbdae7e6d805 3390 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3391 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3392 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
borlanic 0:fbdae7e6d805 3393 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
borlanic 0:fbdae7e6d805 3394 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
borlanic 0:fbdae7e6d805 3395 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3396 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3397 "device_name": "ATSAMR21G18A"
borlanic 0:fbdae7e6d805 3398 },
borlanic 0:fbdae7e6d805 3399 "SAMD21J18A": {
borlanic 0:fbdae7e6d805 3400 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3401 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3402 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
borlanic 0:fbdae7e6d805 3403 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
borlanic 0:fbdae7e6d805 3404 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
borlanic 0:fbdae7e6d805 3405 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3406 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3407 "device_name": "ATSAMD21J18A"
borlanic 0:fbdae7e6d805 3408 },
borlanic 0:fbdae7e6d805 3409 "SAMD21G18A": {
borlanic 0:fbdae7e6d805 3410 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3411 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3412 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
borlanic 0:fbdae7e6d805 3413 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
borlanic 0:fbdae7e6d805 3414 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
borlanic 0:fbdae7e6d805 3415 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3416 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3417 "device_name": "ATSAMD21G18A"
borlanic 0:fbdae7e6d805 3418 },
borlanic 0:fbdae7e6d805 3419 "SAML21J18A": {
borlanic 0:fbdae7e6d805 3420 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3421 "core": "Cortex-M0+",
borlanic 0:fbdae7e6d805 3422 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
borlanic 0:fbdae7e6d805 3423 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
borlanic 0:fbdae7e6d805 3424 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
borlanic 0:fbdae7e6d805 3425 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3426 "device_name": "ATSAML21J18A"
borlanic 0:fbdae7e6d805 3427 },
borlanic 0:fbdae7e6d805 3428 "SAMG55J19": {
borlanic 0:fbdae7e6d805 3429 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3430 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 3431 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
borlanic 0:fbdae7e6d805 3432 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
borlanic 0:fbdae7e6d805 3433 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
borlanic 0:fbdae7e6d805 3434 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 3435 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3436 "default_lib": "std",
borlanic 0:fbdae7e6d805 3437 "device_name": "ATSAMG55J19"
borlanic 0:fbdae7e6d805 3438 },
borlanic 0:fbdae7e6d805 3439 "MCU_NRF51_UNIFIED": {
borlanic 0:fbdae7e6d805 3440 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3441 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3442 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
borlanic 0:fbdae7e6d805 3443 "macros": [
borlanic 0:fbdae7e6d805 3444 "NRF51",
borlanic 0:fbdae7e6d805 3445 "TARGET_NRF51822",
borlanic 0:fbdae7e6d805 3446 "BLE_STACK_SUPPORT_REQD",
borlanic 0:fbdae7e6d805 3447 "SOFTDEVICE_PRESENT",
borlanic 0:fbdae7e6d805 3448 "S130",
borlanic 0:fbdae7e6d805 3449 "TARGET_MCU_NRF51822",
borlanic 0:fbdae7e6d805 3450 "CMSIS_VECTAB_VIRTUAL",
borlanic 0:fbdae7e6d805 3451 "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
borlanic 0:fbdae7e6d805 3452 "NO_SYSTICK",
borlanic 0:fbdae7e6d805 3453 "MBED_TICKLESS"
borlanic 0:fbdae7e6d805 3454 ],
borlanic 0:fbdae7e6d805 3455 "MERGE_BOOTLOADER": false,
borlanic 0:fbdae7e6d805 3456 "extra_labels": [
borlanic 0:fbdae7e6d805 3457 "NORDIC",
borlanic 0:fbdae7e6d805 3458 "MCU_NRF51",
borlanic 0:fbdae7e6d805 3459 "MCU_NRF51822_UNIFIED",
borlanic 0:fbdae7e6d805 3460 "NRF5x",
borlanic 0:fbdae7e6d805 3461 "NRF51",
borlanic 0:fbdae7e6d805 3462 "SDK_11"
borlanic 0:fbdae7e6d805 3463 ],
borlanic 0:fbdae7e6d805 3464 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 3465 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3466 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3467 "public": false,
borlanic 0:fbdae7e6d805 3468 "MERGE_SOFT_DEVICE": true,
borlanic 0:fbdae7e6d805 3469 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
borlanic 0:fbdae7e6d805 3470 {
borlanic 0:fbdae7e6d805 3471 "boot": "",
borlanic 0:fbdae7e6d805 3472 "name": "s130_nrf51_2.0.0_softdevice.hex",
borlanic 0:fbdae7e6d805 3473 "offset": 110592
borlanic 0:fbdae7e6d805 3474 }
borlanic 0:fbdae7e6d805 3475 ],
borlanic 0:fbdae7e6d805 3476 "detect_code": ["1070"],
borlanic 0:fbdae7e6d805 3477 "post_binary_hook": {
borlanic 0:fbdae7e6d805 3478 "function": "MCU_NRF51Code.binary_hook",
borlanic 0:fbdae7e6d805 3479 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
borlanic 0:fbdae7e6d805 3480 },
borlanic 0:fbdae7e6d805 3481 "program_cycle_s": 6,
borlanic 0:fbdae7e6d805 3482 "features": ["BLE"],
borlanic 0:fbdae7e6d805 3483 "config": {
borlanic 0:fbdae7e6d805 3484 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3485 "value": "NRF_LF_SRC_XTAL",
borlanic 0:fbdae7e6d805 3486 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
borlanic 0:fbdae7e6d805 3487 },
borlanic 0:fbdae7e6d805 3488 "uart_hwfc": {
borlanic 0:fbdae7e6d805 3489 "help": "Value: 1 for enable, 0 for disable",
borlanic 0:fbdae7e6d805 3490 "value": 1,
borlanic 0:fbdae7e6d805 3491 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
borlanic 0:fbdae7e6d805 3492 }
borlanic 0:fbdae7e6d805 3493 },
borlanic 0:fbdae7e6d805 3494 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
borlanic 0:fbdae7e6d805 3495 },
borlanic 0:fbdae7e6d805 3496 "MCU_NRF51_32K_UNIFIED": {
borlanic 0:fbdae7e6d805 3497 "inherits": ["MCU_NRF51_UNIFIED"],
borlanic 0:fbdae7e6d805 3498 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 3499 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 3500 "public": false
borlanic 0:fbdae7e6d805 3501 },
borlanic 0:fbdae7e6d805 3502 "NRF51_DK": {
borlanic 0:fbdae7e6d805 3503 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3504 "inherits": ["MCU_NRF51_32K_UNIFIED"],
borlanic 0:fbdae7e6d805 3505 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
borlanic 0:fbdae7e6d805 3506 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3507 "device_name": "nRF51822_xxAA"
borlanic 0:fbdae7e6d805 3508 },
borlanic 0:fbdae7e6d805 3509 "NRF51_DONGLE": {
borlanic 0:fbdae7e6d805 3510 "inherits": ["MCU_NRF51_32K_UNIFIED"],
borlanic 0:fbdae7e6d805 3511 "progen": {"target": "nrf51-dongle"},
borlanic 0:fbdae7e6d805 3512 "device_has": ["I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
borlanic 0:fbdae7e6d805 3513 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 3514 },
borlanic 0:fbdae7e6d805 3515 "OSHCHIP": {
borlanic 0:fbdae7e6d805 3516 "inherits": ["MCU_NRF51_32K_UNIFIED"],
borlanic 0:fbdae7e6d805 3517 "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
borlanic 0:fbdae7e6d805 3518 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
borlanic 0:fbdae7e6d805 3519 "device_name": "nRF51822_xxAC"
borlanic 0:fbdae7e6d805 3520 },
borlanic 0:fbdae7e6d805 3521 "MCU_NRF52832": {
borlanic 0:fbdae7e6d805 3522 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3523 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3524 "macros": [
borlanic 0:fbdae7e6d805 3525 "BOARD_PCA10040",
borlanic 0:fbdae7e6d805 3526 "NRF52",
borlanic 0:fbdae7e6d805 3527 "TARGET_NRF52832",
borlanic 0:fbdae7e6d805 3528 "CMSIS_VECTAB_VIRTUAL",
borlanic 0:fbdae7e6d805 3529 "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
borlanic 0:fbdae7e6d805 3530 "MBED_TICKLESS"
borlanic 0:fbdae7e6d805 3531 ],
borlanic 0:fbdae7e6d805 3532 "device_has": [
borlanic 0:fbdae7e6d805 3533 "ANALOGIN",
borlanic 0:fbdae7e6d805 3534 "FLASH",
borlanic 0:fbdae7e6d805 3535 "I2C",
borlanic 0:fbdae7e6d805 3536 "I2C_ASYNCH",
borlanic 0:fbdae7e6d805 3537 "INTERRUPTIN",
borlanic 0:fbdae7e6d805 3538 "ITM",
borlanic 0:fbdae7e6d805 3539 "LOWPOWERTIMER",
borlanic 0:fbdae7e6d805 3540 "PORTIN",
borlanic 0:fbdae7e6d805 3541 "PORTINOUT",
borlanic 0:fbdae7e6d805 3542 "PORTOUT",
borlanic 0:fbdae7e6d805 3543 "PWMOUT",
borlanic 0:fbdae7e6d805 3544 "RTC",
borlanic 0:fbdae7e6d805 3545 "SERIAL",
borlanic 0:fbdae7e6d805 3546 "SERIAL_ASYNCH",
borlanic 0:fbdae7e6d805 3547 "SERIAL_FC",
borlanic 0:fbdae7e6d805 3548 "SLEEP",
borlanic 0:fbdae7e6d805 3549 "SPI",
borlanic 0:fbdae7e6d805 3550 "SPI_ASYNCH",
borlanic 0:fbdae7e6d805 3551 "STCLK_OFF_DURING_SLEEP",
borlanic 0:fbdae7e6d805 3552 "TRNG"
borlanic 0:fbdae7e6d805 3553 ],
borlanic 0:fbdae7e6d805 3554 "extra_labels": [
borlanic 0:fbdae7e6d805 3555 "NORDIC",
borlanic 0:fbdae7e6d805 3556 "NRF5x",
borlanic 0:fbdae7e6d805 3557 "NRF52",
borlanic 0:fbdae7e6d805 3558 "SDK_14_2",
borlanic 0:fbdae7e6d805 3559 "SOFTDEVICE_COMMON",
borlanic 0:fbdae7e6d805 3560 "SOFTDEVICE_S132"
borlanic 0:fbdae7e6d805 3561 ],
borlanic 0:fbdae7e6d805 3562 "config": {
borlanic 0:fbdae7e6d805 3563 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3564 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
borlanic 0:fbdae7e6d805 3565 "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
borlanic 0:fbdae7e6d805 3566 "value": "NRF_LF_SRC_XTAL"
borlanic 0:fbdae7e6d805 3567 },
borlanic 0:fbdae7e6d805 3568 "lf_clock_rc_calib_timer_interval": {
borlanic 0:fbdae7e6d805 3569 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
borlanic 0:fbdae7e6d805 3570 "value": 16
borlanic 0:fbdae7e6d805 3571 },
borlanic 0:fbdae7e6d805 3572 "lf_clock_rc_calib_mode_config": {
borlanic 0:fbdae7e6d805 3573 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
borlanic 0:fbdae7e6d805 3574 "value": 0
borlanic 0:fbdae7e6d805 3575 }
borlanic 0:fbdae7e6d805 3576 },
borlanic 0:fbdae7e6d805 3577 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 3578 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3579 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 3580 "public": false,
borlanic 0:fbdae7e6d805 3581 "detect_code": ["1101"],
borlanic 0:fbdae7e6d805 3582 "program_cycle_s": 6,
borlanic 0:fbdae7e6d805 3583 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3584 },
borlanic 0:fbdae7e6d805 3585 "NRF52_DK": {
borlanic 0:fbdae7e6d805 3586 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3587 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3588 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3589 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3590 },
borlanic 0:fbdae7e6d805 3591 "UBLOX_EVA_NINA": {
borlanic 0:fbdae7e6d805 3592 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3593 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3594 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3595 },
borlanic 0:fbdae7e6d805 3596 "UBLOX_EVK_NINA_B1": {
borlanic 0:fbdae7e6d805 3597 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3598 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3599 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3600 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3601 },
borlanic 0:fbdae7e6d805 3602 "MTB_UBLOX_NINA_B1": {
borlanic 0:fbdae7e6d805 3603 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3604 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3605 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3606 },
borlanic 0:fbdae7e6d805 3607 "MTB_LAIRD_BL652": {
borlanic 0:fbdae7e6d805 3608 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3609 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3610 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3611 },
borlanic 0:fbdae7e6d805 3612 "DELTA_DFBM_NQ620": {
borlanic 0:fbdae7e6d805 3613 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3614 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3615 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3616 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3617 },
borlanic 0:fbdae7e6d805 3618 "MCU_NRF52840": {
borlanic 0:fbdae7e6d805 3619 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3620 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3621 "macros": [
borlanic 0:fbdae7e6d805 3622 "BOARD_PCA10056",
borlanic 0:fbdae7e6d805 3623 "NRF52840_XXAA",
borlanic 0:fbdae7e6d805 3624 "TARGET_NRF52840",
borlanic 0:fbdae7e6d805 3625 "CMSIS_VECTAB_VIRTUAL",
borlanic 0:fbdae7e6d805 3626 "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
borlanic 0:fbdae7e6d805 3627 "MBED_TICKLESS"
borlanic 0:fbdae7e6d805 3628 ],
borlanic 0:fbdae7e6d805 3629 "device_has": [
borlanic 0:fbdae7e6d805 3630 "ANALOGIN",
borlanic 0:fbdae7e6d805 3631 "FLASH",
borlanic 0:fbdae7e6d805 3632 "I2C",
borlanic 0:fbdae7e6d805 3633 "I2C_ASYNCH",
borlanic 0:fbdae7e6d805 3634 "INTERRUPTIN",
borlanic 0:fbdae7e6d805 3635 "ITM",
borlanic 0:fbdae7e6d805 3636 "LOWPOWERTIMER",
borlanic 0:fbdae7e6d805 3637 "PORTIN",
borlanic 0:fbdae7e6d805 3638 "PORTINOUT",
borlanic 0:fbdae7e6d805 3639 "PORTOUT",
borlanic 0:fbdae7e6d805 3640 "PWMOUT",
borlanic 0:fbdae7e6d805 3641 "RTC",
borlanic 0:fbdae7e6d805 3642 "SERIAL",
borlanic 0:fbdae7e6d805 3643 "SERIAL_ASYNCH",
borlanic 0:fbdae7e6d805 3644 "SERIAL_FC",
borlanic 0:fbdae7e6d805 3645 "SLEEP",
borlanic 0:fbdae7e6d805 3646 "SPI",
borlanic 0:fbdae7e6d805 3647 "SPI_ASYNCH",
borlanic 0:fbdae7e6d805 3648 "STCLK_OFF_DURING_SLEEP",
borlanic 0:fbdae7e6d805 3649 "TRNG"
borlanic 0:fbdae7e6d805 3650 ],
borlanic 0:fbdae7e6d805 3651 "extra_labels": [
borlanic 0:fbdae7e6d805 3652 "NORDIC",
borlanic 0:fbdae7e6d805 3653 "NRF5x",
borlanic 0:fbdae7e6d805 3654 "NRF52",
borlanic 0:fbdae7e6d805 3655 "SDK_14_2",
borlanic 0:fbdae7e6d805 3656 "SOFTDEVICE_COMMON",
borlanic 0:fbdae7e6d805 3657 "SOFTDEVICE_S140"
borlanic 0:fbdae7e6d805 3658 ],
borlanic 0:fbdae7e6d805 3659 "config": {
borlanic 0:fbdae7e6d805 3660 "lf_clock_src": {
borlanic 0:fbdae7e6d805 3661 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
borlanic 0:fbdae7e6d805 3662 "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
borlanic 0:fbdae7e6d805 3663 "value": "NRF_LF_SRC_XTAL"
borlanic 0:fbdae7e6d805 3664 },
borlanic 0:fbdae7e6d805 3665 "lf_clock_rc_calib_timer_interval": {
borlanic 0:fbdae7e6d805 3666 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
borlanic 0:fbdae7e6d805 3667 "value": 16
borlanic 0:fbdae7e6d805 3668 },
borlanic 0:fbdae7e6d805 3669 "lf_clock_rc_calib_mode_config": {
borlanic 0:fbdae7e6d805 3670 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
borlanic 0:fbdae7e6d805 3671 "value": 0
borlanic 0:fbdae7e6d805 3672 }
borlanic 0:fbdae7e6d805 3673 },
borlanic 0:fbdae7e6d805 3674 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 3675 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3676 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 3677 "public": false,
borlanic 0:fbdae7e6d805 3678 "detect_code": ["1101"],
borlanic 0:fbdae7e6d805 3679 "program_cycle_s": 6,
borlanic 0:fbdae7e6d805 3680 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3681 },
borlanic 0:fbdae7e6d805 3682 "NRF52840_DK": {
borlanic 0:fbdae7e6d805 3683 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3684 "inherits": ["MCU_NRF52840"],
borlanic 0:fbdae7e6d805 3685 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3686 "device_name": "nRF52840_xxAA"
borlanic 0:fbdae7e6d805 3687 },
borlanic 0:fbdae7e6d805 3688 "BLUEPILL_F103C8": {
borlanic 0:fbdae7e6d805 3689 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 3690 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 3691 "default_toolchain": "GCC_ARM",
borlanic 0:fbdae7e6d805 3692 "extra_labels_add": ["STM32F1", "STM32F103C8"],
borlanic 0:fbdae7e6d805 3693 "supported_toolchains": ["GCC_ARM"],
borlanic 0:fbdae7e6d805 3694 "device_has_add": [],
borlanic 0:fbdae7e6d805 3695 "device_has_remove": ["RTC", "STDIO_MESSAGES"]
borlanic 0:fbdae7e6d805 3696 },
borlanic 0:fbdae7e6d805 3697 "NUMAKER_PFM_NUC472": {
borlanic 0:fbdae7e6d805 3698 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3699 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 3700 "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
borlanic 0:fbdae7e6d805 3701 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3702 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3703 "config": {
borlanic 0:fbdae7e6d805 3704 "gpio-irq-debounce-enable": {
borlanic 0:fbdae7e6d805 3705 "help": "Enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3706 "value": 0
borlanic 0:fbdae7e6d805 3707 },
borlanic 0:fbdae7e6d805 3708 "gpio-irq-debounce-enable-list": {
borlanic 0:fbdae7e6d805 3709 "help": "Comma separated pin list to enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3710 "value": "NC"
borlanic 0:fbdae7e6d805 3711 },
borlanic 0:fbdae7e6d805 3712 "gpio-irq-debounce-clock-source": {
borlanic 0:fbdae7e6d805 3713 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
borlanic 0:fbdae7e6d805 3714 "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
borlanic 0:fbdae7e6d805 3715 },
borlanic 0:fbdae7e6d805 3716 "gpio-irq-debounce-sample-rate": {
borlanic 0:fbdae7e6d805 3717 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
borlanic 0:fbdae7e6d805 3718 "value": "GPIO_DBCTL_DBCLKSEL_16"
borlanic 0:fbdae7e6d805 3719 }
borlanic 0:fbdae7e6d805 3720 },
borlanic 0:fbdae7e6d805 3721 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3722 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
borlanic 0:fbdae7e6d805 3723 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
borlanic 0:fbdae7e6d805 3724 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 3725 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3726 "device_name": "NUC472HI8AE",
borlanic 0:fbdae7e6d805 3727 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3728 },
borlanic 0:fbdae7e6d805 3729 "NCS36510": {
borlanic 0:fbdae7e6d805 3730 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3731 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 3732 "extra_labels": ["ONSEMI"],
borlanic 0:fbdae7e6d805 3733 "config": {
borlanic 0:fbdae7e6d805 3734 "mac-addr-low": {
borlanic 0:fbdae7e6d805 3735 "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
borlanic 0:fbdae7e6d805 3736 "value": "0xFFFFFFFF"
borlanic 0:fbdae7e6d805 3737 },
borlanic 0:fbdae7e6d805 3738 "mac-addr-high": {
borlanic 0:fbdae7e6d805 3739 "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
borlanic 0:fbdae7e6d805 3740 "value": "0xFFFFFFFF"
borlanic 0:fbdae7e6d805 3741 },
borlanic 0:fbdae7e6d805 3742 "32KHz-clk-trim": {
borlanic 0:fbdae7e6d805 3743 "help": "32KHz clock trim",
borlanic 0:fbdae7e6d805 3744 "value": "0x39"
borlanic 0:fbdae7e6d805 3745 },
borlanic 0:fbdae7e6d805 3746 "32MHz-clk-trim": {
borlanic 0:fbdae7e6d805 3747 "help": "32MHz clock trim",
borlanic 0:fbdae7e6d805 3748 "value": "0x17"
borlanic 0:fbdae7e6d805 3749 },
borlanic 0:fbdae7e6d805 3750 "rssi-trim": {
borlanic 0:fbdae7e6d805 3751 "help": "RSSI trim",
borlanic 0:fbdae7e6d805 3752 "value": "0x3D"
borlanic 0:fbdae7e6d805 3753 },
borlanic 0:fbdae7e6d805 3754 "txtune-trim": {
borlanic 0:fbdae7e6d805 3755 "help": "TX tune trim",
borlanic 0:fbdae7e6d805 3756 "value": "0xFFFFFFFF"
borlanic 0:fbdae7e6d805 3757 }
borlanic 0:fbdae7e6d805 3758 },
borlanic 0:fbdae7e6d805 3759 "OUTPUT_EXT": "hex",
borlanic 0:fbdae7e6d805 3760 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
borlanic 0:fbdae7e6d805 3761 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
borlanic 0:fbdae7e6d805 3762 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 3763 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG", "SPISLAVE", "RTC"],
borlanic 0:fbdae7e6d805 3764 "release_versions": ["2", "5"]
borlanic 0:fbdae7e6d805 3765 },
borlanic 0:fbdae7e6d805 3766 "NUMAKER_PFM_M453": {
borlanic 0:fbdae7e6d805 3767 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3768 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 3769 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
borlanic 0:fbdae7e6d805 3770 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3771 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3772 "config": {
borlanic 0:fbdae7e6d805 3773 "gpio-irq-debounce-enable": {
borlanic 0:fbdae7e6d805 3774 "help": "Enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3775 "value": 0
borlanic 0:fbdae7e6d805 3776 },
borlanic 0:fbdae7e6d805 3777 "gpio-irq-debounce-enable-list": {
borlanic 0:fbdae7e6d805 3778 "help": "Comma separated pin list to enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3779 "value": "NC"
borlanic 0:fbdae7e6d805 3780 },
borlanic 0:fbdae7e6d805 3781 "gpio-irq-debounce-clock-source": {
borlanic 0:fbdae7e6d805 3782 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
borlanic 0:fbdae7e6d805 3783 "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
borlanic 0:fbdae7e6d805 3784 },
borlanic 0:fbdae7e6d805 3785 "gpio-irq-debounce-sample-rate": {
borlanic 0:fbdae7e6d805 3786 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
borlanic 0:fbdae7e6d805 3787 "value": "GPIO_DBCTL_DBCLKSEL_16"
borlanic 0:fbdae7e6d805 3788 }
borlanic 0:fbdae7e6d805 3789 },
borlanic 0:fbdae7e6d805 3790 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3791 "progen": {"target": "numaker-pfm-m453"},
borlanic 0:fbdae7e6d805 3792 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
borlanic 0:fbdae7e6d805 3793 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3794 "device_name": "M453VG6AE",
borlanic 0:fbdae7e6d805 3795 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3796 },
borlanic 0:fbdae7e6d805 3797 "NUMAKER_PFM_NANO130": {
borlanic 0:fbdae7e6d805 3798 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3799 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 3800 "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
borlanic 0:fbdae7e6d805 3801 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3802 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3803 "config": {
borlanic 0:fbdae7e6d805 3804 "gpio-irq-debounce-enable": {
borlanic 0:fbdae7e6d805 3805 "help": "Enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3806 "value": 0
borlanic 0:fbdae7e6d805 3807 },
borlanic 0:fbdae7e6d805 3808 "gpio-irq-debounce-enable-list": {
borlanic 0:fbdae7e6d805 3809 "help": "Comma separated pin list to enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3810 "value": "NC"
borlanic 0:fbdae7e6d805 3811 },
borlanic 0:fbdae7e6d805 3812 "gpio-irq-debounce-clock-source": {
borlanic 0:fbdae7e6d805 3813 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K",
borlanic 0:fbdae7e6d805 3814 "value": "GPIO_DBCLKSRC_IRC10K"
borlanic 0:fbdae7e6d805 3815 },
borlanic 0:fbdae7e6d805 3816 "gpio-irq-debounce-sample-rate": {
borlanic 0:fbdae7e6d805 3817 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768",
borlanic 0:fbdae7e6d805 3818 "value": "GPIO_DBCLKSEL_16"
borlanic 0:fbdae7e6d805 3819 }
borlanic 0:fbdae7e6d805 3820 },
borlanic 0:fbdae7e6d805 3821 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3822 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"","MBED_FAULT_HANDLER_DISABLED"],
borlanic 0:fbdae7e6d805 3823 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
borlanic 0:fbdae7e6d805 3824 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3825 "device_name": "NANO130KE3BN"
borlanic 0:fbdae7e6d805 3826 },
borlanic 0:fbdae7e6d805 3827 "HI2110": {
borlanic 0:fbdae7e6d805 3828 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3829 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3830 "default_toolchain": "GCC_ARM",
borlanic 0:fbdae7e6d805 3831 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 3832 "extra_labels": ["ublox"],
borlanic 0:fbdae7e6d805 3833 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 3834 "public": false,
borlanic 0:fbdae7e6d805 3835 "target_overrides": {
borlanic 0:fbdae7e6d805 3836 "*": {
borlanic 0:fbdae7e6d805 3837 "core.stdio-flush-at-exit": false
borlanic 0:fbdae7e6d805 3838 }
borlanic 0:fbdae7e6d805 3839 },
borlanic 0:fbdae7e6d805 3840 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 3841 "default_lib": "std",
borlanic 0:fbdae7e6d805 3842 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 3843 },
borlanic 0:fbdae7e6d805 3844 "SARA_NBIOT": {
borlanic 0:fbdae7e6d805 3845 "inherits": ["HI2110"],
borlanic 0:fbdae7e6d805 3846 "extra_labels": ["ublox", "HI2110"],
borlanic 0:fbdae7e6d805 3847 "public": false
borlanic 0:fbdae7e6d805 3848 },
borlanic 0:fbdae7e6d805 3849 "SARA_NBIOT_EVK": {
borlanic 0:fbdae7e6d805 3850 "inherits": ["SARA_NBIOT"],
borlanic 0:fbdae7e6d805 3851 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
borlanic 0:fbdae7e6d805 3852 },
borlanic 0:fbdae7e6d805 3853 "REALTEK_RTL8195AM": {
borlanic 0:fbdae7e6d805 3854 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3855 "core": "Cortex-M3",
borlanic 0:fbdae7e6d805 3856 "default_toolchain": "GCC_ARM",
borlanic 0:fbdae7e6d805 3857 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3858 "detect_code": ["4600"],
borlanic 0:fbdae7e6d805 3859 "extra_labels": ["Realtek", "AMEBA", "RTL8195A"],
borlanic 0:fbdae7e6d805 3860 "macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS","MBED_FAULT_HANDLER_DISABLED"],
borlanic 0:fbdae7e6d805 3861 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 3862 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "TRNG", "EMAC", "FLASH"],
borlanic 0:fbdae7e6d805 3863 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 3864 "post_binary_hook": {
borlanic 0:fbdae7e6d805 3865 "function": "RTL8195ACode.binary_hook",
borlanic 0:fbdae7e6d805 3866 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
borlanic 0:fbdae7e6d805 3867 },
borlanic 0:fbdae7e6d805 3868 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 3869 },
borlanic 0:fbdae7e6d805 3870 "VBLUNO51_LEGACY": {
borlanic 0:fbdae7e6d805 3871 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3872 "inherits": ["MCU_NRF51_32K"],
borlanic 0:fbdae7e6d805 3873 "detect_code": ["C006"],
borlanic 0:fbdae7e6d805 3874 "overrides": {"uart_hwfc": 0},
borlanic 0:fbdae7e6d805 3875 "extra_labels_add": ["VBLUNO51"]
borlanic 0:fbdae7e6d805 3876 },
borlanic 0:fbdae7e6d805 3877 "VBLUNO51_BOOT": {
borlanic 0:fbdae7e6d805 3878 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3879 "inherits": ["MCU_NRF51_32K_BOOT"],
borlanic 0:fbdae7e6d805 3880 "detect_code": ["C006"],
borlanic 0:fbdae7e6d805 3881 "overrides": {"uart_hwfc": 0},
borlanic 0:fbdae7e6d805 3882 "extra_labels_add": ["VBLUNO51"],
borlanic 0:fbdae7e6d805 3883 "macros_add": ["TARGET_VBLUNO51"]
borlanic 0:fbdae7e6d805 3884 },
borlanic 0:fbdae7e6d805 3885 "VBLUNO51_OTA": {
borlanic 0:fbdae7e6d805 3886 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3887 "inherits": ["MCU_NRF51_32K_OTA"],
borlanic 0:fbdae7e6d805 3888 "detect_code": ["C006"],
borlanic 0:fbdae7e6d805 3889 "overrides": {"uart_hwfc": 0},
borlanic 0:fbdae7e6d805 3890 "extra_labels_add": ["VBLUNO51"],
borlanic 0:fbdae7e6d805 3891 "macros_add": ["TARGET_VBLUNO51"]
borlanic 0:fbdae7e6d805 3892 },
borlanic 0:fbdae7e6d805 3893 "VBLUNO51": {
borlanic 0:fbdae7e6d805 3894 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3895 "inherits": ["MCU_NRF51_32K_UNIFIED"],
borlanic 0:fbdae7e6d805 3896 "detect_code": ["C006"],
borlanic 0:fbdae7e6d805 3897 "overrides": {"uart_hwfc": 0},
borlanic 0:fbdae7e6d805 3898 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
borlanic 0:fbdae7e6d805 3899 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 3900 "device_name": "nRF51822_xxAC"
borlanic 0:fbdae7e6d805 3901 },
borlanic 0:fbdae7e6d805 3902 "DISCO_L496AG": {
borlanic 0:fbdae7e6d805 3903 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 3904 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3905 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3906 "extra_labels_add": ["STM32L4", "STM32L496AG", "STM32L496xG"],
borlanic 0:fbdae7e6d805 3907 "config": {
borlanic 0:fbdae7e6d805 3908 "clock_source": {
borlanic 0:fbdae7e6d805 3909 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 3910 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 3911 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3912 },
borlanic 0:fbdae7e6d805 3913 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 3914 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 3915 "value": 1
borlanic 0:fbdae7e6d805 3916 }
borlanic 0:fbdae7e6d805 3917 },
borlanic 0:fbdae7e6d805 3918 "detect_code": ["0822"],
borlanic 0:fbdae7e6d805 3919 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 3920 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3921 "device_name": "STM32L496AG"
borlanic 0:fbdae7e6d805 3922 },
borlanic 0:fbdae7e6d805 3923 "NUCLEO_L496ZG": {
borlanic 0:fbdae7e6d805 3924 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 3925 "supported_form_factors": ["ARDUINO", "MORPHO"],
borlanic 0:fbdae7e6d805 3926 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3927 "extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"],
borlanic 0:fbdae7e6d805 3928 "config": {
borlanic 0:fbdae7e6d805 3929 "clock_source": {
borlanic 0:fbdae7e6d805 3930 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
borlanic 0:fbdae7e6d805 3931 "value": "USE_PLL_MSI",
borlanic 0:fbdae7e6d805 3932 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 3933 },
borlanic 0:fbdae7e6d805 3934 "lowpowertimer_lptim": {
borlanic 0:fbdae7e6d805 3935 "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
borlanic 0:fbdae7e6d805 3936 "value": 1
borlanic 0:fbdae7e6d805 3937 }
borlanic 0:fbdae7e6d805 3938 },
borlanic 0:fbdae7e6d805 3939 "detect_code": ["0823"],
borlanic 0:fbdae7e6d805 3940 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
borlanic 0:fbdae7e6d805 3941 "release_versions": ["2", "5"],
borlanic 0:fbdae7e6d805 3942 "device_name": "STM32L496ZG"
borlanic 0:fbdae7e6d805 3943 },
borlanic 0:fbdae7e6d805 3944 "NUCLEO_L496ZG_P": {
borlanic 0:fbdae7e6d805 3945 "inherits": ["NUCLEO_L496ZG"],
borlanic 0:fbdae7e6d805 3946 "detect_code": ["0828"]
borlanic 0:fbdae7e6d805 3947 },
borlanic 0:fbdae7e6d805 3948 "VBLUNO52": {
borlanic 0:fbdae7e6d805 3949 "supported_form_factors": ["ARDUINO"],
borlanic 0:fbdae7e6d805 3950 "inherits": ["MCU_NRF52832"],
borlanic 0:fbdae7e6d805 3951 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3952 "device_name": "nRF52832_xxAA"
borlanic 0:fbdae7e6d805 3953 },
borlanic 0:fbdae7e6d805 3954 "NUMAKER_PFM_M487": {
borlanic 0:fbdae7e6d805 3955 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 3956 "default_toolchain": "ARM",
borlanic 0:fbdae7e6d805 3957 "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"],
borlanic 0:fbdae7e6d805 3958 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3959 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
borlanic 0:fbdae7e6d805 3960 "config": {
borlanic 0:fbdae7e6d805 3961 "gpio-irq-debounce-enable": {
borlanic 0:fbdae7e6d805 3962 "help": "Enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3963 "value": 0
borlanic 0:fbdae7e6d805 3964 },
borlanic 0:fbdae7e6d805 3965 "gpio-irq-debounce-enable-list": {
borlanic 0:fbdae7e6d805 3966 "help": "Comma separated pin list to enable GPIO IRQ debounce",
borlanic 0:fbdae7e6d805 3967 "value": "NC"
borlanic 0:fbdae7e6d805 3968 },
borlanic 0:fbdae7e6d805 3969 "gpio-irq-debounce-clock-source": {
borlanic 0:fbdae7e6d805 3970 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
borlanic 0:fbdae7e6d805 3971 "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
borlanic 0:fbdae7e6d805 3972 },
borlanic 0:fbdae7e6d805 3973 "gpio-irq-debounce-sample-rate": {
borlanic 0:fbdae7e6d805 3974 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
borlanic 0:fbdae7e6d805 3975 "value": "GPIO_DBCTL_DBCLKSEL_16"
borlanic 0:fbdae7e6d805 3976 },
borlanic 0:fbdae7e6d805 3977 "usb-device-hsusbd": {
borlanic 0:fbdae7e6d805 3978 "help": "Select high-speed USB device or not",
borlanic 0:fbdae7e6d805 3979 "value": 1
borlanic 0:fbdae7e6d805 3980 },
borlanic 0:fbdae7e6d805 3981 "ctrl01-enable": {
borlanic 0:fbdae7e6d805 3982 "help": "Enable control_01",
borlanic 0:fbdae7e6d805 3983 "value": 0
borlanic 0:fbdae7e6d805 3984 }
borlanic 0:fbdae7e6d805 3985 },
borlanic 0:fbdae7e6d805 3986 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3987 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
borlanic 0:fbdae7e6d805 3988 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"],
borlanic 0:fbdae7e6d805 3989 "features": ["LWIP"],
borlanic 0:fbdae7e6d805 3990 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 3991 "device_name": "M487JIDAE",
borlanic 0:fbdae7e6d805 3992 "bootloader_supported": true
borlanic 0:fbdae7e6d805 3993 },
borlanic 0:fbdae7e6d805 3994 "TMPM066": {
borlanic 0:fbdae7e6d805 3995 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 3996 "core": "Cortex-M0",
borlanic 0:fbdae7e6d805 3997 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 3998 "extra_labels": ["TOSHIBA"],
borlanic 0:fbdae7e6d805 3999 "macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
borlanic 0:fbdae7e6d805 4000 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 4001 "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"],
borlanic 0:fbdae7e6d805 4002 "device_name": "TMPM066FWUG",
borlanic 0:fbdae7e6d805 4003 "detect_code": ["7011"],
borlanic 0:fbdae7e6d805 4004 "release_versions": ["5"]
borlanic 0:fbdae7e6d805 4005 },
borlanic 0:fbdae7e6d805 4006 "SAKURAIO_EVB_01": {
borlanic 0:fbdae7e6d805 4007 "inherits": ["FAMILY_STM32"],
borlanic 0:fbdae7e6d805 4008 "supported_form_factors": [],
borlanic 0:fbdae7e6d805 4009 "core": "Cortex-M4F",
borlanic 0:fbdae7e6d805 4010 "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
borlanic 0:fbdae7e6d805 4011 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
borlanic 0:fbdae7e6d805 4012 "config": {
borlanic 0:fbdae7e6d805 4013 "clock_source": {
borlanic 0:fbdae7e6d805 4014 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
borlanic 0:fbdae7e6d805 4015 "value": "USE_PLL_HSI",
borlanic 0:fbdae7e6d805 4016 "macro_name": "CLOCK_SOURCE"
borlanic 0:fbdae7e6d805 4017 }
borlanic 0:fbdae7e6d805 4018 },
borlanic 0:fbdae7e6d805 4019 "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
borlanic 0:fbdae7e6d805 4020 "release_versions": ["2"],
borlanic 0:fbdae7e6d805 4021 "device_name": "STM32F411RE"
borlanic 0:fbdae7e6d805 4022 },
borlanic 0:fbdae7e6d805 4023 "TMPM46B": {
borlanic 0:fbdae7e6d805 4024 "inherits": ["Target"],
borlanic 0:fbdae7e6d805 4025 "core": "Cortex-M4",
borlanic 0:fbdae7e6d805 4026 "is_disk_virtual": true,
borlanic 0:fbdae7e6d805 4027 "extra_labels": ["TOSHIBA"],
borlanic 0:fbdae7e6d805 4028 "macros": ["__TMPM46B__"],
borlanic 0:fbdae7e6d805 4029 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
borlanic 0:fbdae7e6d805 4030 "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "I2C", "STDIO_MESSAGES", "TRNG", "FLASH", "SLEEP"],
borlanic 0:fbdae7e6d805 4031 "device_name": "TMPM46BF10FG",
borlanic 0:fbdae7e6d805 4032 "detect_code": ["7013"],
borlanic 0:fbdae7e6d805 4033 "release_versions": ["5"],
borlanic 0:fbdae7e6d805 4034 "bootloader_supported": true
borlanic 0:fbdae7e6d805 4035 }
borlanic 0:fbdae7e6d805 4036 }