Nicolas Borla
/
BBR_1Ebene
BBR 1 Ebene
mbed-os/rtos/Kernel.cpp@0:fbdae7e6d805, 2018-05-14 (annotated)
- Committer:
- borlanic
- Date:
- Mon May 14 11:29:06 2018 +0000
- Revision:
- 0:fbdae7e6d805
BBR
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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borlanic | 0:fbdae7e6d805 | 1 | /* mbed Microcontroller Library |
borlanic | 0:fbdae7e6d805 | 2 | * Copyright (c) 2017 ARM Limited |
borlanic | 0:fbdae7e6d805 | 3 | * |
borlanic | 0:fbdae7e6d805 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
borlanic | 0:fbdae7e6d805 | 5 | * of this software and associated documentation files (the "Software"), to deal |
borlanic | 0:fbdae7e6d805 | 6 | * in the Software without restriction, including without limitation the rights |
borlanic | 0:fbdae7e6d805 | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
borlanic | 0:fbdae7e6d805 | 8 | * copies of the Software, and to permit persons to whom the Software is |
borlanic | 0:fbdae7e6d805 | 9 | * furnished to do so, subject to the following conditions: |
borlanic | 0:fbdae7e6d805 | 10 | * |
borlanic | 0:fbdae7e6d805 | 11 | * The above copyright notice and this permission notice shall be included in |
borlanic | 0:fbdae7e6d805 | 12 | * all copies or substantial portions of the Software. |
borlanic | 0:fbdae7e6d805 | 13 | * |
borlanic | 0:fbdae7e6d805 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
borlanic | 0:fbdae7e6d805 | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
borlanic | 0:fbdae7e6d805 | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
borlanic | 0:fbdae7e6d805 | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
borlanic | 0:fbdae7e6d805 | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
borlanic | 0:fbdae7e6d805 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
borlanic | 0:fbdae7e6d805 | 20 | * SOFTWARE. |
borlanic | 0:fbdae7e6d805 | 21 | */ |
borlanic | 0:fbdae7e6d805 | 22 | |
borlanic | 0:fbdae7e6d805 | 23 | #include "rtos/Kernel.h" |
borlanic | 0:fbdae7e6d805 | 24 | |
borlanic | 0:fbdae7e6d805 | 25 | #include "mbed.h" |
borlanic | 0:fbdae7e6d805 | 26 | |
borlanic | 0:fbdae7e6d805 | 27 | namespace rtos { |
borlanic | 0:fbdae7e6d805 | 28 | |
borlanic | 0:fbdae7e6d805 | 29 | uint64_t Kernel::get_ms_count() { |
borlanic | 0:fbdae7e6d805 | 30 | // CMSIS-RTOS 2.1.0 and 2.1.1 differ in the time type. We assume |
borlanic | 0:fbdae7e6d805 | 31 | // our header at least matches the implementation, so we don't try looking |
borlanic | 0:fbdae7e6d805 | 32 | // at the run-time version report. (There's no compile-time version report) |
borlanic | 0:fbdae7e6d805 | 33 | |
borlanic | 0:fbdae7e6d805 | 34 | // 2.1.0 uint64_t osKernelGetTickCount(void), not documented as callable from ISR (but RTX does allow) |
borlanic | 0:fbdae7e6d805 | 35 | // 2.1.1 uint32_t osKernelGetTickCount(void), callable from ISR |
borlanic | 0:fbdae7e6d805 | 36 | // 2.1.x who knows? We assume could go back to uint64_t |
borlanic | 0:fbdae7e6d805 | 37 | if (sizeof osKernelGetTickCount() == sizeof(uint64_t)) { |
borlanic | 0:fbdae7e6d805 | 38 | return osKernelGetTickCount(); |
borlanic | 0:fbdae7e6d805 | 39 | } else /* assume 32-bit */ { |
borlanic | 0:fbdae7e6d805 | 40 | // Based on suggestion in CMSIS-RTOS 2.1.1 docs, but with reentrancy |
borlanic | 0:fbdae7e6d805 | 41 | // protection for the tick memory. We use critical section rather than a |
borlanic | 0:fbdae7e6d805 | 42 | // mutex, as hopefully this method can be callable from interrupt later - |
borlanic | 0:fbdae7e6d805 | 43 | // only thing currently preventing it is that pre CMSIS RTOS 2.1.1, it's |
borlanic | 0:fbdae7e6d805 | 44 | // not defined as safe. |
borlanic | 0:fbdae7e6d805 | 45 | // We assume this is called multiple times per 32-bit wrap period (49 days). |
borlanic | 0:fbdae7e6d805 | 46 | static uint32_t tick_h, tick_l; |
borlanic | 0:fbdae7e6d805 | 47 | |
borlanic | 0:fbdae7e6d805 | 48 | core_util_critical_section_enter(); |
borlanic | 0:fbdae7e6d805 | 49 | // The 2.1.1 API says this is legal from an ISR - we assume this means |
borlanic | 0:fbdae7e6d805 | 50 | // it's also legal with interrupts disabled. RTX implementation kind |
borlanic | 0:fbdae7e6d805 | 51 | // of conflates the two. |
borlanic | 0:fbdae7e6d805 | 52 | uint32_t tick32 = osKernelGetTickCount(); |
borlanic | 0:fbdae7e6d805 | 53 | if (tick32 < tick_l) { |
borlanic | 0:fbdae7e6d805 | 54 | tick_h++; |
borlanic | 0:fbdae7e6d805 | 55 | } |
borlanic | 0:fbdae7e6d805 | 56 | tick_l = tick32; |
borlanic | 0:fbdae7e6d805 | 57 | uint64_t ret = ((uint64_t) tick_h << 32) | tick_l; |
borlanic | 0:fbdae7e6d805 | 58 | core_util_critical_section_exit(); |
borlanic | 0:fbdae7e6d805 | 59 | return ret; |
borlanic | 0:fbdae7e6d805 | 60 | } |
borlanic | 0:fbdae7e6d805 | 61 | } |
borlanic | 0:fbdae7e6d805 | 62 | |
borlanic | 0:fbdae7e6d805 | 63 | } |