max32630fthr quad spi , unexpected spi behavior

Committer:
boonshen
Date:
Tue Mar 13 21:12:00 2018 +0000
Revision:
0:a35c40f49345
MAX32630FTHR QuadSPI test

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boonshen 0:a35c40f49345 1 /* mbed Microcontroller Library
boonshen 0:a35c40f49345 2 * Copyright (c) 2006-2013 ARM Limited
boonshen 0:a35c40f49345 3 *
boonshen 0:a35c40f49345 4 * Licensed under the Apache License, Version 2.0 (the "License");
boonshen 0:a35c40f49345 5 * you may not use this file except in compliance with the License.
boonshen 0:a35c40f49345 6 * You may obtain a copy of the License at
boonshen 0:a35c40f49345 7 *
boonshen 0:a35c40f49345 8 * http://www.apache.org/licenses/LICENSE-2.0
boonshen 0:a35c40f49345 9 *
boonshen 0:a35c40f49345 10 * Unless required by applicable law or agreed to in writing, software
boonshen 0:a35c40f49345 11 * distributed under the License is distributed on an "AS IS" BASIS,
boonshen 0:a35c40f49345 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
boonshen 0:a35c40f49345 13 * See the License for the specific language governing permissions and
boonshen 0:a35c40f49345 14 * limitations under the License.
boonshen 0:a35c40f49345 15 */
boonshen 0:a35c40f49345 16 #include "drivers/SPI.h"
boonshen 0:a35c40f49345 17 #include "platform/mbed_critical.h"
boonshen 0:a35c40f49345 18
boonshen 0:a35c40f49345 19 #if DEVICE_SPI_ASYNCH
boonshen 0:a35c40f49345 20 #include "platform/mbed_sleep.h"
boonshen 0:a35c40f49345 21 #endif
boonshen 0:a35c40f49345 22
boonshen 0:a35c40f49345 23 #if DEVICE_SPI
boonshen 0:a35c40f49345 24
boonshen 0:a35c40f49345 25 namespace mbed {
boonshen 0:a35c40f49345 26
boonshen 0:a35c40f49345 27 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 28 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
boonshen 0:a35c40f49345 29 #endif
boonshen 0:a35c40f49345 30
boonshen 0:a35c40f49345 31 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
boonshen 0:a35c40f49345 32 _spi(),
boonshen 0:a35c40f49345 33 #if DEVICE_SPI_ASYNCH
boonshen 0:a35c40f49345 34 _irq(this),
boonshen 0:a35c40f49345 35 _usage(DMA_USAGE_NEVER),
boonshen 0:a35c40f49345 36 #endif
boonshen 0:a35c40f49345 37 _bits(8),
boonshen 0:a35c40f49345 38 _mode(0),
boonshen 0:a35c40f49345 39 _hz(1000000),
boonshen 0:a35c40f49345 40 _write_fill(SPI_FILL_CHAR) {
boonshen 0:a35c40f49345 41 // No lock needed in the constructor
boonshen 0:a35c40f49345 42
boonshen 0:a35c40f49345 43 spi_init(&_spi, mosi, miso, sclk, ssel);
boonshen 0:a35c40f49345 44 _acquire();
boonshen 0:a35c40f49345 45 }
boonshen 0:a35c40f49345 46
boonshen 0:a35c40f49345 47 void SPI::format(int bits, int mode) {
boonshen 0:a35c40f49345 48 lock();
boonshen 0:a35c40f49345 49 _bits = bits;
boonshen 0:a35c40f49345 50 _mode = mode;
boonshen 0:a35c40f49345 51 // If changing format while you are the owner than just
boonshen 0:a35c40f49345 52 // update format, but if owner is changed than even frequency should be
boonshen 0:a35c40f49345 53 // updated which is done by acquire.
boonshen 0:a35c40f49345 54 if (_owner == this) {
boonshen 0:a35c40f49345 55 spi_format(&_spi, _bits, _mode, 0);
boonshen 0:a35c40f49345 56 } else {
boonshen 0:a35c40f49345 57 _acquire();
boonshen 0:a35c40f49345 58 }
boonshen 0:a35c40f49345 59 unlock();
boonshen 0:a35c40f49345 60 }
boonshen 0:a35c40f49345 61
boonshen 0:a35c40f49345 62 void SPI::frequency(int hz) {
boonshen 0:a35c40f49345 63 lock();
boonshen 0:a35c40f49345 64 _hz = hz;
boonshen 0:a35c40f49345 65 // If changing format while you are the owner than just
boonshen 0:a35c40f49345 66 // update frequency, but if owner is changed than even frequency should be
boonshen 0:a35c40f49345 67 // updated which is done by acquire.
boonshen 0:a35c40f49345 68 if (_owner == this) {
boonshen 0:a35c40f49345 69 spi_frequency(&_spi, _hz);
boonshen 0:a35c40f49345 70 } else {
boonshen 0:a35c40f49345 71 _acquire();
boonshen 0:a35c40f49345 72 }
boonshen 0:a35c40f49345 73 unlock();
boonshen 0:a35c40f49345 74 }
boonshen 0:a35c40f49345 75
boonshen 0:a35c40f49345 76 SPI* SPI::_owner = NULL;
boonshen 0:a35c40f49345 77 SingletonPtr<PlatformMutex> SPI::_mutex;
boonshen 0:a35c40f49345 78
boonshen 0:a35c40f49345 79 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
boonshen 0:a35c40f49345 80 void SPI::aquire() {
boonshen 0:a35c40f49345 81 lock();
boonshen 0:a35c40f49345 82 if (_owner != this) {
boonshen 0:a35c40f49345 83 spi_format(&_spi, _bits, _mode, 0);
boonshen 0:a35c40f49345 84 spi_frequency(&_spi, _hz);
boonshen 0:a35c40f49345 85 _owner = this;
boonshen 0:a35c40f49345 86 }
boonshen 0:a35c40f49345 87 unlock();
boonshen 0:a35c40f49345 88 }
boonshen 0:a35c40f49345 89
boonshen 0:a35c40f49345 90 // Note: Private function with no locking
boonshen 0:a35c40f49345 91 void SPI::_acquire() {
boonshen 0:a35c40f49345 92 if (_owner != this) {
boonshen 0:a35c40f49345 93 spi_format(&_spi, _bits, _mode, 0);
boonshen 0:a35c40f49345 94 spi_frequency(&_spi, _hz);
boonshen 0:a35c40f49345 95 _owner = this;
boonshen 0:a35c40f49345 96 }
boonshen 0:a35c40f49345 97 }
boonshen 0:a35c40f49345 98
boonshen 0:a35c40f49345 99 int SPI::write(int value) {
boonshen 0:a35c40f49345 100 lock();
boonshen 0:a35c40f49345 101 _acquire();
boonshen 0:a35c40f49345 102 int ret = spi_master_write(&_spi, value);
boonshen 0:a35c40f49345 103 unlock();
boonshen 0:a35c40f49345 104 return ret;
boonshen 0:a35c40f49345 105 }
boonshen 0:a35c40f49345 106
boonshen 0:a35c40f49345 107 int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) {
boonshen 0:a35c40f49345 108 lock();
boonshen 0:a35c40f49345 109 _acquire();
boonshen 0:a35c40f49345 110 int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill);
boonshen 0:a35c40f49345 111 unlock();
boonshen 0:a35c40f49345 112 return ret;
boonshen 0:a35c40f49345 113 }
boonshen 0:a35c40f49345 114
boonshen 0:a35c40f49345 115 void SPI::lock() {
boonshen 0:a35c40f49345 116 _mutex->lock();
boonshen 0:a35c40f49345 117 }
boonshen 0:a35c40f49345 118
boonshen 0:a35c40f49345 119 void SPI::unlock() {
boonshen 0:a35c40f49345 120 _mutex->unlock();
boonshen 0:a35c40f49345 121 }
boonshen 0:a35c40f49345 122
boonshen 0:a35c40f49345 123 void SPI::set_default_write_value(char data) {
boonshen 0:a35c40f49345 124 lock();
boonshen 0:a35c40f49345 125 _write_fill = data;
boonshen 0:a35c40f49345 126 unlock();
boonshen 0:a35c40f49345 127 }
boonshen 0:a35c40f49345 128
boonshen 0:a35c40f49345 129 #if DEVICE_SPI_ASYNCH
boonshen 0:a35c40f49345 130
boonshen 0:a35c40f49345 131 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
boonshen 0:a35c40f49345 132 {
boonshen 0:a35c40f49345 133 if (spi_active(&_spi)) {
boonshen 0:a35c40f49345 134 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
boonshen 0:a35c40f49345 135 }
boonshen 0:a35c40f49345 136 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
boonshen 0:a35c40f49345 137 return 0;
boonshen 0:a35c40f49345 138 }
boonshen 0:a35c40f49345 139
boonshen 0:a35c40f49345 140 void SPI::abort_transfer()
boonshen 0:a35c40f49345 141 {
boonshen 0:a35c40f49345 142 spi_abort_asynch(&_spi);
boonshen 0:a35c40f49345 143 sleep_manager_unlock_deep_sleep();
boonshen 0:a35c40f49345 144 #if TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 145 dequeue_transaction();
boonshen 0:a35c40f49345 146 #endif
boonshen 0:a35c40f49345 147 }
boonshen 0:a35c40f49345 148
boonshen 0:a35c40f49345 149
boonshen 0:a35c40f49345 150 void SPI::clear_transfer_buffer()
boonshen 0:a35c40f49345 151 {
boonshen 0:a35c40f49345 152 #if TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 153 _transaction_buffer.reset();
boonshen 0:a35c40f49345 154 #endif
boonshen 0:a35c40f49345 155 }
boonshen 0:a35c40f49345 156
boonshen 0:a35c40f49345 157 void SPI::abort_all_transfers()
boonshen 0:a35c40f49345 158 {
boonshen 0:a35c40f49345 159 clear_transfer_buffer();
boonshen 0:a35c40f49345 160 abort_transfer();
boonshen 0:a35c40f49345 161 }
boonshen 0:a35c40f49345 162
boonshen 0:a35c40f49345 163 int SPI::set_dma_usage(DMAUsage usage)
boonshen 0:a35c40f49345 164 {
boonshen 0:a35c40f49345 165 if (spi_active(&_spi)) {
boonshen 0:a35c40f49345 166 return -1;
boonshen 0:a35c40f49345 167 }
boonshen 0:a35c40f49345 168 _usage = usage;
boonshen 0:a35c40f49345 169 return 0;
boonshen 0:a35c40f49345 170 }
boonshen 0:a35c40f49345 171
boonshen 0:a35c40f49345 172 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
boonshen 0:a35c40f49345 173 {
boonshen 0:a35c40f49345 174 #if TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 175 transaction_t t;
boonshen 0:a35c40f49345 176
boonshen 0:a35c40f49345 177 t.tx_buffer = const_cast<void *>(tx_buffer);
boonshen 0:a35c40f49345 178 t.tx_length = tx_length;
boonshen 0:a35c40f49345 179 t.rx_buffer = rx_buffer;
boonshen 0:a35c40f49345 180 t.rx_length = rx_length;
boonshen 0:a35c40f49345 181 t.event = event;
boonshen 0:a35c40f49345 182 t.callback = callback;
boonshen 0:a35c40f49345 183 t.width = bit_width;
boonshen 0:a35c40f49345 184 Transaction<SPI> transaction(this, t);
boonshen 0:a35c40f49345 185 if (_transaction_buffer.full()) {
boonshen 0:a35c40f49345 186 return -1; // the buffer is full
boonshen 0:a35c40f49345 187 } else {
boonshen 0:a35c40f49345 188 core_util_critical_section_enter();
boonshen 0:a35c40f49345 189 _transaction_buffer.push(transaction);
boonshen 0:a35c40f49345 190 if (!spi_active(&_spi)) {
boonshen 0:a35c40f49345 191 dequeue_transaction();
boonshen 0:a35c40f49345 192 }
boonshen 0:a35c40f49345 193 core_util_critical_section_exit();
boonshen 0:a35c40f49345 194 return 0;
boonshen 0:a35c40f49345 195 }
boonshen 0:a35c40f49345 196 #else
boonshen 0:a35c40f49345 197 return -1;
boonshen 0:a35c40f49345 198 #endif
boonshen 0:a35c40f49345 199 }
boonshen 0:a35c40f49345 200
boonshen 0:a35c40f49345 201 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
boonshen 0:a35c40f49345 202 {
boonshen 0:a35c40f49345 203 sleep_manager_lock_deep_sleep();
boonshen 0:a35c40f49345 204 _acquire();
boonshen 0:a35c40f49345 205 _callback = callback;
boonshen 0:a35c40f49345 206 _irq.callback(&SPI::irq_handler_asynch);
boonshen 0:a35c40f49345 207 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
boonshen 0:a35c40f49345 208 }
boonshen 0:a35c40f49345 209
boonshen 0:a35c40f49345 210 #if TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 211
boonshen 0:a35c40f49345 212 void SPI::start_transaction(transaction_t *data)
boonshen 0:a35c40f49345 213 {
boonshen 0:a35c40f49345 214 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
boonshen 0:a35c40f49345 215 }
boonshen 0:a35c40f49345 216
boonshen 0:a35c40f49345 217 void SPI::dequeue_transaction()
boonshen 0:a35c40f49345 218 {
boonshen 0:a35c40f49345 219 Transaction<SPI> t;
boonshen 0:a35c40f49345 220 if (_transaction_buffer.pop(t)) {
boonshen 0:a35c40f49345 221 SPI* obj = t.get_object();
boonshen 0:a35c40f49345 222 transaction_t* data = t.get_transaction();
boonshen 0:a35c40f49345 223 obj->start_transaction(data);
boonshen 0:a35c40f49345 224 }
boonshen 0:a35c40f49345 225 }
boonshen 0:a35c40f49345 226
boonshen 0:a35c40f49345 227 #endif
boonshen 0:a35c40f49345 228
boonshen 0:a35c40f49345 229 void SPI::irq_handler_asynch(void)
boonshen 0:a35c40f49345 230 {
boonshen 0:a35c40f49345 231 int event = spi_irq_handler_asynch(&_spi);
boonshen 0:a35c40f49345 232 if (_callback && (event & SPI_EVENT_ALL)) {
boonshen 0:a35c40f49345 233 sleep_manager_unlock_deep_sleep();
boonshen 0:a35c40f49345 234 _callback.call(event & SPI_EVENT_ALL);
boonshen 0:a35c40f49345 235 }
boonshen 0:a35c40f49345 236 #if TRANSACTION_QUEUE_SIZE_SPI
boonshen 0:a35c40f49345 237 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
boonshen 0:a35c40f49345 238 // SPI peripheral is free (event happend), dequeue transaction
boonshen 0:a35c40f49345 239 dequeue_transaction();
boonshen 0:a35c40f49345 240 }
boonshen 0:a35c40f49345 241 #endif
boonshen 0:a35c40f49345 242 }
boonshen 0:a35c40f49345 243
boonshen 0:a35c40f49345 244 #endif
boonshen 0:a35c40f49345 245
boonshen 0:a35c40f49345 246 } // namespace mbed
boonshen 0:a35c40f49345 247
boonshen 0:a35c40f49345 248 #endif