Bresdin O'Malley / MMA8451Q8_v2

Project 1 V1 Submission

Fork of MMA8451Q8_v1 by Bresdin O'Malley

MMA8451Q8.cpp@10:a3c651c98243, 2015-02-16 (annotated)

Committer:
bomalley
Date:
Mon Feb 16 03:22:28 2015 +0000
Revision:
10:a3c651c98243
Parent:
9:84011f06d1ea
Child:
11:f249e23a8514
Project 1 V1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
scohennm 5:5a7293378401 18 // Modify to change full scale gravity range 141207 sc
samux 1:d2630136d51e 19
scohennm 5:5a7293378401 20
scohennm 5:5a7293378401 21 #include "MMA8451Q8.h"
emilmont 0:6149091f755d 22
samux 1:d2630136d51e 23 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 24 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 25 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 26 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 27 #define REG_OUT_Z_MSB 0x05
scohennm 5:5a7293378401 28 #define XYZ_DATA_CFG 0x0E
scohennm 8:993bb9e96a4b 29 // adding tap config register adderesses
scohennm 8:993bb9e96a4b 30 #define REG_PULSE_SRC 0x22
scohennm 8:993bb9e96a4b 31 #define REG_PULSE_CFG 0x21
emilmont 0:6149091f755d 32
bomalley 10:a3c651c98243 33 #define REG_PULSE_THSZ 0x25
bomalley 10:a3c651c98243 34 #define REG_PULSE_TMLT 0x26
bomalley 10:a3c651c98243 35 #define REG_PULSE_LTCY 0x27
bomalley 10:a3c651c98243 36
bomalley 10:a3c651c98243 37 /*#define REG_DATA_THSZ 0x25
bomalley 10:a3c651c98243 38 #define REG_DATA_TMLT 0x26
bomalley 10:a3c651c98243 39 #define REG_DATA_LTCY 0x27*/
bomalley 10:a3c651c98243 40
samux 1:d2630136d51e 41 #define UINT14_MAX 16383
emilmont 0:6149091f755d 42
scohennm 5:5a7293378401 43 #define MAX_2G 0x00
scohennm 5:5a7293378401 44 #define MAX_4G 0x01
scohennm 5:5a7293378401 45 #define MAX_8G 0x02
scohennm 5:5a7293378401 46
scohennm 5:5a7293378401 47 #define NUM_DATA 2
scohennm 5:5a7293378401 48 #define GSCALING 1024.0
scohennm 5:5a7293378401 49 #define ADDRESS_INDEX 0
scohennm 5:5a7293378401 50 #define DATA_INDEX 1
scohennm 5:5a7293378401 51
scohennm 5:5a7293378401 52 float gScaling[3] = {4095.0,2048.0,1024.0}; //scaling for acceleration of gravity values
scohennm 5:5a7293378401 53
emilmont 0:6149091f755d 54 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
emilmont 0:6149091f755d 55 // activate the peripheral
emilmont 0:6149091f755d 56 uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
samux 1:d2630136d51e 57 writeRegs(data, 2);
emilmont 0:6149091f755d 58 }
emilmont 0:6149091f755d 59
emilmont 0:6149091f755d 60 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 61
emilmont 0:6149091f755d 62 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 63 uint8_t who_am_i = 0;
samux 1:d2630136d51e 64 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 65 return who_am_i;
emilmont 0:6149091f755d 66 }
scohennm 5:5a7293378401 67 void MMA8451Q::setGLimit(int gSelect) {
scohennm 5:5a7293378401 68 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00};
scohennm 5:5a7293378401 69 gChosen = gSelect;
scohennm 5:5a7293378401 70 writeRegs(data, NUM_DATA); // put in standby
scohennm 5:5a7293378401 71 data[ADDRESS_INDEX ] = XYZ_DATA_CFG;
scohennm 5:5a7293378401 72 data[DATA_INDEX] = gChosen;
scohennm 5:5a7293378401 73 writeRegs(data, 2);// change g limit
scohennm 5:5a7293378401 74 data[ADDRESS_INDEX ] = REG_CTRL_REG_1;
scohennm 5:5a7293378401 75 data[DATA_INDEX] = 0x01;
scohennm 5:5a7293378401 76 writeRegs(data, 2); // make active
scohennm 5:5a7293378401 77 }
scohennm 8:993bb9e96a4b 78 // add Puse configuratioin register access
scohennm 8:993bb9e96a4b 79 // Also add function prototype to .h file
scohennm 8:993bb9e96a4b 80 void MMA8451Q::setPulseConfiguration(uint8_t latch,uint8_t axisSet) {
scohennm 8:993bb9e96a4b 81 uint8_t configBits;
scohennm 8:993bb9e96a4b 82 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; // put in standby mode
scohennm 8:993bb9e96a4b 83 // set up configuration bits.
scohennm 8:993bb9e96a4b 84 configBits = latch | axisSet;
scohennm 8:993bb9e96a4b 85 writeRegs(data, NUM_DATA); // put in standby
scohennm 8:993bb9e96a4b 86 data[ADDRESS_INDEX ] = REG_PULSE_CFG;
scohennm 8:993bb9e96a4b 87 data[DATA_INDEX] = configBits;
scohennm 8:993bb9e96a4b 88 writeRegs(data, NUM_DATA);
scohennm 8:993bb9e96a4b 89 data[ADDRESS_INDEX ] = REG_CTRL_REG_1; // put back in active mode
scohennm 8:993bb9e96a4b 90 data[DATA_INDEX] = 0x01;
scohennm 8:993bb9e96a4b 91 writeRegs(data, 2); // make active
scohennm 8:993bb9e96a4b 92 }
bomalley 10:a3c651c98243 93
bomalley 9:84011f06d1ea 94 void MMA8451Q::setRegisterInStandby(uint8_t regAddress, uint8_t regData) {
bomalley 9:84011f06d1ea 95 uint8_t configBits;
bomalley 9:84011f06d1ea 96 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; // put in standby mode
bomalley 9:84011f06d1ea 97 // set up configuration bits.
bomalley 9:84011f06d1ea 98 configBits = regData;
bomalley 9:84011f06d1ea 99 writeRegs(data, NUM_DATA); // put in standby
bomalley 9:84011f06d1ea 100 data[ADDRESS_INDEX ] = regAddress;
bomalley 9:84011f06d1ea 101 data[DATA_INDEX] = configBits;
bomalley 9:84011f06d1ea 102 writeRegs(data, NUM_DATA);
bomalley 9:84011f06d1ea 103 data[ADDRESS_INDEX ] = REG_CTRL_REG_1; // put back in active mode
bomalley 9:84011f06d1ea 104 data[DATA_INDEX] = 0x01;
bomalley 9:84011f06d1ea 105 writeRegs(data, 2); // make active
bomalley 9:84011f06d1ea 106 }
bomalley 10:a3c651c98243 107
chris 3:db7126dbd63f 108 float MMA8451Q::getAccX() {
scohennm 5:5a7293378401 109 return (float(getAccAxis(REG_OUT_X_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 110 }
emilmont 0:6149091f755d 111
scohennm 7:ed7e11d269f8 112
chris 3:db7126dbd63f 113 float MMA8451Q::getAccY() {
scohennm 5:5a7293378401 114 return (float(getAccAxis(REG_OUT_Y_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 115 }
emilmont 0:6149091f755d 116
chris 3:db7126dbd63f 117 float MMA8451Q::getAccZ() {
scohennm 5:5a7293378401 118 return (float(getAccAxis(REG_OUT_Z_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 119 }
emilmont 0:6149091f755d 120
chris 3:db7126dbd63f 121 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 122 res[0] = getAccX();
emilmont 0:6149091f755d 123 res[1] = getAccY();
emilmont 0:6149091f755d 124 res[2] = getAccZ();
emilmont 0:6149091f755d 125 }
emilmont 0:6149091f755d 126
emilmont 0:6149091f755d 127 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 128 int16_t acc;
emilmont 0:6149091f755d 129 uint8_t res[2];
samux 1:d2630136d51e 130 readRegs(addr, res, 2);
emilmont 0:6149091f755d 131
emilmont 0:6149091f755d 132 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 133 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 134 acc -= UINT14_MAX;
emilmont 0:6149091f755d 135
emilmont 0:6149091f755d 136 return acc;
emilmont 0:6149091f755d 137 }
emilmont 0:6149091f755d 138
samux 1:d2630136d51e 139 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 140 char t[1] = {addr};
emilmont 0:6149091f755d 141 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 142 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 143 }
emilmont 0:6149091f755d 144
samux 1:d2630136d51e 145 void MMA8451Q::writeRegs(uint8_t * data, int len) {
emilmont 0:6149091f755d 146 m_i2c.write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 147 }