fork to bluetooth account.

Dependencies:   BLE_API mbed-dev-bin nRF51822

Fork of microbit-dal by Ken Ogami

Committer:
kenogami
Date:
Thu Aug 03 17:36:13 2017 +0000
Revision:
79:e4e6ab1c9835
Parent:
1:8aa5cdb4ab67
commit change to library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jonathan Austin 1:8aa5cdb4ab67 1 @ The MIT License (MIT)
Jonathan Austin 1:8aa5cdb4ab67 2
Jonathan Austin 1:8aa5cdb4ab67 3 @ Copyright (c) 2016 British Broadcasting Corporation.
Jonathan Austin 1:8aa5cdb4ab67 4 @ This software is provided by Lancaster University by arrangement with the BBC.
Jonathan Austin 1:8aa5cdb4ab67 5
Jonathan Austin 1:8aa5cdb4ab67 6 @ Permission is hereby granted, free of charge, to any person obtaining a
Jonathan Austin 1:8aa5cdb4ab67 7 @ copy of this software and associated documentation files (the "Software"),
Jonathan Austin 1:8aa5cdb4ab67 8 @ to deal in the Software without restriction, including without limitation
Jonathan Austin 1:8aa5cdb4ab67 9 @ the rights to use, copy, modify, merge, publish, distribute, sublicense,
Jonathan Austin 1:8aa5cdb4ab67 10 @ and/or sell copies of the Software, and to permit persons to whom the
Jonathan Austin 1:8aa5cdb4ab67 11 @ Software is furnished to do so, subject to the following conditions:
Jonathan Austin 1:8aa5cdb4ab67 12
Jonathan Austin 1:8aa5cdb4ab67 13 @ The above copyright notice and this permission notice shall be included in
Jonathan Austin 1:8aa5cdb4ab67 14 @ all copies or substantial portions of the Software.
Jonathan Austin 1:8aa5cdb4ab67 15
Jonathan Austin 1:8aa5cdb4ab67 16 @ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Jonathan Austin 1:8aa5cdb4ab67 17 @ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Jonathan Austin 1:8aa5cdb4ab67 18 @ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Jonathan Austin 1:8aa5cdb4ab67 19 @ THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Jonathan Austin 1:8aa5cdb4ab67 20 @ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
Jonathan Austin 1:8aa5cdb4ab67 21 @ FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
Jonathan Austin 1:8aa5cdb4ab67 22 @ DEALINGS IN THE SOFTWARE.
Jonathan Austin 1:8aa5cdb4ab67 23
Jonathan Austin 1:8aa5cdb4ab67 24 .syntax unified
Jonathan Austin 1:8aa5cdb4ab67 25 .cpu cortex-m0
Jonathan Austin 1:8aa5cdb4ab67 26 .thumb
Jonathan Austin 1:8aa5cdb4ab67 27 .text
Jonathan Austin 1:8aa5cdb4ab67 28 .align 2
Jonathan Austin 1:8aa5cdb4ab67 29
Jonathan Austin 1:8aa5cdb4ab67 30 @ Export our context switching subroutine as a C function for use in mbed
Jonathan Austin 1:8aa5cdb4ab67 31 .global swap_context
Jonathan Austin 1:8aa5cdb4ab67 32 .global save_context
Jonathan Austin 1:8aa5cdb4ab67 33 .global save_register_context
Jonathan Austin 1:8aa5cdb4ab67 34 .global restore_register_context
Jonathan Austin 1:8aa5cdb4ab67 35
Jonathan Austin 1:8aa5cdb4ab67 36 @ R0 Contains a pointer to the TCB of the fibre being scheduled out.
Jonathan Austin 1:8aa5cdb4ab67 37 @ R1 Contains a pointer to the TCB of the fibre being scheduled in.
Jonathan Austin 1:8aa5cdb4ab67 38 @ R2 Contains a pointer to the base of the stack of the fibre being scheduled out.
Jonathan Austin 1:8aa5cdb4ab67 39 @ R3 Contains a pointer to the base of the stack of the fibre being scheduled in.
Jonathan Austin 1:8aa5cdb4ab67 40
Jonathan Austin 1:8aa5cdb4ab67 41 swap_context:
Jonathan Austin 1:8aa5cdb4ab67 42
Jonathan Austin 1:8aa5cdb4ab67 43 @ Write our core registers into the TCB
Jonathan Austin 1:8aa5cdb4ab67 44 @ First, store the general registers
Jonathan Austin 1:8aa5cdb4ab67 45
Jonathan Austin 1:8aa5cdb4ab67 46 @ Skip this is we're given a NULL parameter for the TCB
Jonathan Austin 1:8aa5cdb4ab67 47 CMP R0, #0
Jonathan Austin 1:8aa5cdb4ab67 48 BEQ store_context_complete
Jonathan Austin 1:8aa5cdb4ab67 49
Jonathan Austin 1:8aa5cdb4ab67 50 STR R0, [R0,#0]
Jonathan Austin 1:8aa5cdb4ab67 51 STR R1, [R0,#4]
Jonathan Austin 1:8aa5cdb4ab67 52 STR R2, [R0,#8]
Jonathan Austin 1:8aa5cdb4ab67 53 STR R3, [R0,#12]
Jonathan Austin 1:8aa5cdb4ab67 54 STR R4, [R0,#16]
Jonathan Austin 1:8aa5cdb4ab67 55 STR R5, [R0,#20]
Jonathan Austin 1:8aa5cdb4ab67 56 STR R6, [R0,#24]
Jonathan Austin 1:8aa5cdb4ab67 57 STR R7, [R0,#28]
Jonathan Austin 1:8aa5cdb4ab67 58
Jonathan Austin 1:8aa5cdb4ab67 59 @ Now the high general purpose registers
Jonathan Austin 1:8aa5cdb4ab67 60 MOV R4, R8
Jonathan Austin 1:8aa5cdb4ab67 61 STR R4, [R0,#32]
Jonathan Austin 1:8aa5cdb4ab67 62 MOV R4, R9
Jonathan Austin 1:8aa5cdb4ab67 63 STR R4, [R0,#36]
Jonathan Austin 1:8aa5cdb4ab67 64 MOV R4, R10
Jonathan Austin 1:8aa5cdb4ab67 65 STR R4, [R0,#40]
Jonathan Austin 1:8aa5cdb4ab67 66 MOV R4, R11
Jonathan Austin 1:8aa5cdb4ab67 67 STR R4, [R0,#44]
Jonathan Austin 1:8aa5cdb4ab67 68 MOV R4, R12
Jonathan Austin 1:8aa5cdb4ab67 69 STR R4, [R0,#48]
Jonathan Austin 1:8aa5cdb4ab67 70
Jonathan Austin 1:8aa5cdb4ab67 71 @ Now the Stack and Link Register.
Jonathan Austin 1:8aa5cdb4ab67 72 @ As this context is only intended for use with a fiber scheduler,
Jonathan Austin 1:8aa5cdb4ab67 73 @ we don't need the PC.
Jonathan Austin 1:8aa5cdb4ab67 74 MOV R6, SP
Jonathan Austin 1:8aa5cdb4ab67 75 STR R6, [R0,#52]
Jonathan Austin 1:8aa5cdb4ab67 76 MOV R4, LR
Jonathan Austin 1:8aa5cdb4ab67 77 STR R4, [R0,#56]
Jonathan Austin 1:8aa5cdb4ab67 78
Jonathan Austin 1:8aa5cdb4ab67 79 store_context_complete:
Jonathan Austin 1:8aa5cdb4ab67 80 @ Finally, Copy the stack. We do this to reduce RAM footprint, as stack is usually very small at the point
Jonathan Austin 1:8aa5cdb4ab67 81 @ of scheduling, but we need a lot of capacity for interrupt handling and other functions.
Jonathan Austin 1:8aa5cdb4ab67 82
Jonathan Austin 1:8aa5cdb4ab67 83 @ Skip this is we're given a NULL parameter for the stack.
Jonathan Austin 1:8aa5cdb4ab67 84 CMP R2, #0
Jonathan Austin 1:8aa5cdb4ab67 85 BEQ store_stack_complete
Jonathan Austin 1:8aa5cdb4ab67 86
Jonathan Austin 1:8aa5cdb4ab67 87 LDR R4, [R0,#60] @ Load R4 with the fiber's defined stack_base.
Jonathan Austin 1:8aa5cdb4ab67 88 store_stack:
Jonathan Austin 1:8aa5cdb4ab67 89 SUBS R4, #4
Jonathan Austin 1:8aa5cdb4ab67 90 SUBS R2, #4
Jonathan Austin 1:8aa5cdb4ab67 91
Jonathan Austin 1:8aa5cdb4ab67 92 LDR R5, [R4]
Jonathan Austin 1:8aa5cdb4ab67 93 STR R5, [R2]
Jonathan Austin 1:8aa5cdb4ab67 94
Jonathan Austin 1:8aa5cdb4ab67 95 CMP R4, R6
Jonathan Austin 1:8aa5cdb4ab67 96 BNE store_stack
Jonathan Austin 1:8aa5cdb4ab67 97
Jonathan Austin 1:8aa5cdb4ab67 98 store_stack_complete:
Jonathan Austin 1:8aa5cdb4ab67 99
Jonathan Austin 1:8aa5cdb4ab67 100 @
Jonathan Austin 1:8aa5cdb4ab67 101 @ Now page in the new context.
Jonathan Austin 1:8aa5cdb4ab67 102 @ Update all registers except the PC. We can also safely ignore the STATUS register, as we're just a fiber scheduler.
Jonathan Austin 1:8aa5cdb4ab67 103 @
Jonathan Austin 1:8aa5cdb4ab67 104 LDR R4, [R1, #56]
Jonathan Austin 1:8aa5cdb4ab67 105 MOV LR, R4
Jonathan Austin 1:8aa5cdb4ab67 106 LDR R6, [R1, #52]
Jonathan Austin 1:8aa5cdb4ab67 107 MOV SP, R6
Jonathan Austin 1:8aa5cdb4ab67 108
Jonathan Austin 1:8aa5cdb4ab67 109 @ Copy the stack in.
Jonathan Austin 1:8aa5cdb4ab67 110 @ n.b. we do this after setting the SP to make comparisons easier.
Jonathan Austin 1:8aa5cdb4ab67 111
Jonathan Austin 1:8aa5cdb4ab67 112 @ Skip this is we're given a NULL parameter for the stack.
Jonathan Austin 1:8aa5cdb4ab67 113 CMP R3, #0
Jonathan Austin 1:8aa5cdb4ab67 114 BEQ restore_stack_complete
Jonathan Austin 1:8aa5cdb4ab67 115
Jonathan Austin 1:8aa5cdb4ab67 116 LDR R4, [R1,#60] @ Load R4 with the fiber's defined stack_base.
Jonathan Austin 1:8aa5cdb4ab67 117
Jonathan Austin 1:8aa5cdb4ab67 118 restore_stack:
Jonathan Austin 1:8aa5cdb4ab67 119 SUBS R4, #4
Jonathan Austin 1:8aa5cdb4ab67 120 SUBS R3, #4
Jonathan Austin 1:8aa5cdb4ab67 121
Jonathan Austin 1:8aa5cdb4ab67 122 LDR R5, [R3]
Jonathan Austin 1:8aa5cdb4ab67 123 STR R5, [R4]
Jonathan Austin 1:8aa5cdb4ab67 124
Jonathan Austin 1:8aa5cdb4ab67 125 CMP R4, R6
Jonathan Austin 1:8aa5cdb4ab67 126 BNE restore_stack
Jonathan Austin 1:8aa5cdb4ab67 127
Jonathan Austin 1:8aa5cdb4ab67 128 restore_stack_complete:
Jonathan Austin 1:8aa5cdb4ab67 129 LDR R4, [R1, #48]
Jonathan Austin 1:8aa5cdb4ab67 130 MOV R12, R4
Jonathan Austin 1:8aa5cdb4ab67 131 LDR R4, [R1, #44]
Jonathan Austin 1:8aa5cdb4ab67 132 MOV R11, R4
Jonathan Austin 1:8aa5cdb4ab67 133 LDR R4, [R1, #40]
Jonathan Austin 1:8aa5cdb4ab67 134 MOV R10, R4
Jonathan Austin 1:8aa5cdb4ab67 135 LDR R4, [R1, #36]
Jonathan Austin 1:8aa5cdb4ab67 136 MOV R9, R4
Jonathan Austin 1:8aa5cdb4ab67 137 LDR R4, [R1, #32]
Jonathan Austin 1:8aa5cdb4ab67 138 MOV R8, R4
Jonathan Austin 1:8aa5cdb4ab67 139
Jonathan Austin 1:8aa5cdb4ab67 140 LDR R7, [R1, #28]
Jonathan Austin 1:8aa5cdb4ab67 141 LDR R6, [R1, #24]
Jonathan Austin 1:8aa5cdb4ab67 142 LDR R5, [R1, #20]
Jonathan Austin 1:8aa5cdb4ab67 143 LDR R4, [R1, #16]
Jonathan Austin 1:8aa5cdb4ab67 144 LDR R3, [R1, #12]
Jonathan Austin 1:8aa5cdb4ab67 145 LDR R2, [R1, #8]
Jonathan Austin 1:8aa5cdb4ab67 146 LDR R0, [R1, #0]
Jonathan Austin 1:8aa5cdb4ab67 147 LDR R1, [R1, #4]
Jonathan Austin 1:8aa5cdb4ab67 148
Jonathan Austin 1:8aa5cdb4ab67 149 @ Return to caller (scheduler).
Jonathan Austin 1:8aa5cdb4ab67 150 BX LR
Jonathan Austin 1:8aa5cdb4ab67 151
Jonathan Austin 1:8aa5cdb4ab67 152
Jonathan Austin 1:8aa5cdb4ab67 153 @ R0 Contains a pointer to the TCB of the fibre to snapshot
Jonathan Austin 1:8aa5cdb4ab67 154 @ R1 Contains a pointer to the base of the stack of the fibre being snapshotted
Jonathan Austin 1:8aa5cdb4ab67 155
Jonathan Austin 1:8aa5cdb4ab67 156 save_context:
Jonathan Austin 1:8aa5cdb4ab67 157
Jonathan Austin 1:8aa5cdb4ab67 158 @ Write our core registers into the TCB
Jonathan Austin 1:8aa5cdb4ab67 159 @ First, store the general registers
Jonathan Austin 1:8aa5cdb4ab67 160
Jonathan Austin 1:8aa5cdb4ab67 161 STR R0, [R0,#0]
Jonathan Austin 1:8aa5cdb4ab67 162 STR R1, [R0,#4]
Jonathan Austin 1:8aa5cdb4ab67 163 STR R2, [R0,#8]
Jonathan Austin 1:8aa5cdb4ab67 164 STR R3, [R0,#12]
Jonathan Austin 1:8aa5cdb4ab67 165 STR R4, [R0,#16]
Jonathan Austin 1:8aa5cdb4ab67 166 STR R5, [R0,#20]
Jonathan Austin 1:8aa5cdb4ab67 167 STR R6, [R0,#24]
Jonathan Austin 1:8aa5cdb4ab67 168 STR R7, [R0,#28]
Jonathan Austin 1:8aa5cdb4ab67 169
Jonathan Austin 1:8aa5cdb4ab67 170 @ Now the high general purpose registers
Jonathan Austin 1:8aa5cdb4ab67 171 MOV R4, R8
Jonathan Austin 1:8aa5cdb4ab67 172 STR R4, [R0,#32]
Jonathan Austin 1:8aa5cdb4ab67 173 MOV R4, R9
Jonathan Austin 1:8aa5cdb4ab67 174 STR R4, [R0,#36]
Jonathan Austin 1:8aa5cdb4ab67 175 MOV R4, R10
Jonathan Austin 1:8aa5cdb4ab67 176 STR R4, [R0,#40]
Jonathan Austin 1:8aa5cdb4ab67 177 MOV R4, R11
Jonathan Austin 1:8aa5cdb4ab67 178 STR R4, [R0,#44]
Jonathan Austin 1:8aa5cdb4ab67 179 MOV R4, R12
Jonathan Austin 1:8aa5cdb4ab67 180 STR R4, [R0,#48]
Jonathan Austin 1:8aa5cdb4ab67 181
Jonathan Austin 1:8aa5cdb4ab67 182 @ Now the Stack and Link Register.
Jonathan Austin 1:8aa5cdb4ab67 183 @ As this context is only intended for use with a fiber scheduler,
Jonathan Austin 1:8aa5cdb4ab67 184 @ we don't need the PC.
Jonathan Austin 1:8aa5cdb4ab67 185 MOV R6, SP
Jonathan Austin 1:8aa5cdb4ab67 186 STR R6, [R0,#52]
Jonathan Austin 1:8aa5cdb4ab67 187 MOV R4, LR
Jonathan Austin 1:8aa5cdb4ab67 188 STR R4, [R0,#56]
Jonathan Austin 1:8aa5cdb4ab67 189
Jonathan Austin 1:8aa5cdb4ab67 190 @ Finally, Copy the stack. We do this to reduce RAM footprint, as stackis usually very small at the point
Jonathan Austin 1:8aa5cdb4ab67 191 @ of sceduling, but we need a lot of capacity for interrupt handling and other functions.
Jonathan Austin 1:8aa5cdb4ab67 192
Jonathan Austin 1:8aa5cdb4ab67 193 LDR R4, [R0,#60] @ Load R4 with the fiber's defined stack_base.
Jonathan Austin 1:8aa5cdb4ab67 194
Jonathan Austin 1:8aa5cdb4ab67 195 store_stack1:
Jonathan Austin 1:8aa5cdb4ab67 196 SUBS R4, #4
Jonathan Austin 1:8aa5cdb4ab67 197 SUBS R1, #4
Jonathan Austin 1:8aa5cdb4ab67 198
Jonathan Austin 1:8aa5cdb4ab67 199 LDR R5, [R4]
Jonathan Austin 1:8aa5cdb4ab67 200 STR R5, [R1]
Jonathan Austin 1:8aa5cdb4ab67 201
Jonathan Austin 1:8aa5cdb4ab67 202 CMP R4, R6
Jonathan Austin 1:8aa5cdb4ab67 203 BNE store_stack1
Jonathan Austin 1:8aa5cdb4ab67 204
Jonathan Austin 1:8aa5cdb4ab67 205 @ Restore scratch registers.
Jonathan Austin 1:8aa5cdb4ab67 206
Jonathan Austin 1:8aa5cdb4ab67 207 LDR R7, [R0, #28]
Jonathan Austin 1:8aa5cdb4ab67 208 LDR R6, [R0, #24]
Jonathan Austin 1:8aa5cdb4ab67 209 LDR R5, [R0, #20]
Jonathan Austin 1:8aa5cdb4ab67 210 LDR R4, [R0, #16]
Jonathan Austin 1:8aa5cdb4ab67 211
Jonathan Austin 1:8aa5cdb4ab67 212 @ Return to caller (scheduler).
Jonathan Austin 1:8aa5cdb4ab67 213 BX LR
Jonathan Austin 1:8aa5cdb4ab67 214
Jonathan Austin 1:8aa5cdb4ab67 215
Jonathan Austin 1:8aa5cdb4ab67 216 @ R0 Contains a pointer to the TCB of the fiber to snapshot
Jonathan Austin 1:8aa5cdb4ab67 217 save_register_context:
Jonathan Austin 1:8aa5cdb4ab67 218
Jonathan Austin 1:8aa5cdb4ab67 219 @ Write our core registers into the TCB
Jonathan Austin 1:8aa5cdb4ab67 220 @ First, store the general registers
Jonathan Austin 1:8aa5cdb4ab67 221
Jonathan Austin 1:8aa5cdb4ab67 222 STR R0, [R0,#0]
Jonathan Austin 1:8aa5cdb4ab67 223 STR R1, [R0,#4]
Jonathan Austin 1:8aa5cdb4ab67 224 STR R2, [R0,#8]
Jonathan Austin 1:8aa5cdb4ab67 225 STR R3, [R0,#12]
Jonathan Austin 1:8aa5cdb4ab67 226 STR R4, [R0,#16]
Jonathan Austin 1:8aa5cdb4ab67 227 STR R5, [R0,#20]
Jonathan Austin 1:8aa5cdb4ab67 228 STR R6, [R0,#24]
Jonathan Austin 1:8aa5cdb4ab67 229 STR R7, [R0,#28]
Jonathan Austin 1:8aa5cdb4ab67 230
Jonathan Austin 1:8aa5cdb4ab67 231 @ Now the high general purpose registers
Jonathan Austin 1:8aa5cdb4ab67 232 MOV R4, R8
Jonathan Austin 1:8aa5cdb4ab67 233 STR R4, [R0,#32]
Jonathan Austin 1:8aa5cdb4ab67 234 MOV R4, R9
Jonathan Austin 1:8aa5cdb4ab67 235 STR R4, [R0,#36]
Jonathan Austin 1:8aa5cdb4ab67 236 MOV R4, R10
Jonathan Austin 1:8aa5cdb4ab67 237 STR R4, [R0,#40]
Jonathan Austin 1:8aa5cdb4ab67 238 MOV R4, R11
Jonathan Austin 1:8aa5cdb4ab67 239 STR R4, [R0,#44]
Jonathan Austin 1:8aa5cdb4ab67 240 MOV R4, R12
Jonathan Austin 1:8aa5cdb4ab67 241 STR R4, [R0,#48]
Jonathan Austin 1:8aa5cdb4ab67 242
Jonathan Austin 1:8aa5cdb4ab67 243 @ Now the Stack Pointer and Link Register.
Jonathan Austin 1:8aa5cdb4ab67 244 @ As this context is only intended for use with a fiber scheduler,
Jonathan Austin 1:8aa5cdb4ab67 245 @ we don't need the PC.
Jonathan Austin 1:8aa5cdb4ab67 246 MOV R4, SP
Jonathan Austin 1:8aa5cdb4ab67 247 STR R4, [R0,#52]
Jonathan Austin 1:8aa5cdb4ab67 248 MOV R4, LR
Jonathan Austin 1:8aa5cdb4ab67 249 STR R4, [R0,#56]
Jonathan Austin 1:8aa5cdb4ab67 250
Jonathan Austin 1:8aa5cdb4ab67 251 @ Restore scratch registers.
Jonathan Austin 1:8aa5cdb4ab67 252 LDR R4, [R0, #16]
Jonathan Austin 1:8aa5cdb4ab67 253
Jonathan Austin 1:8aa5cdb4ab67 254 @ Return to caller (scheduler).
Jonathan Austin 1:8aa5cdb4ab67 255 BX LR
Jonathan Austin 1:8aa5cdb4ab67 256
Jonathan Austin 1:8aa5cdb4ab67 257
Jonathan Austin 1:8aa5cdb4ab67 258 restore_register_context:
Jonathan Austin 1:8aa5cdb4ab67 259
Jonathan Austin 1:8aa5cdb4ab67 260 @
Jonathan Austin 1:8aa5cdb4ab67 261 @ Now page in the new context.
Jonathan Austin 1:8aa5cdb4ab67 262 @ Update all registers except the PC. We can also safely ignore the STATUS register, as we're just a fiber scheduler.
Jonathan Austin 1:8aa5cdb4ab67 263 @
Jonathan Austin 1:8aa5cdb4ab67 264 LDR R4, [R0, #56]
Jonathan Austin 1:8aa5cdb4ab67 265 MOV LR, R4
Jonathan Austin 1:8aa5cdb4ab67 266 LDR R4, [R0, #52]
Jonathan Austin 1:8aa5cdb4ab67 267 MOV SP, R4
Jonathan Austin 1:8aa5cdb4ab67 268
Jonathan Austin 1:8aa5cdb4ab67 269 @ High registers...
Jonathan Austin 1:8aa5cdb4ab67 270 LDR R4, [R0, #48]
Jonathan Austin 1:8aa5cdb4ab67 271 MOV R12, R4
Jonathan Austin 1:8aa5cdb4ab67 272 LDR R4, [R0, #44]
Jonathan Austin 1:8aa5cdb4ab67 273 MOV R11, R4
Jonathan Austin 1:8aa5cdb4ab67 274 LDR R4, [R0, #40]
Jonathan Austin 1:8aa5cdb4ab67 275 MOV R10, R4
Jonathan Austin 1:8aa5cdb4ab67 276 LDR R4, [R0, #36]
Jonathan Austin 1:8aa5cdb4ab67 277 MOV R9, R4
Jonathan Austin 1:8aa5cdb4ab67 278 LDR R4, [R0, #32]
Jonathan Austin 1:8aa5cdb4ab67 279 MOV R8, R4
Jonathan Austin 1:8aa5cdb4ab67 280
Jonathan Austin 1:8aa5cdb4ab67 281 @ Low registers...
Jonathan Austin 1:8aa5cdb4ab67 282 LDR R7, [R0, #28]
Jonathan Austin 1:8aa5cdb4ab67 283 LDR R6, [R0, #24]
Jonathan Austin 1:8aa5cdb4ab67 284 LDR R5, [R0, #20]
Jonathan Austin 1:8aa5cdb4ab67 285 LDR R4, [R0, #16]
Jonathan Austin 1:8aa5cdb4ab67 286 LDR R3, [R0, #12]
Jonathan Austin 1:8aa5cdb4ab67 287 LDR R2, [R0, #8]
Jonathan Austin 1:8aa5cdb4ab67 288 LDR R0, [R0, #0]
Jonathan Austin 1:8aa5cdb4ab67 289 LDR R1, [R0, #4]
Jonathan Austin 1:8aa5cdb4ab67 290
Jonathan Austin 1:8aa5cdb4ab67 291 @ Return to caller (normally the scheduler).
Jonathan Austin 1:8aa5cdb4ab67 292 BX LR