Lukas Bielesch / DEBUG_F042F6P6

debug tool for STM32F042F6P6

check_2_bit.s@0:98789a3f7363, 2019-04-15 (annotated)

Committer:
bieleluk
Date:
Mon Apr 15 13:00:43 2019 +0000
Revision:
0:98789a3f7363
Child:
24:bc7c4e8f3fe0
Debug tool for STM32F042F6P6

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bieleluk 0:98789a3f7363 1 USART_ISR_Offset EQU 0x1C
bieleluk 0:98789a3f7363 2 USART_TDR_Offset EQU 0x28
bieleluk 0:98789a3f7363 3 USART2 EQU 0x40004400
bieleluk 0:98789a3f7363 4
bieleluk 0:98789a3f7363 5
bieleluk 0:98789a3f7363 6 AREA asm_func, CODE, READONLY
bieleluk 0:98789a3f7363 7 ; Export my_asm function location so that C compiler can find it and link
bieleluk 0:98789a3f7363 8 EXPORT check_2_bit
bieleluk 0:98789a3f7363 9 check_2_bit
bieleluk 0:98789a3f7363 10
bieleluk 0:98789a3f7363 11 PUSH {LR}
bieleluk 0:98789a3f7363 12 ;R0 = GPIOx
bieleluk 0:98789a3f7363 13 ;R1 = offset
bieleluk 0:98789a3f7363 14 ;r2 = pin_number
bieleluk 0:98789a3f7363 15
bieleluk 0:98789a3f7363 16
bieleluk 0:98789a3f7363 17 LDR R3, [R0, R1]
bieleluk 0:98789a3f7363 18
bieleluk 0:98789a3f7363 19 LDR R0, =30
bieleluk 0:98789a3f7363 20 SUBS R0,R2
bieleluk 0:98789a3f7363 21 SUBS R0,R2
bieleluk 0:98789a3f7363 22 LSLS R3,R3,R0
bieleluk 0:98789a3f7363 23 LSRS R3,#30
bieleluk 0:98789a3f7363 24
bieleluk 0:98789a3f7363 25 ;MOVS R1,R3
bieleluk 0:98789a3f7363 26 ;BL PRINT_HEXA
bieleluk 0:98789a3f7363 27 MOVS R0,R3
bieleluk 0:98789a3f7363 28
bieleluk 0:98789a3f7363 29 POP {PC}
bieleluk 0:98789a3f7363 30
bieleluk 0:98789a3f7363 31 ;********************************************
bieleluk 0:98789a3f7363 32 ;* Function: UART_PUTCHAR
bieleluk 0:98789a3f7363 33 ;* Brief:
bieleluk 0:98789a3f7363 34 ;* Input: R0
bieleluk 0:98789a3f7363 35 ;* Output:
bieleluk 0:98789a3f7363 36 ;********************************************
bieleluk 0:98789a3f7363 37 UART_PUTCHAR PROC
bieleluk 0:98789a3f7363 38 PUSH {R0,R1,R2,R3,LR}
bieleluk 0:98789a3f7363 39 LDR R2,=USART2
bieleluk 0:98789a3f7363 40 UT_WAIT_FOR_UART
bieleluk 0:98789a3f7363 41 LDR R1,[R2,#USART_ISR_Offset]; load status register
bieleluk 0:98789a3f7363 42 MOVS R3, #(1 :SHL: 7) ;check TXE (bit 7)
bieleluk 0:98789a3f7363 43 TST R1,R3
bieleluk 0:98789a3f7363 44 BEQ UT_WAIT_FOR_UART ;loop here until ready
bieleluk 0:98789a3f7363 45 STRH R0,[R2,#USART_TDR_Offset] ;transmit buffer is ready, fill it with new value
bieleluk 0:98789a3f7363 46 POP {R0,R1,R2,R3,PC}
bieleluk 0:98789a3f7363 47 ENDP
bieleluk 0:98789a3f7363 48 ;********************************************
bieleluk 0:98789a3f7363 49
bieleluk 0:98789a3f7363 50 ;********************************************
bieleluk 0:98789a3f7363 51 ;* Function: PRINT_DECIMAL
bieleluk 0:98789a3f7363 52 ;* Brief:
bieleluk 0:98789a3f7363 53 ;* Input: R1
bieleluk 0:98789a3f7363 54 ;* Output:
bieleluk 0:98789a3f7363 55 ;********************************************
bieleluk 0:98789a3f7363 56 PRINT_DECIMAL PROC
bieleluk 0:98789a3f7363 57 PUSH {R0,R2,LR}
bieleluk 0:98789a3f7363 58
bieleluk 0:98789a3f7363 59 CMP R1, #0
bieleluk 0:98789a3f7363 60 BNE CONTINUE
bieleluk 0:98789a3f7363 61
bieleluk 0:98789a3f7363 62
bieleluk 0:98789a3f7363 63 LDR R0, =48
bieleluk 0:98789a3f7363 64 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 65 B EXIT
bieleluk 0:98789a3f7363 66
bieleluk 0:98789a3f7363 67 CONTINUE
bieleluk 0:98789a3f7363 68
bieleluk 0:98789a3f7363 69 LDR R2,=1000000; delitel
bieleluk 0:98789a3f7363 70
bieleluk 0:98789a3f7363 71 DIVIDE
bieleluk 0:98789a3f7363 72 CMP R1,R2
bieleluk 0:98789a3f7363 73 BHS ONE_SIGN
bieleluk 0:98789a3f7363 74 BL DIVIDE_BY_TEN
bieleluk 0:98789a3f7363 75 B DIVIDE
bieleluk 0:98789a3f7363 76
bieleluk 0:98789a3f7363 77 ONE_SIGN
bieleluk 0:98789a3f7363 78 LDR R0,=0
bieleluk 0:98789a3f7363 79 CMP R1,R2
bieleluk 0:98789a3f7363 80 BLT PLOT
bieleluk 0:98789a3f7363 81
bieleluk 0:98789a3f7363 82 SUBSTRACT
bieleluk 0:98789a3f7363 83 SUBS R1,R2
bieleluk 0:98789a3f7363 84 ADDS R0,#1
bieleluk 0:98789a3f7363 85 CMP R1,R2
bieleluk 0:98789a3f7363 86 BHS SUBSTRACT
bieleluk 0:98789a3f7363 87
bieleluk 0:98789a3f7363 88 PLOT
bieleluk 0:98789a3f7363 89 ADDS R0,#48
bieleluk 0:98789a3f7363 90 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 91
bieleluk 0:98789a3f7363 92 BL DIVIDE_BY_TEN
bieleluk 0:98789a3f7363 93 CMP R2,#0
bieleluk 0:98789a3f7363 94 BNE ONE_SIGN
bieleluk 0:98789a3f7363 95
bieleluk 0:98789a3f7363 96 EXIT
bieleluk 0:98789a3f7363 97
bieleluk 0:98789a3f7363 98 POP {R0,R2,PC}
bieleluk 0:98789a3f7363 99 ENDP
bieleluk 0:98789a3f7363 100 ;********************************************
bieleluk 0:98789a3f7363 101
bieleluk 0:98789a3f7363 102 ;********************************************
bieleluk 0:98789a3f7363 103 ;* Function: DIVIDE_BY_TEN
bieleluk 0:98789a3f7363 104 ;* Brief:
bieleluk 0:98789a3f7363 105 ;* Input: R2
bieleluk 0:98789a3f7363 106 ;* Output: R2
bieleluk 0:98789a3f7363 107 ;********************************************
bieleluk 0:98789a3f7363 108 DIVIDE_BY_TEN PROC
bieleluk 0:98789a3f7363 109 PUSH {R1,R3,R4, LR}
bieleluk 0:98789a3f7363 110 ;R1 10X R4 = 10 R3
bieleluk 0:98789a3f7363 111 LDR R3,=0
bieleluk 0:98789a3f7363 112 LDR R4,=1
bieleluk 0:98789a3f7363 113 CMP R2,R4;AK JE CISLO 1, VYNULUJ HO
bieleluk 0:98789a3f7363 114 BEQ FINITO
bieleluk 0:98789a3f7363 115
bieleluk 0:98789a3f7363 116 LDR R1,=10;10X VACSIE AKO R3
bieleluk 0:98789a3f7363 117 LDR R4,=10;KONSTANTA
bieleluk 0:98789a3f7363 118 LDR R3,=1
bieleluk 0:98789a3f7363 119
bieleluk 0:98789a3f7363 120 DIVISION_LOOP
bieleluk 0:98789a3f7363 121
bieleluk 0:98789a3f7363 122 CMP R2,R1;
bieleluk 0:98789a3f7363 123 BEQ FINITO
bieleluk 0:98789a3f7363 124 MULS R1,R4,R1
bieleluk 0:98789a3f7363 125 MULS R3,R4,R3
bieleluk 0:98789a3f7363 126 B DIVISION_LOOP
bieleluk 0:98789a3f7363 127
bieleluk 0:98789a3f7363 128 FINITO
bieleluk 0:98789a3f7363 129 MOVS R2,R3
bieleluk 0:98789a3f7363 130
bieleluk 0:98789a3f7363 131 POP {R1,R3,R4,PC}
bieleluk 0:98789a3f7363 132 ENDP
bieleluk 0:98789a3f7363 133 ;********************************************
bieleluk 0:98789a3f7363 134
bieleluk 0:98789a3f7363 135 ;********************************************
bieleluk 0:98789a3f7363 136 ;* Function: PRINT_HEXA
bieleluk 0:98789a3f7363 137 ;* Brief:
bieleluk 0:98789a3f7363 138 ;* Input: R1
bieleluk 0:98789a3f7363 139 ;* Output:
bieleluk 0:98789a3f7363 140 ;********************************************
bieleluk 0:98789a3f7363 141 PRINT_HEXA PROC
bieleluk 0:98789a3f7363 142 ;R0 je uz ten znak
bieleluk 0:98789a3f7363 143 ;r1 je input
bieleluk 0:98789a3f7363 144 ;r2 je pocek o ktory posuvame doprava
bieleluk 0:98789a3f7363 145 ;r3 je pocet o ktory posuvame dolava
bieleluk 0:98789a3f7363 146 ;r4 je vydelene cislo
bieleluk 0:98789a3f7363 147 ;R5 JE CISLO OD 1 DO 8
bieleluk 0:98789a3f7363 148 PUSH {R0,R1,R2,R3,R4,R5,LR}
bieleluk 0:98789a3f7363 149
bieleluk 0:98789a3f7363 150 LDR R0, ='0'
bieleluk 0:98789a3f7363 151 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 152 LDR R0, ='x'
bieleluk 0:98789a3f7363 153 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 154
bieleluk 0:98789a3f7363 155 CMP R1,#0
bieleluk 0:98789a3f7363 156 BNE NONZERO
bieleluk 0:98789a3f7363 157 LDR R0, ='0'
bieleluk 0:98789a3f7363 158 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 159 B END_OF_FUNCTION
bieleluk 0:98789a3f7363 160
bieleluk 0:98789a3f7363 161 NONZERO
bieleluk 0:98789a3f7363 162
bieleluk 0:98789a3f7363 163 LDR R2, =0;PRVE NENULOVE CISLO HO ZMENI
bieleluk 0:98789a3f7363 164 LDR R3, =0
bieleluk 0:98789a3f7363 165 LDR R5, =8
bieleluk 0:98789a3f7363 166
bieleluk 0:98789a3f7363 167 AGAIN
bieleluk 0:98789a3f7363 168
bieleluk 0:98789a3f7363 169 LDR R0, =0
bieleluk 0:98789a3f7363 170 SUBS R5, #1
bieleluk 0:98789a3f7363 171
bieleluk 0:98789a3f7363 172 MOVS R4, R1
bieleluk 0:98789a3f7363 173 LSLS R4, R4,R3
bieleluk 0:98789a3f7363 174 LSRS R4, R4, #28
bieleluk 0:98789a3f7363 175
bieleluk 0:98789a3f7363 176 CMP R4,#0
bieleluk 0:98789a3f7363 177 BEQ NOT_YET_PRINTING
bieleluk 0:98789a3f7363 178 LDR R2, =1
bieleluk 0:98789a3f7363 179
bieleluk 0:98789a3f7363 180 NOT_YET_PRINTING
bieleluk 0:98789a3f7363 181
bieleluk 0:98789a3f7363 182 CMP R4,#10
bieleluk 0:98789a3f7363 183 BLT NUMBER
bieleluk 0:98789a3f7363 184
bieleluk 0:98789a3f7363 185 ;SIGN
bieleluk 0:98789a3f7363 186 ADDS R0, #7
bieleluk 0:98789a3f7363 187 NUMBER
bieleluk 0:98789a3f7363 188 ADDS R0, #48
bieleluk 0:98789a3f7363 189
bieleluk 0:98789a3f7363 190 ADDS R0,R4
bieleluk 0:98789a3f7363 191
bieleluk 0:98789a3f7363 192 CMP R2,#0
bieleluk 0:98789a3f7363 193 BEQ SKIP_PRINTING
bieleluk 0:98789a3f7363 194
bieleluk 0:98789a3f7363 195 BL UART_PUTCHAR
bieleluk 0:98789a3f7363 196
bieleluk 0:98789a3f7363 197 SKIP_PRINTING
bieleluk 0:98789a3f7363 198 ADDS R3, #4
bieleluk 0:98789a3f7363 199
bieleluk 0:98789a3f7363 200
bieleluk 0:98789a3f7363 201 CMP R5,#0
bieleluk 0:98789a3f7363 202 BNE AGAIN
bieleluk 0:98789a3f7363 203
bieleluk 0:98789a3f7363 204 END_OF_FUNCTION
bieleluk 0:98789a3f7363 205
bieleluk 0:98789a3f7363 206
bieleluk 0:98789a3f7363 207 POP {R0,R1,R2,R3,R4,R5,PC}
bieleluk 0:98789a3f7363 208 ENDP
bieleluk 0:98789a3f7363 209 ;********************************************
bieleluk 0:98789a3f7363 210
bieleluk 0:98789a3f7363 211
bieleluk 0:98789a3f7363 212
bieleluk 0:98789a3f7363 213 ALIGN
bieleluk 0:98789a3f7363 214 END
bieleluk 0:98789a3f7363 215