Ben Katz / mbed-dev_spine

mbed library sources. Supersedes mbed-src.

Dependents:   SPIne CH_Communicatuin_Test CH_Communicatuin_Test2 MCP_SPIne ... more

Fork of mbed-dev-f303 by Ben Katz

platform/mbed_critical.c@172:7d866c31b3c5, 2017-08-31 (annotated)

Committer:
AnnaBridge
Date:
Thu Aug 31 17:27:04 2017 +0100
Revision:
172:7d866c31b3c5
Parent:
170:19eb464bc2be 
This updates the lib to the mbed lib v 150

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*
<> 149:156823d33999 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
<> 149:156823d33999 3 * SPDX-License-Identifier: Apache-2.0
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 149:156823d33999 6 * not use this file except in compliance with the License.
<> 149:156823d33999 7 * You may obtain a copy of the License at
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 149:156823d33999 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 14 * See the License for the specific language governing permissions and
<> 149:156823d33999 15 * limitations under the License.
<> 149:156823d33999 16 */
<> 149:156823d33999 17
<> 153:fa9ff456f731 18 /* Declare __STDC_LIMIT_MACROS so stdint.h defines UINT32_MAX when using C++ */
<> 153:fa9ff456f731 19 #define __STDC_LIMIT_MACROS
<> 160:d5399cc887bb 20 #include "platform/mbed_critical.h"
<> 149:156823d33999 21
<> 149:156823d33999 22 #include "cmsis.h"
<> 149:156823d33999 23 #include "platform/mbed_assert.h"
<> 160:d5399cc887bb 24 #include "platform/mbed_toolchain.h"
<> 149:156823d33999 25
<> 149:156823d33999 26 static volatile uint32_t interrupt_enable_counter = 0;
<> 149:156823d33999 27 static volatile bool critical_interrupts_disabled = false;
<> 149:156823d33999 28
<> 149:156823d33999 29 bool core_util_are_interrupts_enabled(void)
<> 149:156823d33999 30 {
<> 149:156823d33999 31 #if defined(__CORTEX_A9)
<> 149:156823d33999 32 return ((__get_CPSR() & 0x80) == 0);
<> 149:156823d33999 33 #else
<> 149:156823d33999 34 return ((__get_PRIMASK() & 0x1) == 0);
<> 149:156823d33999 35 #endif
<> 149:156823d33999 36 }
<> 149:156823d33999 37
AnnaBridge 167:e84263d55307 38 bool core_util_is_isr_active(void)
AnnaBridge 167:e84263d55307 39 {
AnnaBridge 167:e84263d55307 40 #if defined(__CORTEX_A9)
AnnaBridge 167:e84263d55307 41 switch(__get_CPSR() & 0x1FU) {
AnnaBridge 167:e84263d55307 42 case MODE_USR:
AnnaBridge 167:e84263d55307 43 case MODE_SYS:
AnnaBridge 167:e84263d55307 44 return false;
AnnaBridge 167:e84263d55307 45 case MODE_SVC:
AnnaBridge 167:e84263d55307 46 default:
AnnaBridge 167:e84263d55307 47 return true;
AnnaBridge 167:e84263d55307 48 }
AnnaBridge 167:e84263d55307 49 #else
AnnaBridge 167:e84263d55307 50 return (__get_IPSR() != 0U);
AnnaBridge 167:e84263d55307 51 #endif
AnnaBridge 167:e84263d55307 52 }
AnnaBridge 167:e84263d55307 53
<> 149:156823d33999 54 MBED_WEAK void core_util_critical_section_enter(void)
<> 149:156823d33999 55 {
<> 149:156823d33999 56 bool interrupts_disabled = !core_util_are_interrupts_enabled();
<> 149:156823d33999 57 __disable_irq();
<> 149:156823d33999 58
<> 149:156823d33999 59 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
<> 149:156823d33999 60 if (!interrupt_enable_counter) {
<> 149:156823d33999 61 critical_interrupts_disabled = interrupts_disabled;
<> 149:156823d33999 62 }
<> 149:156823d33999 63
<> 149:156823d33999 64 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
<> 149:156823d33999 65 are enabled, then something has gone badly wrong thus assert an error.
<> 149:156823d33999 66 */
<> 149:156823d33999 67 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
<> 149:156823d33999 68 // FIXME
<> 149:156823d33999 69 #ifndef FEATURE_UVISOR
<> 149:156823d33999 70 if (interrupt_enable_counter > 0) {
<> 149:156823d33999 71 MBED_ASSERT(interrupts_disabled);
<> 149:156823d33999 72 }
<> 149:156823d33999 73 #else
<> 149:156823d33999 74 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
<> 149:156823d33999 75 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 76 interrupt_enable_counter++;
<> 149:156823d33999 77 }
<> 149:156823d33999 78
<> 149:156823d33999 79 MBED_WEAK void core_util_critical_section_exit(void)
<> 149:156823d33999 80 {
<> 149:156823d33999 81 /* If critical_section_enter has not previously been called, do nothing */
<> 149:156823d33999 82 if (interrupt_enable_counter) {
<> 149:156823d33999 83
<> 149:156823d33999 84 // FIXME
<> 149:156823d33999 85 #ifndef FEATURE_UVISOR
<> 149:156823d33999 86 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
<> 149:156823d33999 87
<> 149:156823d33999 88 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
<> 149:156823d33999 89 #else
<> 149:156823d33999 90 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
<> 149:156823d33999 91 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 92
<> 149:156823d33999 93 interrupt_enable_counter--;
<> 149:156823d33999 94
<> 149:156823d33999 95 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
<> 149:156823d33999 96 interrupts were enabled on entry to the first critical section.
<> 149:156823d33999 97 */
<> 149:156823d33999 98 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
<> 149:156823d33999 99 __enable_irq();
<> 149:156823d33999 100 }
<> 149:156823d33999 101 }
<> 149:156823d33999 102 }
<> 149:156823d33999 103
AnnaBridge 172:7d866c31b3c5 104 #if __EXCLUSIVE_ACCESS
<> 149:156823d33999 105
<> 149:156823d33999 106 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
<> 149:156823d33999 107 #if defined (__CC_ARM)
<> 149:156823d33999 108 #pragma diag_suppress 3731
<> 149:156823d33999 109 #endif
<> 149:156823d33999 110
<> 149:156823d33999 111 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 112 {
<> 149:156823d33999 113 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
<> 149:156823d33999 114 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 115 *expectedCurrentValue = currentValue;
<> 149:156823d33999 116 __CLREX();
<> 149:156823d33999 117 return false;
<> 149:156823d33999 118 }
<> 149:156823d33999 119
<> 149:156823d33999 120 return !__STREXB(desiredValue, (volatile uint8_t*)ptr);
<> 149:156823d33999 121 }
<> 149:156823d33999 122
<> 149:156823d33999 123 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 124 {
<> 149:156823d33999 125 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
<> 149:156823d33999 126 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 127 *expectedCurrentValue = currentValue;
<> 149:156823d33999 128 __CLREX();
<> 149:156823d33999 129 return false;
<> 149:156823d33999 130 }
<> 149:156823d33999 131
<> 149:156823d33999 132 return !__STREXH(desiredValue, (volatile uint16_t*)ptr);
<> 149:156823d33999 133 }
<> 149:156823d33999 134
<> 149:156823d33999 135
<> 149:156823d33999 136 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 137 {
<> 149:156823d33999 138 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
<> 149:156823d33999 139 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 140 *expectedCurrentValue = currentValue;
<> 149:156823d33999 141 __CLREX();
<> 149:156823d33999 142 return false;
<> 149:156823d33999 143 }
<> 149:156823d33999 144
<> 149:156823d33999 145 return !__STREXW(desiredValue, (volatile uint32_t*)ptr);
<> 149:156823d33999 146 }
<> 149:156823d33999 147
<> 149:156823d33999 148 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 149 {
<> 149:156823d33999 150 uint8_t newValue;
<> 149:156823d33999 151 do {
<> 149:156823d33999 152 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
<> 149:156823d33999 153 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 154 return newValue;
<> 149:156823d33999 155 }
<> 149:156823d33999 156
<> 149:156823d33999 157 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 158 {
<> 149:156823d33999 159 uint16_t newValue;
<> 149:156823d33999 160 do {
<> 149:156823d33999 161 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
<> 149:156823d33999 162 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 163 return newValue;
<> 149:156823d33999 164 }
<> 149:156823d33999 165
<> 149:156823d33999 166 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 167 {
<> 149:156823d33999 168 uint32_t newValue;
<> 149:156823d33999 169 do {
<> 149:156823d33999 170 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
<> 149:156823d33999 171 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 172 return newValue;
<> 149:156823d33999 173 }
<> 149:156823d33999 174
<> 149:156823d33999 175
<> 149:156823d33999 176 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 177 {
<> 149:156823d33999 178 uint8_t newValue;
<> 149:156823d33999 179 do {
<> 149:156823d33999 180 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
<> 149:156823d33999 181 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 182 return newValue;
<> 149:156823d33999 183 }
<> 149:156823d33999 184
<> 149:156823d33999 185 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 186 {
<> 149:156823d33999 187 uint16_t newValue;
<> 149:156823d33999 188 do {
<> 149:156823d33999 189 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
<> 149:156823d33999 190 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 191 return newValue;
<> 149:156823d33999 192 }
<> 149:156823d33999 193
<> 149:156823d33999 194 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 195 {
<> 149:156823d33999 196 uint32_t newValue;
<> 149:156823d33999 197 do {
<> 149:156823d33999 198 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
<> 149:156823d33999 199 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 200 return newValue;
<> 149:156823d33999 201 }
<> 149:156823d33999 202
<> 149:156823d33999 203 #else
<> 149:156823d33999 204
<> 149:156823d33999 205 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 206 {
<> 149:156823d33999 207 bool success;
<> 149:156823d33999 208 uint8_t currentValue;
<> 149:156823d33999 209 core_util_critical_section_enter();
<> 149:156823d33999 210 currentValue = *ptr;
<> 149:156823d33999 211 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 212 *ptr = desiredValue;
<> 149:156823d33999 213 success = true;
<> 149:156823d33999 214 } else {
<> 149:156823d33999 215 *expectedCurrentValue = currentValue;
<> 149:156823d33999 216 success = false;
<> 149:156823d33999 217 }
<> 149:156823d33999 218 core_util_critical_section_exit();
<> 149:156823d33999 219 return success;
<> 149:156823d33999 220 }
<> 149:156823d33999 221
<> 149:156823d33999 222 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 223 {
<> 149:156823d33999 224 bool success;
<> 149:156823d33999 225 uint16_t currentValue;
<> 149:156823d33999 226 core_util_critical_section_enter();
<> 149:156823d33999 227 currentValue = *ptr;
<> 149:156823d33999 228 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 229 *ptr = desiredValue;
<> 149:156823d33999 230 success = true;
<> 149:156823d33999 231 } else {
<> 149:156823d33999 232 *expectedCurrentValue = currentValue;
<> 149:156823d33999 233 success = false;
<> 149:156823d33999 234 }
<> 149:156823d33999 235 core_util_critical_section_exit();
<> 149:156823d33999 236 return success;
<> 149:156823d33999 237 }
<> 149:156823d33999 238
<> 149:156823d33999 239
<> 149:156823d33999 240 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 241 {
<> 149:156823d33999 242 bool success;
<> 149:156823d33999 243 uint32_t currentValue;
<> 149:156823d33999 244 core_util_critical_section_enter();
<> 149:156823d33999 245 currentValue = *ptr;
<> 149:156823d33999 246 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 247 *ptr = desiredValue;
<> 149:156823d33999 248 success = true;
<> 149:156823d33999 249 } else {
<> 149:156823d33999 250 *expectedCurrentValue = currentValue;
<> 149:156823d33999 251 success = false;
<> 149:156823d33999 252 }
<> 149:156823d33999 253 core_util_critical_section_exit();
<> 149:156823d33999 254 return success;
<> 149:156823d33999 255 }
<> 149:156823d33999 256
<> 149:156823d33999 257
<> 149:156823d33999 258 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 259 {
<> 149:156823d33999 260 uint8_t newValue;
<> 149:156823d33999 261 core_util_critical_section_enter();
<> 149:156823d33999 262 newValue = *valuePtr + delta;
<> 149:156823d33999 263 *valuePtr = newValue;
<> 149:156823d33999 264 core_util_critical_section_exit();
<> 149:156823d33999 265 return newValue;
<> 149:156823d33999 266 }
<> 149:156823d33999 267
<> 149:156823d33999 268 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 269 {
<> 149:156823d33999 270 uint16_t newValue;
<> 149:156823d33999 271 core_util_critical_section_enter();
<> 149:156823d33999 272 newValue = *valuePtr + delta;
<> 149:156823d33999 273 *valuePtr = newValue;
<> 149:156823d33999 274 core_util_critical_section_exit();
<> 149:156823d33999 275 return newValue;
<> 149:156823d33999 276 }
<> 149:156823d33999 277
<> 149:156823d33999 278 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 279 {
<> 149:156823d33999 280 uint32_t newValue;
<> 149:156823d33999 281 core_util_critical_section_enter();
<> 149:156823d33999 282 newValue = *valuePtr + delta;
<> 149:156823d33999 283 *valuePtr = newValue;
<> 149:156823d33999 284 core_util_critical_section_exit();
<> 149:156823d33999 285 return newValue;
<> 149:156823d33999 286 }
<> 149:156823d33999 287
<> 149:156823d33999 288
<> 149:156823d33999 289 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 290 {
<> 149:156823d33999 291 uint8_t newValue;
<> 149:156823d33999 292 core_util_critical_section_enter();
<> 149:156823d33999 293 newValue = *valuePtr - delta;
<> 149:156823d33999 294 *valuePtr = newValue;
<> 149:156823d33999 295 core_util_critical_section_exit();
<> 149:156823d33999 296 return newValue;
<> 149:156823d33999 297 }
<> 149:156823d33999 298
<> 149:156823d33999 299 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 300 {
<> 149:156823d33999 301 uint16_t newValue;
<> 149:156823d33999 302 core_util_critical_section_enter();
<> 149:156823d33999 303 newValue = *valuePtr - delta;
<> 149:156823d33999 304 *valuePtr = newValue;
<> 149:156823d33999 305 core_util_critical_section_exit();
<> 149:156823d33999 306 return newValue;
<> 149:156823d33999 307 }
<> 149:156823d33999 308
<> 149:156823d33999 309 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 310 {
<> 149:156823d33999 311 uint32_t newValue;
<> 149:156823d33999 312 core_util_critical_section_enter();
<> 149:156823d33999 313 newValue = *valuePtr - delta;
<> 149:156823d33999 314 *valuePtr = newValue;
<> 149:156823d33999 315 core_util_critical_section_exit();
<> 149:156823d33999 316 return newValue;
<> 149:156823d33999 317 }
<> 149:156823d33999 318
<> 149:156823d33999 319 #endif
<> 149:156823d33999 320
<> 149:156823d33999 321
<> 149:156823d33999 322 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
<> 149:156823d33999 323 return core_util_atomic_cas_u32(
<> 149:156823d33999 324 (uint32_t *)ptr,
<> 149:156823d33999 325 (uint32_t *)expectedCurrentValue,
<> 149:156823d33999 326 (uint32_t)desiredValue);
<> 149:156823d33999 327 }
<> 149:156823d33999 328
<> 149:156823d33999 329 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 330 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 331 }
<> 149:156823d33999 332
<> 149:156823d33999 333 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 334 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 335 }
<> 149:156823d33999 336