mbed-dev-f303

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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flash.c@175:af195413fb11, 2017-10-11 (annotated)

Committer:: AnnaBridge
Date:: Wed Oct 11 12:45:49 2017 +0100
Revision:: 175:af195413fb11
Parent:: 154:37f96f9d4de2

This updates the lib to the mbed lib v 153

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	154:37f96f9d4de2	1	/*
<>	154:37f96f9d4de2	2	* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
AnnaBridge	175:af195413fb11	3	* Copyright 2016-2017 NXP
<>	154:37f96f9d4de2	4	*
<>	154:37f96f9d4de2	5	* Redistribution and use in source and binary forms, with or without modification,
<>	154:37f96f9d4de2	6	* are permitted provided that the following conditions are met:
<>	154:37f96f9d4de2	7	*
<>	154:37f96f9d4de2	8	* o Redistributions of source code must retain the above copyright notice, this list
<>	154:37f96f9d4de2	9	* of conditions and the following disclaimer.
<>	154:37f96f9d4de2	10	*
<>	154:37f96f9d4de2	11	* o Redistributions in binary form must reproduce the above copyright notice, this
<>	154:37f96f9d4de2	12	* list of conditions and the following disclaimer in the documentation and/or
<>	154:37f96f9d4de2	13	* other materials provided with the distribution.
<>	154:37f96f9d4de2	14	*
AnnaBridge	175:af195413fb11	15	* o Neither the name of the copyright holder nor the names of its
<>	154:37f96f9d4de2	16	* contributors may be used to endorse or promote products derived from this
<>	154:37f96f9d4de2	17	* software without specific prior written permission.
<>	154:37f96f9d4de2	18	*
<>	154:37f96f9d4de2	19	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<>	154:37f96f9d4de2	20	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<>	154:37f96f9d4de2	21	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	154:37f96f9d4de2	22	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<>	154:37f96f9d4de2	23	* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<>	154:37f96f9d4de2	24	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<>	154:37f96f9d4de2	25	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<>	154:37f96f9d4de2	26	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<>	154:37f96f9d4de2	27	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<>	154:37f96f9d4de2	28	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	154:37f96f9d4de2	29	*/
<>	154:37f96f9d4de2	30
<>	154:37f96f9d4de2	31	#include "fsl_flash.h"
<>	154:37f96f9d4de2	32
<>	154:37f96f9d4de2	33	/*******************************************************************************
<>	154:37f96f9d4de2	34	* Definitions
<>	154:37f96f9d4de2	35	******************************************************************************/
<>	154:37f96f9d4de2	36
<>	154:37f96f9d4de2	37	/*!
<>	154:37f96f9d4de2	38	* @name Misc utility defines
<>	154:37f96f9d4de2	39	* @{
<>	154:37f96f9d4de2	40	*/
AnnaBridge	175:af195413fb11	41	/! @brief Alignment utility. /
<>	154:37f96f9d4de2	42	#ifndef ALIGN_DOWN
<>	154:37f96f9d4de2	43	#define ALIGN_DOWN(x, a) ((x) & (uint32_t)(-((int32_t)(a))))
<>	154:37f96f9d4de2	44	#endif
<>	154:37f96f9d4de2	45	#ifndef ALIGN_UP
<>	154:37f96f9d4de2	46	#define ALIGN_UP(x, a) (-((int32_t)((uint32_t)(-((int32_t)(x))) & (uint32_t)(-((int32_t)(a))))))
<>	154:37f96f9d4de2	47	#endif
<>	154:37f96f9d4de2	48
AnnaBridge	175:af195413fb11	49	/! @brief Join bytes to word utility. /
AnnaBridge	175:af195413fb11	50	#define B1P4(b) (((uint32_t)(b)&0xFFU) << 24)
AnnaBridge	175:af195413fb11	51	#define B1P3(b) (((uint32_t)(b)&0xFFU) << 16)
AnnaBridge	175:af195413fb11	52	#define B1P2(b) (((uint32_t)(b)&0xFFU) << 8)
AnnaBridge	175:af195413fb11	53	#define B1P1(b) ((uint32_t)(b)&0xFFU)
AnnaBridge	175:af195413fb11	54	#define B2P3(b) (((uint32_t)(b)&0xFFFFU) << 16)
AnnaBridge	175:af195413fb11	55	#define B2P2(b) (((uint32_t)(b)&0xFFFFU) << 8)
AnnaBridge	175:af195413fb11	56	#define B2P1(b) ((uint32_t)(b)&0xFFFFU)
AnnaBridge	175:af195413fb11	57	#define B3P2(b) (((uint32_t)(b)&0xFFFFFFU) << 8)
AnnaBridge	175:af195413fb11	58	#define B3P1(b) ((uint32_t)(b)&0xFFFFFFU)
AnnaBridge	175:af195413fb11	59	#define BYTES_JOIN_TO_WORD_1_3(x, y) (B1P4(x) \| B3P1(y))
AnnaBridge	175:af195413fb11	60	#define BYTES_JOIN_TO_WORD_2_2(x, y) (B2P3(x) \| B2P1(y))
AnnaBridge	175:af195413fb11	61	#define BYTES_JOIN_TO_WORD_3_1(x, y) (B3P2(x) \| B1P1(y))
AnnaBridge	175:af195413fb11	62	#define BYTES_JOIN_TO_WORD_1_1_2(x, y, z) (B1P4(x) \| B1P3(y) \| B2P1(z))
AnnaBridge	175:af195413fb11	63	#define BYTES_JOIN_TO_WORD_1_2_1(x, y, z) (B1P4(x) \| B2P2(y) \| B1P1(z))
AnnaBridge	175:af195413fb11	64	#define BYTES_JOIN_TO_WORD_2_1_1(x, y, z) (B2P3(x) \| B1P2(y) \| B1P1(z))
AnnaBridge	175:af195413fb11	65	#define BYTES_JOIN_TO_WORD_1_1_1_1(x, y, z, w) (B1P4(x) \| B1P3(y) \| B1P2(z) \| B1P1(w))
AnnaBridge	175:af195413fb11	66	/@}/
AnnaBridge	175:af195413fb11	67
AnnaBridge	175:af195413fb11	68	/*!
AnnaBridge	175:af195413fb11	69	* @name Secondary flash configuration
AnnaBridge	175:af195413fb11	70	* @{
AnnaBridge	175:af195413fb11	71	*/
AnnaBridge	175:af195413fb11	72	/! @brief Indicates whether the secondary flash has its own protection register in flash module. /
AnnaBridge	175:af195413fb11	73	#if defined(FSL_FEATURE_FLASH_HAS_MULTIPLE_FLASH) && defined(FTFE_FPROTS_PROTS_MASK)
AnnaBridge	175:af195413fb11	74	#define FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER (1)
AnnaBridge	175:af195413fb11	75	#else
AnnaBridge	175:af195413fb11	76	#define FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER (0)
AnnaBridge	175:af195413fb11	77	#endif
AnnaBridge	175:af195413fb11	78
AnnaBridge	175:af195413fb11	79	/! @brief Indicates whether the secondary flash has its own Execute-Only access register in flash module. /
AnnaBridge	175:af195413fb11	80	#if defined(FSL_FEATURE_FLASH_HAS_MULTIPLE_FLASH) && defined(FTFE_FACSSS_SGSIZE_S_MASK)
AnnaBridge	175:af195413fb11	81	#define FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER (1)
AnnaBridge	175:af195413fb11	82	#else
AnnaBridge	175:af195413fb11	83	#define FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER (0)
AnnaBridge	175:af195413fb11	84	#endif
AnnaBridge	175:af195413fb11	85	/@}/
AnnaBridge	175:af195413fb11	86
AnnaBridge	175:af195413fb11	87	/*!
AnnaBridge	175:af195413fb11	88	* @name Flash cache ands speculation control defines
AnnaBridge	175:af195413fb11	89	* @{
AnnaBridge	175:af195413fb11	90	*/
AnnaBridge	175:af195413fb11	91	#if defined(MCM_PLACR_CFCC_MASK) \|\| defined(MCM_CPCR2_CCBC_MASK)
AnnaBridge	175:af195413fb11	92	#define FLASH_CACHE_IS_CONTROLLED_BY_MCM (1)
AnnaBridge	175:af195413fb11	93	#else
AnnaBridge	175:af195413fb11	94	#define FLASH_CACHE_IS_CONTROLLED_BY_MCM (0)
AnnaBridge	175:af195413fb11	95	#endif
AnnaBridge	175:af195413fb11	96	#if defined(FMC_PFB0CR_CINV_WAY_MASK) \|\| defined(FMC_PFB01CR_CINV_WAY_MASK)
AnnaBridge	175:af195413fb11	97	#define FLASH_CACHE_IS_CONTROLLED_BY_FMC (1)
AnnaBridge	175:af195413fb11	98	#else
AnnaBridge	175:af195413fb11	99	#define FLASH_CACHE_IS_CONTROLLED_BY_FMC (0)
AnnaBridge	175:af195413fb11	100	#endif
AnnaBridge	175:af195413fb11	101	#if defined(MCM_PLACR_DFCS_MASK)
AnnaBridge	175:af195413fb11	102	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MCM (1)
AnnaBridge	175:af195413fb11	103	#else
AnnaBridge	175:af195413fb11	104	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MCM (0)
AnnaBridge	175:af195413fb11	105	#endif
AnnaBridge	175:af195413fb11	106	#if defined(MSCM_OCMDR_OCM1_MASK) \|\| defined(MSCM_OCMDR_OCMC1_MASK)
AnnaBridge	175:af195413fb11	107	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM (1)
AnnaBridge	175:af195413fb11	108	#else
AnnaBridge	175:af195413fb11	109	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM (0)
AnnaBridge	175:af195413fb11	110	#endif
AnnaBridge	175:af195413fb11	111	#if defined(FMC_PFB0CR_S_INV_MASK) \|\| defined(FMC_PFB0CR_S_B_INV_MASK) \|\| defined(FMC_PFB01CR_S_INV_MASK) \|\| \
AnnaBridge	175:af195413fb11	112	defined(FMC_PFB01CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	113	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC (1)
AnnaBridge	175:af195413fb11	114	#else
AnnaBridge	175:af195413fb11	115	#define FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC (0)
AnnaBridge	175:af195413fb11	116	#endif
<>	154:37f96f9d4de2	117	/@}/
<>	154:37f96f9d4de2	118
<>	154:37f96f9d4de2	119	/! @brief Data flash IFR map Field/
<>	154:37f96f9d4de2	120	#if defined(FSL_FEATURE_FLASH_IS_FTFE) && FSL_FEATURE_FLASH_IS_FTFE
<>	154:37f96f9d4de2	121	#define DFLASH_IFR_READRESOURCE_START_ADDRESS 0x8003F8U
<>	154:37f96f9d4de2	122	#else /* FSL_FEATURE_FLASH_IS_FTFL == 1 or FSL_FEATURE_FLASH_IS_FTFA = =1 */
<>	154:37f96f9d4de2	123	#define DFLASH_IFR_READRESOURCE_START_ADDRESS 0x8000F8U
<>	154:37f96f9d4de2	124	#endif
<>	154:37f96f9d4de2	125
<>	154:37f96f9d4de2	126	/*!
<>	154:37f96f9d4de2	127	* @name Reserved FlexNVM size (For a variety of purposes) defines
<>	154:37f96f9d4de2	128	* @{
<>	154:37f96f9d4de2	129	*/
<>	154:37f96f9d4de2	130	#define FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED 0xFFFFFFFFU
<>	154:37f96f9d4de2	131	#define FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED 0xFFFFU
<>	154:37f96f9d4de2	132	/@}/
<>	154:37f96f9d4de2	133
<>	154:37f96f9d4de2	134	/*!
<>	154:37f96f9d4de2	135	* @name Flash Program Once Field defines
<>	154:37f96f9d4de2	136	* @{
<>	154:37f96f9d4de2	137	*/
<>	154:37f96f9d4de2	138	#if defined(FSL_FEATURE_FLASH_IS_FTFA) && FSL_FEATURE_FLASH_IS_FTFA
<>	154:37f96f9d4de2	139	/* FTFA parts(eg. K80, KL80, L5K) support both 4-bytes and 8-bytes unit size */
<>	154:37f96f9d4de2	140	#define FLASH_PROGRAM_ONCE_MIN_ID_8BYTES \
<>	154:37f96f9d4de2	141	0x10U /* Minimum Index indcating one of Progam Once Fields which is accessed in 8-byte records */
<>	154:37f96f9d4de2	142	#define FLASH_PROGRAM_ONCE_MAX_ID_8BYTES \
<>	154:37f96f9d4de2	143	0x13U /* Maximum Index indcating one of Progam Once Fields which is accessed in 8-byte records */
<>	154:37f96f9d4de2	144	#define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 1
<>	154:37f96f9d4de2	145	#define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 1
<>	154:37f96f9d4de2	146	#elif defined(FSL_FEATURE_FLASH_IS_FTFE) && FSL_FEATURE_FLASH_IS_FTFE
<>	154:37f96f9d4de2	147	/* FTFE parts(eg. K65, KE18) only support 8-bytes unit size */
<>	154:37f96f9d4de2	148	#define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 0
<>	154:37f96f9d4de2	149	#define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 1
<>	154:37f96f9d4de2	150	#elif defined(FSL_FEATURE_FLASH_IS_FTFL) && FSL_FEATURE_FLASH_IS_FTFL
<>	154:37f96f9d4de2	151	/* FTFL parts(eg. K20) only support 4-bytes unit size */
<>	154:37f96f9d4de2	152	#define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 1
<>	154:37f96f9d4de2	153	#define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 0
<>	154:37f96f9d4de2	154	#endif
<>	154:37f96f9d4de2	155	/@}/
<>	154:37f96f9d4de2	156
<>	154:37f96f9d4de2	157	/*!
<>	154:37f96f9d4de2	158	* @name Flash security status defines
<>	154:37f96f9d4de2	159	* @{
<>	154:37f96f9d4de2	160	*/
<>	154:37f96f9d4de2	161	#define FLASH_SECURITY_STATE_KEYEN 0x80U
<>	154:37f96f9d4de2	162	#define FLASH_SECURITY_STATE_UNSECURED 0x02U
<>	154:37f96f9d4de2	163	#define FLASH_NOT_SECURE 0x01U
<>	154:37f96f9d4de2	164	#define FLASH_SECURE_BACKDOOR_ENABLED 0x02U
<>	154:37f96f9d4de2	165	#define FLASH_SECURE_BACKDOOR_DISABLED 0x04U
<>	154:37f96f9d4de2	166	/@}/
<>	154:37f96f9d4de2	167
<>	154:37f96f9d4de2	168	/*!
<>	154:37f96f9d4de2	169	* @name Flash controller command numbers
<>	154:37f96f9d4de2	170	* @{
<>	154:37f96f9d4de2	171	*/
<>	154:37f96f9d4de2	172	#define FTFx_VERIFY_BLOCK 0x00U /!< RD1BLK/
<>	154:37f96f9d4de2	173	#define FTFx_VERIFY_SECTION 0x01U /!< RD1SEC/
<>	154:37f96f9d4de2	174	#define FTFx_PROGRAM_CHECK 0x02U /!< PGMCHK/
<>	154:37f96f9d4de2	175	#define FTFx_READ_RESOURCE 0x03U /!< RDRSRC/
<>	154:37f96f9d4de2	176	#define FTFx_PROGRAM_LONGWORD 0x06U /!< PGM4/
<>	154:37f96f9d4de2	177	#define FTFx_PROGRAM_PHRASE 0x07U /!< PGM8/
<>	154:37f96f9d4de2	178	#define FTFx_ERASE_BLOCK 0x08U /!< ERSBLK/
<>	154:37f96f9d4de2	179	#define FTFx_ERASE_SECTOR 0x09U /!< ERSSCR/
<>	154:37f96f9d4de2	180	#define FTFx_PROGRAM_SECTION 0x0BU /!< PGMSEC/
AnnaBridge	175:af195413fb11	181	#define FTFx_GENERATE_CRC 0x0CU /!< CRCGEN/
<>	154:37f96f9d4de2	182	#define FTFx_VERIFY_ALL_BLOCK 0x40U /!< RD1ALL/
<>	154:37f96f9d4de2	183	#define FTFx_READ_ONCE 0x41U /!< RDONCE or RDINDEX/
<>	154:37f96f9d4de2	184	#define FTFx_PROGRAM_ONCE 0x43U /!< PGMONCE or PGMINDEX/
<>	154:37f96f9d4de2	185	#define FTFx_ERASE_ALL_BLOCK 0x44U /!< ERSALL/
<>	154:37f96f9d4de2	186	#define FTFx_SECURITY_BY_PASS 0x45U /!< VFYKEY/
<>	154:37f96f9d4de2	187	#define FTFx_SWAP_CONTROL 0x46U /!< SWAP/
<>	154:37f96f9d4de2	188	#define FTFx_ERASE_ALL_BLOCK_UNSECURE 0x49U /!< ERSALLU/
<>	154:37f96f9d4de2	189	#define FTFx_VERIFY_ALL_EXECUTE_ONLY_SEGMENT 0x4AU /!< RD1XA/
<>	154:37f96f9d4de2	190	#define FTFx_ERASE_ALL_EXECUTE_ONLY_SEGMENT 0x4BU /!< ERSXA/
<>	154:37f96f9d4de2	191	#define FTFx_PROGRAM_PARTITION 0x80U /!< PGMPART)/
<>	154:37f96f9d4de2	192	#define FTFx_SET_FLEXRAM_FUNCTION 0x81U /!< SETRAM/
<>	154:37f96f9d4de2	193	/@}/
<>	154:37f96f9d4de2	194
<>	154:37f96f9d4de2	195	/*!
<>	154:37f96f9d4de2	196	* @name Common flash register info defines
<>	154:37f96f9d4de2	197	* @{
<>	154:37f96f9d4de2	198	*/
<>	154:37f96f9d4de2	199	#if defined(FTFA)
<>	154:37f96f9d4de2	200	#define FTFx FTFA
<>	154:37f96f9d4de2	201	#define FTFx_BASE FTFA_BASE
<>	154:37f96f9d4de2	202	#define FTFx_FSTAT_CCIF_MASK FTFA_FSTAT_CCIF_MASK
<>	154:37f96f9d4de2	203	#define FTFx_FSTAT_RDCOLERR_MASK FTFA_FSTAT_RDCOLERR_MASK
<>	154:37f96f9d4de2	204	#define FTFx_FSTAT_ACCERR_MASK FTFA_FSTAT_ACCERR_MASK
<>	154:37f96f9d4de2	205	#define FTFx_FSTAT_FPVIOL_MASK FTFA_FSTAT_FPVIOL_MASK
<>	154:37f96f9d4de2	206	#define FTFx_FSTAT_MGSTAT0_MASK FTFA_FSTAT_MGSTAT0_MASK
<>	154:37f96f9d4de2	207	#define FTFx_FSEC_SEC_MASK FTFA_FSEC_SEC_MASK
<>	154:37f96f9d4de2	208	#define FTFx_FSEC_KEYEN_MASK FTFA_FSEC_KEYEN_MASK
<>	154:37f96f9d4de2	209	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM
<>	154:37f96f9d4de2	210	#define FTFx_FCNFG_RAMRDY_MASK FTFA_FCNFG_RAMRDY_MASK
<>	154:37f96f9d4de2	211	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */
<>	154:37f96f9d4de2	212	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM
<>	154:37f96f9d4de2	213	#define FTFx_FCNFG_EEERDY_MASK FTFA_FCNFG_EEERDY_MASK
<>	154:37f96f9d4de2	214	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */
<>	154:37f96f9d4de2	215	#elif defined(FTFE)
<>	154:37f96f9d4de2	216	#define FTFx FTFE
<>	154:37f96f9d4de2	217	#define FTFx_BASE FTFE_BASE
<>	154:37f96f9d4de2	218	#define FTFx_FSTAT_CCIF_MASK FTFE_FSTAT_CCIF_MASK
<>	154:37f96f9d4de2	219	#define FTFx_FSTAT_RDCOLERR_MASK FTFE_FSTAT_RDCOLERR_MASK
<>	154:37f96f9d4de2	220	#define FTFx_FSTAT_ACCERR_MASK FTFE_FSTAT_ACCERR_MASK
<>	154:37f96f9d4de2	221	#define FTFx_FSTAT_FPVIOL_MASK FTFE_FSTAT_FPVIOL_MASK
<>	154:37f96f9d4de2	222	#define FTFx_FSTAT_MGSTAT0_MASK FTFE_FSTAT_MGSTAT0_MASK
<>	154:37f96f9d4de2	223	#define FTFx_FSEC_SEC_MASK FTFE_FSEC_SEC_MASK
<>	154:37f96f9d4de2	224	#define FTFx_FSEC_KEYEN_MASK FTFE_FSEC_KEYEN_MASK
<>	154:37f96f9d4de2	225	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM
<>	154:37f96f9d4de2	226	#define FTFx_FCNFG_RAMRDY_MASK FTFE_FCNFG_RAMRDY_MASK
<>	154:37f96f9d4de2	227	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */
<>	154:37f96f9d4de2	228	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM
<>	154:37f96f9d4de2	229	#define FTFx_FCNFG_EEERDY_MASK FTFE_FCNFG_EEERDY_MASK
<>	154:37f96f9d4de2	230	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */
<>	154:37f96f9d4de2	231	#elif defined(FTFL)
<>	154:37f96f9d4de2	232	#define FTFx FTFL
<>	154:37f96f9d4de2	233	#define FTFx_BASE FTFL_BASE
<>	154:37f96f9d4de2	234	#define FTFx_FSTAT_CCIF_MASK FTFL_FSTAT_CCIF_MASK
<>	154:37f96f9d4de2	235	#define FTFx_FSTAT_RDCOLERR_MASK FTFL_FSTAT_RDCOLERR_MASK
<>	154:37f96f9d4de2	236	#define FTFx_FSTAT_ACCERR_MASK FTFL_FSTAT_ACCERR_MASK
<>	154:37f96f9d4de2	237	#define FTFx_FSTAT_FPVIOL_MASK FTFL_FSTAT_FPVIOL_MASK
<>	154:37f96f9d4de2	238	#define FTFx_FSTAT_MGSTAT0_MASK FTFL_FSTAT_MGSTAT0_MASK
<>	154:37f96f9d4de2	239	#define FTFx_FSEC_SEC_MASK FTFL_FSEC_SEC_MASK
<>	154:37f96f9d4de2	240	#define FTFx_FSEC_KEYEN_MASK FTFL_FSEC_KEYEN_MASK
<>	154:37f96f9d4de2	241	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM
<>	154:37f96f9d4de2	242	#define FTFx_FCNFG_RAMRDY_MASK FTFL_FCNFG_RAMRDY_MASK
<>	154:37f96f9d4de2	243	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */
<>	154:37f96f9d4de2	244	#if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM
<>	154:37f96f9d4de2	245	#define FTFx_FCNFG_EEERDY_MASK FTFL_FCNFG_EEERDY_MASK
<>	154:37f96f9d4de2	246	#endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */
<>	154:37f96f9d4de2	247	#else
<>	154:37f96f9d4de2	248	#error "Unknown flash controller"
<>	154:37f96f9d4de2	249	#endif
<>	154:37f96f9d4de2	250	/@}/
<>	154:37f96f9d4de2	251
<>	154:37f96f9d4de2	252	/*!
AnnaBridge	175:af195413fb11	253	* @name Common flash register access info defines
AnnaBridge	175:af195413fb11	254	* @{
AnnaBridge	175:af195413fb11	255	*/
AnnaBridge	175:af195413fb11	256	#define FTFx_FCCOB3_REG (FTFx->FCCOB3)
AnnaBridge	175:af195413fb11	257	#define FTFx_FCCOB5_REG (FTFx->FCCOB5)
AnnaBridge	175:af195413fb11	258	#define FTFx_FCCOB6_REG (FTFx->FCCOB6)
AnnaBridge	175:af195413fb11	259	#define FTFx_FCCOB7_REG (FTFx->FCCOB7)
AnnaBridge	175:af195413fb11	260
AnnaBridge	175:af195413fb11	261	#if defined(FTFA_FPROTH0_PROT_MASK) \|\| defined(FTFE_FPROTH0_PROT_MASK) \|\| defined(FTFL_FPROTH0_PROT_MASK)
AnnaBridge	175:af195413fb11	262	#define FTFx_FPROT_HIGH_REG (FTFx->FPROTH3)
AnnaBridge	175:af195413fb11	263	#define FTFx_FPROTH3_REG (FTFx->FPROTH3)
AnnaBridge	175:af195413fb11	264	#define FTFx_FPROTH2_REG (FTFx->FPROTH2)
AnnaBridge	175:af195413fb11	265	#define FTFx_FPROTH1_REG (FTFx->FPROTH1)
AnnaBridge	175:af195413fb11	266	#define FTFx_FPROTH0_REG (FTFx->FPROTH0)
AnnaBridge	175:af195413fb11	267	#endif
AnnaBridge	175:af195413fb11	268
AnnaBridge	175:af195413fb11	269	#if defined(FTFA_FPROTL0_PROT_MASK) \|\| defined(FTFE_FPROTL0_PROT_MASK) \|\| defined(FTFL_FPROTL0_PROT_MASK)
AnnaBridge	175:af195413fb11	270	#define FTFx_FPROT_LOW_REG (FTFx->FPROTL3)
AnnaBridge	175:af195413fb11	271	#define FTFx_FPROTL3_REG (FTFx->FPROTL3)
AnnaBridge	175:af195413fb11	272	#define FTFx_FPROTL2_REG (FTFx->FPROTL2)
AnnaBridge	175:af195413fb11	273	#define FTFx_FPROTL1_REG (FTFx->FPROTL1)
AnnaBridge	175:af195413fb11	274	#define FTFx_FPROTL0_REG (FTFx->FPROTL0)
AnnaBridge	175:af195413fb11	275	#elif defined(FTFA_FPROT0_PROT_MASK) \|\| defined(FTFE_FPROT0_PROT_MASK) \|\| defined(FTFL_FPROT0_PROT_MASK)
AnnaBridge	175:af195413fb11	276	#define FTFx_FPROT_LOW_REG (FTFx->FPROT3)
AnnaBridge	175:af195413fb11	277	#define FTFx_FPROTL3_REG (FTFx->FPROT3)
AnnaBridge	175:af195413fb11	278	#define FTFx_FPROTL2_REG (FTFx->FPROT2)
AnnaBridge	175:af195413fb11	279	#define FTFx_FPROTL1_REG (FTFx->FPROT1)
AnnaBridge	175:af195413fb11	280	#define FTFx_FPROTL0_REG (FTFx->FPROT0)
AnnaBridge	175:af195413fb11	281	#endif
AnnaBridge	175:af195413fb11	282
AnnaBridge	175:af195413fb11	283	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	284	#define FTFx_FPROTSH_REG (FTFx->FPROTSH)
AnnaBridge	175:af195413fb11	285	#define FTFx_FPROTSL_REG (FTFx->FPROTSL)
AnnaBridge	175:af195413fb11	286	#endif
AnnaBridge	175:af195413fb11	287
AnnaBridge	175:af195413fb11	288	#define FTFx_XACCH3_REG (FTFx->XACCH3)
AnnaBridge	175:af195413fb11	289	#define FTFx_XACCL3_REG (FTFx->XACCL3)
AnnaBridge	175:af195413fb11	290
AnnaBridge	175:af195413fb11	291	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER
AnnaBridge	175:af195413fb11	292	#define FTFx_XACCSH_REG (FTFx->XACCSH)
AnnaBridge	175:af195413fb11	293	#define FTFx_XACCSL_REG (FTFx->XACCSL)
AnnaBridge	175:af195413fb11	294	#endif
AnnaBridge	175:af195413fb11	295	/@}/
AnnaBridge	175:af195413fb11	296
AnnaBridge	175:af195413fb11	297	/*!
<>	154:37f96f9d4de2	298	* @brief Enumeration for access segment property.
<>	154:37f96f9d4de2	299	*/
<>	154:37f96f9d4de2	300	enum _flash_access_segment_property
<>	154:37f96f9d4de2	301	{
AnnaBridge	175:af195413fb11	302	kFLASH_AccessSegmentBase = 256UL,
<>	154:37f96f9d4de2	303	};
<>	154:37f96f9d4de2	304
<>	154:37f96f9d4de2	305	/*!
<>	154:37f96f9d4de2	306	* @brief Enumeration for flash config area.
<>	154:37f96f9d4de2	307	*/
<>	154:37f96f9d4de2	308	enum _flash_config_area_range
<>	154:37f96f9d4de2	309	{
AnnaBridge	175:af195413fb11	310	kFLASH_ConfigAreaStart = 0x400U,
AnnaBridge	175:af195413fb11	311	kFLASH_ConfigAreaEnd = 0x40FU
<>	154:37f96f9d4de2	312	};
<>	154:37f96f9d4de2	313
<>	154:37f96f9d4de2	314	/*!
<>	154:37f96f9d4de2	315	* @name Flash register access type defines
<>	154:37f96f9d4de2	316	* @{
<>	154:37f96f9d4de2	317	*/
AnnaBridge	175:af195413fb11	318	#define FTFx_REG8_ACCESS_TYPE volatile uint8_t *
<>	154:37f96f9d4de2	319	#define FTFx_REG32_ACCESS_TYPE volatile uint32_t *
AnnaBridge	175:af195413fb11	320	/@}/
AnnaBridge	175:af195413fb11	321
AnnaBridge	175:af195413fb11	322	/*!
AnnaBridge	175:af195413fb11	323	* @brief MCM cache register access info defines.
AnnaBridge	175:af195413fb11	324	*/
AnnaBridge	175:af195413fb11	325	#if defined(MCM_PLACR_CFCC_MASK)
AnnaBridge	175:af195413fb11	326	#define MCM_CACHE_CLEAR_MASK MCM_PLACR_CFCC_MASK
AnnaBridge	175:af195413fb11	327	#define MCM_CACHE_CLEAR_SHIFT MCM_PLACR_CFCC_SHIFT
AnnaBridge	175:af195413fb11	328	#if defined(MCM)
AnnaBridge	175:af195413fb11	329	#define MCM0_CACHE_REG MCM->PLACR
AnnaBridge	175:af195413fb11	330	#elif defined(MCM0)
AnnaBridge	175:af195413fb11	331	#define MCM0_CACHE_REG MCM0->PLACR
AnnaBridge	175:af195413fb11	332	#endif
AnnaBridge	175:af195413fb11	333	#if defined(MCM1)
AnnaBridge	175:af195413fb11	334	#define MCM1_CACHE_REG MCM1->PLACR
AnnaBridge	175:af195413fb11	335	#endif
AnnaBridge	175:af195413fb11	336	#elif defined(MCM_CPCR2_CCBC_MASK)
AnnaBridge	175:af195413fb11	337	#define MCM_CACHE_CLEAR_MASK MCM_CPCR2_CCBC_MASK
AnnaBridge	175:af195413fb11	338	#define MCM_CACHE_CLEAR_SHIFT MCM_CPCR2_CCBC_SHIFT
AnnaBridge	175:af195413fb11	339	#if defined(MCM)
AnnaBridge	175:af195413fb11	340	#define MCM0_CACHE_REG MCM->CPCR2
AnnaBridge	175:af195413fb11	341	#elif defined(MCM0)
AnnaBridge	175:af195413fb11	342	#define MCM0_CACHE_REG MCM0->CPCR2
AnnaBridge	175:af195413fb11	343	#endif
AnnaBridge	175:af195413fb11	344	#if defined(MCM1)
AnnaBridge	175:af195413fb11	345	#define MCM1_CACHE_REG MCM1->CPCR2
AnnaBridge	175:af195413fb11	346	#endif
AnnaBridge	175:af195413fb11	347	#endif
AnnaBridge	175:af195413fb11	348
AnnaBridge	175:af195413fb11	349	/*!
AnnaBridge	175:af195413fb11	350	* @brief MSCM cache register access info defines.
AnnaBridge	175:af195413fb11	351	*/
AnnaBridge	175:af195413fb11	352	#if defined(MSCM_OCMDR_OCM1_MASK)
AnnaBridge	175:af195413fb11	353	#define MSCM_SPECULATION_DISABLE_MASK MSCM_OCMDR_OCM1_MASK
AnnaBridge	175:af195413fb11	354	#define MSCM_SPECULATION_DISABLE_SHIFT MSCM_OCMDR_OCM1_SHIFT
AnnaBridge	175:af195413fb11	355	#define MSCM_SPECULATION_DISABLE(x) MSCM_OCMDR_OCM1(x)
AnnaBridge	175:af195413fb11	356	#elif defined(MSCM_OCMDR_OCMC1_MASK)
AnnaBridge	175:af195413fb11	357	#define MSCM_SPECULATION_DISABLE_MASK MSCM_OCMDR_OCMC1_MASK
AnnaBridge	175:af195413fb11	358	#define MSCM_SPECULATION_DISABLE_SHIFT MSCM_OCMDR_OCMC1_SHIFT
AnnaBridge	175:af195413fb11	359	#define MSCM_SPECULATION_DISABLE(x) MSCM_OCMDR_OCMC1(x)
AnnaBridge	175:af195413fb11	360	#endif
AnnaBridge	175:af195413fb11	361
AnnaBridge	175:af195413fb11	362	/*!
AnnaBridge	175:af195413fb11	363	* @brief MSCM prefetch speculation defines.
AnnaBridge	175:af195413fb11	364	*/
AnnaBridge	175:af195413fb11	365	#define MSCM_OCMDR_OCMC1_DFDS_MASK (0x10U)
AnnaBridge	175:af195413fb11	366	#define MSCM_OCMDR_OCMC1_DFCS_MASK (0x20U)
AnnaBridge	175:af195413fb11	367
AnnaBridge	175:af195413fb11	368	#define MSCM_OCMDR_OCMC1_DFDS_SHIFT (4U)
AnnaBridge	175:af195413fb11	369	#define MSCM_OCMDR_OCMC1_DFCS_SHIFT (5U)
AnnaBridge	175:af195413fb11	370
AnnaBridge	175:af195413fb11	371	/*!
AnnaBridge	175:af195413fb11	372	* @brief Flash size encoding rule.
AnnaBridge	175:af195413fb11	373	*/
AnnaBridge	175:af195413fb11	374	#define FLASH_MEMORY_SIZE_ENCODING_RULE_K1_2 (0x00U)
AnnaBridge	175:af195413fb11	375	#define FLASH_MEMORY_SIZE_ENCODING_RULE_K3 (0x01U)
AnnaBridge	175:af195413fb11	376
AnnaBridge	175:af195413fb11	377	#if defined(K32W042S1M2_M0P_SERIES) \|\| defined(K32W042S1M2_M4_SERIES)
AnnaBridge	175:af195413fb11	378	#define FLASH_MEMORY_SIZE_ENCODING_RULE (FLASH_MEMORY_SIZE_ENCODING_RULE_K3)
AnnaBridge	175:af195413fb11	379	#else
AnnaBridge	175:af195413fb11	380	#define FLASH_MEMORY_SIZE_ENCODING_RULE (FLASH_MEMORY_SIZE_ENCODING_RULE_K1_2)
AnnaBridge	175:af195413fb11	381	#endif
<>	154:37f96f9d4de2	382
<>	154:37f96f9d4de2	383	/*******************************************************************************
<>	154:37f96f9d4de2	384	* Prototypes
<>	154:37f96f9d4de2	385	******************************************************************************/
<>	154:37f96f9d4de2	386
<>	154:37f96f9d4de2	387	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	388	/! @brief Copy flash_run_command() to RAM/
AnnaBridge	175:af195413fb11	389	static void copy_flash_run_command(uint32_t *flashRunCommand);
<>	154:37f96f9d4de2	390	/! @brief Copy flash_cache_clear_command() to RAM/
AnnaBridge	175:af195413fb11	391	static void copy_flash_common_bit_operation(uint32_t *flashCommonBitOperation);
<>	154:37f96f9d4de2	392	/! @brief Check whether flash execute-in-ram functions are ready/
<>	154:37f96f9d4de2	393	static status_t flash_check_execute_in_ram_function_info(flash_config_t *config);
<>	154:37f96f9d4de2	394	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	395
<>	154:37f96f9d4de2	396	/! @brief Internal function Flash command sequence. Called by driver APIs only/
<>	154:37f96f9d4de2	397	static status_t flash_command_sequence(flash_config_t *config);
<>	154:37f96f9d4de2	398
<>	154:37f96f9d4de2	399	/! @brief Perform the cache clear to the flash/
<>	154:37f96f9d4de2	400	void flash_cache_clear(flash_config_t *config);
<>	154:37f96f9d4de2	401
AnnaBridge	175:af195413fb11	402	/! @brief Process the cache to the flash/
AnnaBridge	175:af195413fb11	403	static void flash_cache_clear_process(flash_config_t *config, flash_cache_clear_process_t process);
AnnaBridge	175:af195413fb11	404
<>	154:37f96f9d4de2	405	/! @brief Validates the range and alignment of the given address range./
<>	154:37f96f9d4de2	406	static status_t flash_check_range(flash_config_t *config,
<>	154:37f96f9d4de2	407	uint32_t startAddress,
<>	154:37f96f9d4de2	408	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	409	uint32_t alignmentBaseline);
<>	154:37f96f9d4de2	410	/! @brief Gets the right address, sector and block size of current flash type which is indicated by address./
<>	154:37f96f9d4de2	411	static status_t flash_get_matched_operation_info(flash_config_t *config,
<>	154:37f96f9d4de2	412	uint32_t address,
<>	154:37f96f9d4de2	413	flash_operation_config_t *info);
<>	154:37f96f9d4de2	414	/! @brief Validates the given user key for flash erase APIs./
<>	154:37f96f9d4de2	415	static status_t flash_check_user_key(uint32_t key);
<>	154:37f96f9d4de2	416
<>	154:37f96f9d4de2	417	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	418	/! @brief Updates FlexNVM memory partition status according to data flash 0 IFR./
<>	154:37f96f9d4de2	419	static status_t flash_update_flexnvm_memory_partition_status(flash_config_t *config);
<>	154:37f96f9d4de2	420	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	421
<>	154:37f96f9d4de2	422	#if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD
<>	154:37f96f9d4de2	423	/! @brief Validates the range of the given resource address./
<>	154:37f96f9d4de2	424	static status_t flash_check_resource_range(uint32_t start,
<>	154:37f96f9d4de2	425	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	426	uint32_t alignmentBaseline,
<>	154:37f96f9d4de2	427	flash_read_resource_option_t option);
<>	154:37f96f9d4de2	428	#endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */
<>	154:37f96f9d4de2	429
<>	154:37f96f9d4de2	430	#if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD
<>	154:37f96f9d4de2	431	/! @brief Validates the gived swap control option./
<>	154:37f96f9d4de2	432	static status_t flash_check_swap_control_option(flash_swap_control_option_t option);
<>	154:37f96f9d4de2	433	#endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */
<>	154:37f96f9d4de2	434
<>	154:37f96f9d4de2	435	#if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP
<>	154:37f96f9d4de2	436	/! @brief Validates the gived address to see if it is equal to swap indicator address in pflash swap IFR./
<>	154:37f96f9d4de2	437	static status_t flash_validate_swap_indicator_address(flash_config_t *config, uint32_t address);
<>	154:37f96f9d4de2	438	#endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
<>	154:37f96f9d4de2	439
<>	154:37f96f9d4de2	440	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	441	/! @brief Validates the gived flexram function option./
<>	154:37f96f9d4de2	442	static inline status_t flasn_check_flexram_function_option_range(flash_flexram_function_option_t option);
<>	154:37f96f9d4de2	443	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
<>	154:37f96f9d4de2	444
AnnaBridge	175:af195413fb11	445	/! @brief Gets the flash protection information (region size, region count)./
AnnaBridge	175:af195413fb11	446	static status_t flash_get_protection_info(flash_config_t config, flash_protection_config_t info);
AnnaBridge	175:af195413fb11	447
AnnaBridge	175:af195413fb11	448	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL
AnnaBridge	175:af195413fb11	449	/! @brief Gets the flash Execute-Only access information (Segment size, Segment count)./
AnnaBridge	175:af195413fb11	450	static status_t flash_get_access_info(flash_config_t config, flash_access_config_t info);
AnnaBridge	175:af195413fb11	451	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */
AnnaBridge	175:af195413fb11	452
AnnaBridge	175:af195413fb11	453	#if FLASH_CACHE_IS_CONTROLLED_BY_MCM
AnnaBridge	175:af195413fb11	454	/! @brief Performs the cache clear to the flash by MCM./
AnnaBridge	175:af195413fb11	455	void mcm_flash_cache_clear(flash_config_t *config);
AnnaBridge	175:af195413fb11	456	#endif /* FLASH_CACHE_IS_CONTROLLED_BY_MCM */
AnnaBridge	175:af195413fb11	457
AnnaBridge	175:af195413fb11	458	#if FLASH_CACHE_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	459	/! @brief Performs the cache clear to the flash by FMC./
AnnaBridge	175:af195413fb11	460	void fmc_flash_cache_clear(void);
AnnaBridge	175:af195413fb11	461	#endif /* FLASH_CACHE_IS_CONTROLLED_BY_FMC */
AnnaBridge	175:af195413fb11	462
AnnaBridge	175:af195413fb11	463	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	464	/! @brief Sets the prefetch speculation buffer to the flash by MSCM./
AnnaBridge	175:af195413fb11	465	void mscm_flash_prefetch_speculation_enable(bool enable);
AnnaBridge	175:af195413fb11	466	#endif /* FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM */
AnnaBridge	175:af195413fb11	467
AnnaBridge	175:af195413fb11	468	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	469	/! @brief Performs the prefetch speculation buffer clear to the flash by FMC./
AnnaBridge	175:af195413fb11	470	void fmc_flash_prefetch_speculation_clear(void);
AnnaBridge	175:af195413fb11	471	#endif /* FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC */
AnnaBridge	175:af195413fb11	472
<>	154:37f96f9d4de2	473	/*******************************************************************************
<>	154:37f96f9d4de2	474	* Variables
<>	154:37f96f9d4de2	475	******************************************************************************/
<>	154:37f96f9d4de2	476
<>	154:37f96f9d4de2	477	/! @brief Access to FTFx->FCCOB /
AnnaBridge	175:af195413fb11	478	volatile uint32_t const kFCCOBx = (volatile uint32_t )&FTFx_FCCOB3_REG;
AnnaBridge	175:af195413fb11	479	/! @brief Access to FTFx->FPROT /
AnnaBridge	175:af195413fb11	480	volatile uint32_t const kFPROTL = (volatile uint32_t )&FTFx_FPROT_LOW_REG;
AnnaBridge	175:af195413fb11	481	#if defined(FTFx_FPROT_HIGH_REG)
AnnaBridge	175:af195413fb11	482	volatile uint32_t const kFPROTH = (volatile uint32_t )&FTFx_FPROT_HIGH_REG;
<>	154:37f96f9d4de2	483	#endif
<>	154:37f96f9d4de2	484
AnnaBridge	175:af195413fb11	485	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	486	volatile uint8_t const kFPROTSL = (volatile uint8_t )&FTFx_FPROTSL_REG;
AnnaBridge	175:af195413fb11	487	volatile uint8_t const kFPROTSH = (volatile uint8_t )&FTFx_FPROTSH_REG;
<>	154:37f96f9d4de2	488	#endif
<>	154:37f96f9d4de2	489
<>	154:37f96f9d4de2	490	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	491	/! @brief A function pointer used to point to relocated flash_run_command() /
AnnaBridge	175:af195413fb11	492	static void (*callFlashRunCommand)(FTFx_REG8_ACCESS_TYPE ftfx_fstat);
AnnaBridge	175:af195413fb11	493	/! @brief A function pointer used to point to relocated flash_common_bit_operation() /
AnnaBridge	175:af195413fb11	494	static void (*callFlashCommonBitOperation)(FTFx_REG32_ACCESS_TYPE base,
AnnaBridge	175:af195413fb11	495	uint32_t bitMask,
AnnaBridge	175:af195413fb11	496	uint32_t bitShift,
AnnaBridge	175:af195413fb11	497	uint32_t bitValue);
AnnaBridge	175:af195413fb11	498
AnnaBridge	175:af195413fb11	499	/*!
AnnaBridge	175:af195413fb11	500	* @brief Position independent code of flash_run_command()
AnnaBridge	175:af195413fb11	501	*
AnnaBridge	175:af195413fb11	502	* Note1: The prototype of C function is shown as below:
AnnaBridge	175:af195413fb11	503	* @code
AnnaBridge	175:af195413fb11	504	* void flash_run_command(FTFx_REG8_ACCESS_TYPE ftfx_fstat)
AnnaBridge	175:af195413fb11	505	* {
AnnaBridge	175:af195413fb11	506	* // clear CCIF bit
AnnaBridge	175:af195413fb11	507	* *ftfx_fstat = FTFx_FSTAT_CCIF_MASK;
AnnaBridge	175:af195413fb11	508	*
AnnaBridge	175:af195413fb11	509	* // Check CCIF bit of the flash status register, wait till it is set.
AnnaBridge	175:af195413fb11	510	* // IP team indicates that this loop will always complete.
AnnaBridge	175:af195413fb11	511	* while (!((*ftfx_fstat) & FTFx_FSTAT_CCIF_MASK))
AnnaBridge	175:af195413fb11	512	* {
AnnaBridge	175:af195413fb11	513	* }
AnnaBridge	175:af195413fb11	514	* }
AnnaBridge	175:af195413fb11	515	* @endcode
AnnaBridge	175:af195413fb11	516	* Note2: The binary code is generated by IAR 7.70.1
AnnaBridge	175:af195413fb11	517	*/
AnnaBridge	175:af195413fb11	518	const static uint16_t s_flashRunCommandFunctionCode[] = {
AnnaBridge	175:af195413fb11	519	0x2180, /* MOVS R1, #128 ; 0x80 */
AnnaBridge	175:af195413fb11	520	0x7001, /* STRB R1, [R0] */
AnnaBridge	175:af195413fb11	521	/* @4: */
AnnaBridge	175:af195413fb11	522	0x7802, /* LDRB R2, [R0] */
AnnaBridge	175:af195413fb11	523	0x420a, /* TST R2, R1 */
AnnaBridge	175:af195413fb11	524	0xd0fc, /* BEQ.N @4 */
AnnaBridge	175:af195413fb11	525	0x4770 /* BX LR */
AnnaBridge	175:af195413fb11	526	};
AnnaBridge	175:af195413fb11	527
AnnaBridge	175:af195413fb11	528	/*!
AnnaBridge	175:af195413fb11	529	* @brief Position independent code of flash_common_bit_operation()
AnnaBridge	175:af195413fb11	530	*
AnnaBridge	175:af195413fb11	531	* Note1: The prototype of C function is shown as below:
AnnaBridge	175:af195413fb11	532	* @code
AnnaBridge	175:af195413fb11	533	* void flash_common_bit_operation(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift, uint32_t
AnnaBridge	175:af195413fb11	534	* bitValue)
AnnaBridge	175:af195413fb11	535	* {
AnnaBridge	175:af195413fb11	536	* if (bitMask)
AnnaBridge	175:af195413fb11	537	* {
AnnaBridge	175:af195413fb11	538	* uint32_t value = (((uint32_t)(((uint32_t)(bitValue)) << bitShift)) & bitMask);
AnnaBridge	175:af195413fb11	539	* base = (base & (~bitMask)) \| value;
AnnaBridge	175:af195413fb11	540	* }
AnnaBridge	175:af195413fb11	541	*
AnnaBridge	175:af195413fb11	542	* __ISB();
AnnaBridge	175:af195413fb11	543	* __DSB();
AnnaBridge	175:af195413fb11	544	* }
AnnaBridge	175:af195413fb11	545	* @endcode
AnnaBridge	175:af195413fb11	546	* Note2: The binary code is generated by IAR 7.70.1
AnnaBridge	175:af195413fb11	547	*/
AnnaBridge	175:af195413fb11	548	const static uint16_t s_flashCommonBitOperationFunctionCode[] = {
AnnaBridge	175:af195413fb11	549	0xb510, /* PUSH {R4, LR} */
AnnaBridge	175:af195413fb11	550	0x2900, /* CMP R1, #0 */
AnnaBridge	175:af195413fb11	551	0xd005, /* BEQ.N @12 */
AnnaBridge	175:af195413fb11	552	0x6804, /* LDR R4, [R0] */
AnnaBridge	175:af195413fb11	553	0x438c, /* BICS R4, R4, R1 */
AnnaBridge	175:af195413fb11	554	0x4093, /* LSLS R3, R3, R2 */
AnnaBridge	175:af195413fb11	555	0x4019, /* ANDS R1, R1, R3 */
AnnaBridge	175:af195413fb11	556	0x4321, /* ORRS R1, R1, R4 */
AnnaBridge	175:af195413fb11	557	0x6001, /* STR R1, [R0] */
AnnaBridge	175:af195413fb11	558	/* @12: */
AnnaBridge	175:af195413fb11	559	0xf3bf, 0x8f6f, /* ISB */
AnnaBridge	175:af195413fb11	560	0xf3bf, 0x8f4f, /* DSB */
AnnaBridge	175:af195413fb11	561	0xbd10 /* POP {R4, PC} */
AnnaBridge	175:af195413fb11	562	};
<>	154:37f96f9d4de2	563	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	564
<>	154:37f96f9d4de2	565	#if (FLASH_DRIVER_IS_FLASH_RESIDENT && !FLASH_DRIVER_IS_EXPORTED)
<>	154:37f96f9d4de2	566	/! @brief A static buffer used to hold flash_run_command() /
AnnaBridge	175:af195413fb11	567	static uint32_t s_flashRunCommand[kFLASH_ExecuteInRamFunctionMaxSizeInWords];
AnnaBridge	175:af195413fb11	568	/! @brief A static buffer used to hold flash_common_bit_operation() /
AnnaBridge	175:af195413fb11	569	static uint32_t s_flashCommonBitOperation[kFLASH_ExecuteInRamFunctionMaxSizeInWords];
<>	154:37f96f9d4de2	570	/! @brief Flash execute-in-ram function information /
<>	154:37f96f9d4de2	571	static flash_execute_in_ram_function_config_t s_flashExecuteInRamFunctionInfo;
<>	154:37f96f9d4de2	572	#endif
<>	154:37f96f9d4de2	573
<>	154:37f96f9d4de2	574	/*!
<>	154:37f96f9d4de2	575	* @brief Table of pflash sizes.
<>	154:37f96f9d4de2	576	*
<>	154:37f96f9d4de2	577	* The index into this table is the value of the SIM_FCFG1.PFSIZE bitfield.
<>	154:37f96f9d4de2	578	*
<>	154:37f96f9d4de2	579	* The values in this table have been right shifted 10 bits so that they will all fit within
<>	154:37f96f9d4de2	580	* an 16-bit integer. To get the actual flash density, you must left shift the looked up value
<>	154:37f96f9d4de2	581	* by 10 bits.
<>	154:37f96f9d4de2	582	*
<>	154:37f96f9d4de2	583	* Elements of this table have a value of 0 in cases where the PFSIZE bitfield value is
<>	154:37f96f9d4de2	584	* reserved.
<>	154:37f96f9d4de2	585	*
<>	154:37f96f9d4de2	586	* Code to use the table:
<>	154:37f96f9d4de2	587	* @code
<>	154:37f96f9d4de2	588	* uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT;
<>	154:37f96f9d4de2	589	* flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10;
<>	154:37f96f9d4de2	590	* @endcode
<>	154:37f96f9d4de2	591	*/
AnnaBridge	175:af195413fb11	592	#if (FLASH_MEMORY_SIZE_ENCODING_RULE == FLASH_MEMORY_SIZE_ENCODING_RULE_K1_2)
<>	154:37f96f9d4de2	593	const uint16_t kPFlashDensities[] = {
<>	154:37f96f9d4de2	594	8, /* 0x0 - 8192, 8KB */
<>	154:37f96f9d4de2	595	16, /* 0x1 - 16384, 16KB */
<>	154:37f96f9d4de2	596	24, /* 0x2 - 24576, 24KB */
<>	154:37f96f9d4de2	597	32, /* 0x3 - 32768, 32KB */
<>	154:37f96f9d4de2	598	48, /* 0x4 - 49152, 48KB */
<>	154:37f96f9d4de2	599	64, /* 0x5 - 65536, 64KB */
<>	154:37f96f9d4de2	600	96, /* 0x6 - 98304, 96KB */
<>	154:37f96f9d4de2	601	128, /* 0x7 - 131072, 128KB */
<>	154:37f96f9d4de2	602	192, /* 0x8 - 196608, 192KB */
<>	154:37f96f9d4de2	603	256, /* 0x9 - 262144, 256KB */
<>	154:37f96f9d4de2	604	384, /* 0xa - 393216, 384KB */
<>	154:37f96f9d4de2	605	512, /* 0xb - 524288, 512KB */
<>	154:37f96f9d4de2	606	768, /* 0xc - 786432, 768KB */
<>	154:37f96f9d4de2	607	1024, /* 0xd - 1048576, 1MB */
<>	154:37f96f9d4de2	608	1536, /* 0xe - 1572864, 1.5MB */
<>	154:37f96f9d4de2	609	/* 2048, 0xf - 2097152, 2MB */
<>	154:37f96f9d4de2	610	};
AnnaBridge	175:af195413fb11	611	#elif(FLASH_MEMORY_SIZE_ENCODING_RULE == FLASH_MEMORY_SIZE_ENCODING_RULE_K3)
AnnaBridge	175:af195413fb11	612	const uint16_t kPFlashDensities[] = {
AnnaBridge	175:af195413fb11	613	0, /* 0x0 - undefined */
AnnaBridge	175:af195413fb11	614	0, /* 0x1 - undefined */
AnnaBridge	175:af195413fb11	615	0, /* 0x2 - undefined */
AnnaBridge	175:af195413fb11	616	0, /* 0x3 - undefined */
AnnaBridge	175:af195413fb11	617	0, /* 0x4 - undefined */
AnnaBridge	175:af195413fb11	618	0, /* 0x5 - undefined */
AnnaBridge	175:af195413fb11	619	0, /* 0x6 - undefined */
AnnaBridge	175:af195413fb11	620	0, /* 0x7 - undefined */
AnnaBridge	175:af195413fb11	621	0, /* 0x8 - undefined */
AnnaBridge	175:af195413fb11	622	0, /* 0x9 - undefined */
AnnaBridge	175:af195413fb11	623	256, /* 0xa - 262144, 256KB */
AnnaBridge	175:af195413fb11	624	0, /* 0xb - undefined */
AnnaBridge	175:af195413fb11	625	1024, /* 0xc - 1048576, 1MB */
AnnaBridge	175:af195413fb11	626	0, /* 0xd - undefined */
AnnaBridge	175:af195413fb11	627	0, /* 0xe - undefined */
AnnaBridge	175:af195413fb11	628	0, /* 0xf - undefined */
AnnaBridge	175:af195413fb11	629	};
AnnaBridge	175:af195413fb11	630	#endif
<>	154:37f96f9d4de2	631
<>	154:37f96f9d4de2	632	/*******************************************************************************
<>	154:37f96f9d4de2	633	* Code
<>	154:37f96f9d4de2	634	******************************************************************************/
<>	154:37f96f9d4de2	635
<>	154:37f96f9d4de2	636	status_t FLASH_Init(flash_config_t *config)
<>	154:37f96f9d4de2	637	{
<>	154:37f96f9d4de2	638	if (config == NULL)
<>	154:37f96f9d4de2	639	{
<>	154:37f96f9d4de2	640	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	641	}
<>	154:37f96f9d4de2	642
AnnaBridge	175:af195413fb11	643	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED
AnnaBridge	175:af195413fb11	644	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
<>	154:37f96f9d4de2	645	{
AnnaBridge	175:af195413fb11	646	/* calculate the flash density from SIM_FCFG1.PFSIZE */
AnnaBridge	175:af195413fb11	647	#if defined(SIM_FCFG1_CORE1_PFSIZE_MASK)
AnnaBridge	175:af195413fb11	648	uint32_t flashDensity;
AnnaBridge	175:af195413fb11	649	uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE1_PFSIZE_MASK) >> SIM_FCFG1_CORE1_PFSIZE_SHIFT;
AnnaBridge	175:af195413fb11	650	if (pfsize == 0xf)
AnnaBridge	175:af195413fb11	651	{
AnnaBridge	175:af195413fb11	652	flashDensity = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE;
AnnaBridge	175:af195413fb11	653	}
AnnaBridge	175:af195413fb11	654	else
AnnaBridge	175:af195413fb11	655	{
AnnaBridge	175:af195413fb11	656	flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10;
AnnaBridge	175:af195413fb11	657	}
AnnaBridge	175:af195413fb11	658	config->PFlashTotalSize = flashDensity;
AnnaBridge	175:af195413fb11	659	#else
AnnaBridge	175:af195413fb11	660	/* Unused code to solve MISRA-C issue*/
AnnaBridge	175:af195413fb11	661	config->PFlashBlockBase = kPFlashDensities[0];
AnnaBridge	175:af195413fb11	662	config->PFlashTotalSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE;
AnnaBridge	175:af195413fb11	663	#endif
AnnaBridge	175:af195413fb11	664	config->PFlashBlockBase = FSL_FEATURE_FLASH_PFLASH_1_START_ADDRESS;
AnnaBridge	175:af195413fb11	665	config->PFlashBlockCount = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT;
AnnaBridge	175:af195413fb11	666	config->PFlashSectorSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SECTOR_SIZE;
<>	154:37f96f9d4de2	667	}
<>	154:37f96f9d4de2	668	else
AnnaBridge	175:af195413fb11	669	#endif /* FLASH_SSD_IS_SECONDARY_FLASH_ENABLED */
<>	154:37f96f9d4de2	670	{
AnnaBridge	175:af195413fb11	671	uint32_t flashDensity;
AnnaBridge	175:af195413fb11	672
AnnaBridge	175:af195413fb11	673	/* calculate the flash density from SIM_FCFG1.PFSIZE */
AnnaBridge	175:af195413fb11	674	#if defined(SIM_FCFG1_CORE0_PFSIZE_MASK)
AnnaBridge	175:af195413fb11	675	uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE0_PFSIZE_MASK) >> SIM_FCFG1_CORE0_PFSIZE_SHIFT;
AnnaBridge	175:af195413fb11	676	#elif defined(SIM_FCFG1_PFSIZE_MASK)
AnnaBridge	175:af195413fb11	677	uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT;
AnnaBridge	175:af195413fb11	678	#else
AnnaBridge	175:af195413fb11	679	#error "Unknown flash size"
AnnaBridge	175:af195413fb11	680	#endif
AnnaBridge	175:af195413fb11	681	/* PFSIZE=0xf means that on customer parts the IFR was not correctly programmed.
AnnaBridge	175:af195413fb11	682	* We just use the pre-defined flash size in feature file here to support pre-production parts */
AnnaBridge	175:af195413fb11	683	if (pfsize == 0xf)
AnnaBridge	175:af195413fb11	684	{
AnnaBridge	175:af195413fb11	685	flashDensity = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE;
AnnaBridge	175:af195413fb11	686	}
AnnaBridge	175:af195413fb11	687	else
AnnaBridge	175:af195413fb11	688	{
AnnaBridge	175:af195413fb11	689	flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10;
AnnaBridge	175:af195413fb11	690	}
AnnaBridge	175:af195413fb11	691
AnnaBridge	175:af195413fb11	692	/* fill out a few of the structure members */
AnnaBridge	175:af195413fb11	693	config->PFlashBlockBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS;
AnnaBridge	175:af195413fb11	694	config->PFlashTotalSize = flashDensity;
AnnaBridge	175:af195413fb11	695	config->PFlashBlockCount = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT;
AnnaBridge	175:af195413fb11	696	config->PFlashSectorSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE;
<>	154:37f96f9d4de2	697	}
<>	154:37f96f9d4de2	698
AnnaBridge	175:af195413fb11	699	{
<>	154:37f96f9d4de2	700	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL
AnnaBridge	175:af195413fb11	701	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER
AnnaBridge	175:af195413fb11	702	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
AnnaBridge	175:af195413fb11	703	{
AnnaBridge	175:af195413fb11	704	config->PFlashAccessSegmentSize = kFLASH_AccessSegmentBase << FTFx->FACSSS;
AnnaBridge	175:af195413fb11	705	config->PFlashAccessSegmentCount = FTFx->FACSNS;
AnnaBridge	175:af195413fb11	706	}
AnnaBridge	175:af195413fb11	707	else
AnnaBridge	175:af195413fb11	708	#endif
AnnaBridge	175:af195413fb11	709	{
AnnaBridge	175:af195413fb11	710	config->PFlashAccessSegmentSize = kFLASH_AccessSegmentBase << FTFx->FACSS;
AnnaBridge	175:af195413fb11	711	config->PFlashAccessSegmentCount = FTFx->FACSN;
AnnaBridge	175:af195413fb11	712	}
<>	154:37f96f9d4de2	713	#else
AnnaBridge	175:af195413fb11	714	config->PFlashAccessSegmentSize = 0;
AnnaBridge	175:af195413fb11	715	config->PFlashAccessSegmentCount = 0;
<>	154:37f96f9d4de2	716	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */
AnnaBridge	175:af195413fb11	717	}
<>	154:37f96f9d4de2	718
<>	154:37f96f9d4de2	719	config->PFlashCallback = NULL;
<>	154:37f96f9d4de2	720
<>	154:37f96f9d4de2	721	/* copy required flash commands to RAM */
<>	154:37f96f9d4de2	722	#if (FLASH_DRIVER_IS_FLASH_RESIDENT && !FLASH_DRIVER_IS_EXPORTED)
<>	154:37f96f9d4de2	723	if (kStatus_FLASH_Success != flash_check_execute_in_ram_function_info(config))
<>	154:37f96f9d4de2	724	{
<>	154:37f96f9d4de2	725	s_flashExecuteInRamFunctionInfo.activeFunctionCount = 0;
<>	154:37f96f9d4de2	726	s_flashExecuteInRamFunctionInfo.flashRunCommand = s_flashRunCommand;
AnnaBridge	175:af195413fb11	727	s_flashExecuteInRamFunctionInfo.flashCommonBitOperation = s_flashCommonBitOperation;
<>	154:37f96f9d4de2	728	config->flashExecuteInRamFunctionInfo = &s_flashExecuteInRamFunctionInfo.activeFunctionCount;
<>	154:37f96f9d4de2	729	FLASH_PrepareExecuteInRamFunctions(config);
<>	154:37f96f9d4de2	730	}
<>	154:37f96f9d4de2	731	#endif
<>	154:37f96f9d4de2	732
<>	154:37f96f9d4de2	733	config->FlexRAMBlockBase = FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS;
<>	154:37f96f9d4de2	734	config->FlexRAMTotalSize = FSL_FEATURE_FLASH_FLEX_RAM_SIZE;
<>	154:37f96f9d4de2	735
<>	154:37f96f9d4de2	736	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	737	{
<>	154:37f96f9d4de2	738	status_t returnCode;
<>	154:37f96f9d4de2	739	config->DFlashBlockBase = FSL_FEATURE_FLASH_FLEX_NVM_START_ADDRESS;
<>	154:37f96f9d4de2	740	returnCode = flash_update_flexnvm_memory_partition_status(config);
<>	154:37f96f9d4de2	741	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	742	{
<>	154:37f96f9d4de2	743	return returnCode;
<>	154:37f96f9d4de2	744	}
<>	154:37f96f9d4de2	745	}
<>	154:37f96f9d4de2	746	#endif
<>	154:37f96f9d4de2	747
<>	154:37f96f9d4de2	748	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	749	}
<>	154:37f96f9d4de2	750
<>	154:37f96f9d4de2	751	status_t FLASH_SetCallback(flash_config_t *config, flash_callback_t callback)
<>	154:37f96f9d4de2	752	{
<>	154:37f96f9d4de2	753	if (config == NULL)
<>	154:37f96f9d4de2	754	{
<>	154:37f96f9d4de2	755	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	756	}
<>	154:37f96f9d4de2	757
<>	154:37f96f9d4de2	758	config->PFlashCallback = callback;
<>	154:37f96f9d4de2	759
<>	154:37f96f9d4de2	760	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	761	}
<>	154:37f96f9d4de2	762
<>	154:37f96f9d4de2	763	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	764	status_t FLASH_PrepareExecuteInRamFunctions(flash_config_t *config)
<>	154:37f96f9d4de2	765	{
<>	154:37f96f9d4de2	766	flash_execute_in_ram_function_config_t *flashExecuteInRamFunctionInfo;
<>	154:37f96f9d4de2	767
<>	154:37f96f9d4de2	768	if (config == NULL)
<>	154:37f96f9d4de2	769	{
<>	154:37f96f9d4de2	770	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	771	}
<>	154:37f96f9d4de2	772
<>	154:37f96f9d4de2	773	flashExecuteInRamFunctionInfo = (flash_execute_in_ram_function_config_t *)config->flashExecuteInRamFunctionInfo;
<>	154:37f96f9d4de2	774
<>	154:37f96f9d4de2	775	copy_flash_run_command(flashExecuteInRamFunctionInfo->flashRunCommand);
AnnaBridge	175:af195413fb11	776	copy_flash_common_bit_operation(flashExecuteInRamFunctionInfo->flashCommonBitOperation);
AnnaBridge	175:af195413fb11	777	flashExecuteInRamFunctionInfo->activeFunctionCount = kFLASH_ExecuteInRamFunctionTotalNum;
<>	154:37f96f9d4de2	778
<>	154:37f96f9d4de2	779	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	780	}
<>	154:37f96f9d4de2	781	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	782
<>	154:37f96f9d4de2	783	status_t FLASH_EraseAll(flash_config_t *config, uint32_t key)
<>	154:37f96f9d4de2	784	{
<>	154:37f96f9d4de2	785	status_t returnCode;
<>	154:37f96f9d4de2	786
<>	154:37f96f9d4de2	787	if (config == NULL)
<>	154:37f96f9d4de2	788	{
<>	154:37f96f9d4de2	789	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	790	}
<>	154:37f96f9d4de2	791
<>	154:37f96f9d4de2	792	/* preparing passing parameter to erase all flash blocks */
<>	154:37f96f9d4de2	793	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_BLOCK, 0xFFFFFFU);
<>	154:37f96f9d4de2	794
<>	154:37f96f9d4de2	795	/* Validate the user key */
<>	154:37f96f9d4de2	796	returnCode = flash_check_user_key(key);
<>	154:37f96f9d4de2	797	if (returnCode)
<>	154:37f96f9d4de2	798	{
<>	154:37f96f9d4de2	799	return returnCode;
<>	154:37f96f9d4de2	800	}
<>	154:37f96f9d4de2	801
AnnaBridge	175:af195413fb11	802	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	803
<>	154:37f96f9d4de2	804	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	805	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	806
<>	154:37f96f9d4de2	807	flash_cache_clear(config);
<>	154:37f96f9d4de2	808
<>	154:37f96f9d4de2	809	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	810	/* Data flash IFR will be erased by erase all command, so we need to
<>	154:37f96f9d4de2	811	* update FlexNVM memory partition status synchronously */
<>	154:37f96f9d4de2	812	if (returnCode == kStatus_FLASH_Success)
<>	154:37f96f9d4de2	813	{
<>	154:37f96f9d4de2	814	returnCode = flash_update_flexnvm_memory_partition_status(config);
<>	154:37f96f9d4de2	815	}
<>	154:37f96f9d4de2	816	#endif
<>	154:37f96f9d4de2	817
<>	154:37f96f9d4de2	818	return returnCode;
<>	154:37f96f9d4de2	819	}
<>	154:37f96f9d4de2	820
<>	154:37f96f9d4de2	821	status_t FLASH_Erase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)
<>	154:37f96f9d4de2	822	{
<>	154:37f96f9d4de2	823	uint32_t sectorSize;
AnnaBridge	175:af195413fb11	824	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	825	uint32_t endAddress; /* storing end address */
<>	154:37f96f9d4de2	826	uint32_t numberOfSectors; /* number of sectors calculated by endAddress */
<>	154:37f96f9d4de2	827	status_t returnCode;
<>	154:37f96f9d4de2	828
AnnaBridge	175:af195413fb11	829	flash_get_matched_operation_info(config, start, &flashOperationInfo);
<>	154:37f96f9d4de2	830
<>	154:37f96f9d4de2	831	/* Check the supplied address range. */
AnnaBridge	175:af195413fb11	832	returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectorCmdAddressAligment);
<>	154:37f96f9d4de2	833	if (returnCode)
<>	154:37f96f9d4de2	834	{
<>	154:37f96f9d4de2	835	return returnCode;
<>	154:37f96f9d4de2	836	}
<>	154:37f96f9d4de2	837
AnnaBridge	175:af195413fb11	838	/* Validate the user key */
AnnaBridge	175:af195413fb11	839	returnCode = flash_check_user_key(key);
AnnaBridge	175:af195413fb11	840	if (returnCode)
AnnaBridge	175:af195413fb11	841	{
AnnaBridge	175:af195413fb11	842	return returnCode;
AnnaBridge	175:af195413fb11	843	}
AnnaBridge	175:af195413fb11	844
AnnaBridge	175:af195413fb11	845	start = flashOperationInfo.convertedAddress;
AnnaBridge	175:af195413fb11	846	sectorSize = flashOperationInfo.activeSectorSize;
<>	154:37f96f9d4de2	847
<>	154:37f96f9d4de2	848	/* calculating Flash end address */
<>	154:37f96f9d4de2	849	endAddress = start + lengthInBytes - 1;
<>	154:37f96f9d4de2	850
<>	154:37f96f9d4de2	851	/* re-calculate the endAddress and align it to the start of the next sector
<>	154:37f96f9d4de2	852	* which will be used in the comparison below */
<>	154:37f96f9d4de2	853	if (endAddress % sectorSize)
<>	154:37f96f9d4de2	854	{
<>	154:37f96f9d4de2	855	numberOfSectors = endAddress / sectorSize + 1;
<>	154:37f96f9d4de2	856	endAddress = numberOfSectors * sectorSize - 1;
<>	154:37f96f9d4de2	857	}
<>	154:37f96f9d4de2	858
AnnaBridge	175:af195413fb11	859	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	860
<>	154:37f96f9d4de2	861	/* the start address will increment to the next sector address
<>	154:37f96f9d4de2	862	* until it reaches the endAdddress */
<>	154:37f96f9d4de2	863	while (start <= endAddress)
<>	154:37f96f9d4de2	864	{
<>	154:37f96f9d4de2	865	/* preparing passing parameter to erase a flash block */
<>	154:37f96f9d4de2	866	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_SECTOR, start);
<>	154:37f96f9d4de2	867
<>	154:37f96f9d4de2	868	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	869	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	870
<>	154:37f96f9d4de2	871	/* calling flash callback function if it is available */
<>	154:37f96f9d4de2	872	if (config->PFlashCallback)
<>	154:37f96f9d4de2	873	{
<>	154:37f96f9d4de2	874	config->PFlashCallback();
<>	154:37f96f9d4de2	875	}
<>	154:37f96f9d4de2	876
<>	154:37f96f9d4de2	877	/* checking the success of command execution */
<>	154:37f96f9d4de2	878	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	879	{
<>	154:37f96f9d4de2	880	break;
<>	154:37f96f9d4de2	881	}
<>	154:37f96f9d4de2	882	else
<>	154:37f96f9d4de2	883	{
<>	154:37f96f9d4de2	884	/* Increment to the next sector */
<>	154:37f96f9d4de2	885	start += sectorSize;
<>	154:37f96f9d4de2	886	}
<>	154:37f96f9d4de2	887	}
<>	154:37f96f9d4de2	888
<>	154:37f96f9d4de2	889	flash_cache_clear(config);
<>	154:37f96f9d4de2	890
<>	154:37f96f9d4de2	891	return (returnCode);
<>	154:37f96f9d4de2	892	}
<>	154:37f96f9d4de2	893
<>	154:37f96f9d4de2	894	#if defined(FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD) && FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD
<>	154:37f96f9d4de2	895	status_t FLASH_EraseAllUnsecure(flash_config_t *config, uint32_t key)
<>	154:37f96f9d4de2	896	{
<>	154:37f96f9d4de2	897	status_t returnCode;
<>	154:37f96f9d4de2	898
<>	154:37f96f9d4de2	899	if (config == NULL)
<>	154:37f96f9d4de2	900	{
<>	154:37f96f9d4de2	901	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	902	}
<>	154:37f96f9d4de2	903
<>	154:37f96f9d4de2	904	/* Prepare passing parameter to erase all flash blocks (unsecure). */
<>	154:37f96f9d4de2	905	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_BLOCK_UNSECURE, 0xFFFFFFU);
<>	154:37f96f9d4de2	906
<>	154:37f96f9d4de2	907	/* Validate the user key */
<>	154:37f96f9d4de2	908	returnCode = flash_check_user_key(key);
<>	154:37f96f9d4de2	909	if (returnCode)
<>	154:37f96f9d4de2	910	{
<>	154:37f96f9d4de2	911	return returnCode;
<>	154:37f96f9d4de2	912	}
<>	154:37f96f9d4de2	913
AnnaBridge	175:af195413fb11	914	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	915
<>	154:37f96f9d4de2	916	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	917	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	918
<>	154:37f96f9d4de2	919	flash_cache_clear(config);
<>	154:37f96f9d4de2	920
<>	154:37f96f9d4de2	921	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	922	/* Data flash IFR will be erased by erase all unsecure command, so we need to
<>	154:37f96f9d4de2	923	* update FlexNVM memory partition status synchronously */
<>	154:37f96f9d4de2	924	if (returnCode == kStatus_FLASH_Success)
<>	154:37f96f9d4de2	925	{
<>	154:37f96f9d4de2	926	returnCode = flash_update_flexnvm_memory_partition_status(config);
<>	154:37f96f9d4de2	927	}
<>	154:37f96f9d4de2	928	#endif
<>	154:37f96f9d4de2	929
<>	154:37f96f9d4de2	930	return returnCode;
<>	154:37f96f9d4de2	931	}
<>	154:37f96f9d4de2	932	#endif /* FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD */
<>	154:37f96f9d4de2	933
<>	154:37f96f9d4de2	934	status_t FLASH_EraseAllExecuteOnlySegments(flash_config_t *config, uint32_t key)
<>	154:37f96f9d4de2	935	{
<>	154:37f96f9d4de2	936	status_t returnCode;
<>	154:37f96f9d4de2	937
<>	154:37f96f9d4de2	938	if (config == NULL)
<>	154:37f96f9d4de2	939	{
<>	154:37f96f9d4de2	940	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	941	}
<>	154:37f96f9d4de2	942
<>	154:37f96f9d4de2	943	/* preparing passing parameter to erase all execute-only segments
<>	154:37f96f9d4de2	944	* 1st element for the FCCOB register */
<>	154:37f96f9d4de2	945	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_EXECUTE_ONLY_SEGMENT, 0xFFFFFFU);
<>	154:37f96f9d4de2	946
<>	154:37f96f9d4de2	947	/* Validate the user key */
<>	154:37f96f9d4de2	948	returnCode = flash_check_user_key(key);
<>	154:37f96f9d4de2	949	if (returnCode)
<>	154:37f96f9d4de2	950	{
<>	154:37f96f9d4de2	951	return returnCode;
<>	154:37f96f9d4de2	952	}
<>	154:37f96f9d4de2	953
AnnaBridge	175:af195413fb11	954	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	955
<>	154:37f96f9d4de2	956	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	957	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	958
<>	154:37f96f9d4de2	959	flash_cache_clear(config);
<>	154:37f96f9d4de2	960
<>	154:37f96f9d4de2	961	return returnCode;
<>	154:37f96f9d4de2	962	}
<>	154:37f96f9d4de2	963
<>	154:37f96f9d4de2	964	status_t FLASH_Program(flash_config_t config, uint32_t start, uint32_t src, uint32_t lengthInBytes)
<>	154:37f96f9d4de2	965	{
<>	154:37f96f9d4de2	966	status_t returnCode;
AnnaBridge	175:af195413fb11	967	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	968
<>	154:37f96f9d4de2	969	if (src == NULL)
<>	154:37f96f9d4de2	970	{
<>	154:37f96f9d4de2	971	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	972	}
<>	154:37f96f9d4de2	973
AnnaBridge	175:af195413fb11	974	flash_get_matched_operation_info(config, start, &flashOperationInfo);
<>	154:37f96f9d4de2	975
<>	154:37f96f9d4de2	976	/* Check the supplied address range. */
AnnaBridge	175:af195413fb11	977	returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.blockWriteUnitSize);
<>	154:37f96f9d4de2	978	if (returnCode)
<>	154:37f96f9d4de2	979	{
<>	154:37f96f9d4de2	980	return returnCode;
<>	154:37f96f9d4de2	981	}
<>	154:37f96f9d4de2	982
AnnaBridge	175:af195413fb11	983	start = flashOperationInfo.convertedAddress;
AnnaBridge	175:af195413fb11	984
AnnaBridge	175:af195413fb11	985	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
<>	154:37f96f9d4de2	986
<>	154:37f96f9d4de2	987	while (lengthInBytes > 0)
<>	154:37f96f9d4de2	988	{
<>	154:37f96f9d4de2	989	/* preparing passing parameter to program the flash block */
<>	154:37f96f9d4de2	990	kFCCOBx[1] = *src++;
AnnaBridge	175:af195413fb11	991	if (4 == flashOperationInfo.blockWriteUnitSize)
<>	154:37f96f9d4de2	992	{
<>	154:37f96f9d4de2	993	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_LONGWORD, start);
<>	154:37f96f9d4de2	994	}
AnnaBridge	175:af195413fb11	995	else if (8 == flashOperationInfo.blockWriteUnitSize)
<>	154:37f96f9d4de2	996	{
<>	154:37f96f9d4de2	997	kFCCOBx[2] = *src++;
<>	154:37f96f9d4de2	998	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_PHRASE, start);
<>	154:37f96f9d4de2	999	}
<>	154:37f96f9d4de2	1000	else
<>	154:37f96f9d4de2	1001	{
<>	154:37f96f9d4de2	1002	}
<>	154:37f96f9d4de2	1003
<>	154:37f96f9d4de2	1004	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1005	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1006
<>	154:37f96f9d4de2	1007	/* calling flash callback function if it is available */
<>	154:37f96f9d4de2	1008	if (config->PFlashCallback)
<>	154:37f96f9d4de2	1009	{
<>	154:37f96f9d4de2	1010	config->PFlashCallback();
<>	154:37f96f9d4de2	1011	}
<>	154:37f96f9d4de2	1012
<>	154:37f96f9d4de2	1013	/* checking for the success of command execution */
<>	154:37f96f9d4de2	1014	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	1015	{
<>	154:37f96f9d4de2	1016	break;
<>	154:37f96f9d4de2	1017	}
<>	154:37f96f9d4de2	1018	else
<>	154:37f96f9d4de2	1019	{
<>	154:37f96f9d4de2	1020	/* update start address for next iteration */
AnnaBridge	175:af195413fb11	1021	start += flashOperationInfo.blockWriteUnitSize;
<>	154:37f96f9d4de2	1022
<>	154:37f96f9d4de2	1023	/* update lengthInBytes for next iteration */
AnnaBridge	175:af195413fb11	1024	lengthInBytes -= flashOperationInfo.blockWriteUnitSize;
<>	154:37f96f9d4de2	1025	}
<>	154:37f96f9d4de2	1026	}
<>	154:37f96f9d4de2	1027
<>	154:37f96f9d4de2	1028	flash_cache_clear(config);
<>	154:37f96f9d4de2	1029
<>	154:37f96f9d4de2	1030	return (returnCode);
<>	154:37f96f9d4de2	1031	}
<>	154:37f96f9d4de2	1032
<>	154:37f96f9d4de2	1033	status_t FLASH_ProgramOnce(flash_config_t config, uint32_t index, uint32_t src, uint32_t lengthInBytes)
<>	154:37f96f9d4de2	1034	{
<>	154:37f96f9d4de2	1035	status_t returnCode;
<>	154:37f96f9d4de2	1036
<>	154:37f96f9d4de2	1037	if ((config == NULL) \|\| (src == NULL))
<>	154:37f96f9d4de2	1038	{
<>	154:37f96f9d4de2	1039	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1040	}
<>	154:37f96f9d4de2	1041
<>	154:37f96f9d4de2	1042	/* pass paramters to FTFx */
<>	154:37f96f9d4de2	1043	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_PROGRAM_ONCE, index, 0xFFFFU);
<>	154:37f96f9d4de2	1044
<>	154:37f96f9d4de2	1045	kFCCOBx[1] = *src;
<>	154:37f96f9d4de2	1046
<>	154:37f96f9d4de2	1047	/* Note: Have to seperate the first index from the rest if it equals 0
<>	154:37f96f9d4de2	1048	* to avoid a pointless comparison of unsigned int to 0 compiler warning */
<>	154:37f96f9d4de2	1049	#if FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT
<>	154:37f96f9d4de2	1050	#if FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT
<>	154:37f96f9d4de2	1051	if (((index == FLASH_PROGRAM_ONCE_MIN_ID_8BYTES) \|\|
<>	154:37f96f9d4de2	1052	/* Range check */
<>	154:37f96f9d4de2	1053	((index >= FLASH_PROGRAM_ONCE_MIN_ID_8BYTES + 1) && (index <= FLASH_PROGRAM_ONCE_MAX_ID_8BYTES))) &&
<>	154:37f96f9d4de2	1054	(lengthInBytes == 8))
<>	154:37f96f9d4de2	1055	#endif /* FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT */
<>	154:37f96f9d4de2	1056	{
<>	154:37f96f9d4de2	1057	kFCCOBx[2] = *(src + 1);
<>	154:37f96f9d4de2	1058	}
<>	154:37f96f9d4de2	1059	#endif /* FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT */
<>	154:37f96f9d4de2	1060
AnnaBridge	175:af195413fb11	1061	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	1062
<>	154:37f96f9d4de2	1063	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1064	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1065
<>	154:37f96f9d4de2	1066	flash_cache_clear(config);
<>	154:37f96f9d4de2	1067
<>	154:37f96f9d4de2	1068	return returnCode;
<>	154:37f96f9d4de2	1069	}
<>	154:37f96f9d4de2	1070
<>	154:37f96f9d4de2	1071	#if defined(FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD) && FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD
<>	154:37f96f9d4de2	1072	status_t FLASH_ProgramSection(flash_config_t config, uint32_t start, uint32_t src, uint32_t lengthInBytes)
<>	154:37f96f9d4de2	1073	{
<>	154:37f96f9d4de2	1074	status_t returnCode;
<>	154:37f96f9d4de2	1075	uint32_t sectorSize;
AnnaBridge	175:af195413fb11	1076	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	1077	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	1078	bool needSwitchFlexRamMode = false;
<>	154:37f96f9d4de2	1079	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
<>	154:37f96f9d4de2	1080
<>	154:37f96f9d4de2	1081	if (src == NULL)
<>	154:37f96f9d4de2	1082	{
<>	154:37f96f9d4de2	1083	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1084	}
<>	154:37f96f9d4de2	1085
AnnaBridge	175:af195413fb11	1086	flash_get_matched_operation_info(config, start, &flashOperationInfo);
<>	154:37f96f9d4de2	1087
<>	154:37f96f9d4de2	1088	/* Check the supplied address range. */
AnnaBridge	175:af195413fb11	1089	returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectionCmdAddressAligment);
<>	154:37f96f9d4de2	1090	if (returnCode)
<>	154:37f96f9d4de2	1091	{
<>	154:37f96f9d4de2	1092	return returnCode;
<>	154:37f96f9d4de2	1093	}
<>	154:37f96f9d4de2	1094
AnnaBridge	175:af195413fb11	1095	start = flashOperationInfo.convertedAddress;
AnnaBridge	175:af195413fb11	1096	sectorSize = flashOperationInfo.activeSectorSize;
<>	154:37f96f9d4de2	1097
<>	154:37f96f9d4de2	1098	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	1099	/* Switch function of FlexRAM if needed */
<>	154:37f96f9d4de2	1100	if (!(FTFx->FCNFG & FTFx_FCNFG_RAMRDY_MASK))
<>	154:37f96f9d4de2	1101	{
<>	154:37f96f9d4de2	1102	needSwitchFlexRamMode = true;
<>	154:37f96f9d4de2	1103
AnnaBridge	175:af195413fb11	1104	returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableAsRam);
<>	154:37f96f9d4de2	1105	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1106	{
<>	154:37f96f9d4de2	1107	return kStatus_FLASH_SetFlexramAsRamError;
<>	154:37f96f9d4de2	1108	}
<>	154:37f96f9d4de2	1109	}
<>	154:37f96f9d4de2	1110	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
<>	154:37f96f9d4de2	1111
AnnaBridge	175:af195413fb11	1112	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	1113
<>	154:37f96f9d4de2	1114	while (lengthInBytes > 0)
<>	154:37f96f9d4de2	1115	{
<>	154:37f96f9d4de2	1116	/* Make sure the write operation doesn't span two sectors */
<>	154:37f96f9d4de2	1117	uint32_t endAddressOfCurrentSector = ALIGN_UP(start, sectorSize);
<>	154:37f96f9d4de2	1118	uint32_t lengthTobeProgrammedOfCurrentSector;
<>	154:37f96f9d4de2	1119	uint32_t currentOffset = 0;
<>	154:37f96f9d4de2	1120
<>	154:37f96f9d4de2	1121	if (endAddressOfCurrentSector == start)
<>	154:37f96f9d4de2	1122	{
<>	154:37f96f9d4de2	1123	endAddressOfCurrentSector += sectorSize;
<>	154:37f96f9d4de2	1124	}
<>	154:37f96f9d4de2	1125
<>	154:37f96f9d4de2	1126	if (lengthInBytes + start > endAddressOfCurrentSector)
<>	154:37f96f9d4de2	1127	{
<>	154:37f96f9d4de2	1128	lengthTobeProgrammedOfCurrentSector = endAddressOfCurrentSector - start;
<>	154:37f96f9d4de2	1129	}
<>	154:37f96f9d4de2	1130	else
<>	154:37f96f9d4de2	1131	{
<>	154:37f96f9d4de2	1132	lengthTobeProgrammedOfCurrentSector = lengthInBytes;
<>	154:37f96f9d4de2	1133	}
<>	154:37f96f9d4de2	1134
<>	154:37f96f9d4de2	1135	/* Program Current Sector */
<>	154:37f96f9d4de2	1136	while (lengthTobeProgrammedOfCurrentSector > 0)
<>	154:37f96f9d4de2	1137	{
<>	154:37f96f9d4de2	1138	/* Make sure the program size doesn't exceeds Acceleration RAM size */
<>	154:37f96f9d4de2	1139	uint32_t programSizeOfCurrentPass;
<>	154:37f96f9d4de2	1140	uint32_t numberOfPhases;
<>	154:37f96f9d4de2	1141
AnnaBridge	175:af195413fb11	1142	if (lengthTobeProgrammedOfCurrentSector > kFLASH_AccelerationRamSize)
<>	154:37f96f9d4de2	1143	{
AnnaBridge	175:af195413fb11	1144	programSizeOfCurrentPass = kFLASH_AccelerationRamSize;
<>	154:37f96f9d4de2	1145	}
<>	154:37f96f9d4de2	1146	else
<>	154:37f96f9d4de2	1147	{
<>	154:37f96f9d4de2	1148	programSizeOfCurrentPass = lengthTobeProgrammedOfCurrentSector;
<>	154:37f96f9d4de2	1149	}
<>	154:37f96f9d4de2	1150
<>	154:37f96f9d4de2	1151	/* Copy data to FlexRAM */
<>	154:37f96f9d4de2	1152	memcpy((void *)FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS, src + currentOffset / 4, programSizeOfCurrentPass);
<>	154:37f96f9d4de2	1153	/* Set start address of the data to be programmed */
<>	154:37f96f9d4de2	1154	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_SECTION, start + currentOffset);
<>	154:37f96f9d4de2	1155	/* Set program size in terms of FEATURE_FLASH_SECTION_CMD_ADDRESS_ALIGMENT */
AnnaBridge	175:af195413fb11	1156	numberOfPhases = programSizeOfCurrentPass / flashOperationInfo.sectionCmdAddressAligment;
<>	154:37f96f9d4de2	1157
<>	154:37f96f9d4de2	1158	kFCCOBx[1] = BYTES_JOIN_TO_WORD_2_2(numberOfPhases, 0xFFFFU);
<>	154:37f96f9d4de2	1159
<>	154:37f96f9d4de2	1160	/* Peform command sequence */
<>	154:37f96f9d4de2	1161	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1162
<>	154:37f96f9d4de2	1163	/* calling flash callback function if it is available */
<>	154:37f96f9d4de2	1164	if (config->PFlashCallback)
<>	154:37f96f9d4de2	1165	{
<>	154:37f96f9d4de2	1166	config->PFlashCallback();
<>	154:37f96f9d4de2	1167	}
<>	154:37f96f9d4de2	1168
<>	154:37f96f9d4de2	1169	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1170	{
<>	154:37f96f9d4de2	1171	flash_cache_clear(config);
<>	154:37f96f9d4de2	1172	return returnCode;
<>	154:37f96f9d4de2	1173	}
<>	154:37f96f9d4de2	1174
<>	154:37f96f9d4de2	1175	lengthTobeProgrammedOfCurrentSector -= programSizeOfCurrentPass;
<>	154:37f96f9d4de2	1176	currentOffset += programSizeOfCurrentPass;
<>	154:37f96f9d4de2	1177	}
<>	154:37f96f9d4de2	1178
<>	154:37f96f9d4de2	1179	src += currentOffset / 4;
<>	154:37f96f9d4de2	1180	start += currentOffset;
<>	154:37f96f9d4de2	1181	lengthInBytes -= currentOffset;
<>	154:37f96f9d4de2	1182	}
<>	154:37f96f9d4de2	1183
<>	154:37f96f9d4de2	1184	flash_cache_clear(config);
<>	154:37f96f9d4de2	1185
<>	154:37f96f9d4de2	1186	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	1187	/* Restore function of FlexRAM if needed. */
<>	154:37f96f9d4de2	1188	if (needSwitchFlexRamMode)
<>	154:37f96f9d4de2	1189	{
AnnaBridge	175:af195413fb11	1190	returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableForEeprom);
<>	154:37f96f9d4de2	1191	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1192	{
<>	154:37f96f9d4de2	1193	return kStatus_FLASH_RecoverFlexramAsEepromError;
<>	154:37f96f9d4de2	1194	}
<>	154:37f96f9d4de2	1195	}
<>	154:37f96f9d4de2	1196	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
<>	154:37f96f9d4de2	1197
<>	154:37f96f9d4de2	1198	return returnCode;
<>	154:37f96f9d4de2	1199	}
<>	154:37f96f9d4de2	1200	#endif /* FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD */
<>	154:37f96f9d4de2	1201
<>	154:37f96f9d4de2	1202	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	1203	status_t FLASH_EepromWrite(flash_config_t config, uint32_t start, uint8_t src, uint32_t lengthInBytes)
<>	154:37f96f9d4de2	1204	{
<>	154:37f96f9d4de2	1205	status_t returnCode;
<>	154:37f96f9d4de2	1206	bool needSwitchFlexRamMode = false;
<>	154:37f96f9d4de2	1207
<>	154:37f96f9d4de2	1208	if (config == NULL)
<>	154:37f96f9d4de2	1209	{
<>	154:37f96f9d4de2	1210	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1211	}
<>	154:37f96f9d4de2	1212
<>	154:37f96f9d4de2	1213	/* Validates the range of the given address */
<>	154:37f96f9d4de2	1214	if ((start < config->FlexRAMBlockBase) \|\|
<>	154:37f96f9d4de2	1215	((start + lengthInBytes) > (config->FlexRAMBlockBase + config->EEpromTotalSize)))
<>	154:37f96f9d4de2	1216	{
<>	154:37f96f9d4de2	1217	return kStatus_FLASH_AddressError;
<>	154:37f96f9d4de2	1218	}
<>	154:37f96f9d4de2	1219
<>	154:37f96f9d4de2	1220	returnCode = kStatus_FLASH_Success;
<>	154:37f96f9d4de2	1221
<>	154:37f96f9d4de2	1222	/* Switch function of FlexRAM if needed */
<>	154:37f96f9d4de2	1223	if (!(FTFx->FCNFG & FTFx_FCNFG_EEERDY_MASK))
<>	154:37f96f9d4de2	1224	{
<>	154:37f96f9d4de2	1225	needSwitchFlexRamMode = true;
<>	154:37f96f9d4de2	1226
AnnaBridge	175:af195413fb11	1227	returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableForEeprom);
<>	154:37f96f9d4de2	1228	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1229	{
<>	154:37f96f9d4de2	1230	return kStatus_FLASH_SetFlexramAsEepromError;
<>	154:37f96f9d4de2	1231	}
<>	154:37f96f9d4de2	1232	}
<>	154:37f96f9d4de2	1233
<>	154:37f96f9d4de2	1234	/* Write data to FlexRAM when it is used as EEPROM emulator */
<>	154:37f96f9d4de2	1235	while (lengthInBytes > 0)
<>	154:37f96f9d4de2	1236	{
<>	154:37f96f9d4de2	1237	if ((!(start & 0x3U)) && (lengthInBytes >= 4))
<>	154:37f96f9d4de2	1238	{
<>	154:37f96f9d4de2	1239	(uint32_t )start = (uint32_t )src;
<>	154:37f96f9d4de2	1240	start += 4;
<>	154:37f96f9d4de2	1241	src += 4;
<>	154:37f96f9d4de2	1242	lengthInBytes -= 4;
<>	154:37f96f9d4de2	1243	}
<>	154:37f96f9d4de2	1244	else if ((!(start & 0x1U)) && (lengthInBytes >= 2))
<>	154:37f96f9d4de2	1245	{
<>	154:37f96f9d4de2	1246	(uint16_t )start = (uint16_t )src;
<>	154:37f96f9d4de2	1247	start += 2;
<>	154:37f96f9d4de2	1248	src += 2;
<>	154:37f96f9d4de2	1249	lengthInBytes -= 2;
<>	154:37f96f9d4de2	1250	}
<>	154:37f96f9d4de2	1251	else
<>	154:37f96f9d4de2	1252	{
<>	154:37f96f9d4de2	1253	(uint8_t )start = *src;
<>	154:37f96f9d4de2	1254	start += 1;
<>	154:37f96f9d4de2	1255	src += 1;
<>	154:37f96f9d4de2	1256	lengthInBytes -= 1;
<>	154:37f96f9d4de2	1257	}
<>	154:37f96f9d4de2	1258	/* Wait till EEERDY bit is set */
<>	154:37f96f9d4de2	1259	while (!(FTFx->FCNFG & FTFx_FCNFG_EEERDY_MASK))
<>	154:37f96f9d4de2	1260	{
<>	154:37f96f9d4de2	1261	}
<>	154:37f96f9d4de2	1262
<>	154:37f96f9d4de2	1263	/* Check for protection violation error */
<>	154:37f96f9d4de2	1264	if (FTFx->FSTAT & FTFx_FSTAT_FPVIOL_MASK)
<>	154:37f96f9d4de2	1265	{
<>	154:37f96f9d4de2	1266	return kStatus_FLASH_ProtectionViolation;
<>	154:37f96f9d4de2	1267	}
<>	154:37f96f9d4de2	1268	}
<>	154:37f96f9d4de2	1269
<>	154:37f96f9d4de2	1270	/* Switch function of FlexRAM if needed */
<>	154:37f96f9d4de2	1271	if (needSwitchFlexRamMode)
<>	154:37f96f9d4de2	1272	{
AnnaBridge	175:af195413fb11	1273	returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableAsRam);
<>	154:37f96f9d4de2	1274	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1275	{
<>	154:37f96f9d4de2	1276	return kStatus_FLASH_RecoverFlexramAsRamError;
<>	154:37f96f9d4de2	1277	}
<>	154:37f96f9d4de2	1278	}
<>	154:37f96f9d4de2	1279
<>	154:37f96f9d4de2	1280	return returnCode;
<>	154:37f96f9d4de2	1281	}
<>	154:37f96f9d4de2	1282	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	1283
<>	154:37f96f9d4de2	1284	#if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD
<>	154:37f96f9d4de2	1285	status_t FLASH_ReadResource(
<>	154:37f96f9d4de2	1286	flash_config_t config, uint32_t start, uint32_t dst, uint32_t lengthInBytes, flash_read_resource_option_t option)
<>	154:37f96f9d4de2	1287	{
<>	154:37f96f9d4de2	1288	status_t returnCode;
AnnaBridge	175:af195413fb11	1289	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	1290
<>	154:37f96f9d4de2	1291	if ((config == NULL) \|\| (dst == NULL))
<>	154:37f96f9d4de2	1292	{
<>	154:37f96f9d4de2	1293	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1294	}
<>	154:37f96f9d4de2	1295
AnnaBridge	175:af195413fb11	1296	flash_get_matched_operation_info(config, start, &flashOperationInfo);
<>	154:37f96f9d4de2	1297
<>	154:37f96f9d4de2	1298	/* Check the supplied address range. */
AnnaBridge	175:af195413fb11	1299	returnCode =
AnnaBridge	175:af195413fb11	1300	flash_check_resource_range(start, lengthInBytes, flashOperationInfo.resourceCmdAddressAligment, option);
<>	154:37f96f9d4de2	1301	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	1302	{
<>	154:37f96f9d4de2	1303	return returnCode;
<>	154:37f96f9d4de2	1304	}
<>	154:37f96f9d4de2	1305
<>	154:37f96f9d4de2	1306	while (lengthInBytes > 0)
<>	154:37f96f9d4de2	1307	{
<>	154:37f96f9d4de2	1308	/* preparing passing parameter */
<>	154:37f96f9d4de2	1309	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_READ_RESOURCE, start);
AnnaBridge	175:af195413fb11	1310	if (flashOperationInfo.resourceCmdAddressAligment == 4)
<>	154:37f96f9d4de2	1311	{
<>	154:37f96f9d4de2	1312	kFCCOBx[2] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU);
<>	154:37f96f9d4de2	1313	}
AnnaBridge	175:af195413fb11	1314	else if (flashOperationInfo.resourceCmdAddressAligment == 8)
<>	154:37f96f9d4de2	1315	{
<>	154:37f96f9d4de2	1316	kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU);
<>	154:37f96f9d4de2	1317	}
<>	154:37f96f9d4de2	1318	else
<>	154:37f96f9d4de2	1319	{
<>	154:37f96f9d4de2	1320	}
<>	154:37f96f9d4de2	1321
<>	154:37f96f9d4de2	1322	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1323	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1324
<>	154:37f96f9d4de2	1325	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	1326	{
<>	154:37f96f9d4de2	1327	break;
<>	154:37f96f9d4de2	1328	}
<>	154:37f96f9d4de2	1329
<>	154:37f96f9d4de2	1330	/* fetch data */
<>	154:37f96f9d4de2	1331	*dst++ = kFCCOBx[1];
AnnaBridge	175:af195413fb11	1332	if (flashOperationInfo.resourceCmdAddressAligment == 8)
<>	154:37f96f9d4de2	1333	{
<>	154:37f96f9d4de2	1334	*dst++ = kFCCOBx[2];
<>	154:37f96f9d4de2	1335	}
<>	154:37f96f9d4de2	1336	/* update start address for next iteration */
AnnaBridge	175:af195413fb11	1337	start += flashOperationInfo.resourceCmdAddressAligment;
<>	154:37f96f9d4de2	1338	/* update lengthInBytes for next iteration */
AnnaBridge	175:af195413fb11	1339	lengthInBytes -= flashOperationInfo.resourceCmdAddressAligment;
<>	154:37f96f9d4de2	1340	}
<>	154:37f96f9d4de2	1341
<>	154:37f96f9d4de2	1342	return (returnCode);
<>	154:37f96f9d4de2	1343	}
<>	154:37f96f9d4de2	1344	#endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */
<>	154:37f96f9d4de2	1345
<>	154:37f96f9d4de2	1346	status_t FLASH_ReadOnce(flash_config_t config, uint32_t index, uint32_t dst, uint32_t lengthInBytes)
<>	154:37f96f9d4de2	1347	{
<>	154:37f96f9d4de2	1348	status_t returnCode;
<>	154:37f96f9d4de2	1349
<>	154:37f96f9d4de2	1350	if ((config == NULL) \|\| (dst == NULL))
<>	154:37f96f9d4de2	1351	{
<>	154:37f96f9d4de2	1352	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1353	}
<>	154:37f96f9d4de2	1354
<>	154:37f96f9d4de2	1355	/* pass paramters to FTFx */
<>	154:37f96f9d4de2	1356	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_READ_ONCE, index, 0xFFFFU);
<>	154:37f96f9d4de2	1357
<>	154:37f96f9d4de2	1358	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1359	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1360
<>	154:37f96f9d4de2	1361	if (kStatus_FLASH_Success == returnCode)
<>	154:37f96f9d4de2	1362	{
<>	154:37f96f9d4de2	1363	*dst = kFCCOBx[1];
<>	154:37f96f9d4de2	1364	/* Note: Have to seperate the first index from the rest if it equals 0
<>	154:37f96f9d4de2	1365	* to avoid a pointless comparison of unsigned int to 0 compiler warning */
<>	154:37f96f9d4de2	1366	#if FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT
<>	154:37f96f9d4de2	1367	#if FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT
<>	154:37f96f9d4de2	1368	if (((index == FLASH_PROGRAM_ONCE_MIN_ID_8BYTES) \|\|
<>	154:37f96f9d4de2	1369	/* Range check */
<>	154:37f96f9d4de2	1370	((index >= FLASH_PROGRAM_ONCE_MIN_ID_8BYTES + 1) && (index <= FLASH_PROGRAM_ONCE_MAX_ID_8BYTES))) &&
<>	154:37f96f9d4de2	1371	(lengthInBytes == 8))
<>	154:37f96f9d4de2	1372	#endif /* FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT */
<>	154:37f96f9d4de2	1373	{
<>	154:37f96f9d4de2	1374	*(dst + 1) = kFCCOBx[2];
<>	154:37f96f9d4de2	1375	}
<>	154:37f96f9d4de2	1376	#endif /* FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT */
<>	154:37f96f9d4de2	1377	}
<>	154:37f96f9d4de2	1378
<>	154:37f96f9d4de2	1379	return returnCode;
<>	154:37f96f9d4de2	1380	}
<>	154:37f96f9d4de2	1381
<>	154:37f96f9d4de2	1382	status_t FLASH_GetSecurityState(flash_config_t config, flash_security_state_t state)
<>	154:37f96f9d4de2	1383	{
<>	154:37f96f9d4de2	1384	/* store data read from flash register */
<>	154:37f96f9d4de2	1385	uint8_t registerValue;
<>	154:37f96f9d4de2	1386
<>	154:37f96f9d4de2	1387	if ((config == NULL) \|\| (state == NULL))
<>	154:37f96f9d4de2	1388	{
<>	154:37f96f9d4de2	1389	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1390	}
<>	154:37f96f9d4de2	1391
<>	154:37f96f9d4de2	1392	/* Get flash security register value */
<>	154:37f96f9d4de2	1393	registerValue = FTFx->FSEC;
<>	154:37f96f9d4de2	1394
<>	154:37f96f9d4de2	1395	/* check the status of the flash security bits in the security register */
<>	154:37f96f9d4de2	1396	if (FLASH_SECURITY_STATE_UNSECURED == (registerValue & FTFx_FSEC_SEC_MASK))
<>	154:37f96f9d4de2	1397	{
<>	154:37f96f9d4de2	1398	/* Flash in unsecured state */
AnnaBridge	175:af195413fb11	1399	*state = kFLASH_SecurityStateNotSecure;
<>	154:37f96f9d4de2	1400	}
<>	154:37f96f9d4de2	1401	else
<>	154:37f96f9d4de2	1402	{
<>	154:37f96f9d4de2	1403	/* Flash in secured state
<>	154:37f96f9d4de2	1404	* check for backdoor key security enable bit */
<>	154:37f96f9d4de2	1405	if (FLASH_SECURITY_STATE_KEYEN == (registerValue & FTFx_FSEC_KEYEN_MASK))
<>	154:37f96f9d4de2	1406	{
<>	154:37f96f9d4de2	1407	/* Backdoor key security enabled */
AnnaBridge	175:af195413fb11	1408	*state = kFLASH_SecurityStateBackdoorEnabled;
<>	154:37f96f9d4de2	1409	}
<>	154:37f96f9d4de2	1410	else
<>	154:37f96f9d4de2	1411	{
<>	154:37f96f9d4de2	1412	/* Backdoor key security disabled */
AnnaBridge	175:af195413fb11	1413	*state = kFLASH_SecurityStateBackdoorDisabled;
<>	154:37f96f9d4de2	1414	}
<>	154:37f96f9d4de2	1415	}
<>	154:37f96f9d4de2	1416
<>	154:37f96f9d4de2	1417	return (kStatus_FLASH_Success);
<>	154:37f96f9d4de2	1418	}
<>	154:37f96f9d4de2	1419
<>	154:37f96f9d4de2	1420	status_t FLASH_SecurityBypass(flash_config_t config, const uint8_t backdoorKey)
<>	154:37f96f9d4de2	1421	{
<>	154:37f96f9d4de2	1422	uint8_t registerValue; /* registerValue */
<>	154:37f96f9d4de2	1423	status_t returnCode; /* return code variable */
<>	154:37f96f9d4de2	1424
<>	154:37f96f9d4de2	1425	if ((config == NULL) \|\| (backdoorKey == NULL))
<>	154:37f96f9d4de2	1426	{
<>	154:37f96f9d4de2	1427	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1428	}
<>	154:37f96f9d4de2	1429
<>	154:37f96f9d4de2	1430	/* set the default return code as kStatus_Success */
<>	154:37f96f9d4de2	1431	returnCode = kStatus_FLASH_Success;
<>	154:37f96f9d4de2	1432
<>	154:37f96f9d4de2	1433	/* Get flash security register value */
<>	154:37f96f9d4de2	1434	registerValue = FTFx->FSEC;
<>	154:37f96f9d4de2	1435
<>	154:37f96f9d4de2	1436	/* Check to see if flash is in secure state (any state other than 0x2)
<>	154:37f96f9d4de2	1437	* If not, then skip this since flash is not secure */
<>	154:37f96f9d4de2	1438	if (0x02 != (registerValue & 0x03))
<>	154:37f96f9d4de2	1439	{
<>	154:37f96f9d4de2	1440	/* preparing passing parameter to erase a flash block */
<>	154:37f96f9d4de2	1441	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_SECURITY_BY_PASS, 0xFFFFFFU);
<>	154:37f96f9d4de2	1442	kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_1_1_1(backdoorKey[0], backdoorKey[1], backdoorKey[2], backdoorKey[3]);
<>	154:37f96f9d4de2	1443	kFCCOBx[2] = BYTES_JOIN_TO_WORD_1_1_1_1(backdoorKey[4], backdoorKey[5], backdoorKey[6], backdoorKey[7]);
<>	154:37f96f9d4de2	1444
<>	154:37f96f9d4de2	1445	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1446	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1447	}
<>	154:37f96f9d4de2	1448
<>	154:37f96f9d4de2	1449	return (returnCode);
<>	154:37f96f9d4de2	1450	}
<>	154:37f96f9d4de2	1451
<>	154:37f96f9d4de2	1452	status_t FLASH_VerifyEraseAll(flash_config_t *config, flash_margin_value_t margin)
<>	154:37f96f9d4de2	1453	{
<>	154:37f96f9d4de2	1454	if (config == NULL)
<>	154:37f96f9d4de2	1455	{
<>	154:37f96f9d4de2	1456	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1457	}
<>	154:37f96f9d4de2	1458
<>	154:37f96f9d4de2	1459	/* preparing passing parameter to verify all block command */
<>	154:37f96f9d4de2	1460	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_VERIFY_ALL_BLOCK, margin, 0xFFFFU);
<>	154:37f96f9d4de2	1461
<>	154:37f96f9d4de2	1462	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1463	return flash_command_sequence(config);
<>	154:37f96f9d4de2	1464	}
<>	154:37f96f9d4de2	1465
<>	154:37f96f9d4de2	1466	status_t FLASH_VerifyErase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, flash_margin_value_t margin)
<>	154:37f96f9d4de2	1467	{
<>	154:37f96f9d4de2	1468	/* Check arguments. */
<>	154:37f96f9d4de2	1469	uint32_t blockSize;
AnnaBridge	175:af195413fb11	1470	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	1471	uint32_t nextBlockStartAddress;
<>	154:37f96f9d4de2	1472	uint32_t remainingBytes;
<>	154:37f96f9d4de2	1473	status_t returnCode;
<>	154:37f96f9d4de2	1474
AnnaBridge	175:af195413fb11	1475	flash_get_matched_operation_info(config, start, &flashOperationInfo);
AnnaBridge	175:af195413fb11	1476
AnnaBridge	175:af195413fb11	1477	returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectionCmdAddressAligment);
<>	154:37f96f9d4de2	1478	if (returnCode)
<>	154:37f96f9d4de2	1479	{
<>	154:37f96f9d4de2	1480	return returnCode;
<>	154:37f96f9d4de2	1481	}
<>	154:37f96f9d4de2	1482
AnnaBridge	175:af195413fb11	1483	flash_get_matched_operation_info(config, start, &flashOperationInfo);
AnnaBridge	175:af195413fb11	1484	start = flashOperationInfo.convertedAddress;
AnnaBridge	175:af195413fb11	1485	blockSize = flashOperationInfo.activeBlockSize;
<>	154:37f96f9d4de2	1486
<>	154:37f96f9d4de2	1487	nextBlockStartAddress = ALIGN_UP(start, blockSize);
<>	154:37f96f9d4de2	1488	if (nextBlockStartAddress == start)
<>	154:37f96f9d4de2	1489	{
<>	154:37f96f9d4de2	1490	nextBlockStartAddress += blockSize;
<>	154:37f96f9d4de2	1491	}
<>	154:37f96f9d4de2	1492
<>	154:37f96f9d4de2	1493	remainingBytes = lengthInBytes;
<>	154:37f96f9d4de2	1494
<>	154:37f96f9d4de2	1495	while (remainingBytes)
<>	154:37f96f9d4de2	1496	{
<>	154:37f96f9d4de2	1497	uint32_t numberOfPhrases;
<>	154:37f96f9d4de2	1498	uint32_t verifyLength = nextBlockStartAddress - start;
<>	154:37f96f9d4de2	1499	if (verifyLength > remainingBytes)
<>	154:37f96f9d4de2	1500	{
<>	154:37f96f9d4de2	1501	verifyLength = remainingBytes;
<>	154:37f96f9d4de2	1502	}
<>	154:37f96f9d4de2	1503
AnnaBridge	175:af195413fb11	1504	numberOfPhrases = verifyLength / flashOperationInfo.sectionCmdAddressAligment;
<>	154:37f96f9d4de2	1505
<>	154:37f96f9d4de2	1506	/* Fill in verify section command parameters. */
<>	154:37f96f9d4de2	1507	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_VERIFY_SECTION, start);
<>	154:37f96f9d4de2	1508	kFCCOBx[1] = BYTES_JOIN_TO_WORD_2_1_1(numberOfPhrases, margin, 0xFFU);
<>	154:37f96f9d4de2	1509
<>	154:37f96f9d4de2	1510	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1511	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1512	if (returnCode)
<>	154:37f96f9d4de2	1513	{
<>	154:37f96f9d4de2	1514	return returnCode;
<>	154:37f96f9d4de2	1515	}
<>	154:37f96f9d4de2	1516
<>	154:37f96f9d4de2	1517	remainingBytes -= verifyLength;
<>	154:37f96f9d4de2	1518	start += verifyLength;
<>	154:37f96f9d4de2	1519	nextBlockStartAddress += blockSize;
<>	154:37f96f9d4de2	1520	}
<>	154:37f96f9d4de2	1521
<>	154:37f96f9d4de2	1522	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	1523	}
<>	154:37f96f9d4de2	1524
<>	154:37f96f9d4de2	1525	status_t FLASH_VerifyProgram(flash_config_t *config,
<>	154:37f96f9d4de2	1526	uint32_t start,
<>	154:37f96f9d4de2	1527	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	1528	const uint32_t *expectedData,
<>	154:37f96f9d4de2	1529	flash_margin_value_t margin,
<>	154:37f96f9d4de2	1530	uint32_t *failedAddress,
<>	154:37f96f9d4de2	1531	uint32_t *failedData)
<>	154:37f96f9d4de2	1532	{
<>	154:37f96f9d4de2	1533	status_t returnCode;
AnnaBridge	175:af195413fb11	1534	flash_operation_config_t flashOperationInfo;
<>	154:37f96f9d4de2	1535
<>	154:37f96f9d4de2	1536	if (expectedData == NULL)
<>	154:37f96f9d4de2	1537	{
<>	154:37f96f9d4de2	1538	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1539	}
<>	154:37f96f9d4de2	1540
AnnaBridge	175:af195413fb11	1541	flash_get_matched_operation_info(config, start, &flashOperationInfo);
AnnaBridge	175:af195413fb11	1542
AnnaBridge	175:af195413fb11	1543	returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.checkCmdAddressAligment);
<>	154:37f96f9d4de2	1544	if (returnCode)
<>	154:37f96f9d4de2	1545	{
<>	154:37f96f9d4de2	1546	return returnCode;
<>	154:37f96f9d4de2	1547	}
<>	154:37f96f9d4de2	1548
AnnaBridge	175:af195413fb11	1549	start = flashOperationInfo.convertedAddress;
<>	154:37f96f9d4de2	1550
<>	154:37f96f9d4de2	1551	while (lengthInBytes)
<>	154:37f96f9d4de2	1552	{
<>	154:37f96f9d4de2	1553	/* preparing passing parameter to program check the flash block */
<>	154:37f96f9d4de2	1554	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_CHECK, start);
<>	154:37f96f9d4de2	1555	kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(margin, 0xFFFFFFU);
<>	154:37f96f9d4de2	1556	kFCCOBx[2] = *expectedData;
<>	154:37f96f9d4de2	1557
<>	154:37f96f9d4de2	1558	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1559	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	1560
<>	154:37f96f9d4de2	1561	/* checking for the success of command execution */
<>	154:37f96f9d4de2	1562	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	1563	{
<>	154:37f96f9d4de2	1564	if (failedAddress)
<>	154:37f96f9d4de2	1565	{
<>	154:37f96f9d4de2	1566	*failedAddress = start;
<>	154:37f96f9d4de2	1567	}
<>	154:37f96f9d4de2	1568	if (failedData)
<>	154:37f96f9d4de2	1569	{
<>	154:37f96f9d4de2	1570	*failedData = 0;
<>	154:37f96f9d4de2	1571	}
<>	154:37f96f9d4de2	1572	break;
<>	154:37f96f9d4de2	1573	}
<>	154:37f96f9d4de2	1574
AnnaBridge	175:af195413fb11	1575	lengthInBytes -= flashOperationInfo.checkCmdAddressAligment;
AnnaBridge	175:af195413fb11	1576	expectedData += flashOperationInfo.checkCmdAddressAligment / sizeof(*expectedData);
AnnaBridge	175:af195413fb11	1577	start += flashOperationInfo.checkCmdAddressAligment;
<>	154:37f96f9d4de2	1578	}
<>	154:37f96f9d4de2	1579
<>	154:37f96f9d4de2	1580	return (returnCode);
<>	154:37f96f9d4de2	1581	}
<>	154:37f96f9d4de2	1582
<>	154:37f96f9d4de2	1583	status_t FLASH_VerifyEraseAllExecuteOnlySegments(flash_config_t *config, flash_margin_value_t margin)
<>	154:37f96f9d4de2	1584	{
<>	154:37f96f9d4de2	1585	if (config == NULL)
<>	154:37f96f9d4de2	1586	{
<>	154:37f96f9d4de2	1587	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1588	}
<>	154:37f96f9d4de2	1589
<>	154:37f96f9d4de2	1590	/* preparing passing parameter to verify erase all execute-only segments command */
<>	154:37f96f9d4de2	1591	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_VERIFY_ALL_EXECUTE_ONLY_SEGMENT, margin, 0xFFFFU);
<>	154:37f96f9d4de2	1592
<>	154:37f96f9d4de2	1593	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	1594	return flash_command_sequence(config);
<>	154:37f96f9d4de2	1595	}
<>	154:37f96f9d4de2	1596
<>	154:37f96f9d4de2	1597	status_t FLASH_IsProtected(flash_config_t *config,
<>	154:37f96f9d4de2	1598	uint32_t start,
<>	154:37f96f9d4de2	1599	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	1600	flash_protection_state_t *protection_state)
<>	154:37f96f9d4de2	1601	{
<>	154:37f96f9d4de2	1602	uint32_t endAddress; /* end address for protection check */
<>	154:37f96f9d4de2	1603	uint32_t regionCheckedCounter; /* increments each time the flash address was checked for
<>	154:37f96f9d4de2	1604	* protection status */
<>	154:37f96f9d4de2	1605	uint32_t regionCounter; /* incrementing variable used to increment through the flash
<>	154:37f96f9d4de2	1606	* protection regions */
<>	154:37f96f9d4de2	1607	uint32_t protectStatusCounter; /* increments each time a flash region was detected as protected */
<>	154:37f96f9d4de2	1608
AnnaBridge	175:af195413fb11	1609	uint8_t flashRegionProtectStatus[FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT]; /* array of the protection
AnnaBridge	175:af195413fb11	1610	* status for each
<>	154:37f96f9d4de2	1611	* protection region */
AnnaBridge	175:af195413fb11	1612	uint32_t flashRegionAddress[FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT +
AnnaBridge	175:af195413fb11	1613	1]; /* array of the start addresses for each flash
AnnaBridge	175:af195413fb11	1614	* protection region. Note this is REGION_COUNT+1
AnnaBridge	175:af195413fb11	1615	* due to requiring the next start address after
AnnaBridge	175:af195413fb11	1616	* the end of flash for loop-check purposes below */
AnnaBridge	175:af195413fb11	1617	flash_protection_config_t flashProtectionInfo; /* flash protection information */
<>	154:37f96f9d4de2	1618	status_t returnCode;
<>	154:37f96f9d4de2	1619
<>	154:37f96f9d4de2	1620	if (protection_state == NULL)
<>	154:37f96f9d4de2	1621	{
<>	154:37f96f9d4de2	1622	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1623	}
<>	154:37f96f9d4de2	1624
<>	154:37f96f9d4de2	1625	/* Check the supplied address range. */
<>	154:37f96f9d4de2	1626	returnCode = flash_check_range(config, start, lengthInBytes, FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE);
<>	154:37f96f9d4de2	1627	if (returnCode)
<>	154:37f96f9d4de2	1628	{
<>	154:37f96f9d4de2	1629	return returnCode;
<>	154:37f96f9d4de2	1630	}
<>	154:37f96f9d4de2	1631
AnnaBridge	175:af195413fb11	1632	/* Get necessary flash protection information. */
AnnaBridge	175:af195413fb11	1633	returnCode = flash_get_protection_info(config, &flashProtectionInfo);
AnnaBridge	175:af195413fb11	1634	if (returnCode)
AnnaBridge	175:af195413fb11	1635	{
AnnaBridge	175:af195413fb11	1636	return returnCode;
AnnaBridge	175:af195413fb11	1637	}
AnnaBridge	175:af195413fb11	1638
<>	154:37f96f9d4de2	1639	/* calculating Flash end address */
<>	154:37f96f9d4de2	1640	endAddress = start + lengthInBytes;
<>	154:37f96f9d4de2	1641
<>	154:37f96f9d4de2	1642	/* populate the flashRegionAddress array with the start address of each flash region */
<>	154:37f96f9d4de2	1643	regionCounter = 0; /* make sure regionCounter is initialized to 0 first */
<>	154:37f96f9d4de2	1644
<>	154:37f96f9d4de2	1645	/* populate up to 33rd element of array, this is the next address after end of flash array */
AnnaBridge	175:af195413fb11	1646	while (regionCounter <= flashProtectionInfo.regionCount)
<>	154:37f96f9d4de2	1647	{
AnnaBridge	175:af195413fb11	1648	flashRegionAddress[regionCounter] =
AnnaBridge	175:af195413fb11	1649	flashProtectionInfo.regionBase + flashProtectionInfo.regionSize * regionCounter;
<>	154:37f96f9d4de2	1650	regionCounter++;
<>	154:37f96f9d4de2	1651	}
<>	154:37f96f9d4de2	1652
<>	154:37f96f9d4de2	1653	/* populate flashRegionProtectStatus array with status information
<>	154:37f96f9d4de2	1654	* Protection status for each region is stored in the FPROT[3:0] registers
<>	154:37f96f9d4de2	1655	* Each bit represents one region of flash
<>	154:37f96f9d4de2	1656	* 4 registers * 8-bits-per-register = 32-bits (32-regions)
<>	154:37f96f9d4de2	1657	* The convention is:
<>	154:37f96f9d4de2	1658	* FPROT3[bit 0] is the first protection region (start of flash memory)
<>	154:37f96f9d4de2	1659	* FPROT0[bit 7] is the last protection region (end of flash memory)
<>	154:37f96f9d4de2	1660	* regionCounter is used to determine which FPROT[3:0] register to check for protection status
<>	154:37f96f9d4de2	1661	* Note: FPROT=1 means NOT protected, FPROT=0 means protected */
<>	154:37f96f9d4de2	1662	regionCounter = 0; /* make sure regionCounter is initialized to 0 first */
AnnaBridge	175:af195413fb11	1663	while (regionCounter < flashProtectionInfo.regionCount)
<>	154:37f96f9d4de2	1664	{
AnnaBridge	175:af195413fb11	1665	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	1666	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
<>	154:37f96f9d4de2	1667	{
AnnaBridge	175:af195413fb11	1668	if (regionCounter < 8)
AnnaBridge	175:af195413fb11	1669	{
AnnaBridge	175:af195413fb11	1670	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTSL_REG >> regionCounter) & (0x01u);
AnnaBridge	175:af195413fb11	1671	}
AnnaBridge	175:af195413fb11	1672	else if ((regionCounter >= 8) && (regionCounter < 16))
AnnaBridge	175:af195413fb11	1673	{
AnnaBridge	175:af195413fb11	1674	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTSH_REG >> (regionCounter - 8)) & (0x01u);
AnnaBridge	175:af195413fb11	1675	}
AnnaBridge	175:af195413fb11	1676	else
AnnaBridge	175:af195413fb11	1677	{
AnnaBridge	175:af195413fb11	1678	break;
AnnaBridge	175:af195413fb11	1679	}
<>	154:37f96f9d4de2	1680	}
<>	154:37f96f9d4de2	1681	else
AnnaBridge	175:af195413fb11	1682	#endif
<>	154:37f96f9d4de2	1683	{
AnnaBridge	175:af195413fb11	1684	/* Note: So far protection region count may be 16/20/24/32/64 */
AnnaBridge	175:af195413fb11	1685	if (regionCounter < 8)
AnnaBridge	175:af195413fb11	1686	{
AnnaBridge	175:af195413fb11	1687	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL3_REG >> regionCounter) & (0x01u);
AnnaBridge	175:af195413fb11	1688	}
AnnaBridge	175:af195413fb11	1689	else if ((regionCounter >= 8) && (regionCounter < 16))
AnnaBridge	175:af195413fb11	1690	{
AnnaBridge	175:af195413fb11	1691	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL2_REG >> (regionCounter - 8)) & (0x01u);
AnnaBridge	175:af195413fb11	1692	}
AnnaBridge	175:af195413fb11	1693	#if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT > 16)
AnnaBridge	175:af195413fb11	1694	#if (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 20)
AnnaBridge	175:af195413fb11	1695	else if ((regionCounter >= 16) && (regionCounter < 20))
AnnaBridge	175:af195413fb11	1696	{
AnnaBridge	175:af195413fb11	1697	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL1_REG >> (regionCounter - 16)) & (0x01u);
AnnaBridge	175:af195413fb11	1698	}
AnnaBridge	175:af195413fb11	1699	#else
AnnaBridge	175:af195413fb11	1700	else if ((regionCounter >= 16) && (regionCounter < 24))
AnnaBridge	175:af195413fb11	1701	{
AnnaBridge	175:af195413fb11	1702	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL1_REG >> (regionCounter - 16)) & (0x01u);
AnnaBridge	175:af195413fb11	1703	}
AnnaBridge	175:af195413fb11	1704	#endif /* (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 20) */
AnnaBridge	175:af195413fb11	1705	#endif
AnnaBridge	175:af195413fb11	1706	#if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT > 24)
AnnaBridge	175:af195413fb11	1707	else if ((regionCounter >= 24) && (regionCounter < 32))
AnnaBridge	175:af195413fb11	1708	{
AnnaBridge	175:af195413fb11	1709	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL0_REG >> (regionCounter - 24)) & (0x01u);
AnnaBridge	175:af195413fb11	1710	}
AnnaBridge	175:af195413fb11	1711	#endif
AnnaBridge	175:af195413fb11	1712	#if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && \
AnnaBridge	175:af195413fb11	1713	(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 64)
AnnaBridge	175:af195413fb11	1714	else if (regionCounter < 40)
AnnaBridge	175:af195413fb11	1715	{
AnnaBridge	175:af195413fb11	1716	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH3_REG >> (regionCounter - 32)) & (0x01u);
AnnaBridge	175:af195413fb11	1717	}
AnnaBridge	175:af195413fb11	1718	else if (regionCounter < 48)
AnnaBridge	175:af195413fb11	1719	{
AnnaBridge	175:af195413fb11	1720	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH2_REG >> (regionCounter - 40)) & (0x01u);
AnnaBridge	175:af195413fb11	1721	}
AnnaBridge	175:af195413fb11	1722	else if (regionCounter < 56)
AnnaBridge	175:af195413fb11	1723	{
AnnaBridge	175:af195413fb11	1724	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH1_REG >> (regionCounter - 48)) & (0x01u);
AnnaBridge	175:af195413fb11	1725	}
AnnaBridge	175:af195413fb11	1726	else if (regionCounter < 64)
AnnaBridge	175:af195413fb11	1727	{
AnnaBridge	175:af195413fb11	1728	flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH0_REG >> (regionCounter - 56)) & (0x01u);
AnnaBridge	175:af195413fb11	1729	}
AnnaBridge	175:af195413fb11	1730	#endif
AnnaBridge	175:af195413fb11	1731	else
AnnaBridge	175:af195413fb11	1732	{
AnnaBridge	175:af195413fb11	1733	break;
AnnaBridge	175:af195413fb11	1734	}
<>	154:37f96f9d4de2	1735	}
AnnaBridge	175:af195413fb11	1736
<>	154:37f96f9d4de2	1737	regionCounter++;
<>	154:37f96f9d4de2	1738	}
<>	154:37f96f9d4de2	1739
<>	154:37f96f9d4de2	1740	/* loop through the flash regions and check
<>	154:37f96f9d4de2	1741	* desired flash address range for protection status
<>	154:37f96f9d4de2	1742	* loop stops when it is detected that start has exceeded the endAddress */
<>	154:37f96f9d4de2	1743	regionCounter = 0; /* make sure regionCounter is initialized to 0 first */
<>	154:37f96f9d4de2	1744	regionCheckedCounter = 0;
<>	154:37f96f9d4de2	1745	protectStatusCounter = 0; /* make sure protectStatusCounter is initialized to 0 first */
<>	154:37f96f9d4de2	1746	while (start < endAddress)
<>	154:37f96f9d4de2	1747	{
<>	154:37f96f9d4de2	1748	/* check to see if the address falls within this protection region
<>	154:37f96f9d4de2	1749	* Note that if the entire flash is to be checked, the last protection
<>	154:37f96f9d4de2	1750	* region checked would consist of the last protection start address and
<>	154:37f96f9d4de2	1751	* the start address following the end of flash */
<>	154:37f96f9d4de2	1752	if ((start >= flashRegionAddress[regionCounter]) && (start < flashRegionAddress[regionCounter + 1]))
<>	154:37f96f9d4de2	1753	{
<>	154:37f96f9d4de2	1754	/* increment regionCheckedCounter to indicate this region was checked */
<>	154:37f96f9d4de2	1755	regionCheckedCounter++;
<>	154:37f96f9d4de2	1756
<>	154:37f96f9d4de2	1757	/* check the protection status of this region
<>	154:37f96f9d4de2	1758	* Note: FPROT=1 means NOT protected, FPROT=0 means protected */
<>	154:37f96f9d4de2	1759	if (!flashRegionProtectStatus[regionCounter])
<>	154:37f96f9d4de2	1760	{
<>	154:37f96f9d4de2	1761	/* increment protectStatusCounter to indicate this region is protected */
<>	154:37f96f9d4de2	1762	protectStatusCounter++;
<>	154:37f96f9d4de2	1763	}
AnnaBridge	175:af195413fb11	1764	start += flashProtectionInfo.regionSize; /* increment to an address within the next region */
<>	154:37f96f9d4de2	1765	}
<>	154:37f96f9d4de2	1766	regionCounter++; /* increment regionCounter to check for the next flash protection region */
<>	154:37f96f9d4de2	1767	}
<>	154:37f96f9d4de2	1768
<>	154:37f96f9d4de2	1769	/* if protectStatusCounter == 0, then no region of the desired flash region is protected */
<>	154:37f96f9d4de2	1770	if (protectStatusCounter == 0)
<>	154:37f96f9d4de2	1771	{
AnnaBridge	175:af195413fb11	1772	*protection_state = kFLASH_ProtectionStateUnprotected;
<>	154:37f96f9d4de2	1773	}
<>	154:37f96f9d4de2	1774	/* if protectStatusCounter == regionCheckedCounter, then each region checked was protected */
<>	154:37f96f9d4de2	1775	else if (protectStatusCounter == regionCheckedCounter)
<>	154:37f96f9d4de2	1776	{
AnnaBridge	175:af195413fb11	1777	*protection_state = kFLASH_ProtectionStateProtected;
<>	154:37f96f9d4de2	1778	}
<>	154:37f96f9d4de2	1779	/* if protectStatusCounter != regionCheckedCounter, then protection status is mixed
<>	154:37f96f9d4de2	1780	* In other words, some regions are protected while others are unprotected */
<>	154:37f96f9d4de2	1781	else
<>	154:37f96f9d4de2	1782	{
AnnaBridge	175:af195413fb11	1783	*protection_state = kFLASH_ProtectionStateMixed;
<>	154:37f96f9d4de2	1784	}
<>	154:37f96f9d4de2	1785
<>	154:37f96f9d4de2	1786	return (returnCode);
<>	154:37f96f9d4de2	1787	}
<>	154:37f96f9d4de2	1788
<>	154:37f96f9d4de2	1789	status_t FLASH_IsExecuteOnly(flash_config_t *config,
<>	154:37f96f9d4de2	1790	uint32_t start,
<>	154:37f96f9d4de2	1791	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	1792	flash_execute_only_access_state_t *access_state)
<>	154:37f96f9d4de2	1793	{
AnnaBridge	175:af195413fb11	1794	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL
AnnaBridge	175:af195413fb11	1795	flash_access_config_t flashAccessInfo; /* flash Execute-Only information */
AnnaBridge	175:af195413fb11	1796	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */
<>	154:37f96f9d4de2	1797	status_t returnCode;
<>	154:37f96f9d4de2	1798
<>	154:37f96f9d4de2	1799	if (access_state == NULL)
<>	154:37f96f9d4de2	1800	{
<>	154:37f96f9d4de2	1801	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1802	}
<>	154:37f96f9d4de2	1803
<>	154:37f96f9d4de2	1804	/* Check the supplied address range. */
<>	154:37f96f9d4de2	1805	returnCode = flash_check_range(config, start, lengthInBytes, FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE);
<>	154:37f96f9d4de2	1806	if (returnCode)
<>	154:37f96f9d4de2	1807	{
<>	154:37f96f9d4de2	1808	return returnCode;
<>	154:37f96f9d4de2	1809	}
<>	154:37f96f9d4de2	1810
<>	154:37f96f9d4de2	1811	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL
AnnaBridge	175:af195413fb11	1812	/* Get necessary flash Execute-Only information. */
AnnaBridge	175:af195413fb11	1813	returnCode = flash_get_access_info(config, &flashAccessInfo);
AnnaBridge	175:af195413fb11	1814	if (returnCode)
AnnaBridge	175:af195413fb11	1815	{
AnnaBridge	175:af195413fb11	1816	return returnCode;
AnnaBridge	175:af195413fb11	1817	}
AnnaBridge	175:af195413fb11	1818
<>	154:37f96f9d4de2	1819	{
<>	154:37f96f9d4de2	1820	uint32_t executeOnlySegmentCounter = 0;
<>	154:37f96f9d4de2	1821
<>	154:37f96f9d4de2	1822	/* calculating end address */
<>	154:37f96f9d4de2	1823	uint32_t endAddress = start + lengthInBytes;
<>	154:37f96f9d4de2	1824
<>	154:37f96f9d4de2	1825	/* Aligning start address and end address */
AnnaBridge	175:af195413fb11	1826	uint32_t alignedStartAddress = ALIGN_DOWN(start, flashAccessInfo.SegmentSize);
AnnaBridge	175:af195413fb11	1827	uint32_t alignedEndAddress = ALIGN_UP(endAddress, flashAccessInfo.SegmentSize);
<>	154:37f96f9d4de2	1828
<>	154:37f96f9d4de2	1829	uint32_t segmentIndex = 0;
<>	154:37f96f9d4de2	1830	uint32_t maxSupportedExecuteOnlySegmentCount =
AnnaBridge	175:af195413fb11	1831	(alignedEndAddress - alignedStartAddress) / flashAccessInfo.SegmentSize;
<>	154:37f96f9d4de2	1832
<>	154:37f96f9d4de2	1833	while (start < endAddress)
<>	154:37f96f9d4de2	1834	{
<>	154:37f96f9d4de2	1835	uint32_t xacc;
<>	154:37f96f9d4de2	1836
AnnaBridge	175:af195413fb11	1837	segmentIndex = (start - flashAccessInfo.SegmentBase) / flashAccessInfo.SegmentSize;
AnnaBridge	175:af195413fb11	1838
AnnaBridge	175:af195413fb11	1839	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER
AnnaBridge	175:af195413fb11	1840	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
<>	154:37f96f9d4de2	1841	{
AnnaBridge	175:af195413fb11	1842	/* For secondary flash, The two XACCS registers allow up to 16 restricted segments of equal memory size.
AnnaBridge	175:af195413fb11	1843	*/
AnnaBridge	175:af195413fb11	1844	if (segmentIndex < 8)
AnnaBridge	175:af195413fb11	1845	{
AnnaBridge	175:af195413fb11	1846	xacc = (const volatile uint8_t )&FTFx_XACCSL_REG;
AnnaBridge	175:af195413fb11	1847	}
AnnaBridge	175:af195413fb11	1848	else if (segmentIndex < flashAccessInfo.SegmentCount)
AnnaBridge	175:af195413fb11	1849	{
AnnaBridge	175:af195413fb11	1850	xacc = (const volatile uint8_t )&FTFx_XACCSH_REG;
AnnaBridge	175:af195413fb11	1851	segmentIndex -= 8;
AnnaBridge	175:af195413fb11	1852	}
AnnaBridge	175:af195413fb11	1853	else
AnnaBridge	175:af195413fb11	1854	{
AnnaBridge	175:af195413fb11	1855	break;
AnnaBridge	175:af195413fb11	1856	}
<>	154:37f96f9d4de2	1857	}
<>	154:37f96f9d4de2	1858	else
AnnaBridge	175:af195413fb11	1859	#endif
<>	154:37f96f9d4de2	1860	{
AnnaBridge	175:af195413fb11	1861	/* For primary flash, The eight XACC registers allow up to 64 restricted segments of equal memory size.
AnnaBridge	175:af195413fb11	1862	*/
AnnaBridge	175:af195413fb11	1863	if (segmentIndex < 32)
AnnaBridge	175:af195413fb11	1864	{
AnnaBridge	175:af195413fb11	1865	xacc = (const volatile uint32_t )&FTFx_XACCL3_REG;
AnnaBridge	175:af195413fb11	1866	}
AnnaBridge	175:af195413fb11	1867	else if (segmentIndex < flashAccessInfo.SegmentCount)
AnnaBridge	175:af195413fb11	1868	{
AnnaBridge	175:af195413fb11	1869	xacc = (const volatile uint32_t )&FTFx_XACCH3_REG;
AnnaBridge	175:af195413fb11	1870	segmentIndex -= 32;
AnnaBridge	175:af195413fb11	1871	}
AnnaBridge	175:af195413fb11	1872	else
AnnaBridge	175:af195413fb11	1873	{
AnnaBridge	175:af195413fb11	1874	break;
AnnaBridge	175:af195413fb11	1875	}
<>	154:37f96f9d4de2	1876	}
<>	154:37f96f9d4de2	1877
<>	154:37f96f9d4de2	1878	/* Determine if this address range is in a execute-only protection flash segment. */
<>	154:37f96f9d4de2	1879	if ((~xacc) & (1u << segmentIndex))
<>	154:37f96f9d4de2	1880	{
<>	154:37f96f9d4de2	1881	executeOnlySegmentCounter++;
<>	154:37f96f9d4de2	1882	}
<>	154:37f96f9d4de2	1883
AnnaBridge	175:af195413fb11	1884	start += flashAccessInfo.SegmentSize;
<>	154:37f96f9d4de2	1885	}
<>	154:37f96f9d4de2	1886
<>	154:37f96f9d4de2	1887	if (executeOnlySegmentCounter < 1u)
<>	154:37f96f9d4de2	1888	{
AnnaBridge	175:af195413fb11	1889	*access_state = kFLASH_AccessStateUnLimited;
<>	154:37f96f9d4de2	1890	}
<>	154:37f96f9d4de2	1891	else if (executeOnlySegmentCounter < maxSupportedExecuteOnlySegmentCount)
<>	154:37f96f9d4de2	1892	{
AnnaBridge	175:af195413fb11	1893	*access_state = kFLASH_AccessStateMixed;
<>	154:37f96f9d4de2	1894	}
<>	154:37f96f9d4de2	1895	else
<>	154:37f96f9d4de2	1896	{
AnnaBridge	175:af195413fb11	1897	*access_state = kFLASH_AccessStateExecuteOnly;
<>	154:37f96f9d4de2	1898	}
<>	154:37f96f9d4de2	1899	}
<>	154:37f96f9d4de2	1900	#else
AnnaBridge	175:af195413fb11	1901	*access_state = kFLASH_AccessStateUnLimited;
<>	154:37f96f9d4de2	1902	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */
<>	154:37f96f9d4de2	1903
<>	154:37f96f9d4de2	1904	return (returnCode);
<>	154:37f96f9d4de2	1905	}
<>	154:37f96f9d4de2	1906
<>	154:37f96f9d4de2	1907	status_t FLASH_GetProperty(flash_config_t config, flash_property_tag_t whichProperty, uint32_t value)
<>	154:37f96f9d4de2	1908	{
<>	154:37f96f9d4de2	1909	if ((config == NULL) \|\| (value == NULL))
<>	154:37f96f9d4de2	1910	{
<>	154:37f96f9d4de2	1911	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	1912	}
<>	154:37f96f9d4de2	1913
<>	154:37f96f9d4de2	1914	switch (whichProperty)
<>	154:37f96f9d4de2	1915	{
AnnaBridge	175:af195413fb11	1916	case kFLASH_PropertyPflashSectorSize:
<>	154:37f96f9d4de2	1917	*value = config->PFlashSectorSize;
<>	154:37f96f9d4de2	1918	break;
<>	154:37f96f9d4de2	1919
AnnaBridge	175:af195413fb11	1920	case kFLASH_PropertyPflashTotalSize:
<>	154:37f96f9d4de2	1921	*value = config->PFlashTotalSize;
<>	154:37f96f9d4de2	1922	break;
<>	154:37f96f9d4de2	1923
AnnaBridge	175:af195413fb11	1924	case kFLASH_PropertyPflashBlockSize:
<>	154:37f96f9d4de2	1925	*value = config->PFlashTotalSize / FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT;
<>	154:37f96f9d4de2	1926	break;
<>	154:37f96f9d4de2	1927
AnnaBridge	175:af195413fb11	1928	case kFLASH_PropertyPflashBlockCount:
AnnaBridge	175:af195413fb11	1929	*value = (uint32_t)config->PFlashBlockCount;
<>	154:37f96f9d4de2	1930	break;
<>	154:37f96f9d4de2	1931
AnnaBridge	175:af195413fb11	1932	case kFLASH_PropertyPflashBlockBaseAddr:
<>	154:37f96f9d4de2	1933	*value = config->PFlashBlockBase;
<>	154:37f96f9d4de2	1934	break;
<>	154:37f96f9d4de2	1935
AnnaBridge	175:af195413fb11	1936	case kFLASH_PropertyPflashFacSupport:
<>	154:37f96f9d4de2	1937	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL)
<>	154:37f96f9d4de2	1938	*value = FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL;
<>	154:37f96f9d4de2	1939	#else
<>	154:37f96f9d4de2	1940	*value = 0;
<>	154:37f96f9d4de2	1941	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */
<>	154:37f96f9d4de2	1942	break;
<>	154:37f96f9d4de2	1943
AnnaBridge	175:af195413fb11	1944	case kFLASH_PropertyPflashAccessSegmentSize:
<>	154:37f96f9d4de2	1945	*value = config->PFlashAccessSegmentSize;
<>	154:37f96f9d4de2	1946	break;
<>	154:37f96f9d4de2	1947
AnnaBridge	175:af195413fb11	1948	case kFLASH_PropertyPflashAccessSegmentCount:
<>	154:37f96f9d4de2	1949	*value = config->PFlashAccessSegmentCount;
<>	154:37f96f9d4de2	1950	break;
<>	154:37f96f9d4de2	1951
AnnaBridge	175:af195413fb11	1952	case kFLASH_PropertyFlexRamBlockBaseAddr:
AnnaBridge	175:af195413fb11	1953	*value = config->FlexRAMBlockBase;
AnnaBridge	175:af195413fb11	1954	break;
AnnaBridge	175:af195413fb11	1955
AnnaBridge	175:af195413fb11	1956	case kFLASH_PropertyFlexRamTotalSize:
AnnaBridge	175:af195413fb11	1957	*value = config->FlexRAMTotalSize;
AnnaBridge	175:af195413fb11	1958	break;
AnnaBridge	175:af195413fb11	1959
<>	154:37f96f9d4de2	1960	#if FLASH_SSD_IS_FLEXNVM_ENABLED
AnnaBridge	175:af195413fb11	1961	case kFLASH_PropertyDflashSectorSize:
<>	154:37f96f9d4de2	1962	*value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE;
<>	154:37f96f9d4de2	1963	break;
AnnaBridge	175:af195413fb11	1964	case kFLASH_PropertyDflashTotalSize:
<>	154:37f96f9d4de2	1965	*value = config->DFlashTotalSize;
<>	154:37f96f9d4de2	1966	break;
AnnaBridge	175:af195413fb11	1967	case kFLASH_PropertyDflashBlockSize:
<>	154:37f96f9d4de2	1968	*value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SIZE;
<>	154:37f96f9d4de2	1969	break;
AnnaBridge	175:af195413fb11	1970	case kFLASH_PropertyDflashBlockCount:
<>	154:37f96f9d4de2	1971	*value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT;
<>	154:37f96f9d4de2	1972	break;
AnnaBridge	175:af195413fb11	1973	case kFLASH_PropertyDflashBlockBaseAddr:
<>	154:37f96f9d4de2	1974	*value = config->DFlashBlockBase;
<>	154:37f96f9d4de2	1975	break;
AnnaBridge	175:af195413fb11	1976	case kFLASH_PropertyEepromTotalSize:
<>	154:37f96f9d4de2	1977	*value = config->EEpromTotalSize;
<>	154:37f96f9d4de2	1978	break;
<>	154:37f96f9d4de2	1979	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	1980
<>	154:37f96f9d4de2	1981	default: /* catch inputs that are not recognized */
<>	154:37f96f9d4de2	1982	return kStatus_FLASH_UnknownProperty;
<>	154:37f96f9d4de2	1983	}
<>	154:37f96f9d4de2	1984
<>	154:37f96f9d4de2	1985	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	1986	}
<>	154:37f96f9d4de2	1987
AnnaBridge	175:af195413fb11	1988	status_t FLASH_SetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t value)
AnnaBridge	175:af195413fb11	1989	{
AnnaBridge	175:af195413fb11	1990	status_t status = kStatus_FLASH_Success;
AnnaBridge	175:af195413fb11	1991
AnnaBridge	175:af195413fb11	1992	if (config == NULL)
AnnaBridge	175:af195413fb11	1993	{
AnnaBridge	175:af195413fb11	1994	return kStatus_FLASH_InvalidArgument;
AnnaBridge	175:af195413fb11	1995	}
AnnaBridge	175:af195413fb11	1996
AnnaBridge	175:af195413fb11	1997	switch (whichProperty)
AnnaBridge	175:af195413fb11	1998	{
AnnaBridge	175:af195413fb11	1999	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED
AnnaBridge	175:af195413fb11	2000	case kFLASH_PropertyFlashMemoryIndex:
AnnaBridge	175:af195413fb11	2001	if ((value != (uint32_t)kFLASH_MemoryIndexPrimaryFlash) &&
AnnaBridge	175:af195413fb11	2002	(value != (uint32_t)kFLASH_MemoryIndexSecondaryFlash))
AnnaBridge	175:af195413fb11	2003	{
AnnaBridge	175:af195413fb11	2004	return kStatus_FLASH_InvalidPropertyValue;
AnnaBridge	175:af195413fb11	2005	}
AnnaBridge	175:af195413fb11	2006	config->FlashMemoryIndex = (uint8_t)value;
AnnaBridge	175:af195413fb11	2007	break;
AnnaBridge	175:af195413fb11	2008	#endif /* FLASH_SSD_IS_SECONDARY_FLASH_ENABLED */
AnnaBridge	175:af195413fb11	2009
AnnaBridge	175:af195413fb11	2010	case kFLASH_PropertyFlashCacheControllerIndex:
AnnaBridge	175:af195413fb11	2011	if ((value != (uint32_t)kFLASH_CacheControllerIndexForCore0) &&
AnnaBridge	175:af195413fb11	2012	(value != (uint32_t)kFLASH_CacheControllerIndexForCore1))
AnnaBridge	175:af195413fb11	2013	{
AnnaBridge	175:af195413fb11	2014	return kStatus_FLASH_InvalidPropertyValue;
AnnaBridge	175:af195413fb11	2015	}
AnnaBridge	175:af195413fb11	2016	config->FlashCacheControllerIndex = (uint8_t)value;
AnnaBridge	175:af195413fb11	2017	break;
AnnaBridge	175:af195413fb11	2018
AnnaBridge	175:af195413fb11	2019	case kFLASH_PropertyPflashSectorSize:
AnnaBridge	175:af195413fb11	2020	case kFLASH_PropertyPflashTotalSize:
AnnaBridge	175:af195413fb11	2021	case kFLASH_PropertyPflashBlockSize:
AnnaBridge	175:af195413fb11	2022	case kFLASH_PropertyPflashBlockCount:
AnnaBridge	175:af195413fb11	2023	case kFLASH_PropertyPflashBlockBaseAddr:
AnnaBridge	175:af195413fb11	2024	case kFLASH_PropertyPflashFacSupport:
AnnaBridge	175:af195413fb11	2025	case kFLASH_PropertyPflashAccessSegmentSize:
AnnaBridge	175:af195413fb11	2026	case kFLASH_PropertyPflashAccessSegmentCount:
AnnaBridge	175:af195413fb11	2027	case kFLASH_PropertyFlexRamBlockBaseAddr:
AnnaBridge	175:af195413fb11	2028	case kFLASH_PropertyFlexRamTotalSize:
AnnaBridge	175:af195413fb11	2029	#if FLASH_SSD_IS_FLEXNVM_ENABLED
AnnaBridge	175:af195413fb11	2030	case kFLASH_PropertyDflashSectorSize:
AnnaBridge	175:af195413fb11	2031	case kFLASH_PropertyDflashTotalSize:
AnnaBridge	175:af195413fb11	2032	case kFLASH_PropertyDflashBlockSize:
AnnaBridge	175:af195413fb11	2033	case kFLASH_PropertyDflashBlockCount:
AnnaBridge	175:af195413fb11	2034	case kFLASH_PropertyDflashBlockBaseAddr:
AnnaBridge	175:af195413fb11	2035	case kFLASH_PropertyEepromTotalSize:
AnnaBridge	175:af195413fb11	2036	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
AnnaBridge	175:af195413fb11	2037	status = kStatus_FLASH_ReadOnlyProperty;
AnnaBridge	175:af195413fb11	2038	break;
AnnaBridge	175:af195413fb11	2039	default: /* catch inputs that are not recognized */
AnnaBridge	175:af195413fb11	2040	status = kStatus_FLASH_UnknownProperty;
AnnaBridge	175:af195413fb11	2041	break;
AnnaBridge	175:af195413fb11	2042	}
AnnaBridge	175:af195413fb11	2043
AnnaBridge	175:af195413fb11	2044	return status;
AnnaBridge	175:af195413fb11	2045	}
AnnaBridge	175:af195413fb11	2046
<>	154:37f96f9d4de2	2047	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	2048	status_t FLASH_SetFlexramFunction(flash_config_t *config, flash_flexram_function_option_t option)
<>	154:37f96f9d4de2	2049	{
<>	154:37f96f9d4de2	2050	status_t status;
<>	154:37f96f9d4de2	2051
<>	154:37f96f9d4de2	2052	if (config == NULL)
<>	154:37f96f9d4de2	2053	{
<>	154:37f96f9d4de2	2054	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2055	}
<>	154:37f96f9d4de2	2056
<>	154:37f96f9d4de2	2057	status = flasn_check_flexram_function_option_range(option);
<>	154:37f96f9d4de2	2058	if (status != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	2059	{
<>	154:37f96f9d4de2	2060	return status;
<>	154:37f96f9d4de2	2061	}
<>	154:37f96f9d4de2	2062
<>	154:37f96f9d4de2	2063	/* preparing passing parameter to verify all block command */
<>	154:37f96f9d4de2	2064	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_SET_FLEXRAM_FUNCTION, option, 0xFFFFU);
<>	154:37f96f9d4de2	2065
<>	154:37f96f9d4de2	2066	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	2067	return flash_command_sequence(config);
<>	154:37f96f9d4de2	2068	}
<>	154:37f96f9d4de2	2069	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
<>	154:37f96f9d4de2	2070
<>	154:37f96f9d4de2	2071	#if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD
<>	154:37f96f9d4de2	2072	status_t FLASH_SwapControl(flash_config_t *config,
<>	154:37f96f9d4de2	2073	uint32_t address,
<>	154:37f96f9d4de2	2074	flash_swap_control_option_t option,
<>	154:37f96f9d4de2	2075	flash_swap_state_config_t *returnInfo)
<>	154:37f96f9d4de2	2076	{
<>	154:37f96f9d4de2	2077	status_t returnCode;
<>	154:37f96f9d4de2	2078
<>	154:37f96f9d4de2	2079	if ((config == NULL) \|\| (returnInfo == NULL))
<>	154:37f96f9d4de2	2080	{
<>	154:37f96f9d4de2	2081	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2082	}
<>	154:37f96f9d4de2	2083
<>	154:37f96f9d4de2	2084	if (address & (FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT - 1))
<>	154:37f96f9d4de2	2085	{
<>	154:37f96f9d4de2	2086	return kStatus_FLASH_AlignmentError;
<>	154:37f96f9d4de2	2087	}
<>	154:37f96f9d4de2	2088
<>	154:37f96f9d4de2	2089	/* Make sure address provided is in the lower half of Program flash but not in the Flash Configuration Field */
<>	154:37f96f9d4de2	2090	if ((address >= (config->PFlashTotalSize / 2)) \|\|
AnnaBridge	175:af195413fb11	2091	((address >= kFLASH_ConfigAreaStart) && (address <= kFLASH_ConfigAreaEnd)))
<>	154:37f96f9d4de2	2092	{
<>	154:37f96f9d4de2	2093	return kStatus_FLASH_SwapIndicatorAddressError;
<>	154:37f96f9d4de2	2094	}
<>	154:37f96f9d4de2	2095
<>	154:37f96f9d4de2	2096	/* Check the option. */
<>	154:37f96f9d4de2	2097	returnCode = flash_check_swap_control_option(option);
<>	154:37f96f9d4de2	2098	if (returnCode)
<>	154:37f96f9d4de2	2099	{
<>	154:37f96f9d4de2	2100	return returnCode;
<>	154:37f96f9d4de2	2101	}
<>	154:37f96f9d4de2	2102
<>	154:37f96f9d4de2	2103	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_SWAP_CONTROL, address);
<>	154:37f96f9d4de2	2104	kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU);
<>	154:37f96f9d4de2	2105
<>	154:37f96f9d4de2	2106	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	2107
AnnaBridge	175:af195413fb11	2108	returnInfo->flashSwapState = (flash_swap_state_t)FTFx_FCCOB5_REG;
AnnaBridge	175:af195413fb11	2109	returnInfo->currentSwapBlockStatus = (flash_swap_block_status_t)FTFx_FCCOB6_REG;
AnnaBridge	175:af195413fb11	2110	returnInfo->nextSwapBlockStatus = (flash_swap_block_status_t)FTFx_FCCOB7_REG;
<>	154:37f96f9d4de2	2111
<>	154:37f96f9d4de2	2112	return returnCode;
<>	154:37f96f9d4de2	2113	}
<>	154:37f96f9d4de2	2114	#endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */
<>	154:37f96f9d4de2	2115
<>	154:37f96f9d4de2	2116	#if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP
<>	154:37f96f9d4de2	2117	status_t FLASH_Swap(flash_config_t *config, uint32_t address, flash_swap_function_option_t option)
<>	154:37f96f9d4de2	2118	{
<>	154:37f96f9d4de2	2119	flash_swap_state_config_t returnInfo;
<>	154:37f96f9d4de2	2120	status_t returnCode;
<>	154:37f96f9d4de2	2121
<>	154:37f96f9d4de2	2122	memset(&returnInfo, 0xFFU, sizeof(returnInfo));
<>	154:37f96f9d4de2	2123
<>	154:37f96f9d4de2	2124	do
<>	154:37f96f9d4de2	2125	{
AnnaBridge	175:af195413fb11	2126	returnCode = FLASH_SwapControl(config, address, kFLASH_SwapControlOptionReportStatus, &returnInfo);
<>	154:37f96f9d4de2	2127	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	2128	{
<>	154:37f96f9d4de2	2129	return returnCode;
<>	154:37f96f9d4de2	2130	}
<>	154:37f96f9d4de2	2131
AnnaBridge	175:af195413fb11	2132	if (kFLASH_SwapFunctionOptionDisable == option)
<>	154:37f96f9d4de2	2133	{
AnnaBridge	175:af195413fb11	2134	if (returnInfo.flashSwapState == kFLASH_SwapStateDisabled)
<>	154:37f96f9d4de2	2135	{
<>	154:37f96f9d4de2	2136	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2137	}
AnnaBridge	175:af195413fb11	2138	else if (returnInfo.flashSwapState == kFLASH_SwapStateUninitialized)
<>	154:37f96f9d4de2	2139	{
<>	154:37f96f9d4de2	2140	/* The swap system changed to the DISABLED state with Program flash block 0
<>	154:37f96f9d4de2	2141	* located at relative flash address 0x0_0000 */
AnnaBridge	175:af195413fb11	2142	returnCode = FLASH_SwapControl(config, address, kFLASH_SwapControlOptionDisableSystem, &returnInfo);
<>	154:37f96f9d4de2	2143	}
<>	154:37f96f9d4de2	2144	else
<>	154:37f96f9d4de2	2145	{
<>	154:37f96f9d4de2	2146	/* Swap disable should be requested only when swap system is in the uninitialized state */
<>	154:37f96f9d4de2	2147	return kStatus_FLASH_SwapSystemNotInUninitialized;
<>	154:37f96f9d4de2	2148	}
<>	154:37f96f9d4de2	2149	}
<>	154:37f96f9d4de2	2150	else
<>	154:37f96f9d4de2	2151	{
<>	154:37f96f9d4de2	2152	/* When first swap: the initial swap state is Uninitialized, flash swap inidicator address is unset,
<>	154:37f96f9d4de2	2153	* the swap procedure should be Uninitialized -> Update-Erased -> Complete.
<>	154:37f96f9d4de2	2154	* After the first swap has been completed, the flash swap inidicator address cannot be modified
<>	154:37f96f9d4de2	2155	* unless EraseAllBlocks command is issued, the swap procedure is changed to Update -> Update-Erased ->
<>	154:37f96f9d4de2	2156	* Complete. */
<>	154:37f96f9d4de2	2157	switch (returnInfo.flashSwapState)
<>	154:37f96f9d4de2	2158	{
AnnaBridge	175:af195413fb11	2159	case kFLASH_SwapStateUninitialized:
<>	154:37f96f9d4de2	2160	/* If current swap mode is Uninitialized, Initialize Swap to Initialized/READY state. */
<>	154:37f96f9d4de2	2161	returnCode =
AnnaBridge	175:af195413fb11	2162	FLASH_SwapControl(config, address, kFLASH_SwapControlOptionIntializeSystem, &returnInfo);
<>	154:37f96f9d4de2	2163	break;
AnnaBridge	175:af195413fb11	2164	case kFLASH_SwapStateReady:
<>	154:37f96f9d4de2	2165	/* Validate whether the address provided to the swap system is matched to
<>	154:37f96f9d4de2	2166	* swap indicator address in the IFR */
<>	154:37f96f9d4de2	2167	returnCode = flash_validate_swap_indicator_address(config, address);
<>	154:37f96f9d4de2	2168	if (returnCode == kStatus_FLASH_Success)
<>	154:37f96f9d4de2	2169	{
<>	154:37f96f9d4de2	2170	/* If current swap mode is Initialized/Ready, Initialize Swap to UPDATE state. */
<>	154:37f96f9d4de2	2171	returnCode =
AnnaBridge	175:af195413fb11	2172	FLASH_SwapControl(config, address, kFLASH_SwapControlOptionSetInUpdateState, &returnInfo);
<>	154:37f96f9d4de2	2173	}
<>	154:37f96f9d4de2	2174	break;
AnnaBridge	175:af195413fb11	2175	case kFLASH_SwapStateUpdate:
<>	154:37f96f9d4de2	2176	/* If current swap mode is Update, Erase indicator sector in non active block
<>	154:37f96f9d4de2	2177	* to proceed swap system to update-erased state */
<>	154:37f96f9d4de2	2178	returnCode = FLASH_Erase(config, address + (config->PFlashTotalSize >> 1),
AnnaBridge	175:af195413fb11	2179	FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT, kFLASH_ApiEraseKey);
<>	154:37f96f9d4de2	2180	break;
AnnaBridge	175:af195413fb11	2181	case kFLASH_SwapStateUpdateErased:
<>	154:37f96f9d4de2	2182	/* If current swap mode is Update or Update-Erased, progress Swap to COMPLETE State */
<>	154:37f96f9d4de2	2183	returnCode =
AnnaBridge	175:af195413fb11	2184	FLASH_SwapControl(config, address, kFLASH_SwapControlOptionSetInCompleteState, &returnInfo);
<>	154:37f96f9d4de2	2185	break;
AnnaBridge	175:af195413fb11	2186	case kFLASH_SwapStateComplete:
<>	154:37f96f9d4de2	2187	break;
AnnaBridge	175:af195413fb11	2188	case kFLASH_SwapStateDisabled:
<>	154:37f96f9d4de2	2189	/* When swap system is in disabled state, We need to clear swap system back to uninitialized
<>	154:37f96f9d4de2	2190	* by issuing EraseAllBlocks command */
<>	154:37f96f9d4de2	2191	returnCode = kStatus_FLASH_SwapSystemNotInUninitialized;
<>	154:37f96f9d4de2	2192	break;
<>	154:37f96f9d4de2	2193	default:
<>	154:37f96f9d4de2	2194	returnCode = kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2195	break;
<>	154:37f96f9d4de2	2196	}
<>	154:37f96f9d4de2	2197	}
<>	154:37f96f9d4de2	2198	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	2199	{
<>	154:37f96f9d4de2	2200	break;
<>	154:37f96f9d4de2	2201	}
AnnaBridge	175:af195413fb11	2202	} while (!((kFLASH_SwapStateComplete == returnInfo.flashSwapState) && (kFLASH_SwapFunctionOptionEnable == option)));
<>	154:37f96f9d4de2	2203
<>	154:37f96f9d4de2	2204	return returnCode;
<>	154:37f96f9d4de2	2205	}
<>	154:37f96f9d4de2	2206	#endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
<>	154:37f96f9d4de2	2207
<>	154:37f96f9d4de2	2208	#if defined(FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD) && FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD
<>	154:37f96f9d4de2	2209	status_t FLASH_ProgramPartition(flash_config_t *config,
<>	154:37f96f9d4de2	2210	flash_partition_flexram_load_option_t option,
<>	154:37f96f9d4de2	2211	uint32_t eepromDataSizeCode,
<>	154:37f96f9d4de2	2212	uint32_t flexnvmPartitionCode)
<>	154:37f96f9d4de2	2213	{
<>	154:37f96f9d4de2	2214	status_t returnCode;
<>	154:37f96f9d4de2	2215
<>	154:37f96f9d4de2	2216	if (config == NULL)
<>	154:37f96f9d4de2	2217	{
<>	154:37f96f9d4de2	2218	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2219	}
<>	154:37f96f9d4de2	2220
<>	154:37f96f9d4de2	2221	/* eepromDataSizeCode[7:6], flexnvmPartitionCode[7:4] should be all 1'b0
<>	154:37f96f9d4de2	2222	* or it will cause access error. */
<>	154:37f96f9d4de2	2223	/* eepromDataSizeCode &= 0x3FU; */
<>	154:37f96f9d4de2	2224	/* flexnvmPartitionCode &= 0x0FU; */
<>	154:37f96f9d4de2	2225
<>	154:37f96f9d4de2	2226	/* preparing passing parameter to program the flash block */
<>	154:37f96f9d4de2	2227	kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_2_1(FTFx_PROGRAM_PARTITION, 0xFFFFU, option);
<>	154:37f96f9d4de2	2228	kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_1_2(eepromDataSizeCode, flexnvmPartitionCode, 0xFFFFU);
<>	154:37f96f9d4de2	2229
AnnaBridge	175:af195413fb11	2230	flash_cache_clear_process(config, kFLASH_CacheClearProcessPre);
AnnaBridge	175:af195413fb11	2231
<>	154:37f96f9d4de2	2232	/* calling flash command sequence function to execute the command */
<>	154:37f96f9d4de2	2233	returnCode = flash_command_sequence(config);
<>	154:37f96f9d4de2	2234
<>	154:37f96f9d4de2	2235	flash_cache_clear(config);
<>	154:37f96f9d4de2	2236
<>	154:37f96f9d4de2	2237	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2238	/* Data flash IFR will be updated by program partition command during reset sequence,
<>	154:37f96f9d4de2	2239	* so we just set reserved values for partitioned FlexNVM size here */
<>	154:37f96f9d4de2	2240	config->EEpromTotalSize = FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED;
<>	154:37f96f9d4de2	2241	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	2242	#endif
<>	154:37f96f9d4de2	2243
<>	154:37f96f9d4de2	2244	return (returnCode);
<>	154:37f96f9d4de2	2245	}
<>	154:37f96f9d4de2	2246	#endif /* FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD */
<>	154:37f96f9d4de2	2247
AnnaBridge	175:af195413fb11	2248	status_t FLASH_PflashSetProtection(flash_config_t config, pflash_protection_status_t protectStatus)
<>	154:37f96f9d4de2	2249	{
<>	154:37f96f9d4de2	2250	if (config == NULL)
<>	154:37f96f9d4de2	2251	{
<>	154:37f96f9d4de2	2252	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2253	}
<>	154:37f96f9d4de2	2254
AnnaBridge	175:af195413fb11	2255	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	2256	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
<>	154:37f96f9d4de2	2257	{
AnnaBridge	175:af195413fb11	2258	*kFPROTSL = protectStatus->valueLow32b.prots16b.protsl;
AnnaBridge	175:af195413fb11	2259	if (protectStatus->valueLow32b.prots16b.protsl != *kFPROTSL)
AnnaBridge	175:af195413fb11	2260	{
AnnaBridge	175:af195413fb11	2261	return kStatus_FLASH_CommandFailure;
AnnaBridge	175:af195413fb11	2262	}
AnnaBridge	175:af195413fb11	2263
AnnaBridge	175:af195413fb11	2264	*kFPROTSH = protectStatus->valueLow32b.prots16b.protsh;
AnnaBridge	175:af195413fb11	2265	if (protectStatus->valueLow32b.prots16b.protsh != *kFPROTSH)
AnnaBridge	175:af195413fb11	2266	{
AnnaBridge	175:af195413fb11	2267	return kStatus_FLASH_CommandFailure;
AnnaBridge	175:af195413fb11	2268	}
AnnaBridge	175:af195413fb11	2269	}
AnnaBridge	175:af195413fb11	2270	else
AnnaBridge	175:af195413fb11	2271	#endif
AnnaBridge	175:af195413fb11	2272	{
AnnaBridge	175:af195413fb11	2273	*kFPROTL = protectStatus->valueLow32b.protl32b;
AnnaBridge	175:af195413fb11	2274	if (protectStatus->valueLow32b.protl32b != *kFPROTL)
AnnaBridge	175:af195413fb11	2275	{
AnnaBridge	175:af195413fb11	2276	return kStatus_FLASH_CommandFailure;
AnnaBridge	175:af195413fb11	2277	}
AnnaBridge	175:af195413fb11	2278
AnnaBridge	175:af195413fb11	2279	#if defined(FTFx_FPROT_HIGH_REG)
AnnaBridge	175:af195413fb11	2280	*kFPROTH = protectStatus->valueHigh32b.proth32b;
AnnaBridge	175:af195413fb11	2281	if (protectStatus->valueHigh32b.proth32b != *kFPROTH)
AnnaBridge	175:af195413fb11	2282	{
AnnaBridge	175:af195413fb11	2283	return kStatus_FLASH_CommandFailure;
AnnaBridge	175:af195413fb11	2284	}
AnnaBridge	175:af195413fb11	2285	#endif
<>	154:37f96f9d4de2	2286	}
<>	154:37f96f9d4de2	2287
<>	154:37f96f9d4de2	2288	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2289	}
<>	154:37f96f9d4de2	2290
AnnaBridge	175:af195413fb11	2291	status_t FLASH_PflashGetProtection(flash_config_t config, pflash_protection_status_t protectStatus)
<>	154:37f96f9d4de2	2292	{
<>	154:37f96f9d4de2	2293	if ((config == NULL) \|\| (protectStatus == NULL))
<>	154:37f96f9d4de2	2294	{
<>	154:37f96f9d4de2	2295	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2296	}
<>	154:37f96f9d4de2	2297
AnnaBridge	175:af195413fb11	2298	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	2299	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
AnnaBridge	175:af195413fb11	2300	{
AnnaBridge	175:af195413fb11	2301	protectStatus->valueLow32b.prots16b.protsl = *kFPROTSL;
AnnaBridge	175:af195413fb11	2302	protectStatus->valueLow32b.prots16b.protsh = *kFPROTSH;
AnnaBridge	175:af195413fb11	2303	}
AnnaBridge	175:af195413fb11	2304	else
AnnaBridge	175:af195413fb11	2305	#endif
AnnaBridge	175:af195413fb11	2306	{
AnnaBridge	175:af195413fb11	2307	protectStatus->valueLow32b.protl32b = *kFPROTL;
AnnaBridge	175:af195413fb11	2308	#if defined(FTFx_FPROT_HIGH_REG)
AnnaBridge	175:af195413fb11	2309	protectStatus->valueHigh32b.proth32b = *kFPROTH;
AnnaBridge	175:af195413fb11	2310	#endif
AnnaBridge	175:af195413fb11	2311	}
<>	154:37f96f9d4de2	2312
<>	154:37f96f9d4de2	2313	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2314	}
<>	154:37f96f9d4de2	2315
<>	154:37f96f9d4de2	2316	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2317	status_t FLASH_DflashSetProtection(flash_config_t *config, uint8_t protectStatus)
<>	154:37f96f9d4de2	2318	{
<>	154:37f96f9d4de2	2319	if (config == NULL)
<>	154:37f96f9d4de2	2320	{
<>	154:37f96f9d4de2	2321	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2322	}
<>	154:37f96f9d4de2	2323
<>	154:37f96f9d4de2	2324	if ((config->DFlashTotalSize == 0) \|\| (config->DFlashTotalSize == FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED))
<>	154:37f96f9d4de2	2325	{
<>	154:37f96f9d4de2	2326	return kStatus_FLASH_CommandNotSupported;
<>	154:37f96f9d4de2	2327	}
<>	154:37f96f9d4de2	2328
<>	154:37f96f9d4de2	2329	FTFx->FDPROT = protectStatus;
<>	154:37f96f9d4de2	2330
<>	154:37f96f9d4de2	2331	if (FTFx->FDPROT != protectStatus)
<>	154:37f96f9d4de2	2332	{
<>	154:37f96f9d4de2	2333	return kStatus_FLASH_CommandFailure;
<>	154:37f96f9d4de2	2334	}
<>	154:37f96f9d4de2	2335
<>	154:37f96f9d4de2	2336	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2337	}
<>	154:37f96f9d4de2	2338	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	2339
<>	154:37f96f9d4de2	2340	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2341	status_t FLASH_DflashGetProtection(flash_config_t config, uint8_t protectStatus)
<>	154:37f96f9d4de2	2342	{
<>	154:37f96f9d4de2	2343	if ((config == NULL) \|\| (protectStatus == NULL))
<>	154:37f96f9d4de2	2344	{
<>	154:37f96f9d4de2	2345	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2346	}
<>	154:37f96f9d4de2	2347
<>	154:37f96f9d4de2	2348	if ((config->DFlashTotalSize == 0) \|\| (config->DFlashTotalSize == FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED))
<>	154:37f96f9d4de2	2349	{
<>	154:37f96f9d4de2	2350	return kStatus_FLASH_CommandNotSupported;
<>	154:37f96f9d4de2	2351	}
<>	154:37f96f9d4de2	2352
<>	154:37f96f9d4de2	2353	*protectStatus = FTFx->FDPROT;
<>	154:37f96f9d4de2	2354
<>	154:37f96f9d4de2	2355	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2356	}
<>	154:37f96f9d4de2	2357	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	2358
<>	154:37f96f9d4de2	2359	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2360	status_t FLASH_EepromSetProtection(flash_config_t *config, uint8_t protectStatus)
<>	154:37f96f9d4de2	2361	{
<>	154:37f96f9d4de2	2362	if (config == NULL)
<>	154:37f96f9d4de2	2363	{
<>	154:37f96f9d4de2	2364	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2365	}
<>	154:37f96f9d4de2	2366
<>	154:37f96f9d4de2	2367	if ((config->EEpromTotalSize == 0) \|\| (config->EEpromTotalSize == FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED))
<>	154:37f96f9d4de2	2368	{
<>	154:37f96f9d4de2	2369	return kStatus_FLASH_CommandNotSupported;
<>	154:37f96f9d4de2	2370	}
<>	154:37f96f9d4de2	2371
<>	154:37f96f9d4de2	2372	FTFx->FEPROT = protectStatus;
<>	154:37f96f9d4de2	2373
<>	154:37f96f9d4de2	2374	if (FTFx->FEPROT != protectStatus)
<>	154:37f96f9d4de2	2375	{
<>	154:37f96f9d4de2	2376	return kStatus_FLASH_CommandFailure;
<>	154:37f96f9d4de2	2377	}
<>	154:37f96f9d4de2	2378
<>	154:37f96f9d4de2	2379	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2380	}
<>	154:37f96f9d4de2	2381	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	2382
<>	154:37f96f9d4de2	2383	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2384	status_t FLASH_EepromGetProtection(flash_config_t config, uint8_t protectStatus)
<>	154:37f96f9d4de2	2385	{
<>	154:37f96f9d4de2	2386	if ((config == NULL) \|\| (protectStatus == NULL))
<>	154:37f96f9d4de2	2387	{
<>	154:37f96f9d4de2	2388	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2389	}
<>	154:37f96f9d4de2	2390
<>	154:37f96f9d4de2	2391	if ((config->EEpromTotalSize == 0) \|\| (config->EEpromTotalSize == FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED))
<>	154:37f96f9d4de2	2392	{
<>	154:37f96f9d4de2	2393	return kStatus_FLASH_CommandNotSupported;
<>	154:37f96f9d4de2	2394	}
<>	154:37f96f9d4de2	2395
<>	154:37f96f9d4de2	2396	*protectStatus = FTFx->FEPROT;
<>	154:37f96f9d4de2	2397
<>	154:37f96f9d4de2	2398	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2399	}
<>	154:37f96f9d4de2	2400	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	2401
AnnaBridge	175:af195413fb11	2402	status_t FLASH_PflashSetPrefetchSpeculation(flash_prefetch_speculation_status_t *speculationStatus)
AnnaBridge	175:af195413fb11	2403	{
AnnaBridge	175:af195413fb11	2404	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MCM
AnnaBridge	175:af195413fb11	2405	{
AnnaBridge	175:af195413fb11	2406	FTFx_REG32_ACCESS_TYPE regBase;
AnnaBridge	175:af195413fb11	2407	#if defined(MCM)
AnnaBridge	175:af195413fb11	2408	regBase = (FTFx_REG32_ACCESS_TYPE)&MCM->PLACR;
AnnaBridge	175:af195413fb11	2409	#elif defined(MCM0)
AnnaBridge	175:af195413fb11	2410	regBase = (FTFx_REG32_ACCESS_TYPE)&MCM0->PLACR;
AnnaBridge	175:af195413fb11	2411	#endif
AnnaBridge	175:af195413fb11	2412	if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionDisable)
AnnaBridge	175:af195413fb11	2413	{
AnnaBridge	175:af195413fb11	2414	if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2415	{
AnnaBridge	175:af195413fb11	2416	return kStatus_FLASH_InvalidSpeculationOption;
AnnaBridge	175:af195413fb11	2417	}
AnnaBridge	175:af195413fb11	2418	else
AnnaBridge	175:af195413fb11	2419	{
AnnaBridge	175:af195413fb11	2420	*regBase \|= MCM_PLACR_DFCS_MASK;
AnnaBridge	175:af195413fb11	2421	}
AnnaBridge	175:af195413fb11	2422	}
AnnaBridge	175:af195413fb11	2423	else
AnnaBridge	175:af195413fb11	2424	{
AnnaBridge	175:af195413fb11	2425	*regBase &= ~MCM_PLACR_DFCS_MASK;
AnnaBridge	175:af195413fb11	2426	if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2427	{
AnnaBridge	175:af195413fb11	2428	*regBase \|= MCM_PLACR_EFDS_MASK;
AnnaBridge	175:af195413fb11	2429	}
AnnaBridge	175:af195413fb11	2430	else
AnnaBridge	175:af195413fb11	2431	{
AnnaBridge	175:af195413fb11	2432	*regBase &= ~MCM_PLACR_EFDS_MASK;
AnnaBridge	175:af195413fb11	2433	}
AnnaBridge	175:af195413fb11	2434	}
AnnaBridge	175:af195413fb11	2435	}
AnnaBridge	175:af195413fb11	2436	#elif FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2437	{
AnnaBridge	175:af195413fb11	2438	FTFx_REG32_ACCESS_TYPE regBase;
AnnaBridge	175:af195413fb11	2439	uint32_t b0dpeMask, b0ipeMask;
AnnaBridge	175:af195413fb11	2440	#if defined(FMC_PFB01CR_B0DPE_MASK)
AnnaBridge	175:af195413fb11	2441	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR;
AnnaBridge	175:af195413fb11	2442	b0dpeMask = FMC_PFB01CR_B0DPE_MASK;
AnnaBridge	175:af195413fb11	2443	b0ipeMask = FMC_PFB01CR_B0IPE_MASK;
AnnaBridge	175:af195413fb11	2444	#elif defined(FMC_PFB0CR_B0DPE_MASK)
AnnaBridge	175:af195413fb11	2445	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR;
AnnaBridge	175:af195413fb11	2446	b0dpeMask = FMC_PFB0CR_B0DPE_MASK;
AnnaBridge	175:af195413fb11	2447	b0ipeMask = FMC_PFB0CR_B0IPE_MASK;
AnnaBridge	175:af195413fb11	2448	#endif
AnnaBridge	175:af195413fb11	2449	if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2450	{
AnnaBridge	175:af195413fb11	2451	*regBase \|= b0ipeMask;
AnnaBridge	175:af195413fb11	2452	}
AnnaBridge	175:af195413fb11	2453	else
AnnaBridge	175:af195413fb11	2454	{
AnnaBridge	175:af195413fb11	2455	*regBase &= ~b0ipeMask;
AnnaBridge	175:af195413fb11	2456	}
AnnaBridge	175:af195413fb11	2457	if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2458	{
AnnaBridge	175:af195413fb11	2459	*regBase \|= b0dpeMask;
AnnaBridge	175:af195413fb11	2460	}
AnnaBridge	175:af195413fb11	2461	else
AnnaBridge	175:af195413fb11	2462	{
AnnaBridge	175:af195413fb11	2463	*regBase &= ~b0dpeMask;
AnnaBridge	175:af195413fb11	2464	}
AnnaBridge	175:af195413fb11	2465
AnnaBridge	175:af195413fb11	2466	/* Invalidate Prefetch Speculation Buffer */
AnnaBridge	175:af195413fb11	2467	#if defined(FMC_PFB01CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2468	FMC->PFB01CR \|= FMC_PFB01CR_S_INV_MASK;
AnnaBridge	175:af195413fb11	2469	#elif defined(FMC_PFB01CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2470	FMC->PFB01CR \|= FMC_PFB01CR_S_B_INV_MASK;
AnnaBridge	175:af195413fb11	2471	#elif defined(FMC_PFB0CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2472	FMC->PFB0CR \|= FMC_PFB0CR_S_INV_MASK;
AnnaBridge	175:af195413fb11	2473	#elif defined(FMC_PFB0CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2474	FMC->PFB0CR \|= FMC_PFB0CR_S_B_INV_MASK;
AnnaBridge	175:af195413fb11	2475	#endif
AnnaBridge	175:af195413fb11	2476	}
AnnaBridge	175:af195413fb11	2477	#elif FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	2478	{
AnnaBridge	175:af195413fb11	2479	FTFx_REG32_ACCESS_TYPE regBase;
AnnaBridge	175:af195413fb11	2480	uint32_t flashSpeculationMask, dataPrefetchMask;
AnnaBridge	175:af195413fb11	2481	regBase = (FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[0];
AnnaBridge	175:af195413fb11	2482	flashSpeculationMask = MSCM_OCMDR_OCMC1_DFCS_MASK;
AnnaBridge	175:af195413fb11	2483	dataPrefetchMask = MSCM_OCMDR_OCMC1_DFDS_MASK;
AnnaBridge	175:af195413fb11	2484
AnnaBridge	175:af195413fb11	2485	if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionDisable)
AnnaBridge	175:af195413fb11	2486	{
AnnaBridge	175:af195413fb11	2487	if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2488	{
AnnaBridge	175:af195413fb11	2489	return kStatus_FLASH_InvalidSpeculationOption;
AnnaBridge	175:af195413fb11	2490	}
AnnaBridge	175:af195413fb11	2491	else
AnnaBridge	175:af195413fb11	2492	{
AnnaBridge	175:af195413fb11	2493	*regBase \|= flashSpeculationMask;
AnnaBridge	175:af195413fb11	2494	}
AnnaBridge	175:af195413fb11	2495	}
AnnaBridge	175:af195413fb11	2496	else
AnnaBridge	175:af195413fb11	2497	{
AnnaBridge	175:af195413fb11	2498	*regBase &= ~flashSpeculationMask;
AnnaBridge	175:af195413fb11	2499	if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable)
AnnaBridge	175:af195413fb11	2500	{
AnnaBridge	175:af195413fb11	2501	*regBase &= ~dataPrefetchMask;
AnnaBridge	175:af195413fb11	2502	}
AnnaBridge	175:af195413fb11	2503	else
AnnaBridge	175:af195413fb11	2504	{
AnnaBridge	175:af195413fb11	2505	*regBase \|= dataPrefetchMask;
AnnaBridge	175:af195413fb11	2506	}
AnnaBridge	175:af195413fb11	2507	}
AnnaBridge	175:af195413fb11	2508	}
AnnaBridge	175:af195413fb11	2509	#endif /* FSL_FEATURE_FTFx_MCM_FLASH_CACHE_CONTROLS */
AnnaBridge	175:af195413fb11	2510
AnnaBridge	175:af195413fb11	2511	return kStatus_FLASH_Success;
AnnaBridge	175:af195413fb11	2512	}
AnnaBridge	175:af195413fb11	2513
AnnaBridge	175:af195413fb11	2514	status_t FLASH_PflashGetPrefetchSpeculation(flash_prefetch_speculation_status_t *speculationStatus)
AnnaBridge	175:af195413fb11	2515	{
AnnaBridge	175:af195413fb11	2516	memset(speculationStatus, 0, sizeof(flash_prefetch_speculation_status_t));
AnnaBridge	175:af195413fb11	2517
AnnaBridge	175:af195413fb11	2518	/* Assuming that all speculation options are enabled. */
AnnaBridge	175:af195413fb11	2519	speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionEnable;
AnnaBridge	175:af195413fb11	2520	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionEnable;
AnnaBridge	175:af195413fb11	2521
AnnaBridge	175:af195413fb11	2522	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MCM
AnnaBridge	175:af195413fb11	2523	{
AnnaBridge	175:af195413fb11	2524	uint32_t value;
AnnaBridge	175:af195413fb11	2525	#if defined(MCM)
AnnaBridge	175:af195413fb11	2526	value = MCM->PLACR;
AnnaBridge	175:af195413fb11	2527	#elif defined(MCM0)
AnnaBridge	175:af195413fb11	2528	value = MCM0->PLACR;
AnnaBridge	175:af195413fb11	2529	#endif
AnnaBridge	175:af195413fb11	2530	if (value & MCM_PLACR_DFCS_MASK)
AnnaBridge	175:af195413fb11	2531	{
AnnaBridge	175:af195413fb11	2532	/* Speculation buffer is off. */
AnnaBridge	175:af195413fb11	2533	speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2534	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2535	}
AnnaBridge	175:af195413fb11	2536	else
AnnaBridge	175:af195413fb11	2537	{
AnnaBridge	175:af195413fb11	2538	/* Speculation buffer is on for instruction. */
AnnaBridge	175:af195413fb11	2539	if (!(value & MCM_PLACR_EFDS_MASK))
AnnaBridge	175:af195413fb11	2540	{
AnnaBridge	175:af195413fb11	2541	/* Speculation buffer is off for data. */
AnnaBridge	175:af195413fb11	2542	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2543	}
AnnaBridge	175:af195413fb11	2544	}
AnnaBridge	175:af195413fb11	2545	}
AnnaBridge	175:af195413fb11	2546	#elif FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2547	{
AnnaBridge	175:af195413fb11	2548	uint32_t value;
AnnaBridge	175:af195413fb11	2549	uint32_t b0dpeMask, b0ipeMask;
AnnaBridge	175:af195413fb11	2550	#if defined(FMC_PFB01CR_B0DPE_MASK)
AnnaBridge	175:af195413fb11	2551	value = FMC->PFB01CR;
AnnaBridge	175:af195413fb11	2552	b0dpeMask = FMC_PFB01CR_B0DPE_MASK;
AnnaBridge	175:af195413fb11	2553	b0ipeMask = FMC_PFB01CR_B0IPE_MASK;
AnnaBridge	175:af195413fb11	2554	#elif defined(FMC_PFB0CR_B0DPE_MASK)
AnnaBridge	175:af195413fb11	2555	value = FMC->PFB0CR;
AnnaBridge	175:af195413fb11	2556	b0dpeMask = FMC_PFB0CR_B0DPE_MASK;
AnnaBridge	175:af195413fb11	2557	b0ipeMask = FMC_PFB0CR_B0IPE_MASK;
AnnaBridge	175:af195413fb11	2558	#endif
AnnaBridge	175:af195413fb11	2559	if (!(value & b0dpeMask))
AnnaBridge	175:af195413fb11	2560	{
AnnaBridge	175:af195413fb11	2561	/* Do not prefetch in response to data references. */
AnnaBridge	175:af195413fb11	2562	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2563	}
AnnaBridge	175:af195413fb11	2564	if (!(value & b0ipeMask))
AnnaBridge	175:af195413fb11	2565	{
AnnaBridge	175:af195413fb11	2566	/* Do not prefetch in response to instruction fetches. */
AnnaBridge	175:af195413fb11	2567	speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2568	}
AnnaBridge	175:af195413fb11	2569	}
AnnaBridge	175:af195413fb11	2570	#elif FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	2571	{
AnnaBridge	175:af195413fb11	2572	uint32_t value;
AnnaBridge	175:af195413fb11	2573	uint32_t flashSpeculationMask, dataPrefetchMask;
AnnaBridge	175:af195413fb11	2574	value = MSCM->OCMDR[0];
AnnaBridge	175:af195413fb11	2575	flashSpeculationMask = MSCM_OCMDR_OCMC1_DFCS_MASK;
AnnaBridge	175:af195413fb11	2576	dataPrefetchMask = MSCM_OCMDR_OCMC1_DFDS_MASK;
AnnaBridge	175:af195413fb11	2577
AnnaBridge	175:af195413fb11	2578	if (value & flashSpeculationMask)
AnnaBridge	175:af195413fb11	2579	{
AnnaBridge	175:af195413fb11	2580	/* Speculation buffer is off. */
AnnaBridge	175:af195413fb11	2581	speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2582	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2583	}
AnnaBridge	175:af195413fb11	2584	else
AnnaBridge	175:af195413fb11	2585	{
AnnaBridge	175:af195413fb11	2586	/* Speculation buffer is on for instruction. */
AnnaBridge	175:af195413fb11	2587	if (value & dataPrefetchMask)
AnnaBridge	175:af195413fb11	2588	{
AnnaBridge	175:af195413fb11	2589	/* Speculation buffer is off for data. */
AnnaBridge	175:af195413fb11	2590	speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable;
AnnaBridge	175:af195413fb11	2591	}
AnnaBridge	175:af195413fb11	2592	}
AnnaBridge	175:af195413fb11	2593	}
AnnaBridge	175:af195413fb11	2594	#endif
AnnaBridge	175:af195413fb11	2595
AnnaBridge	175:af195413fb11	2596	return kStatus_FLASH_Success;
AnnaBridge	175:af195413fb11	2597	}
AnnaBridge	175:af195413fb11	2598
<>	154:37f96f9d4de2	2599	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	2600	/*!
AnnaBridge	175:af195413fb11	2601	* @brief Copy PIC of flash_run_command() to RAM
<>	154:37f96f9d4de2	2602	*/
AnnaBridge	175:af195413fb11	2603	static void copy_flash_run_command(uint32_t *flashRunCommand)
<>	154:37f96f9d4de2	2604	{
AnnaBridge	175:af195413fb11	2605	assert(sizeof(s_flashRunCommandFunctionCode) <= (kFLASH_ExecuteInRamFunctionMaxSizeInWords * 4));
<>	154:37f96f9d4de2	2606
<>	154:37f96f9d4de2	2607	/* Since the value of ARM function pointer is always odd, but the real start address
AnnaBridge	175:af195413fb11	2608	* of function memory should be even, that's why +1 operation exist. */
AnnaBridge	175:af195413fb11	2609	memcpy((void )flashRunCommand, (void )s_flashRunCommandFunctionCode, sizeof(s_flashRunCommandFunctionCode));
AnnaBridge	175:af195413fb11	2610	callFlashRunCommand = (void (*)(FTFx_REG8_ACCESS_TYPE ftfx_fstat))((uint32_t)flashRunCommand + 1);
<>	154:37f96f9d4de2	2611	}
<>	154:37f96f9d4de2	2612	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	2613
<>	154:37f96f9d4de2	2614	/*!
<>	154:37f96f9d4de2	2615	* @brief Flash Command Sequence
<>	154:37f96f9d4de2	2616	*
<>	154:37f96f9d4de2	2617	* This function is used to perform the command write sequence to the flash.
<>	154:37f96f9d4de2	2618	*
<>	154:37f96f9d4de2	2619	* @param driver Pointer to storage for the driver runtime state.
<>	154:37f96f9d4de2	2620	* @return An error code or kStatus_FLASH_Success
<>	154:37f96f9d4de2	2621	*/
<>	154:37f96f9d4de2	2622	static status_t flash_command_sequence(flash_config_t *config)
<>	154:37f96f9d4de2	2623	{
<>	154:37f96f9d4de2	2624	uint8_t registerValue;
<>	154:37f96f9d4de2	2625
<>	154:37f96f9d4de2	2626	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	2627	/* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register */
<>	154:37f96f9d4de2	2628	FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK \| FTFx_FSTAT_ACCERR_MASK \| FTFx_FSTAT_FPVIOL_MASK;
<>	154:37f96f9d4de2	2629
<>	154:37f96f9d4de2	2630	status_t returnCode = flash_check_execute_in_ram_function_info(config);
<>	154:37f96f9d4de2	2631	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	2632	{
<>	154:37f96f9d4de2	2633	return returnCode;
<>	154:37f96f9d4de2	2634	}
<>	154:37f96f9d4de2	2635
<>	154:37f96f9d4de2	2636	/* We pass the ftfx_fstat address as a parameter to flash_run_comamnd() instead of using
<>	154:37f96f9d4de2	2637	* pre-processed MICRO sentences or operating global variable in flash_run_comamnd()
<>	154:37f96f9d4de2	2638	* to make sure that flash_run_command() will be compiled into position-independent code (PIC). */
AnnaBridge	175:af195413fb11	2639	callFlashRunCommand((FTFx_REG8_ACCESS_TYPE)(&FTFx->FSTAT));
<>	154:37f96f9d4de2	2640	#else
<>	154:37f96f9d4de2	2641	/* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register */
<>	154:37f96f9d4de2	2642	FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK \| FTFx_FSTAT_ACCERR_MASK \| FTFx_FSTAT_FPVIOL_MASK;
<>	154:37f96f9d4de2	2643
<>	154:37f96f9d4de2	2644	/* clear CCIF bit */
<>	154:37f96f9d4de2	2645	FTFx->FSTAT = FTFx_FSTAT_CCIF_MASK;
<>	154:37f96f9d4de2	2646
<>	154:37f96f9d4de2	2647	/* Check CCIF bit of the flash status register, wait till it is set.
<>	154:37f96f9d4de2	2648	* IP team indicates that this loop will always complete. */
<>	154:37f96f9d4de2	2649	while (!(FTFx->FSTAT & FTFx_FSTAT_CCIF_MASK))
<>	154:37f96f9d4de2	2650	{
<>	154:37f96f9d4de2	2651	}
<>	154:37f96f9d4de2	2652	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	2653
<>	154:37f96f9d4de2	2654	/* Check error bits */
<>	154:37f96f9d4de2	2655	/* Get flash status register value */
<>	154:37f96f9d4de2	2656	registerValue = FTFx->FSTAT;
<>	154:37f96f9d4de2	2657
<>	154:37f96f9d4de2	2658	/* checking access error */
<>	154:37f96f9d4de2	2659	if (registerValue & FTFx_FSTAT_ACCERR_MASK)
<>	154:37f96f9d4de2	2660	{
<>	154:37f96f9d4de2	2661	return kStatus_FLASH_AccessError;
<>	154:37f96f9d4de2	2662	}
<>	154:37f96f9d4de2	2663	/* checking protection error */
<>	154:37f96f9d4de2	2664	else if (registerValue & FTFx_FSTAT_FPVIOL_MASK)
<>	154:37f96f9d4de2	2665	{
<>	154:37f96f9d4de2	2666	return kStatus_FLASH_ProtectionViolation;
<>	154:37f96f9d4de2	2667	}
<>	154:37f96f9d4de2	2668	/* checking MGSTAT0 non-correctable error */
<>	154:37f96f9d4de2	2669	else if (registerValue & FTFx_FSTAT_MGSTAT0_MASK)
<>	154:37f96f9d4de2	2670	{
<>	154:37f96f9d4de2	2671	return kStatus_FLASH_CommandFailure;
<>	154:37f96f9d4de2	2672	}
<>	154:37f96f9d4de2	2673	else
<>	154:37f96f9d4de2	2674	{
<>	154:37f96f9d4de2	2675	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2676	}
<>	154:37f96f9d4de2	2677	}
<>	154:37f96f9d4de2	2678
<>	154:37f96f9d4de2	2679	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	2680	/*!
AnnaBridge	175:af195413fb11	2681	* @brief Copy PIC of flash_common_bit_operation() to RAM
<>	154:37f96f9d4de2	2682	*
<>	154:37f96f9d4de2	2683	*/
AnnaBridge	175:af195413fb11	2684	static void copy_flash_common_bit_operation(uint32_t *flashCommonBitOperation)
AnnaBridge	175:af195413fb11	2685	{
AnnaBridge	175:af195413fb11	2686	assert(sizeof(s_flashCommonBitOperationFunctionCode) <= (kFLASH_ExecuteInRamFunctionMaxSizeInWords * 4));
AnnaBridge	175:af195413fb11	2687
AnnaBridge	175:af195413fb11	2688	/* Since the value of ARM function pointer is always odd, but the real start address
AnnaBridge	175:af195413fb11	2689	* of function memory should be even, that's why +1 operation exist. */
AnnaBridge	175:af195413fb11	2690	memcpy((void )flashCommonBitOperation, (void )s_flashCommonBitOperationFunctionCode,
AnnaBridge	175:af195413fb11	2691	sizeof(s_flashCommonBitOperationFunctionCode));
AnnaBridge	175:af195413fb11	2692	callFlashCommonBitOperation = (void (*)(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift,
AnnaBridge	175:af195413fb11	2693	uint32_t bitValue))((uint32_t)flashCommonBitOperation + 1);
AnnaBridge	175:af195413fb11	2694	/* Workround for some devices which doesn't need this function */
AnnaBridge	175:af195413fb11	2695	callFlashCommonBitOperation((FTFx_REG32_ACCESS_TYPE)0, 0, 0, 0);
AnnaBridge	175:af195413fb11	2696	}
AnnaBridge	175:af195413fb11	2697	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2698
AnnaBridge	175:af195413fb11	2699	#if FLASH_CACHE_IS_CONTROLLED_BY_MCM
AnnaBridge	175:af195413fb11	2700	/! @brief Performs the cache clear to the flash by MCM./
AnnaBridge	175:af195413fb11	2701	void mcm_flash_cache_clear(flash_config_t *config)
<>	154:37f96f9d4de2	2702	{
AnnaBridge	175:af195413fb11	2703	FTFx_REG32_ACCESS_TYPE regBase = (FTFx_REG32_ACCESS_TYPE)&MCM0_CACHE_REG;
AnnaBridge	175:af195413fb11	2704
AnnaBridge	175:af195413fb11	2705	#if defined(MCM0) && defined(MCM1)
AnnaBridge	175:af195413fb11	2706	if (config->FlashCacheControllerIndex == (uint8_t)kFLASH_CacheControllerIndexForCore1)
AnnaBridge	175:af195413fb11	2707	{
AnnaBridge	175:af195413fb11	2708	regBase = (FTFx_REG32_ACCESS_TYPE)&MCM1_CACHE_REG;
AnnaBridge	175:af195413fb11	2709	}
AnnaBridge	175:af195413fb11	2710	#endif
AnnaBridge	175:af195413fb11	2711
AnnaBridge	175:af195413fb11	2712	#if FLASH_DRIVER_IS_FLASH_RESIDENT
AnnaBridge	175:af195413fb11	2713	callFlashCommonBitOperation(regBase, MCM_CACHE_CLEAR_MASK, MCM_CACHE_CLEAR_SHIFT, 1U);
AnnaBridge	175:af195413fb11	2714	#else /* !FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2715	*regBase \|= MCM_CACHE_CLEAR_MASK;
AnnaBridge	175:af195413fb11	2716
AnnaBridge	175:af195413fb11	2717	/* Memory barriers for good measure.
AnnaBridge	175:af195413fb11	2718	* All Cache, Branch predictor and TLB maintenance operations before this instruction complete */
AnnaBridge	175:af195413fb11	2719	__ISB();
AnnaBridge	175:af195413fb11	2720	__DSB();
AnnaBridge	175:af195413fb11	2721	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2722	}
AnnaBridge	175:af195413fb11	2723	#endif /* FLASH_CACHE_IS_CONTROLLED_BY_MCM */
AnnaBridge	175:af195413fb11	2724
AnnaBridge	175:af195413fb11	2725	#if FLASH_CACHE_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2726	/! @brief Performs the cache clear to the flash by FMC./
AnnaBridge	175:af195413fb11	2727	void fmc_flash_cache_clear(void)
AnnaBridge	175:af195413fb11	2728	{
AnnaBridge	175:af195413fb11	2729	#if FLASH_DRIVER_IS_FLASH_RESIDENT
AnnaBridge	175:af195413fb11	2730	FTFx_REG32_ACCESS_TYPE regBase = (FTFx_REG32_ACCESS_TYPE)0;
<>	154:37f96f9d4de2	2731	#if defined(FMC_PFB01CR_CINV_WAY_MASK)
AnnaBridge	175:af195413fb11	2732	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR;
AnnaBridge	175:af195413fb11	2733	callFlashCommonBitOperation(regBase, FMC_PFB01CR_CINV_WAY_MASK, FMC_PFB01CR_CINV_WAY_SHIFT, 0xFU);
<>	154:37f96f9d4de2	2734	#else
AnnaBridge	175:af195413fb11	2735	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR;
AnnaBridge	175:af195413fb11	2736	callFlashCommonBitOperation(regBase, FMC_PFB0CR_CINV_WAY_MASK, FMC_PFB0CR_CINV_WAY_SHIFT, 0xFU);
<>	154:37f96f9d4de2	2737	#endif
AnnaBridge	175:af195413fb11	2738	#else /* !FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2739	#if defined(FMC_PFB01CR_CINV_WAY_MASK)
AnnaBridge	175:af195413fb11	2740	FMC->PFB01CR = (FMC->PFB01CR & ~FMC_PFB01CR_CINV_WAY_MASK) \| FMC_PFB01CR_CINV_WAY(~0);
<>	154:37f96f9d4de2	2741	#else
AnnaBridge	175:af195413fb11	2742	FMC->PFB0CR = (FMC->PFB0CR & ~FMC_PFB0CR_CINV_WAY_MASK) \| FMC_PFB0CR_CINV_WAY(~0);
AnnaBridge	175:af195413fb11	2743	#endif
AnnaBridge	175:af195413fb11	2744	/* Memory barriers for good measure.
AnnaBridge	175:af195413fb11	2745	* All Cache, Branch predictor and TLB maintenance operations before this instruction complete */
<>	154:37f96f9d4de2	2746	__ISB();
<>	154:37f96f9d4de2	2747	__DSB();
AnnaBridge	175:af195413fb11	2748	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	2749	}
AnnaBridge	175:af195413fb11	2750	#endif /* FLASH_CACHE_IS_CONTROLLED_BY_FMC */
AnnaBridge	175:af195413fb11	2751
AnnaBridge	175:af195413fb11	2752	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	2753	/! @brief Performs the prefetch speculation buffer clear to the flash by MSCM./
AnnaBridge	175:af195413fb11	2754	void mscm_flash_prefetch_speculation_enable(bool enable)
<>	154:37f96f9d4de2	2755	{
AnnaBridge	175:af195413fb11	2756	uint8_t setValue;
AnnaBridge	175:af195413fb11	2757	if (enable)
AnnaBridge	175:af195413fb11	2758	{
AnnaBridge	175:af195413fb11	2759	setValue = 0x0U;
AnnaBridge	175:af195413fb11	2760	}
AnnaBridge	175:af195413fb11	2761	else
<>	154:37f96f9d4de2	2762	{
AnnaBridge	175:af195413fb11	2763	setValue = 0x3U;
<>	154:37f96f9d4de2	2764	}
<>	154:37f96f9d4de2	2765
AnnaBridge	175:af195413fb11	2766	/* The OCMDR[0] is always used to prefetch main Pflash*/
AnnaBridge	175:af195413fb11	2767	/* For device with FlexNVM support, the OCMDR[1] is used to prefetch Dflash.
AnnaBridge	175:af195413fb11	2768	* For device with secondary flash support, the OCMDR[1] is used to prefetch secondary Pflash. */
AnnaBridge	175:af195413fb11	2769	#if FLASH_DRIVER_IS_FLASH_RESIDENT
AnnaBridge	175:af195413fb11	2770	callFlashCommonBitOperation((FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[0], MSCM_SPECULATION_DISABLE_MASK,
AnnaBridge	175:af195413fb11	2771	MSCM_SPECULATION_DISABLE_SHIFT, setValue);
AnnaBridge	175:af195413fb11	2772	#if FLASH_SSD_IS_FLEXNVM_ENABLED \|\| BL_HAS_SECONDARY_INTERNAL_FLASH
AnnaBridge	175:af195413fb11	2773	callFlashCommonBitOperation((FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[1], MSCM_SPECULATION_DISABLE_MASK,
AnnaBridge	175:af195413fb11	2774	MSCM_SPECULATION_DISABLE_SHIFT, setValue);
AnnaBridge	175:af195413fb11	2775	#endif
AnnaBridge	175:af195413fb11	2776	#else /* !FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2777	MSCM->OCMDR[0] \|= MSCM_SPECULATION_DISABLE(setValue);
AnnaBridge	175:af195413fb11	2778
AnnaBridge	175:af195413fb11	2779	/* Memory barriers for good measure.
AnnaBridge	175:af195413fb11	2780	* All Cache, Branch predictor and TLB maintenance operations before this instruction complete */
AnnaBridge	175:af195413fb11	2781	__ISB();
AnnaBridge	175:af195413fb11	2782	__DSB();
AnnaBridge	175:af195413fb11	2783	#if FLASH_SSD_IS_FLEXNVM_ENABLED \|\| BL_HAS_SECONDARY_INTERNAL_FLASH
AnnaBridge	175:af195413fb11	2784	MSCM->OCMDR[1] \|= MSCM_SPECULATION_DISABLE(setValue);
AnnaBridge	175:af195413fb11	2785
AnnaBridge	175:af195413fb11	2786	/* Each cahce clear instaruction should be followed by below code*/
AnnaBridge	175:af195413fb11	2787	__ISB();
AnnaBridge	175:af195413fb11	2788	__DSB();
AnnaBridge	175:af195413fb11	2789	#endif
AnnaBridge	175:af195413fb11	2790
AnnaBridge	175:af195413fb11	2791	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	2792	}
AnnaBridge	175:af195413fb11	2793	#endif /* FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM */
AnnaBridge	175:af195413fb11	2794
AnnaBridge	175:af195413fb11	2795	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2796	/! @brief Performs the prefetch speculation buffer clear to the flash by FMC./
AnnaBridge	175:af195413fb11	2797	void fmc_flash_prefetch_speculation_clear(void)
AnnaBridge	175:af195413fb11	2798	{
AnnaBridge	175:af195413fb11	2799	#if FLASH_DRIVER_IS_FLASH_RESIDENT
AnnaBridge	175:af195413fb11	2800	FTFx_REG32_ACCESS_TYPE regBase = (FTFx_REG32_ACCESS_TYPE)0;
AnnaBridge	175:af195413fb11	2801	#if defined(FMC_PFB01CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2802	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR;
AnnaBridge	175:af195413fb11	2803	callFlashCommonBitOperation(regBase, FMC_PFB01CR_S_INV_MASK, FMC_PFB01CR_S_INV_SHIFT, 1U);
AnnaBridge	175:af195413fb11	2804	#elif defined(FMC_PFB01CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2805	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR;
AnnaBridge	175:af195413fb11	2806	callFlashCommonBitOperation(regBase, FMC_PFB01CR_S_B_INV_MASK, FMC_PFB01CR_S_B_INV_SHIFT, 1U);
AnnaBridge	175:af195413fb11	2807	#elif defined(FMC_PFB0CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2808	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR;
AnnaBridge	175:af195413fb11	2809	callFlashCommonBitOperation(regBase, FMC_PFB0CR_S_INV_MASK, FMC_PFB0CR_S_INV_SHIFT, 1U);
AnnaBridge	175:af195413fb11	2810	#elif defined(FMC_PFB0CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2811	regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR;
AnnaBridge	175:af195413fb11	2812	callFlashCommonBitOperation(regBase, FMC_PFB0CR_S_B_INV_MASK, FMC_PFB0CR_S_B_INV_SHIFT, 1U);
AnnaBridge	175:af195413fb11	2813	#endif
AnnaBridge	175:af195413fb11	2814	#else /* !FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2815	#if defined(FMC_PFB01CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2816	FMC->PFB01CR \|= FMC_PFB01CR_S_INV_MASK;
AnnaBridge	175:af195413fb11	2817	#elif defined(FMC_PFB01CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2818	FMC->PFB01CR \|= FMC_PFB01CR_S_B_INV_MASK;
AnnaBridge	175:af195413fb11	2819	#elif defined(FMC_PFB0CR_S_INV_MASK)
AnnaBridge	175:af195413fb11	2820	FMC->PFB0CR \|= FMC_PFB0CR_S_INV_MASK;
AnnaBridge	175:af195413fb11	2821	#elif defined(FMC_PFB0CR_S_B_INV_MASK)
AnnaBridge	175:af195413fb11	2822	FMC->PFB0CR \|= FMC_PFB0CR_S_B_INV_MASK;
AnnaBridge	175:af195413fb11	2823	#endif
AnnaBridge	175:af195413fb11	2824	/* Memory barriers for good measure.
AnnaBridge	175:af195413fb11	2825	* All Cache, Branch predictor and TLB maintenance operations before this instruction complete */
AnnaBridge	175:af195413fb11	2826	__ISB();
AnnaBridge	175:af195413fb11	2827	__DSB();
<>	154:37f96f9d4de2	2828	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2829	}
AnnaBridge	175:af195413fb11	2830	#endif /* FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC */
<>	154:37f96f9d4de2	2831
<>	154:37f96f9d4de2	2832	/*!
<>	154:37f96f9d4de2	2833	* @brief Flash Cache Clear
<>	154:37f96f9d4de2	2834	*
AnnaBridge	175:af195413fb11	2835	* This function is used to perform the cache and prefetch speculation clear to the flash.
<>	154:37f96f9d4de2	2836	*/
<>	154:37f96f9d4de2	2837	void flash_cache_clear(flash_config_t *config)
AnnaBridge	175:af195413fb11	2838	{
AnnaBridge	175:af195413fb11	2839	flash_cache_clear_process(config, kFLASH_CacheClearProcessPost);
AnnaBridge	175:af195413fb11	2840	}
AnnaBridge	175:af195413fb11	2841
AnnaBridge	175:af195413fb11	2842	/*!
AnnaBridge	175:af195413fb11	2843	* @brief Flash Cache Clear Process
AnnaBridge	175:af195413fb11	2844	*
AnnaBridge	175:af195413fb11	2845	* This function is used to perform the cache and prefetch speculation clear process to the flash.
AnnaBridge	175:af195413fb11	2846	*/
AnnaBridge	175:af195413fb11	2847	static void flash_cache_clear_process(flash_config_t *config, flash_cache_clear_process_t process)
<>	154:37f96f9d4de2	2848	{
<>	154:37f96f9d4de2	2849	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	2850	status_t returnCode = flash_check_execute_in_ram_function_info(config);
<>	154:37f96f9d4de2	2851	if (kStatus_FLASH_Success != returnCode)
<>	154:37f96f9d4de2	2852	{
<>	154:37f96f9d4de2	2853	return;
<>	154:37f96f9d4de2	2854	}
AnnaBridge	175:af195413fb11	2855	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
AnnaBridge	175:af195413fb11	2856
AnnaBridge	175:af195413fb11	2857	/* We pass the ftfx register address as a parameter to flash_common_bit_operation() instead of using
AnnaBridge	175:af195413fb11	2858	* pre-processed MACROs or a global variable in flash_common_bit_operation()
AnnaBridge	175:af195413fb11	2859	* to make sure that flash_common_bit_operation() will be compiled into position-independent code (PIC). */
AnnaBridge	175:af195413fb11	2860	if (process == kFLASH_CacheClearProcessPost)
AnnaBridge	175:af195413fb11	2861	{
AnnaBridge	175:af195413fb11	2862	#if FLASH_CACHE_IS_CONTROLLED_BY_MCM
AnnaBridge	175:af195413fb11	2863	mcm_flash_cache_clear(config);
<>	154:37f96f9d4de2	2864	#endif
AnnaBridge	175:af195413fb11	2865	#if FLASH_CACHE_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2866	fmc_flash_cache_clear();
<>	154:37f96f9d4de2	2867	#endif
AnnaBridge	175:af195413fb11	2868	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	2869	mscm_flash_prefetch_speculation_enable(true);
<>	154:37f96f9d4de2	2870	#endif
AnnaBridge	175:af195413fb11	2871	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_FMC
AnnaBridge	175:af195413fb11	2872	fmc_flash_prefetch_speculation_clear();
<>	154:37f96f9d4de2	2873	#endif
AnnaBridge	175:af195413fb11	2874	}
AnnaBridge	175:af195413fb11	2875	if (process == kFLASH_CacheClearProcessPre)
AnnaBridge	175:af195413fb11	2876	{
AnnaBridge	175:af195413fb11	2877	#if FLASH_PREFETCH_SPECULATION_IS_CONTROLLED_BY_MSCM
AnnaBridge	175:af195413fb11	2878	mscm_flash_prefetch_speculation_enable(false);
<>	154:37f96f9d4de2	2879	#endif
AnnaBridge	175:af195413fb11	2880	}
<>	154:37f96f9d4de2	2881	}
<>	154:37f96f9d4de2	2882
<>	154:37f96f9d4de2	2883	#if FLASH_DRIVER_IS_FLASH_RESIDENT
<>	154:37f96f9d4de2	2884	/! @brief Check whether flash execute-in-ram functions are ready /
<>	154:37f96f9d4de2	2885	static status_t flash_check_execute_in_ram_function_info(flash_config_t *config)
<>	154:37f96f9d4de2	2886	{
<>	154:37f96f9d4de2	2887	flash_execute_in_ram_function_config_t *flashExecuteInRamFunctionInfo;
<>	154:37f96f9d4de2	2888
<>	154:37f96f9d4de2	2889	if (config == NULL)
<>	154:37f96f9d4de2	2890	{
<>	154:37f96f9d4de2	2891	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2892	}
<>	154:37f96f9d4de2	2893
<>	154:37f96f9d4de2	2894	flashExecuteInRamFunctionInfo = (flash_execute_in_ram_function_config_t *)config->flashExecuteInRamFunctionInfo;
<>	154:37f96f9d4de2	2895
<>	154:37f96f9d4de2	2896	if ((config->flashExecuteInRamFunctionInfo) &&
AnnaBridge	175:af195413fb11	2897	(kFLASH_ExecuteInRamFunctionTotalNum == flashExecuteInRamFunctionInfo->activeFunctionCount))
<>	154:37f96f9d4de2	2898	{
<>	154:37f96f9d4de2	2899	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2900	}
<>	154:37f96f9d4de2	2901
<>	154:37f96f9d4de2	2902	return kStatus_FLASH_ExecuteInRamFunctionNotReady;
<>	154:37f96f9d4de2	2903	}
<>	154:37f96f9d4de2	2904	#endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */
<>	154:37f96f9d4de2	2905
<>	154:37f96f9d4de2	2906	/! @brief Validates the range and alignment of the given address range./
<>	154:37f96f9d4de2	2907	static status_t flash_check_range(flash_config_t *config,
<>	154:37f96f9d4de2	2908	uint32_t startAddress,
<>	154:37f96f9d4de2	2909	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	2910	uint32_t alignmentBaseline)
<>	154:37f96f9d4de2	2911	{
<>	154:37f96f9d4de2	2912	if (config == NULL)
<>	154:37f96f9d4de2	2913	{
<>	154:37f96f9d4de2	2914	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2915	}
<>	154:37f96f9d4de2	2916
<>	154:37f96f9d4de2	2917	/* Verify the start and length are alignmentBaseline aligned. */
<>	154:37f96f9d4de2	2918	if ((startAddress & (alignmentBaseline - 1)) \|\| (lengthInBytes & (alignmentBaseline - 1)))
<>	154:37f96f9d4de2	2919	{
<>	154:37f96f9d4de2	2920	return kStatus_FLASH_AlignmentError;
<>	154:37f96f9d4de2	2921	}
<>	154:37f96f9d4de2	2922
AnnaBridge	175:af195413fb11	2923	/* check for valid range of the target addresses */
AnnaBridge	175:af195413fb11	2924	if (
AnnaBridge	175:af195413fb11	2925	#if FLASH_SSD_IS_FLEXNVM_ENABLED
AnnaBridge	175:af195413fb11	2926	((startAddress >= config->DFlashBlockBase) &&
AnnaBridge	175:af195413fb11	2927	((startAddress + lengthInBytes) <= (config->DFlashBlockBase + config->DFlashTotalSize))) \|\|
<>	154:37f96f9d4de2	2928	#endif
AnnaBridge	175:af195413fb11	2929	((startAddress >= config->PFlashBlockBase) &&
AnnaBridge	175:af195413fb11	2930	((startAddress + lengthInBytes) <= (config->PFlashBlockBase + config->PFlashTotalSize))))
<>	154:37f96f9d4de2	2931	{
AnnaBridge	175:af195413fb11	2932	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2933	}
<>	154:37f96f9d4de2	2934
AnnaBridge	175:af195413fb11	2935	return kStatus_FLASH_AddressError;
<>	154:37f96f9d4de2	2936	}
<>	154:37f96f9d4de2	2937
<>	154:37f96f9d4de2	2938	/! @brief Gets the right address, sector and block size of current flash type which is indicated by address./
<>	154:37f96f9d4de2	2939	static status_t flash_get_matched_operation_info(flash_config_t *config,
<>	154:37f96f9d4de2	2940	uint32_t address,
<>	154:37f96f9d4de2	2941	flash_operation_config_t *info)
<>	154:37f96f9d4de2	2942	{
<>	154:37f96f9d4de2	2943	if (config == NULL)
<>	154:37f96f9d4de2	2944	{
<>	154:37f96f9d4de2	2945	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	2946	}
<>	154:37f96f9d4de2	2947
<>	154:37f96f9d4de2	2948	/* Clean up info Structure*/
<>	154:37f96f9d4de2	2949	memset(info, 0, sizeof(flash_operation_config_t));
<>	154:37f96f9d4de2	2950
<>	154:37f96f9d4de2	2951	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	2952	if ((address >= config->DFlashBlockBase) && (address <= (config->DFlashBlockBase + config->DFlashTotalSize)))
<>	154:37f96f9d4de2	2953	{
AnnaBridge	175:af195413fb11	2954	/* When required by the command, address bit 23 selects between program flash memory
AnnaBridge	175:af195413fb11	2955	* (=0) and data flash memory (=1).*/
<>	154:37f96f9d4de2	2956	info->convertedAddress = address - config->DFlashBlockBase + 0x800000U;
<>	154:37f96f9d4de2	2957	info->activeSectorSize = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE;
<>	154:37f96f9d4de2	2958	info->activeBlockSize = config->DFlashTotalSize / FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT;
<>	154:37f96f9d4de2	2959
<>	154:37f96f9d4de2	2960	info->blockWriteUnitSize = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_WRITE_UNIT_SIZE;
<>	154:37f96f9d4de2	2961	info->sectorCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_SECTOR_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2962	info->sectionCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_SECTION_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2963	info->resourceCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_RESOURCE_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2964	info->checkCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_CHECK_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2965	}
<>	154:37f96f9d4de2	2966	else
<>	154:37f96f9d4de2	2967	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	2968	{
AnnaBridge	175:af195413fb11	2969	info->convertedAddress = address - config->PFlashBlockBase;
<>	154:37f96f9d4de2	2970	info->activeSectorSize = config->PFlashSectorSize;
<>	154:37f96f9d4de2	2971	info->activeBlockSize = config->PFlashTotalSize / config->PFlashBlockCount;
AnnaBridge	175:af195413fb11	2972	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED
AnnaBridge	175:af195413fb11	2973	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
AnnaBridge	175:af195413fb11	2974	{
AnnaBridge	175:af195413fb11	2975	#if FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER \|\| FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER
AnnaBridge	175:af195413fb11	2976	/* When required by the command, address bit 23 selects between main flash memory
AnnaBridge	175:af195413fb11	2977	* (=0) and secondary flash memory (=1).*/
AnnaBridge	175:af195413fb11	2978	info->convertedAddress += 0x800000U;
AnnaBridge	175:af195413fb11	2979	#endif
AnnaBridge	175:af195413fb11	2980	info->blockWriteUnitSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_WRITE_UNIT_SIZE;
AnnaBridge	175:af195413fb11	2981	}
AnnaBridge	175:af195413fb11	2982	else
AnnaBridge	175:af195413fb11	2983	#endif /* FLASH_SSD_IS_SECONDARY_FLASH_ENABLED */
AnnaBridge	175:af195413fb11	2984	{
AnnaBridge	175:af195413fb11	2985	info->blockWriteUnitSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE;
AnnaBridge	175:af195413fb11	2986	}
AnnaBridge	175:af195413fb11	2987
<>	154:37f96f9d4de2	2988	info->sectorCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2989	info->sectionCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_SECTION_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2990	info->resourceCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_RESOURCE_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2991	info->checkCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_CHECK_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	2992	}
<>	154:37f96f9d4de2	2993
<>	154:37f96f9d4de2	2994	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	2995	}
<>	154:37f96f9d4de2	2996
<>	154:37f96f9d4de2	2997	/! @brief Validates the given user key for flash erase APIs./
<>	154:37f96f9d4de2	2998	static status_t flash_check_user_key(uint32_t key)
<>	154:37f96f9d4de2	2999	{
<>	154:37f96f9d4de2	3000	/* Validate the user key */
AnnaBridge	175:af195413fb11	3001	if (key != kFLASH_ApiEraseKey)
<>	154:37f96f9d4de2	3002	{
<>	154:37f96f9d4de2	3003	return kStatus_FLASH_EraseKeyError;
<>	154:37f96f9d4de2	3004	}
<>	154:37f96f9d4de2	3005
<>	154:37f96f9d4de2	3006	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	3007	}
<>	154:37f96f9d4de2	3008
<>	154:37f96f9d4de2	3009	#if FLASH_SSD_IS_FLEXNVM_ENABLED
<>	154:37f96f9d4de2	3010	/! @brief Updates FlexNVM memory partition status according to data flash 0 IFR./
<>	154:37f96f9d4de2	3011	static status_t flash_update_flexnvm_memory_partition_status(flash_config_t *config)
<>	154:37f96f9d4de2	3012	{
<>	154:37f96f9d4de2	3013	struct
<>	154:37f96f9d4de2	3014	{
<>	154:37f96f9d4de2	3015	uint32_t reserved0;
<>	154:37f96f9d4de2	3016	uint8_t FlexNVMPartitionCode;
<>	154:37f96f9d4de2	3017	uint8_t EEPROMDataSetSize;
<>	154:37f96f9d4de2	3018	uint16_t reserved1;
<>	154:37f96f9d4de2	3019	} dataIFRReadOut;
<>	154:37f96f9d4de2	3020	status_t returnCode;
<>	154:37f96f9d4de2	3021
<>	154:37f96f9d4de2	3022	if (config == NULL)
<>	154:37f96f9d4de2	3023	{
<>	154:37f96f9d4de2	3024	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3025	}
<>	154:37f96f9d4de2	3026
AnnaBridge	175:af195413fb11	3027	#if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD
<>	154:37f96f9d4de2	3028	/* Get FlexNVM memory partition info from data flash IFR */
<>	154:37f96f9d4de2	3029	returnCode = FLASH_ReadResource(config, DFLASH_IFR_READRESOURCE_START_ADDRESS, (uint32_t *)&dataIFRReadOut,
AnnaBridge	175:af195413fb11	3030	sizeof(dataIFRReadOut), kFLASH_ResourceOptionFlashIfr);
<>	154:37f96f9d4de2	3031	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	3032	{
<>	154:37f96f9d4de2	3033	return kStatus_FLASH_PartitionStatusUpdateFailure;
<>	154:37f96f9d4de2	3034	}
AnnaBridge	175:af195413fb11	3035	#else
AnnaBridge	175:af195413fb11	3036	#error "Cannot get FlexNVM memory partition info"
AnnaBridge	175:af195413fb11	3037	#endif
<>	154:37f96f9d4de2	3038
<>	154:37f96f9d4de2	3039	/* Fill out partitioned EEPROM size */
<>	154:37f96f9d4de2	3040	dataIFRReadOut.EEPROMDataSetSize &= 0x0FU;
<>	154:37f96f9d4de2	3041	switch (dataIFRReadOut.EEPROMDataSetSize)
<>	154:37f96f9d4de2	3042	{
<>	154:37f96f9d4de2	3043	case 0x00U:
<>	154:37f96f9d4de2	3044	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0000;
<>	154:37f96f9d4de2	3045	break;
<>	154:37f96f9d4de2	3046	case 0x01U:
<>	154:37f96f9d4de2	3047	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0001;
<>	154:37f96f9d4de2	3048	break;
<>	154:37f96f9d4de2	3049	case 0x02U:
<>	154:37f96f9d4de2	3050	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0010;
<>	154:37f96f9d4de2	3051	break;
<>	154:37f96f9d4de2	3052	case 0x03U:
<>	154:37f96f9d4de2	3053	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0011;
<>	154:37f96f9d4de2	3054	break;
<>	154:37f96f9d4de2	3055	case 0x04U:
<>	154:37f96f9d4de2	3056	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0100;
<>	154:37f96f9d4de2	3057	break;
<>	154:37f96f9d4de2	3058	case 0x05U:
<>	154:37f96f9d4de2	3059	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0101;
<>	154:37f96f9d4de2	3060	break;
<>	154:37f96f9d4de2	3061	case 0x06U:
<>	154:37f96f9d4de2	3062	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0110;
<>	154:37f96f9d4de2	3063	break;
<>	154:37f96f9d4de2	3064	case 0x07U:
<>	154:37f96f9d4de2	3065	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0111;
<>	154:37f96f9d4de2	3066	break;
<>	154:37f96f9d4de2	3067	case 0x08U:
<>	154:37f96f9d4de2	3068	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1000;
<>	154:37f96f9d4de2	3069	break;
<>	154:37f96f9d4de2	3070	case 0x09U:
<>	154:37f96f9d4de2	3071	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1001;
<>	154:37f96f9d4de2	3072	break;
<>	154:37f96f9d4de2	3073	case 0x0AU:
<>	154:37f96f9d4de2	3074	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1010;
<>	154:37f96f9d4de2	3075	break;
<>	154:37f96f9d4de2	3076	case 0x0BU:
<>	154:37f96f9d4de2	3077	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1011;
<>	154:37f96f9d4de2	3078	break;
<>	154:37f96f9d4de2	3079	case 0x0CU:
<>	154:37f96f9d4de2	3080	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1100;
<>	154:37f96f9d4de2	3081	break;
<>	154:37f96f9d4de2	3082	case 0x0DU:
<>	154:37f96f9d4de2	3083	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1101;
<>	154:37f96f9d4de2	3084	break;
<>	154:37f96f9d4de2	3085	case 0x0EU:
<>	154:37f96f9d4de2	3086	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1110;
<>	154:37f96f9d4de2	3087	break;
<>	154:37f96f9d4de2	3088	case 0x0FU:
<>	154:37f96f9d4de2	3089	config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1111;
<>	154:37f96f9d4de2	3090	break;
<>	154:37f96f9d4de2	3091	default:
<>	154:37f96f9d4de2	3092	config->EEpromTotalSize = FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED;
<>	154:37f96f9d4de2	3093	break;
<>	154:37f96f9d4de2	3094	}
<>	154:37f96f9d4de2	3095
<>	154:37f96f9d4de2	3096	/* Fill out partitioned DFlash size */
<>	154:37f96f9d4de2	3097	dataIFRReadOut.FlexNVMPartitionCode &= 0x0FU;
<>	154:37f96f9d4de2	3098	switch (dataIFRReadOut.FlexNVMPartitionCode)
<>	154:37f96f9d4de2	3099	{
<>	154:37f96f9d4de2	3100	case 0x00U:
<>	154:37f96f9d4de2	3101	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3102	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000;
<>	154:37f96f9d4de2	3103	#else
<>	154:37f96f9d4de2	3104	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3105	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 */
<>	154:37f96f9d4de2	3106	break;
<>	154:37f96f9d4de2	3107	case 0x01U:
<>	154:37f96f9d4de2	3108	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3109	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001;
<>	154:37f96f9d4de2	3110	#else
<>	154:37f96f9d4de2	3111	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3112	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 */
<>	154:37f96f9d4de2	3113	break;
<>	154:37f96f9d4de2	3114	case 0x02U:
<>	154:37f96f9d4de2	3115	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3116	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010;
<>	154:37f96f9d4de2	3117	#else
<>	154:37f96f9d4de2	3118	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3119	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 */
<>	154:37f96f9d4de2	3120	break;
<>	154:37f96f9d4de2	3121	case 0x03U:
<>	154:37f96f9d4de2	3122	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3123	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011;
<>	154:37f96f9d4de2	3124	#else
<>	154:37f96f9d4de2	3125	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3126	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 */
<>	154:37f96f9d4de2	3127	break;
<>	154:37f96f9d4de2	3128	case 0x04U:
<>	154:37f96f9d4de2	3129	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3130	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100;
<>	154:37f96f9d4de2	3131	#else
<>	154:37f96f9d4de2	3132	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3133	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 */
<>	154:37f96f9d4de2	3134	break;
<>	154:37f96f9d4de2	3135	case 0x05U:
<>	154:37f96f9d4de2	3136	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3137	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101;
<>	154:37f96f9d4de2	3138	#else
<>	154:37f96f9d4de2	3139	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3140	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 */
<>	154:37f96f9d4de2	3141	break;
<>	154:37f96f9d4de2	3142	case 0x06U:
<>	154:37f96f9d4de2	3143	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3144	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110;
<>	154:37f96f9d4de2	3145	#else
<>	154:37f96f9d4de2	3146	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3147	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 */
<>	154:37f96f9d4de2	3148	break;
<>	154:37f96f9d4de2	3149	case 0x07U:
<>	154:37f96f9d4de2	3150	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3151	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111;
<>	154:37f96f9d4de2	3152	#else
<>	154:37f96f9d4de2	3153	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3154	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 */
<>	154:37f96f9d4de2	3155	break;
<>	154:37f96f9d4de2	3156	case 0x08U:
<>	154:37f96f9d4de2	3157	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3158	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000;
<>	154:37f96f9d4de2	3159	#else
<>	154:37f96f9d4de2	3160	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3161	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 */
<>	154:37f96f9d4de2	3162	break;
<>	154:37f96f9d4de2	3163	case 0x09U:
<>	154:37f96f9d4de2	3164	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3165	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001;
<>	154:37f96f9d4de2	3166	#else
<>	154:37f96f9d4de2	3167	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3168	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 */
<>	154:37f96f9d4de2	3169	break;
<>	154:37f96f9d4de2	3170	case 0x0AU:
<>	154:37f96f9d4de2	3171	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3172	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010;
<>	154:37f96f9d4de2	3173	#else
<>	154:37f96f9d4de2	3174	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3175	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 */
<>	154:37f96f9d4de2	3176	break;
<>	154:37f96f9d4de2	3177	case 0x0BU:
<>	154:37f96f9d4de2	3178	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3179	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011;
<>	154:37f96f9d4de2	3180	#else
<>	154:37f96f9d4de2	3181	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3182	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 */
<>	154:37f96f9d4de2	3183	break;
<>	154:37f96f9d4de2	3184	case 0x0CU:
<>	154:37f96f9d4de2	3185	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3186	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100;
<>	154:37f96f9d4de2	3187	#else
<>	154:37f96f9d4de2	3188	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3189	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 */
<>	154:37f96f9d4de2	3190	break;
<>	154:37f96f9d4de2	3191	case 0x0DU:
<>	154:37f96f9d4de2	3192	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3193	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101;
<>	154:37f96f9d4de2	3194	#else
<>	154:37f96f9d4de2	3195	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3196	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 */
<>	154:37f96f9d4de2	3197	break;
<>	154:37f96f9d4de2	3198	case 0x0EU:
<>	154:37f96f9d4de2	3199	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3200	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110;
<>	154:37f96f9d4de2	3201	#else
<>	154:37f96f9d4de2	3202	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3203	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 */
<>	154:37f96f9d4de2	3204	break;
<>	154:37f96f9d4de2	3205	case 0x0FU:
<>	154:37f96f9d4de2	3206	#if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 != 0xFFFFFFFF)
<>	154:37f96f9d4de2	3207	config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111;
<>	154:37f96f9d4de2	3208	#else
<>	154:37f96f9d4de2	3209	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3210	#endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 */
<>	154:37f96f9d4de2	3211	break;
<>	154:37f96f9d4de2	3212	default:
<>	154:37f96f9d4de2	3213	config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED;
<>	154:37f96f9d4de2	3214	break;
<>	154:37f96f9d4de2	3215	}
<>	154:37f96f9d4de2	3216
<>	154:37f96f9d4de2	3217	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	3218	}
<>	154:37f96f9d4de2	3219	#endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */
<>	154:37f96f9d4de2	3220
<>	154:37f96f9d4de2	3221	#if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD
<>	154:37f96f9d4de2	3222	/! @brief Validates the range of the given resource address./
<>	154:37f96f9d4de2	3223	static status_t flash_check_resource_range(uint32_t start,
<>	154:37f96f9d4de2	3224	uint32_t lengthInBytes,
<>	154:37f96f9d4de2	3225	uint32_t alignmentBaseline,
<>	154:37f96f9d4de2	3226	flash_read_resource_option_t option)
<>	154:37f96f9d4de2	3227	{
<>	154:37f96f9d4de2	3228	status_t status;
<>	154:37f96f9d4de2	3229	uint32_t maxReadbleAddress;
<>	154:37f96f9d4de2	3230
<>	154:37f96f9d4de2	3231	if ((start & (alignmentBaseline - 1)) \|\| (lengthInBytes & (alignmentBaseline - 1)))
<>	154:37f96f9d4de2	3232	{
<>	154:37f96f9d4de2	3233	return kStatus_FLASH_AlignmentError;
<>	154:37f96f9d4de2	3234	}
<>	154:37f96f9d4de2	3235
<>	154:37f96f9d4de2	3236	status = kStatus_FLASH_Success;
<>	154:37f96f9d4de2	3237
<>	154:37f96f9d4de2	3238	maxReadbleAddress = start + lengthInBytes - 1;
AnnaBridge	175:af195413fb11	3239	if (option == kFLASH_ResourceOptionVersionId)
<>	154:37f96f9d4de2	3240	{
AnnaBridge	175:af195413fb11	3241	if ((start != kFLASH_ResourceRangeVersionIdStart) \|\|
AnnaBridge	175:af195413fb11	3242	((start + lengthInBytes - 1) != kFLASH_ResourceRangeVersionIdEnd))
<>	154:37f96f9d4de2	3243	{
<>	154:37f96f9d4de2	3244	status = kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3245	}
<>	154:37f96f9d4de2	3246	}
AnnaBridge	175:af195413fb11	3247	else if (option == kFLASH_ResourceOptionFlashIfr)
<>	154:37f96f9d4de2	3248	{
AnnaBridge	175:af195413fb11	3249	if (maxReadbleAddress < kFLASH_ResourceRangePflashIfrSizeInBytes)
<>	154:37f96f9d4de2	3250	{
<>	154:37f96f9d4de2	3251	}
<>	154:37f96f9d4de2	3252	#if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP
AnnaBridge	175:af195413fb11	3253	else if ((start >= kFLASH_ResourceRangePflashSwapIfrStart) &&
AnnaBridge	175:af195413fb11	3254	(maxReadbleAddress <= kFLASH_ResourceRangePflashSwapIfrEnd))
<>	154:37f96f9d4de2	3255	{
<>	154:37f96f9d4de2	3256	}
<>	154:37f96f9d4de2	3257	#endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
AnnaBridge	175:af195413fb11	3258	else if ((start >= kFLASH_ResourceRangeDflashIfrStart) &&
AnnaBridge	175:af195413fb11	3259	(maxReadbleAddress <= kFLASH_ResourceRangeDflashIfrEnd))
<>	154:37f96f9d4de2	3260	{
<>	154:37f96f9d4de2	3261	}
<>	154:37f96f9d4de2	3262	else
<>	154:37f96f9d4de2	3263	{
<>	154:37f96f9d4de2	3264	status = kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3265	}
<>	154:37f96f9d4de2	3266	}
<>	154:37f96f9d4de2	3267	else
<>	154:37f96f9d4de2	3268	{
<>	154:37f96f9d4de2	3269	status = kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3270	}
<>	154:37f96f9d4de2	3271
<>	154:37f96f9d4de2	3272	return status;
<>	154:37f96f9d4de2	3273	}
<>	154:37f96f9d4de2	3274	#endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */
<>	154:37f96f9d4de2	3275
<>	154:37f96f9d4de2	3276	#if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD
<>	154:37f96f9d4de2	3277	/! @brief Validates the gived swap control option./
<>	154:37f96f9d4de2	3278	static status_t flash_check_swap_control_option(flash_swap_control_option_t option)
<>	154:37f96f9d4de2	3279	{
AnnaBridge	175:af195413fb11	3280	if ((option == kFLASH_SwapControlOptionIntializeSystem) \|\| (option == kFLASH_SwapControlOptionSetInUpdateState) \|\|
AnnaBridge	175:af195413fb11	3281	(option == kFLASH_SwapControlOptionSetInCompleteState) \|\| (option == kFLASH_SwapControlOptionReportStatus) \|\|
AnnaBridge	175:af195413fb11	3282	(option == kFLASH_SwapControlOptionDisableSystem))
<>	154:37f96f9d4de2	3283	{
<>	154:37f96f9d4de2	3284	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	3285	}
<>	154:37f96f9d4de2	3286
<>	154:37f96f9d4de2	3287	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3288	}
<>	154:37f96f9d4de2	3289	#endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */
<>	154:37f96f9d4de2	3290
<>	154:37f96f9d4de2	3291	#if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP
<>	154:37f96f9d4de2	3292	/! @brief Validates the gived address to see if it is equal to swap indicator address in pflash swap IFR./
<>	154:37f96f9d4de2	3293	static status_t flash_validate_swap_indicator_address(flash_config_t *config, uint32_t address)
<>	154:37f96f9d4de2	3294	{
AnnaBridge	175:af195413fb11	3295	flash_swap_ifr_field_data_t flashSwapIfrFieldData;
<>	154:37f96f9d4de2	3296	uint32_t swapIndicatorAddress;
<>	154:37f96f9d4de2	3297
<>	154:37f96f9d4de2	3298	status_t returnCode;
AnnaBridge	175:af195413fb11	3299	#if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD
AnnaBridge	175:af195413fb11	3300	returnCode =
AnnaBridge	175:af195413fb11	3301	FLASH_ReadResource(config, kFLASH_ResourceRangePflashSwapIfrStart, flashSwapIfrFieldData.flashSwapIfrData,
AnnaBridge	175:af195413fb11	3302	sizeof(flashSwapIfrFieldData.flashSwapIfrData), kFLASH_ResourceOptionFlashIfr);
AnnaBridge	175:af195413fb11	3303
<>	154:37f96f9d4de2	3304	if (returnCode != kStatus_FLASH_Success)
<>	154:37f96f9d4de2	3305	{
<>	154:37f96f9d4de2	3306	return returnCode;
<>	154:37f96f9d4de2	3307	}
AnnaBridge	175:af195413fb11	3308	#else
AnnaBridge	175:af195413fb11	3309	{
AnnaBridge	175:af195413fb11	3310	/* From RM, the actual info are stored in FCCOB6,7 */
AnnaBridge	175:af195413fb11	3311	uint32_t returnValue[2];
AnnaBridge	175:af195413fb11	3312	returnCode = FLASH_ReadOnce(config, kFLASH_RecordIndexSwapAddr, returnValue, 4);
AnnaBridge	175:af195413fb11	3313	if (returnCode != kStatus_FLASH_Success)
AnnaBridge	175:af195413fb11	3314	{
AnnaBridge	175:af195413fb11	3315	return returnCode;
AnnaBridge	175:af195413fb11	3316	}
AnnaBridge	175:af195413fb11	3317	flashSwapIfrFieldData.flashSwapIfrField.swapIndicatorAddress = (uint16_t)returnValue[0];
AnnaBridge	175:af195413fb11	3318	returnCode = FLASH_ReadOnce(config, kFLASH_RecordIndexSwapEnable, returnValue, 4);
AnnaBridge	175:af195413fb11	3319	if (returnCode != kStatus_FLASH_Success)
AnnaBridge	175:af195413fb11	3320	{
AnnaBridge	175:af195413fb11	3321	return returnCode;
AnnaBridge	175:af195413fb11	3322	}
AnnaBridge	175:af195413fb11	3323	flashSwapIfrFieldData.flashSwapIfrField.swapEnableWord = (uint16_t)returnValue[0];
AnnaBridge	175:af195413fb11	3324	returnCode = FLASH_ReadOnce(config, kFLASH_RecordIndexSwapDisable, returnValue, 4);
AnnaBridge	175:af195413fb11	3325	if (returnCode != kStatus_FLASH_Success)
AnnaBridge	175:af195413fb11	3326	{
AnnaBridge	175:af195413fb11	3327	return returnCode;
AnnaBridge	175:af195413fb11	3328	}
AnnaBridge	175:af195413fb11	3329	flashSwapIfrFieldData.flashSwapIfrField.swapDisableWord = (uint16_t)returnValue[0];
AnnaBridge	175:af195413fb11	3330	}
AnnaBridge	175:af195413fb11	3331	#endif
AnnaBridge	175:af195413fb11	3332
AnnaBridge	175:af195413fb11	3333	/* The high bits value of Swap Indicator Address is stored in Program Flash Swap IFR Field,
AnnaBridge	175:af195413fb11	3334	* the low severval bit value of Swap Indicator Address is always 1'b0 */
AnnaBridge	175:af195413fb11	3335	swapIndicatorAddress = (uint32_t)flashSwapIfrFieldData.flashSwapIfrField.swapIndicatorAddress *
AnnaBridge	175:af195413fb11	3336	FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT;
<>	154:37f96f9d4de2	3337	if (address != swapIndicatorAddress)
<>	154:37f96f9d4de2	3338	{
<>	154:37f96f9d4de2	3339	return kStatus_FLASH_SwapIndicatorAddressError;
<>	154:37f96f9d4de2	3340	}
<>	154:37f96f9d4de2	3341
<>	154:37f96f9d4de2	3342	return returnCode;
<>	154:37f96f9d4de2	3343	}
<>	154:37f96f9d4de2	3344	#endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
<>	154:37f96f9d4de2	3345
<>	154:37f96f9d4de2	3346	#if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD
<>	154:37f96f9d4de2	3347	/! @brief Validates the gived flexram function option./
<>	154:37f96f9d4de2	3348	static inline status_t flasn_check_flexram_function_option_range(flash_flexram_function_option_t option)
<>	154:37f96f9d4de2	3349	{
AnnaBridge	175:af195413fb11	3350	if ((option != kFLASH_FlexramFunctionOptionAvailableAsRam) &&
AnnaBridge	175:af195413fb11	3351	(option != kFLASH_FlexramFunctionOptionAvailableForEeprom))
<>	154:37f96f9d4de2	3352	{
<>	154:37f96f9d4de2	3353	return kStatus_FLASH_InvalidArgument;
<>	154:37f96f9d4de2	3354	}
<>	154:37f96f9d4de2	3355
<>	154:37f96f9d4de2	3356	return kStatus_FLASH_Success;
<>	154:37f96f9d4de2	3357	}
<>	154:37f96f9d4de2	3358	#endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */
AnnaBridge	175:af195413fb11	3359
AnnaBridge	175:af195413fb11	3360	/! @brief Gets the flash protection information (region size, region count)./
AnnaBridge	175:af195413fb11	3361	static status_t flash_get_protection_info(flash_config_t config, flash_protection_config_t info)
AnnaBridge	175:af195413fb11	3362	{
AnnaBridge	175:af195413fb11	3363	uint32_t pflashTotalSize;
AnnaBridge	175:af195413fb11	3364
AnnaBridge	175:af195413fb11	3365	if (config == NULL)
AnnaBridge	175:af195413fb11	3366	{
AnnaBridge	175:af195413fb11	3367	return kStatus_FLASH_InvalidArgument;
AnnaBridge	175:af195413fb11	3368	}
AnnaBridge	175:af195413fb11	3369
AnnaBridge	175:af195413fb11	3370	/* Clean up info Structure*/
AnnaBridge	175:af195413fb11	3371	memset(info, 0, sizeof(flash_protection_config_t));
AnnaBridge	175:af195413fb11	3372
AnnaBridge	175:af195413fb11	3373	/* Note: KW40 has a secondary flash, but it doesn't have independent protection register*/
AnnaBridge	175:af195413fb11	3374	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && (!FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER)
AnnaBridge	175:af195413fb11	3375	pflashTotalSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE +
AnnaBridge	175:af195413fb11	3376	FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE;
AnnaBridge	175:af195413fb11	3377	info->regionBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS;
AnnaBridge	175:af195413fb11	3378	#else
AnnaBridge	175:af195413fb11	3379	pflashTotalSize = config->PFlashTotalSize;
AnnaBridge	175:af195413fb11	3380	info->regionBase = config->PFlashBlockBase;
AnnaBridge	175:af195413fb11	3381	#endif
AnnaBridge	175:af195413fb11	3382
AnnaBridge	175:af195413fb11	3383	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER
AnnaBridge	175:af195413fb11	3384	if (config->FlashMemoryIndex == (uint8_t)kFLASH_MemoryIndexSecondaryFlash)
AnnaBridge	175:af195413fb11	3385	{
AnnaBridge	175:af195413fb11	3386	info->regionCount = FSL_FEATURE_FLASH_PFLASH_1_PROTECTION_REGION_COUNT;
AnnaBridge	175:af195413fb11	3387	}
AnnaBridge	175:af195413fb11	3388	else
AnnaBridge	175:af195413fb11	3389	#endif
AnnaBridge	175:af195413fb11	3390	{
AnnaBridge	175:af195413fb11	3391	info->regionCount = FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT;
AnnaBridge	175:af195413fb11	3392	}
AnnaBridge	175:af195413fb11	3393
AnnaBridge	175:af195413fb11	3394	/* Calculate the size of the flash protection region
AnnaBridge	175:af195413fb11	3395	* If the flash density is > 32KB, then protection region is 1/32 of total flash density
AnnaBridge	175:af195413fb11	3396	* Else if flash density is < 32KB, then flash protection region is set to 1KB */
AnnaBridge	175:af195413fb11	3397	if (pflashTotalSize > info->regionCount * 1024)
AnnaBridge	175:af195413fb11	3398	{
AnnaBridge	175:af195413fb11	3399	info->regionSize = (pflashTotalSize) / info->regionCount;
AnnaBridge	175:af195413fb11	3400	}
AnnaBridge	175:af195413fb11	3401	else
AnnaBridge	175:af195413fb11	3402	{
AnnaBridge	175:af195413fb11	3403	info->regionSize = 1024;
AnnaBridge	175:af195413fb11	3404	}
AnnaBridge	175:af195413fb11	3405
AnnaBridge	175:af195413fb11	3406	return kStatus_FLASH_Success;
AnnaBridge	175:af195413fb11	3407	}
AnnaBridge	175:af195413fb11	3408
AnnaBridge	175:af195413fb11	3409	#if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL
AnnaBridge	175:af195413fb11	3410	/! @brief Gets the flash Execute-Only access information (Segment size, Segment count)./
AnnaBridge	175:af195413fb11	3411	static status_t flash_get_access_info(flash_config_t config, flash_access_config_t info)
AnnaBridge	175:af195413fb11	3412	{
AnnaBridge	175:af195413fb11	3413	if (config == NULL)
AnnaBridge	175:af195413fb11	3414	{
AnnaBridge	175:af195413fb11	3415	return kStatus_FLASH_InvalidArgument;
AnnaBridge	175:af195413fb11	3416	}
AnnaBridge	175:af195413fb11	3417
AnnaBridge	175:af195413fb11	3418	/* Clean up info Structure*/
AnnaBridge	175:af195413fb11	3419	memset(info, 0, sizeof(flash_access_config_t));
AnnaBridge	175:af195413fb11	3420
AnnaBridge	175:af195413fb11	3421	/* Note: KW40 has a secondary flash, but it doesn't have independent access register*/
AnnaBridge	175:af195413fb11	3422	#if FLASH_SSD_IS_SECONDARY_FLASH_ENABLED && (!FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER)
AnnaBridge	175:af195413fb11	3423	info->SegmentBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS;
AnnaBridge	175:af195413fb11	3424	#else
AnnaBridge	175:af195413fb11	3425	info->SegmentBase = config->PFlashBlockBase;
AnnaBridge	175:af195413fb11	3426	#endif
AnnaBridge	175:af195413fb11	3427	info->SegmentSize = config->PFlashAccessSegmentSize;
AnnaBridge	175:af195413fb11	3428	info->SegmentCount = config->PFlashAccessSegmentCount;
AnnaBridge	175:af195413fb11	3429
AnnaBridge	175:af195413fb11	3430	return kStatus_FLASH_Success;
AnnaBridge	175:af195413fb11	3431	}
AnnaBridge	175:af195413fb11	3432	#endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */

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Type:	Library
Created:	27 Oct 2017
Imports:	56
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Commits:	182
Dependents:	41
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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flash.c@175:af195413fb11, 2017-10-11 (annotated)

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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flash.c@175:af195413fb11, 2017-10-11 (annotated)

Who changed what in which revision?

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