Ben Katz / mbed-dev-f303

Dependents:   Hobbyking_Cheetah_Compact Hobbyking_Cheetah_Compact_DRV8323_14bit Hobbyking_Cheetah_Compact_DRV8323_V51_201907 HKC_MiniCheetah ... more

Fork of mbed-dev by mbed official

Committer:
benkatz
Date:
Mon Jul 30 20:31:44 2018 +0000
Revision:
181:36facd806e4a
Parent:
154:37f96f9d4de2
going on the robot.  fixed a dumb bug in float_to_uint

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30
<> 154:37f96f9d4de2 31 #ifndef _FSL_SMC_H_
<> 154:37f96f9d4de2 32 #define _FSL_SMC_H_
<> 154:37f96f9d4de2 33
<> 154:37f96f9d4de2 34 #include "fsl_common.h"
<> 154:37f96f9d4de2 35
<> 154:37f96f9d4de2 36 /*! @addtogroup smc */
<> 154:37f96f9d4de2 37 /*! @{ */
<> 154:37f96f9d4de2 38
<> 154:37f96f9d4de2 39 /*! @file */
<> 154:37f96f9d4de2 40
<> 154:37f96f9d4de2 41 /*******************************************************************************
<> 154:37f96f9d4de2 42 * Definitions
<> 154:37f96f9d4de2 43 ******************************************************************************/
<> 154:37f96f9d4de2 44
<> 154:37f96f9d4de2 45 /*! @name Driver version */
<> 154:37f96f9d4de2 46 /*@{*/
<> 154:37f96f9d4de2 47 /*! @brief SMC driver version 2.0.1. */
<> 154:37f96f9d4de2 48 #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
<> 154:37f96f9d4de2 49 /*@}*/
<> 154:37f96f9d4de2 50
<> 154:37f96f9d4de2 51 /*!
<> 154:37f96f9d4de2 52 * @brief Power Modes Protection
<> 154:37f96f9d4de2 53 */
<> 154:37f96f9d4de2 54 typedef enum _smc_power_mode_protection
<> 154:37f96f9d4de2 55 {
<> 154:37f96f9d4de2 56 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 57 kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */
<> 154:37f96f9d4de2 58 #endif
<> 154:37f96f9d4de2 59 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 60 kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */
<> 154:37f96f9d4de2 61 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 62 kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */
<> 154:37f96f9d4de2 63 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
<> 154:37f96f9d4de2 64 kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */
<> 154:37f96f9d4de2 65 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
<> 154:37f96f9d4de2 66 kSMC_AllowPowerModeAll = (0U
<> 154:37f96f9d4de2 67 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 68 |
<> 154:37f96f9d4de2 69 SMC_PMPROT_AVLLS_MASK
<> 154:37f96f9d4de2 70 #endif
<> 154:37f96f9d4de2 71 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 72 |
<> 154:37f96f9d4de2 73 SMC_PMPROT_ALLS_MASK
<> 154:37f96f9d4de2 74 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 75 |
<> 154:37f96f9d4de2 76 SMC_PMPROT_AVLP_MASK
<> 154:37f96f9d4de2 77 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
<> 154:37f96f9d4de2 78 |
<> 154:37f96f9d4de2 79 kSMC_AllowPowerModeHsrun
<> 154:37f96f9d4de2 80 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
<> 154:37f96f9d4de2 81 ) /*!< Allow all power mode. */
<> 154:37f96f9d4de2 82 } smc_power_mode_protection_t;
<> 154:37f96f9d4de2 83
<> 154:37f96f9d4de2 84 /*!
<> 154:37f96f9d4de2 85 * @brief Power Modes in PMSTAT
<> 154:37f96f9d4de2 86 */
<> 154:37f96f9d4de2 87 typedef enum _smc_power_state
<> 154:37f96f9d4de2 88 {
<> 154:37f96f9d4de2 89 kSMC_PowerStateRun = 0x01U << 0U, /*!< 0000_0001 - Current power mode is RUN */
<> 154:37f96f9d4de2 90 kSMC_PowerStateStop = 0x01U << 1U, /*!< 0000_0010 - Current power mode is STOP */
<> 154:37f96f9d4de2 91 kSMC_PowerStateVlpr = 0x01U << 2U, /*!< 0000_0100 - Current power mode is VLPR */
<> 154:37f96f9d4de2 92 kSMC_PowerStateVlpw = 0x01U << 3U, /*!< 0000_1000 - Current power mode is VLPW */
<> 154:37f96f9d4de2 93 kSMC_PowerStateVlps = 0x01U << 4U, /*!< 0001_0000 - Current power mode is VLPS */
<> 154:37f96f9d4de2 94 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 95 kSMC_PowerStateLls = 0x01U << 5U, /*!< 0010_0000 - Current power mode is LLS */
<> 154:37f96f9d4de2 96 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 97 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 98 kSMC_PowerStateVlls = 0x01U << 6U, /*!< 0100_0000 - Current power mode is VLLS */
<> 154:37f96f9d4de2 99 #endif
<> 154:37f96f9d4de2 100 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
<> 154:37f96f9d4de2 101 kSMC_PowerStateHsrun = 0x01U << 7U /*!< 1000_0000 - Current power mode is HSRUN */
<> 154:37f96f9d4de2 102 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
<> 154:37f96f9d4de2 103 } smc_power_state_t;
<> 154:37f96f9d4de2 104
<> 154:37f96f9d4de2 105 /*!
<> 154:37f96f9d4de2 106 * @brief Run mode definition
<> 154:37f96f9d4de2 107 */
<> 154:37f96f9d4de2 108 typedef enum _smc_run_mode
<> 154:37f96f9d4de2 109 {
<> 154:37f96f9d4de2 110 kSMC_RunNormal = 0U, /*!< normal RUN mode. */
<> 154:37f96f9d4de2 111 kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */
<> 154:37f96f9d4de2 112 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
<> 154:37f96f9d4de2 113 kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */
<> 154:37f96f9d4de2 114 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
<> 154:37f96f9d4de2 115 } smc_run_mode_t;
<> 154:37f96f9d4de2 116
<> 154:37f96f9d4de2 117 /*!
<> 154:37f96f9d4de2 118 * @brief Stop mode definition
<> 154:37f96f9d4de2 119 */
<> 154:37f96f9d4de2 120 typedef enum _smc_stop_mode
<> 154:37f96f9d4de2 121 {
<> 154:37f96f9d4de2 122 kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
<> 154:37f96f9d4de2 123 kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */
<> 154:37f96f9d4de2 124 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 125 kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */
<> 154:37f96f9d4de2 126 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 127 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 128 kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */
<> 154:37f96f9d4de2 129 #endif
<> 154:37f96f9d4de2 130 } smc_stop_mode_t;
<> 154:37f96f9d4de2 131
<> 154:37f96f9d4de2 132 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
<> 154:37f96f9d4de2 133 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
<> 154:37f96f9d4de2 134 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
<> 154:37f96f9d4de2 135 /*!
<> 154:37f96f9d4de2 136 * @brief VLLS/LLS stop sub mode definition
<> 154:37f96f9d4de2 137 */
<> 154:37f96f9d4de2 138 typedef enum _smc_stop_submode
<> 154:37f96f9d4de2 139 {
<> 154:37f96f9d4de2 140 kSMC_StopSub0 = 0U, /*!< Stop submode 0, for VLLS0/LLS0. */
<> 154:37f96f9d4de2 141 kSMC_StopSub1 = 1U, /*!< Stop submode 1, for VLLS1/LLS1. */
<> 154:37f96f9d4de2 142 kSMC_StopSub2 = 2U, /*!< Stop submode 2, for VLLS2/LLS2. */
<> 154:37f96f9d4de2 143 kSMC_StopSub3 = 3U /*!< Stop submode 3, for VLLS3/LLS3. */
<> 154:37f96f9d4de2 144 } smc_stop_submode_t;
<> 154:37f96f9d4de2 145 #endif
<> 154:37f96f9d4de2 146
<> 154:37f96f9d4de2 147 /*!
<> 154:37f96f9d4de2 148 * @brief Partial STOP option
<> 154:37f96f9d4de2 149 */
<> 154:37f96f9d4de2 150 typedef enum _smc_partial_stop_mode
<> 154:37f96f9d4de2 151 {
<> 154:37f96f9d4de2 152 kSMC_PartialStop = 0U, /*!< STOP - Normal Stop mode*/
<> 154:37f96f9d4de2 153 kSMC_PartialStop1 = 1U, /*!< Partial Stop with both system and bus clocks disabled*/
<> 154:37f96f9d4de2 154 kSMC_PartialStop2 = 2U, /*!< Partial Stop with system clock disabled and bus clock enabled*/
<> 154:37f96f9d4de2 155 } smc_partial_stop_option_t;
<> 154:37f96f9d4de2 156
<> 154:37f96f9d4de2 157 /*!
<> 154:37f96f9d4de2 158 * @brief SMC configuration status
<> 154:37f96f9d4de2 159 */
<> 154:37f96f9d4de2 160 enum _smc_status
<> 154:37f96f9d4de2 161 {
<> 154:37f96f9d4de2 162 kStatus_SMC_StopAbort = MAKE_STATUS(kStatusGroup_POWER, 0) /*!< Entering Stop mode is abort*/
<> 154:37f96f9d4de2 163 };
<> 154:37f96f9d4de2 164
<> 154:37f96f9d4de2 165 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
<> 154:37f96f9d4de2 166 /*!
<> 154:37f96f9d4de2 167 * @brief IP version ID definition.
<> 154:37f96f9d4de2 168 */
<> 154:37f96f9d4de2 169 typedef struct _smc_version_id
<> 154:37f96f9d4de2 170 {
<> 154:37f96f9d4de2 171 uint16_t feature; /*!< Feature Specification Number. */
<> 154:37f96f9d4de2 172 uint8_t minor; /*!< Minor version number. */
<> 154:37f96f9d4de2 173 uint8_t major; /*!< Major version number. */
<> 154:37f96f9d4de2 174 } smc_version_id_t;
<> 154:37f96f9d4de2 175 #endif /* FSL_FEATURE_SMC_HAS_VERID */
<> 154:37f96f9d4de2 176
<> 154:37f96f9d4de2 177 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
<> 154:37f96f9d4de2 178 /*!
<> 154:37f96f9d4de2 179 * @brief IP parameter definition.
<> 154:37f96f9d4de2 180 */
<> 154:37f96f9d4de2 181 typedef struct _smc_param
<> 154:37f96f9d4de2 182 {
<> 154:37f96f9d4de2 183 bool hsrunEnable; /*!< HSRUN mode enable. */
<> 154:37f96f9d4de2 184 bool llsEnable; /*!< LLS mode enable. */
<> 154:37f96f9d4de2 185 bool lls2Enable; /*!< LLS2 mode enable. */
<> 154:37f96f9d4de2 186 bool vlls0Enable; /*!< VLLS0 mode enable. */
<> 154:37f96f9d4de2 187 } smc_param_t;
<> 154:37f96f9d4de2 188 #endif /* FSL_FEATURE_SMC_HAS_PARAM */
<> 154:37f96f9d4de2 189
<> 154:37f96f9d4de2 190 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
<> 154:37f96f9d4de2 191 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
<> 154:37f96f9d4de2 192 /*!
<> 154:37f96f9d4de2 193 * @brief SMC Low-Leakage Stop power mode config
<> 154:37f96f9d4de2 194 */
<> 154:37f96f9d4de2 195 typedef struct _smc_power_mode_lls_config
<> 154:37f96f9d4de2 196 {
<> 154:37f96f9d4de2 197 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
<> 154:37f96f9d4de2 198 smc_stop_submode_t subMode; /*!< Low-leakage Stop sub-mode */
<> 154:37f96f9d4de2 199 #endif
<> 154:37f96f9d4de2 200 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
<> 154:37f96f9d4de2 201 bool enableLpoClock; /*!< Enable LPO clock in LLS mode */
<> 154:37f96f9d4de2 202 #endif
<> 154:37f96f9d4de2 203 } smc_power_mode_lls_config_t;
<> 154:37f96f9d4de2 204 #endif /* (FSL_FEATURE_SMC_HAS_LLS_SUBMODE || FSL_FEATURE_SMC_HAS_LPOPO) */
<> 154:37f96f9d4de2 205
<> 154:37f96f9d4de2 206 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 207 /*!
<> 154:37f96f9d4de2 208 * @brief SMC Very Low-Leakage Stop power mode config
<> 154:37f96f9d4de2 209 */
<> 154:37f96f9d4de2 210 typedef struct _smc_power_mode_vlls_config
<> 154:37f96f9d4de2 211 {
<> 154:37f96f9d4de2 212 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
<> 154:37f96f9d4de2 213 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
<> 154:37f96f9d4de2 214 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
<> 154:37f96f9d4de2 215 smc_stop_submode_t subMode; /*!< Very Low-leakage Stop sub-mode */
<> 154:37f96f9d4de2 216 #endif
<> 154:37f96f9d4de2 217 #if (defined(FSL_FEATURE_SMC_HAS_PORPO) && FSL_FEATURE_SMC_HAS_PORPO)
<> 154:37f96f9d4de2 218 bool enablePorDetectInVlls0; /*!< Enable Power on reset detect in VLLS mode */
<> 154:37f96f9d4de2 219 #endif
<> 154:37f96f9d4de2 220 #if (defined(FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) && FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION)
<> 154:37f96f9d4de2 221 bool enableRam2InVlls2; /*!< Enable RAM2 power in VLLS2 */
<> 154:37f96f9d4de2 222 #endif
<> 154:37f96f9d4de2 223 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
<> 154:37f96f9d4de2 224 bool enableLpoClock; /*!< Enable LPO clock in VLLS mode */
<> 154:37f96f9d4de2 225 #endif
<> 154:37f96f9d4de2 226 } smc_power_mode_vlls_config_t;
<> 154:37f96f9d4de2 227 #endif
<> 154:37f96f9d4de2 228
<> 154:37f96f9d4de2 229 /*******************************************************************************
<> 154:37f96f9d4de2 230 * API
<> 154:37f96f9d4de2 231 ******************************************************************************/
<> 154:37f96f9d4de2 232
<> 154:37f96f9d4de2 233 #if defined(__cplusplus)
<> 154:37f96f9d4de2 234 extern "C" {
<> 154:37f96f9d4de2 235 #endif /* __cplusplus */
<> 154:37f96f9d4de2 236
<> 154:37f96f9d4de2 237 /*! @name System mode controller APIs*/
<> 154:37f96f9d4de2 238 /*@{*/
<> 154:37f96f9d4de2 239
<> 154:37f96f9d4de2 240 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
<> 154:37f96f9d4de2 241 /*!
<> 154:37f96f9d4de2 242 * @brief Gets the SMC version ID.
<> 154:37f96f9d4de2 243 *
<> 154:37f96f9d4de2 244 * This function gets the SMC version ID, including major version number,
<> 154:37f96f9d4de2 245 * minor version number and feature specification number.
<> 154:37f96f9d4de2 246 *
<> 154:37f96f9d4de2 247 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 248 * @param versionId Pointer to version ID structure.
<> 154:37f96f9d4de2 249 */
<> 154:37f96f9d4de2 250 static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
<> 154:37f96f9d4de2 251 {
<> 154:37f96f9d4de2 252 *((uint32_t *)versionId) = base->VERID;
<> 154:37f96f9d4de2 253 }
<> 154:37f96f9d4de2 254 #endif /* FSL_FEATURE_SMC_HAS_VERID */
<> 154:37f96f9d4de2 255
<> 154:37f96f9d4de2 256 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
<> 154:37f96f9d4de2 257 /*!
<> 154:37f96f9d4de2 258 * @brief Gets the SMC parameter.
<> 154:37f96f9d4de2 259 *
<> 154:37f96f9d4de2 260 * This function gets the SMC parameter, including the enabled power mdoes.
<> 154:37f96f9d4de2 261 *
<> 154:37f96f9d4de2 262 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 263 * @param param Pointer to SMC param structure.
<> 154:37f96f9d4de2 264 */
<> 154:37f96f9d4de2 265 void SMC_GetParam(SMC_Type *base, smc_param_t *param);
<> 154:37f96f9d4de2 266 #endif
<> 154:37f96f9d4de2 267
<> 154:37f96f9d4de2 268 /*!
<> 154:37f96f9d4de2 269 * @brief Configures all power mode protection settings.
<> 154:37f96f9d4de2 270 *
<> 154:37f96f9d4de2 271 * This function configures the power mode protection settings for
<> 154:37f96f9d4de2 272 * supported power modes in the specified chip family. The available power modes
<> 154:37f96f9d4de2 273 * are defined in the smc_power_mode_protection_t. This should be done at an early
<> 154:37f96f9d4de2 274 * system level initialization stage. See the reference manual for details.
<> 154:37f96f9d4de2 275 * This register can only write once after the power reset.
<> 154:37f96f9d4de2 276 *
<> 154:37f96f9d4de2 277 * The allowed modes are passed as bit map, for example, to allow LLS and VLLS,
<> 154:37f96f9d4de2 278 * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
<> 154:37f96f9d4de2 279 * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
<> 154:37f96f9d4de2 280 *
<> 154:37f96f9d4de2 281 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 282 * @param allowedModes Bitmap of the allowed power modes.
<> 154:37f96f9d4de2 283 */
<> 154:37f96f9d4de2 284 static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedModes)
<> 154:37f96f9d4de2 285 {
<> 154:37f96f9d4de2 286 base->PMPROT = allowedModes;
<> 154:37f96f9d4de2 287 }
<> 154:37f96f9d4de2 288
<> 154:37f96f9d4de2 289 /*!
<> 154:37f96f9d4de2 290 * @brief Gets the current power mode status.
<> 154:37f96f9d4de2 291 *
<> 154:37f96f9d4de2 292 * This function returns the current power mode stat. Once application
<> 154:37f96f9d4de2 293 * switches the power mode, it should always check the stat to check whether it
<> 154:37f96f9d4de2 294 * runs into the specified mode or not. An application should check
<> 154:37f96f9d4de2 295 * this mode before switching to a different mode. The system requires that
<> 154:37f96f9d4de2 296 * only certain modes can switch to other specific modes. See the
<> 154:37f96f9d4de2 297 * reference manual for details and the smc_power_state_t for information about
<> 154:37f96f9d4de2 298 * the power stat.
<> 154:37f96f9d4de2 299 *
<> 154:37f96f9d4de2 300 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 301 * @return Current power mode status.
<> 154:37f96f9d4de2 302 */
<> 154:37f96f9d4de2 303 static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
<> 154:37f96f9d4de2 304 {
<> 154:37f96f9d4de2 305 return (smc_power_state_t)base->PMSTAT;
<> 154:37f96f9d4de2 306 }
<> 154:37f96f9d4de2 307
<> 154:37f96f9d4de2 308 /*!
<> 154:37f96f9d4de2 309 * @brief Configure the system to RUN power mode.
<> 154:37f96f9d4de2 310 *
<> 154:37f96f9d4de2 311 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 312 * @return SMC configuration error code.
<> 154:37f96f9d4de2 313 */
<> 154:37f96f9d4de2 314 status_t SMC_SetPowerModeRun(SMC_Type *base);
<> 154:37f96f9d4de2 315
<> 154:37f96f9d4de2 316 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
<> 154:37f96f9d4de2 317 /*!
<> 154:37f96f9d4de2 318 * @brief Configure the system to HSRUN power mode.
<> 154:37f96f9d4de2 319 *
<> 154:37f96f9d4de2 320 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 321 * @return SMC configuration error code.
<> 154:37f96f9d4de2 322 */
<> 154:37f96f9d4de2 323 status_t SMC_SetPowerModeHsrun(SMC_Type *base);
<> 154:37f96f9d4de2 324 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
<> 154:37f96f9d4de2 325
<> 154:37f96f9d4de2 326 /*!
<> 154:37f96f9d4de2 327 * @brief Configure the system to WAIT power mode.
<> 154:37f96f9d4de2 328 *
<> 154:37f96f9d4de2 329 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 330 * @return SMC configuration error code.
<> 154:37f96f9d4de2 331 */
<> 154:37f96f9d4de2 332 status_t SMC_SetPowerModeWait(SMC_Type *base);
<> 154:37f96f9d4de2 333
<> 154:37f96f9d4de2 334 /*!
<> 154:37f96f9d4de2 335 * @brief Configure the system to Stop power mode.
<> 154:37f96f9d4de2 336 *
<> 154:37f96f9d4de2 337 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 338 * @param option Partial Stop mode option.
<> 154:37f96f9d4de2 339 * @return SMC configuration error code.
<> 154:37f96f9d4de2 340 */
<> 154:37f96f9d4de2 341 status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
<> 154:37f96f9d4de2 342
<> 154:37f96f9d4de2 343 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
<> 154:37f96f9d4de2 344 /*!
<> 154:37f96f9d4de2 345 * @brief Configure the system to VLPR power mode.
<> 154:37f96f9d4de2 346 *
<> 154:37f96f9d4de2 347 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 348 * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
<> 154:37f96f9d4de2 349 * @return SMC configuration error code.
<> 154:37f96f9d4de2 350 */
<> 154:37f96f9d4de2 351 status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
<> 154:37f96f9d4de2 352 #else
<> 154:37f96f9d4de2 353 /*!
<> 154:37f96f9d4de2 354 * @brief Configure the system to VLPR power mode.
<> 154:37f96f9d4de2 355 *
<> 154:37f96f9d4de2 356 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 357 * @return SMC configuration error code.
<> 154:37f96f9d4de2 358 */
<> 154:37f96f9d4de2 359 status_t SMC_SetPowerModeVlpr(SMC_Type *base);
<> 154:37f96f9d4de2 360 #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
<> 154:37f96f9d4de2 361
<> 154:37f96f9d4de2 362 /*!
<> 154:37f96f9d4de2 363 * @brief Configure the system to VLPW power mode.
<> 154:37f96f9d4de2 364 *
<> 154:37f96f9d4de2 365 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 366 * @return SMC configuration error code.
<> 154:37f96f9d4de2 367 */
<> 154:37f96f9d4de2 368 status_t SMC_SetPowerModeVlpw(SMC_Type *base);
<> 154:37f96f9d4de2 369
<> 154:37f96f9d4de2 370 /*!
<> 154:37f96f9d4de2 371 * @brief Configure the system to VLPS power mode.
<> 154:37f96f9d4de2 372 *
<> 154:37f96f9d4de2 373 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 374 * @return SMC configuration error code.
<> 154:37f96f9d4de2 375 */
<> 154:37f96f9d4de2 376 status_t SMC_SetPowerModeVlps(SMC_Type *base);
<> 154:37f96f9d4de2 377
<> 154:37f96f9d4de2 378 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 379 #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
<> 154:37f96f9d4de2 380 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
<> 154:37f96f9d4de2 381 /*!
<> 154:37f96f9d4de2 382 * @brief Configure the system to LLS power mode.
<> 154:37f96f9d4de2 383 *
<> 154:37f96f9d4de2 384 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 385 * @param config The LLS power mode configuration structure
<> 154:37f96f9d4de2 386 * @return SMC configuration error code.
<> 154:37f96f9d4de2 387 */
<> 154:37f96f9d4de2 388 status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
<> 154:37f96f9d4de2 389 #else
<> 154:37f96f9d4de2 390 /*!
<> 154:37f96f9d4de2 391 * @brief Configure the system to LLS power mode.
<> 154:37f96f9d4de2 392 *
<> 154:37f96f9d4de2 393 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 394 * @return SMC configuration error code.
<> 154:37f96f9d4de2 395 */
<> 154:37f96f9d4de2 396 status_t SMC_SetPowerModeLls(SMC_Type *base);
<> 154:37f96f9d4de2 397 #endif
<> 154:37f96f9d4de2 398 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 399
<> 154:37f96f9d4de2 400 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
<> 154:37f96f9d4de2 401 /*!
<> 154:37f96f9d4de2 402 * @brief Configure the system to VLLS power mode.
<> 154:37f96f9d4de2 403 *
<> 154:37f96f9d4de2 404 * @param base SMC peripheral base address.
<> 154:37f96f9d4de2 405 * @param config The VLLS power mode configuration structure.
<> 154:37f96f9d4de2 406 * @return SMC configuration error code.
<> 154:37f96f9d4de2 407 */
<> 154:37f96f9d4de2 408 status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config);
<> 154:37f96f9d4de2 409 #endif /* FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE */
<> 154:37f96f9d4de2 410
<> 154:37f96f9d4de2 411 /*@}*/
<> 154:37f96f9d4de2 412
<> 154:37f96f9d4de2 413 #if defined(__cplusplus)
<> 154:37f96f9d4de2 414 }
<> 154:37f96f9d4de2 415 #endif /* __cplusplus */
<> 154:37f96f9d4de2 416
<> 154:37f96f9d4de2 417 /*! @}*/
<> 154:37f96f9d4de2 418
<> 154:37f96f9d4de2 419 #endif /* _FSL_SMC_H_ */