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targets/TARGET_Atmel/TARGET_SAM_CortexM4/services/ioport/sam/ioport_pio.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM4/services/ioport/sam/ioport_pio.h@107:414e9c822e99 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 107:414e9c822e99 1 /**
mbed_official 107:414e9c822e99 2 * \file
mbed_official 107:414e9c822e99 3 *
mbed_official 107:414e9c822e99 4 * \brief SAM architecture specific IOPORT service implementation header file.
mbed_official 107:414e9c822e99 5 *
mbed_official 107:414e9c822e99 6 * Copyright (c) 2012-2015 Atmel Corporation. All rights reserved.
mbed_official 107:414e9c822e99 7 *
mbed_official 107:414e9c822e99 8 * \asf_license_start
mbed_official 107:414e9c822e99 9 *
mbed_official 107:414e9c822e99 10 * \page License
mbed_official 107:414e9c822e99 11 *
mbed_official 107:414e9c822e99 12 * Redistribution and use in source and binary forms, with or without
mbed_official 107:414e9c822e99 13 * modification, are permitted provided that the following conditions are met:
mbed_official 107:414e9c822e99 14 *
mbed_official 107:414e9c822e99 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 107:414e9c822e99 16 * this list of conditions and the following disclaimer.
mbed_official 107:414e9c822e99 17 *
mbed_official 107:414e9c822e99 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 107:414e9c822e99 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 107:414e9c822e99 20 * and/or other materials provided with the distribution.
mbed_official 107:414e9c822e99 21 *
mbed_official 107:414e9c822e99 22 * 3. The name of Atmel may not be used to endorse or promote products derived
mbed_official 107:414e9c822e99 23 * from this software without specific prior written permission.
mbed_official 107:414e9c822e99 24 *
mbed_official 107:414e9c822e99 25 * 4. This software may only be redistributed and used in connection with an
mbed_official 107:414e9c822e99 26 * Atmel microcontroller product.
mbed_official 107:414e9c822e99 27 *
mbed_official 107:414e9c822e99 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
mbed_official 107:414e9c822e99 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
mbed_official 107:414e9c822e99 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
mbed_official 107:414e9c822e99 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
mbed_official 107:414e9c822e99 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 107:414e9c822e99 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
mbed_official 107:414e9c822e99 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
mbed_official 107:414e9c822e99 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
mbed_official 107:414e9c822e99 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 107:414e9c822e99 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 107:414e9c822e99 38 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 107:414e9c822e99 39 *
mbed_official 107:414e9c822e99 40 * \asf_license_stop
mbed_official 107:414e9c822e99 41 *
mbed_official 107:414e9c822e99 42 */
mbed_official 107:414e9c822e99 43 /*
mbed_official 107:414e9c822e99 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
mbed_official 107:414e9c822e99 45 */
mbed_official 107:414e9c822e99 46 #ifndef IOPORT_SAM_H
mbed_official 107:414e9c822e99 47 #define IOPORT_SAM_H
mbed_official 107:414e9c822e99 48
mbed_official 107:414e9c822e99 49 #include <sysclk.h>
mbed_official 107:414e9c822e99 50
mbed_official 107:414e9c822e99 51 #define IOPORT_CREATE_PIN(port, pin) ((IOPORT_ ## port) * 32 + (pin))
mbed_official 107:414e9c822e99 52 #define IOPORT_BASE_ADDRESS (uintptr_t)PIOA
mbed_official 107:414e9c822e99 53 #define IOPORT_PIO_OFFSET ((uintptr_t)PIOB - (uintptr_t)PIOA)
mbed_official 107:414e9c822e99 54
mbed_official 107:414e9c822e99 55 #define IOPORT_PIOA 0
mbed_official 107:414e9c822e99 56 #define IOPORT_PIOB 1
mbed_official 107:414e9c822e99 57 #define IOPORT_PIOC 2
mbed_official 107:414e9c822e99 58 #define IOPORT_PIOD 3
mbed_official 107:414e9c822e99 59 #define IOPORT_PIOE 4
mbed_official 107:414e9c822e99 60 #define IOPORT_PIOF 5
mbed_official 107:414e9c822e99 61
mbed_official 107:414e9c822e99 62 /**
mbed_official 107:414e9c822e99 63 * \weakgroup ioport_group
mbed_official 107:414e9c822e99 64 * \section ioport_modes IOPORT Modes
mbed_official 107:414e9c822e99 65 *
mbed_official 107:414e9c822e99 66 * For details on these please see the SAM Manual.
mbed_official 107:414e9c822e99 67 *
mbed_official 107:414e9c822e99 68 * @{
mbed_official 107:414e9c822e99 69 */
mbed_official 107:414e9c822e99 70
mbed_official 107:414e9c822e99 71 /** \name IOPORT Mode bit definitions */
mbed_official 107:414e9c822e99 72 /** @{ */
mbed_official 107:414e9c822e99 73 #define IOPORT_MODE_MUX_MASK (0x7 << 0) /*!< MUX bits mask */
mbed_official 107:414e9c822e99 74 #define IOPORT_MODE_MUX_BIT0 ( 1 << 0) /*!< MUX BIT0 mask */
mbed_official 107:414e9c822e99 75
mbed_official 107:414e9c822e99 76 #if SAM3N || SAM3S || SAM4S || SAM4E || SAM4N || SAM4C || SAM4CM || SAMG || SAM4CP || SAMV71 || SAMV70 || SAME70 || SAMS70
mbed_official 107:414e9c822e99 77 #define IOPORT_MODE_MUX_BIT1 ( 1 << 1) /*!< MUX BIT1 mask */
mbed_official 107:414e9c822e99 78 #endif
mbed_official 107:414e9c822e99 79
mbed_official 107:414e9c822e99 80 #define IOPORT_MODE_MUX_A ( 0 << 0) /*!< MUX function A */
mbed_official 107:414e9c822e99 81 #define IOPORT_MODE_MUX_B ( 1 << 0) /*!< MUX function B */
mbed_official 107:414e9c822e99 82
mbed_official 107:414e9c822e99 83 #if SAM3N || SAM3S || SAM4S || SAM4E || SAM4N || SAM4C || SAM4CM || SAMG || SAM4CP || SAMV71 || SAMV70 || SAME70 || SAMS70
mbed_official 107:414e9c822e99 84 #define IOPORT_MODE_MUX_C ( 2 << 0) /*!< MUX function C */
mbed_official 107:414e9c822e99 85 #define IOPORT_MODE_MUX_D ( 3 << 0) /*!< MUX function D */
mbed_official 107:414e9c822e99 86 #endif
mbed_official 107:414e9c822e99 87
mbed_official 107:414e9c822e99 88 #define IOPORT_MODE_PULLUP ( 1 << 3) /*!< Pull-up */
mbed_official 107:414e9c822e99 89
mbed_official 107:414e9c822e99 90 #if SAM3N || SAM3S || SAM4S || SAM4E || SAM4N || SAM4C || SAM4CM || SAMG || SAM4CP || SAMV71 || SAMV70 || SAME70 || SAMS70
mbed_official 107:414e9c822e99 91 #define IOPORT_MODE_PULLDOWN ( 1 << 4) /*!< Pull-down */
mbed_official 107:414e9c822e99 92 #endif
mbed_official 107:414e9c822e99 93
mbed_official 107:414e9c822e99 94 #define IOPORT_MODE_OPEN_DRAIN ( 1 << 5) /*!< Open drain */
mbed_official 107:414e9c822e99 95
mbed_official 107:414e9c822e99 96 #define IOPORT_MODE_GLITCH_FILTER ( 1 << 6) /*!< Glitch filter */
mbed_official 107:414e9c822e99 97 #define IOPORT_MODE_DEBOUNCE ( 1 << 7) /*!< Input debounce */
mbed_official 107:414e9c822e99 98 /** @} */
mbed_official 107:414e9c822e99 99
mbed_official 107:414e9c822e99 100 /** @} */
mbed_official 107:414e9c822e99 101
mbed_official 107:414e9c822e99 102 typedef uint32_t ioport_mode_t;
mbed_official 107:414e9c822e99 103 typedef uint32_t ioport_pin_t;
mbed_official 107:414e9c822e99 104 typedef uint32_t ioport_port_t;
mbed_official 107:414e9c822e99 105 typedef uint32_t ioport_port_mask_t;
mbed_official 107:414e9c822e99 106
mbed_official 107:414e9c822e99 107 __always_inline static ioport_port_t arch_ioport_pin_to_port_id(ioport_pin_t pin)
mbed_official 107:414e9c822e99 108 {
mbed_official 107:414e9c822e99 109 return pin >> 5;
mbed_official 107:414e9c822e99 110 }
mbed_official 107:414e9c822e99 111
mbed_official 107:414e9c822e99 112 __always_inline static Pio *arch_ioport_port_to_base(ioport_port_t port)
mbed_official 107:414e9c822e99 113 {
mbed_official 107:414e9c822e99 114 #if (SAM4C || SAM4CM || SAM4CP)
mbed_official 107:414e9c822e99 115 if (port == IOPORT_PIOC) {
mbed_official 107:414e9c822e99 116 return (Pio *)(uintptr_t)PIOC;
mbed_official 107:414e9c822e99 117 # ifdef ID_PIOD
mbed_official 107:414e9c822e99 118 } else if (port == IOPORT_PIOD) {
mbed_official 107:414e9c822e99 119 return (Pio *)(uintptr_t)PIOD;
mbed_official 107:414e9c822e99 120 # endif
mbed_official 107:414e9c822e99 121 } else {
mbed_official 107:414e9c822e99 122 return (Pio *)((uintptr_t)IOPORT_BASE_ADDRESS +
mbed_official 107:414e9c822e99 123 (IOPORT_PIO_OFFSET * port));
mbed_official 107:414e9c822e99 124 }
mbed_official 107:414e9c822e99 125 #else
mbed_official 107:414e9c822e99 126 return (Pio *)((uintptr_t)IOPORT_BASE_ADDRESS +
mbed_official 107:414e9c822e99 127 (IOPORT_PIO_OFFSET * port));
mbed_official 107:414e9c822e99 128 #endif
mbed_official 107:414e9c822e99 129 }
mbed_official 107:414e9c822e99 130
mbed_official 107:414e9c822e99 131 __always_inline static Pio *arch_ioport_pin_to_base(ioport_pin_t pin)
mbed_official 107:414e9c822e99 132 {
mbed_official 107:414e9c822e99 133 return arch_ioport_port_to_base(arch_ioport_pin_to_port_id(pin));
mbed_official 107:414e9c822e99 134 }
mbed_official 107:414e9c822e99 135
mbed_official 107:414e9c822e99 136 __always_inline static ioport_port_mask_t arch_ioport_pin_to_mask(ioport_pin_t pin)
mbed_official 107:414e9c822e99 137 {
mbed_official 107:414e9c822e99 138 return 1U << (pin & 0x1F);
mbed_official 107:414e9c822e99 139 }
mbed_official 107:414e9c822e99 140
mbed_official 107:414e9c822e99 141 __always_inline static void arch_ioport_init(void)
mbed_official 107:414e9c822e99 142 {
mbed_official 107:414e9c822e99 143 #ifdef ID_PIOA
mbed_official 107:414e9c822e99 144 sysclk_enable_peripheral_clock(ID_PIOA);
mbed_official 107:414e9c822e99 145 #endif
mbed_official 107:414e9c822e99 146 #ifdef ID_PIOB
mbed_official 107:414e9c822e99 147 sysclk_enable_peripheral_clock(ID_PIOB);
mbed_official 107:414e9c822e99 148 #endif
mbed_official 107:414e9c822e99 149 #ifdef ID_PIOC
mbed_official 107:414e9c822e99 150 sysclk_enable_peripheral_clock(ID_PIOC);
mbed_official 107:414e9c822e99 151 #endif
mbed_official 107:414e9c822e99 152 #ifdef ID_PIOD
mbed_official 107:414e9c822e99 153 sysclk_enable_peripheral_clock(ID_PIOD);
mbed_official 107:414e9c822e99 154 #endif
mbed_official 107:414e9c822e99 155 #ifdef ID_PIOE
mbed_official 107:414e9c822e99 156 sysclk_enable_peripheral_clock(ID_PIOE);
mbed_official 107:414e9c822e99 157 #endif
mbed_official 107:414e9c822e99 158 #ifdef ID_PIOF
mbed_official 107:414e9c822e99 159 sysclk_enable_peripheral_clock(ID_PIOF);
mbed_official 107:414e9c822e99 160 #endif
mbed_official 107:414e9c822e99 161 }
mbed_official 107:414e9c822e99 162
mbed_official 107:414e9c822e99 163 __always_inline static void arch_ioport_enable_port(ioport_port_t port,
mbed_official 107:414e9c822e99 164 ioport_port_mask_t mask)
mbed_official 107:414e9c822e99 165 {
mbed_official 107:414e9c822e99 166 arch_ioport_port_to_base(port)->PIO_PER = mask;
mbed_official 107:414e9c822e99 167 }
mbed_official 107:414e9c822e99 168
mbed_official 107:414e9c822e99 169 __always_inline static void arch_ioport_disable_port(ioport_port_t port,
mbed_official 107:414e9c822e99 170 ioport_port_mask_t mask)
mbed_official 107:414e9c822e99 171 {
mbed_official 107:414e9c822e99 172 arch_ioport_port_to_base(port)->PIO_PDR = mask;
mbed_official 107:414e9c822e99 173 }
mbed_official 107:414e9c822e99 174
mbed_official 107:414e9c822e99 175 __always_inline static void arch_ioport_enable_pin(ioport_pin_t pin)
mbed_official 107:414e9c822e99 176 {
mbed_official 107:414e9c822e99 177 arch_ioport_enable_port(arch_ioport_pin_to_port_id(pin),
mbed_official 107:414e9c822e99 178 arch_ioport_pin_to_mask(pin));
mbed_official 107:414e9c822e99 179 }
mbed_official 107:414e9c822e99 180
mbed_official 107:414e9c822e99 181 __always_inline static void arch_ioport_disable_pin(ioport_pin_t pin)
mbed_official 107:414e9c822e99 182 {
mbed_official 107:414e9c822e99 183 arch_ioport_disable_port(arch_ioport_pin_to_port_id(pin),
mbed_official 107:414e9c822e99 184 arch_ioport_pin_to_mask(pin));
mbed_official 107:414e9c822e99 185 }
mbed_official 107:414e9c822e99 186
mbed_official 107:414e9c822e99 187 __always_inline static void arch_ioport_set_port_mode(ioport_port_t port,
mbed_official 107:414e9c822e99 188 ioport_port_mask_t mask, ioport_mode_t mode)
mbed_official 107:414e9c822e99 189 {
mbed_official 107:414e9c822e99 190 Pio *base = arch_ioport_port_to_base(port);
mbed_official 107:414e9c822e99 191
mbed_official 107:414e9c822e99 192 if (mode & IOPORT_MODE_PULLUP) {
mbed_official 107:414e9c822e99 193 base->PIO_PUER = mask;
mbed_official 107:414e9c822e99 194 } else {
mbed_official 107:414e9c822e99 195 base->PIO_PUDR = mask;
mbed_official 107:414e9c822e99 196 }
mbed_official 107:414e9c822e99 197
mbed_official 107:414e9c822e99 198 #if defined(IOPORT_MODE_PULLDOWN)
mbed_official 107:414e9c822e99 199 if (mode & IOPORT_MODE_PULLDOWN) {
mbed_official 107:414e9c822e99 200 base->PIO_PPDER = mask;
mbed_official 107:414e9c822e99 201 } else {
mbed_official 107:414e9c822e99 202 base->PIO_PPDDR = mask;
mbed_official 107:414e9c822e99 203 }
mbed_official 107:414e9c822e99 204 #endif
mbed_official 107:414e9c822e99 205
mbed_official 107:414e9c822e99 206 if (mode & IOPORT_MODE_OPEN_DRAIN) {
mbed_official 107:414e9c822e99 207 base->PIO_MDER = mask;
mbed_official 107:414e9c822e99 208 } else {
mbed_official 107:414e9c822e99 209 base->PIO_MDDR = mask;
mbed_official 107:414e9c822e99 210 }
mbed_official 107:414e9c822e99 211
mbed_official 107:414e9c822e99 212 if (mode & (IOPORT_MODE_GLITCH_FILTER | IOPORT_MODE_DEBOUNCE)) {
mbed_official 107:414e9c822e99 213 base->PIO_IFER = mask;
mbed_official 107:414e9c822e99 214 } else {
mbed_official 107:414e9c822e99 215 base->PIO_IFDR = mask;
mbed_official 107:414e9c822e99 216 }
mbed_official 107:414e9c822e99 217
mbed_official 107:414e9c822e99 218 if (mode & IOPORT_MODE_DEBOUNCE) {
mbed_official 107:414e9c822e99 219 #if SAM3U || SAM3XA
mbed_official 107:414e9c822e99 220 base->PIO_DIFSR = mask;
mbed_official 107:414e9c822e99 221 #else
mbed_official 107:414e9c822e99 222 base->PIO_IFSCER = mask;
mbed_official 107:414e9c822e99 223 #endif
mbed_official 107:414e9c822e99 224 } else {
mbed_official 107:414e9c822e99 225 #if SAM3U || SAM3XA
mbed_official 107:414e9c822e99 226 base->PIO_SCIFSR = mask;
mbed_official 107:414e9c822e99 227 #else
mbed_official 107:414e9c822e99 228 base->PIO_IFSCDR = mask;
mbed_official 107:414e9c822e99 229 #endif
mbed_official 107:414e9c822e99 230 }
mbed_official 107:414e9c822e99 231
mbed_official 107:414e9c822e99 232 #if !defined(IOPORT_MODE_MUX_BIT1)
mbed_official 107:414e9c822e99 233 if (mode & IOPORT_MODE_MUX_BIT0) {
mbed_official 107:414e9c822e99 234 base->PIO_ABSR |= mask;
mbed_official 107:414e9c822e99 235 } else {
mbed_official 107:414e9c822e99 236 base->PIO_ABSR &= ~mask;
mbed_official 107:414e9c822e99 237 }
mbed_official 107:414e9c822e99 238 #else
mbed_official 107:414e9c822e99 239 if (mode & IOPORT_MODE_MUX_BIT0) {
mbed_official 107:414e9c822e99 240 base->PIO_ABCDSR[0] |= mask;
mbed_official 107:414e9c822e99 241 } else {
mbed_official 107:414e9c822e99 242 base->PIO_ABCDSR[0] &= ~mask;
mbed_official 107:414e9c822e99 243 }
mbed_official 107:414e9c822e99 244
mbed_official 107:414e9c822e99 245 if (mode & IOPORT_MODE_MUX_BIT1) {
mbed_official 107:414e9c822e99 246 base->PIO_ABCDSR[1] |= mask;
mbed_official 107:414e9c822e99 247 } else {
mbed_official 107:414e9c822e99 248 base->PIO_ABCDSR[1] &= ~mask;
mbed_official 107:414e9c822e99 249 }
mbed_official 107:414e9c822e99 250 #endif
mbed_official 107:414e9c822e99 251 }
mbed_official 107:414e9c822e99 252
mbed_official 107:414e9c822e99 253 __always_inline static void arch_ioport_set_pin_mode(ioport_pin_t pin,
mbed_official 107:414e9c822e99 254 ioport_mode_t mode)
mbed_official 107:414e9c822e99 255 {
mbed_official 107:414e9c822e99 256 arch_ioport_set_port_mode(arch_ioport_pin_to_port_id(pin),
mbed_official 107:414e9c822e99 257 arch_ioport_pin_to_mask(pin), mode);
mbed_official 107:414e9c822e99 258 }
mbed_official 107:414e9c822e99 259
mbed_official 107:414e9c822e99 260 __always_inline static void arch_ioport_set_port_dir(ioport_port_t port,
mbed_official 107:414e9c822e99 261 ioport_port_mask_t mask, enum ioport_direction group_direction)
mbed_official 107:414e9c822e99 262 {
mbed_official 107:414e9c822e99 263 Pio *base = arch_ioport_port_to_base(port);
mbed_official 107:414e9c822e99 264
mbed_official 107:414e9c822e99 265 if (group_direction == IOPORT_DIR_OUTPUT) {
mbed_official 107:414e9c822e99 266 base->PIO_OER = mask;
mbed_official 107:414e9c822e99 267 } else if (group_direction == IOPORT_DIR_INPUT) {
mbed_official 107:414e9c822e99 268 base->PIO_ODR = mask;
mbed_official 107:414e9c822e99 269 }
mbed_official 107:414e9c822e99 270
mbed_official 107:414e9c822e99 271 base->PIO_OWER = mask;
mbed_official 107:414e9c822e99 272 }
mbed_official 107:414e9c822e99 273
mbed_official 107:414e9c822e99 274 __always_inline static void arch_ioport_set_pin_dir(ioport_pin_t pin,
mbed_official 107:414e9c822e99 275 enum ioport_direction dir)
mbed_official 107:414e9c822e99 276 {
mbed_official 107:414e9c822e99 277 Pio *base = arch_ioport_pin_to_base(pin);
mbed_official 107:414e9c822e99 278
mbed_official 107:414e9c822e99 279 if (dir == IOPORT_DIR_OUTPUT) {
mbed_official 107:414e9c822e99 280 base->PIO_OER = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 281 } else if (dir == IOPORT_DIR_INPUT) {
mbed_official 107:414e9c822e99 282 base->PIO_ODR = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 283 }
mbed_official 107:414e9c822e99 284
mbed_official 107:414e9c822e99 285 base->PIO_OWER = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 286 }
mbed_official 107:414e9c822e99 287
mbed_official 107:414e9c822e99 288 __always_inline static void arch_ioport_set_pin_level(ioport_pin_t pin,
mbed_official 107:414e9c822e99 289 bool level)
mbed_official 107:414e9c822e99 290 {
mbed_official 107:414e9c822e99 291 Pio *base = arch_ioport_pin_to_base(pin);
mbed_official 107:414e9c822e99 292
mbed_official 107:414e9c822e99 293 if (level) {
mbed_official 107:414e9c822e99 294 base->PIO_SODR = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 295 } else {
mbed_official 107:414e9c822e99 296 base->PIO_CODR = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 297 }
mbed_official 107:414e9c822e99 298 }
mbed_official 107:414e9c822e99 299
mbed_official 107:414e9c822e99 300 __always_inline static void arch_ioport_set_port_level(ioport_port_t port,
mbed_official 107:414e9c822e99 301 ioport_port_mask_t mask, ioport_port_mask_t level)
mbed_official 107:414e9c822e99 302 {
mbed_official 107:414e9c822e99 303 Pio *base = arch_ioport_port_to_base(port);
mbed_official 107:414e9c822e99 304
mbed_official 107:414e9c822e99 305 base->PIO_SODR = mask & level;
mbed_official 107:414e9c822e99 306 base->PIO_CODR = mask & ~level;
mbed_official 107:414e9c822e99 307 }
mbed_official 107:414e9c822e99 308
mbed_official 107:414e9c822e99 309 __always_inline static bool arch_ioport_get_pin_level(ioport_pin_t pin)
mbed_official 107:414e9c822e99 310 {
mbed_official 107:414e9c822e99 311 return arch_ioport_pin_to_base(pin)->PIO_PDSR & arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 312 }
mbed_official 107:414e9c822e99 313
mbed_official 107:414e9c822e99 314 __always_inline static ioport_port_mask_t arch_ioport_get_port_level(
mbed_official 107:414e9c822e99 315 ioport_port_t port, ioport_port_mask_t mask)
mbed_official 107:414e9c822e99 316 {
mbed_official 107:414e9c822e99 317 return arch_ioport_port_to_base(port)->PIO_PDSR & mask;
mbed_official 107:414e9c822e99 318 }
mbed_official 107:414e9c822e99 319
mbed_official 107:414e9c822e99 320 __always_inline static void arch_ioport_toggle_pin_level(ioport_pin_t pin)
mbed_official 107:414e9c822e99 321 {
mbed_official 107:414e9c822e99 322 Pio *port = arch_ioport_pin_to_base(pin);
mbed_official 107:414e9c822e99 323 ioport_port_mask_t mask = arch_ioport_pin_to_mask(pin);
mbed_official 107:414e9c822e99 324
mbed_official 107:414e9c822e99 325 if (port->PIO_PDSR & arch_ioport_pin_to_mask(pin)) {
mbed_official 107:414e9c822e99 326 port->PIO_CODR = mask;
mbed_official 107:414e9c822e99 327 } else {
mbed_official 107:414e9c822e99 328 port->PIO_SODR = mask;
mbed_official 107:414e9c822e99 329 }
mbed_official 107:414e9c822e99 330 }
mbed_official 107:414e9c822e99 331
mbed_official 107:414e9c822e99 332 __always_inline static void arch_ioport_toggle_port_level(ioport_port_t port,
mbed_official 107:414e9c822e99 333 ioport_port_mask_t mask)
mbed_official 107:414e9c822e99 334 {
mbed_official 107:414e9c822e99 335 arch_ioport_port_to_base(port)->PIO_ODSR ^= mask;
mbed_official 107:414e9c822e99 336 }
mbed_official 107:414e9c822e99 337
mbed_official 107:414e9c822e99 338 __always_inline static void arch_ioport_set_port_sense_mode(ioport_port_t port,
mbed_official 107:414e9c822e99 339 ioport_port_mask_t mask, enum ioport_sense pin_sense)
mbed_official 107:414e9c822e99 340 {
mbed_official 107:414e9c822e99 341 Pio *base = arch_ioport_port_to_base(port);
mbed_official 107:414e9c822e99 342 /* AIMMR ELSR FRLHSR
mbed_official 107:414e9c822e99 343 * 0 X X IOPORT_SENSE_BOTHEDGES (Default)
mbed_official 107:414e9c822e99 344 * 1 0 0 IOPORT_SENSE_FALLING
mbed_official 107:414e9c822e99 345 * 1 0 1 IOPORT_SENSE_RISING
mbed_official 107:414e9c822e99 346 * 1 1 0 IOPORT_SENSE_LEVEL_LOW
mbed_official 107:414e9c822e99 347 * 1 1 1 IOPORT_SENSE_LEVEL_HIGH
mbed_official 107:414e9c822e99 348 */
mbed_official 107:414e9c822e99 349 switch(pin_sense) {
mbed_official 107:414e9c822e99 350 case IOPORT_SENSE_LEVEL_LOW:
mbed_official 107:414e9c822e99 351 base->PIO_LSR = mask;
mbed_official 107:414e9c822e99 352 base->PIO_FELLSR = mask;
mbed_official 107:414e9c822e99 353 break;
mbed_official 107:414e9c822e99 354 case IOPORT_SENSE_LEVEL_HIGH:
mbed_official 107:414e9c822e99 355 base->PIO_LSR = mask;
mbed_official 107:414e9c822e99 356 base->PIO_REHLSR = mask;
mbed_official 107:414e9c822e99 357 break;
mbed_official 107:414e9c822e99 358 case IOPORT_SENSE_FALLING:
mbed_official 107:414e9c822e99 359 base->PIO_ESR = mask;
mbed_official 107:414e9c822e99 360 base->PIO_FELLSR = mask;
mbed_official 107:414e9c822e99 361 break;
mbed_official 107:414e9c822e99 362 case IOPORT_SENSE_RISING:
mbed_official 107:414e9c822e99 363 base->PIO_ESR = mask;
mbed_official 107:414e9c822e99 364 base->PIO_REHLSR = mask;
mbed_official 107:414e9c822e99 365 break;
mbed_official 107:414e9c822e99 366 default:
mbed_official 107:414e9c822e99 367 base->PIO_AIMDR = mask;
mbed_official 107:414e9c822e99 368 return;
mbed_official 107:414e9c822e99 369 }
mbed_official 107:414e9c822e99 370 base->PIO_AIMER = mask;
mbed_official 107:414e9c822e99 371 }
mbed_official 107:414e9c822e99 372
mbed_official 107:414e9c822e99 373 __always_inline static void arch_ioport_set_pin_sense_mode(ioport_pin_t pin,
mbed_official 107:414e9c822e99 374 enum ioport_sense pin_sense)
mbed_official 107:414e9c822e99 375 {
mbed_official 107:414e9c822e99 376 arch_ioport_set_port_sense_mode(arch_ioport_pin_to_port_id(pin),
mbed_official 107:414e9c822e99 377 arch_ioport_pin_to_mask(pin), pin_sense);
mbed_official 107:414e9c822e99 378 }
mbed_official 107:414e9c822e99 379
mbed_official 107:414e9c822e99 380 #endif /* IOPORT_SAM_H */