mbed library sources. Supersedes mbed-src.

Dependents:   Hobbyking_Cheetah_Compact Hobbyking_Cheetah_Compact_DRV8323_14bit Hobbyking_Cheetah_Compact_DRV8323_V51_201907 HKC_MiniCheetah ... more

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 35 #include "analogin_api.h"
bogdanm 0:9b334a45a8ff 36 #include "clkman_regs.h"
bogdanm 0:9b334a45a8ff 37 #include "pwrman_regs.h"
bogdanm 0:9b334a45a8ff 38 #include "afe_regs.h"
bogdanm 0:9b334a45a8ff 39 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #define PGA_TRK_CNT 0x1F
bogdanm 0:9b334a45a8ff 42 #define ADC_ACT_CNT 0x1
bogdanm 0:9b334a45a8ff 43 #define ADC_PGA_CNT 0x1
bogdanm 0:9b334a45a8ff 44 #define ADC_ACQ_CNT 0x1
bogdanm 0:9b334a45a8ff 45 #define ADC_SLP_CNT 0x1
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 //******************************************************************************
bogdanm 0:9b334a45a8ff 48 void analogin_init(analogin_t *obj, PinName pin)
bogdanm 0:9b334a45a8ff 49 {
bogdanm 0:9b334a45a8ff 50 // Make sure pin is an analog pin we can use for ADC
bogdanm 0:9b334a45a8ff 51 MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC);
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 // Set the object pointer
bogdanm 0:9b334a45a8ff 54 obj->adc = MXC_ADC;
bogdanm 0:9b334a45a8ff 55 obj->adccfg = MXC_ADCCFG;
bogdanm 0:9b334a45a8ff 56 obj->adc_fifo = MXC_ADC_FIFO;
bogdanm 0:9b334a45a8ff 57 obj->adc_pin = pin;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 // Set the ADC clock to the system clock frequency
bogdanm 0:9b334a45a8ff 60 MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT,
bogdanm 0:9b334a45a8ff 61 (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM <<
bogdanm 0:9b334a45a8ff 62 MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)));
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 // Enable AFE power
bogdanm 0:9b334a45a8ff 65 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 // Setup and hold window
bogdanm 0:9b334a45a8ff 68 MXC_SET_FIELD(&obj->adc->tg_ctrl0, MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT, PGA_TRK_CNT);
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 // Setup sampling count and timing
bogdanm 0:9b334a45a8ff 71 MXC_SET_FIELD(&obj->adc->tg_ctrl1, (MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT |
bogdanm 0:9b334a45a8ff 72 MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT | MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT),
bogdanm 0:9b334a45a8ff 73 ((ADC_PGA_CNT << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS) |
bogdanm 0:9b334a45a8ff 74 (ADC_ACQ_CNT << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS) |
bogdanm 0:9b334a45a8ff 75 (ADC_SLP_CNT << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS) |
bogdanm 0:9b334a45a8ff 76 (MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT)));
bogdanm 0:9b334a45a8ff 77 }
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 //******************************************************************************
bogdanm 0:9b334a45a8ff 80 float analogin_read(analogin_t *obj)
bogdanm 0:9b334a45a8ff 81 {
bogdanm 0:9b334a45a8ff 82 // Convert integer to float
bogdanm 0:9b334a45a8ff 83 return (((float)analogin_read_u16(obj)/(float)0xFFFF));
bogdanm 0:9b334a45a8ff 84 }
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 //******************************************************************************
bogdanm 0:9b334a45a8ff 87 uint16_t analogin_read_u16(analogin_t *obj)
bogdanm 0:9b334a45a8ff 88 {
bogdanm 0:9b334a45a8ff 89 // Set the pin to take readings from
bogdanm 0:9b334a45a8ff 90 unsigned mux_pos;
bogdanm 0:9b334a45a8ff 91 unsigned diff = 0;
bogdanm 0:9b334a45a8ff 92 if(obj->adc_pin >> PORT_SHIFT == 0xB) {
bogdanm 0:9b334a45a8ff 93 mux_pos = (obj->adc_pin & 0xF) + 8;
bogdanm 0:9b334a45a8ff 94 } else {
bogdanm 0:9b334a45a8ff 95 mux_pos = (obj->adc_pin & 0xF);
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 if(obj->adc_pin >> PORT_SHIFT == 0xC) {
bogdanm 0:9b334a45a8ff 99 diff = 1;
bogdanm 0:9b334a45a8ff 100 mux_pos = (obj->adc_pin & 0xF) + 8;
bogdanm 0:9b334a45a8ff 101 }
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 // Reset the ADC
bogdanm 0:9b334a45a8ff 104 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 // Enable the ADC
bogdanm 0:9b334a45a8ff 107 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 // Setup the ADC clock
bogdanm 0:9b334a45a8ff 110 MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
bogdanm 0:9b334a45a8ff 111 MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
bogdanm 0:9b334a45a8ff 112 ((MXC_E_ADC_MODE_SMPLCNT_FULL_RATE << MXC_F_ADC_CTRL0_ADC_MODE_POS) |
bogdanm 0:9b334a45a8ff 113 (MXC_E_ADC_AVG_MODE_FILTER_OUTPUT << MXC_F_ADC_CTRL0_AVG_MODE_POS) |
bogdanm 0:9b334a45a8ff 114 (0x2 << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS) |
bogdanm 0:9b334a45a8ff 115 MXC_F_ADC_CTRL0_ADC_CLK_EN));
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 // Setup the input multiplexor
bogdanm 0:9b334a45a8ff 118 MXC_SET_FIELD(&obj->adc->pga_ctrl, (MXC_F_ADC_PGA_CTRL_MUX_CH_SEL |
bogdanm 0:9b334a45a8ff 119 MXC_F_ADC_PGA_CTRL_MUX_DIFF | MXC_F_ADC_PGA_CTRL_PGA_GAIN),
bogdanm 0:9b334a45a8ff 120 ((mux_pos << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS) |
bogdanm 0:9b334a45a8ff 121 (diff << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS)));
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 // Setup voltage reference
bogdanm 0:9b334a45a8ff 124 MXC_SET_FIELD(&MXC_AFE->ctrl1, MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL,
bogdanm 0:9b334a45a8ff 125 (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
bogdanm 0:9b334a45a8ff 126 (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 // Clear the done bit
bogdanm 0:9b334a45a8ff 129 obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 // Take one sample
bogdanm 0:9b334a45a8ff 132 obj->adc->tg_ctrl0 |= (1 << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS);
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 // Set the start bit to take the sample
bogdanm 0:9b334a45a8ff 135 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_START;
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 // Wait for the conversion to complete
bogdanm 0:9b334a45a8ff 138 while(!(obj->adc->intr & MXC_F_ADC_INTR_DONE_IF)) {}
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 // Get sample from the fifo
bogdanm 0:9b334a45a8ff 141 uint16_t sample = (uint16_t)(obj->adc->out & 0xFFFF);
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 // Disable ADC
bogdanm 0:9b334a45a8ff 144 obj->adc->ctrl0 &= ~MXC_F_ADC_CTRL0_CPU_ADC_EN;
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 return (sample - 1);
bogdanm 0:9b334a45a8ff 147 }