Ben Katz / mbed-dev-f303

mbed library sources. Supersedes mbed-src.

Dependents:   Hobbyking_Cheetah_Compact Hobbyking_Cheetah_Compact_DRV8323_14bit Hobbyking_Cheetah_Compact_DRV8323_V51_201907 HKC_MiniCheetah ... more

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32620/us_ticker.c@181:36facd806e4a, 2018-07-30 (annotated)

Committer:
benkatz
Date:
Mon Jul 30 20:31:44 2018 +0000
Revision:
181:36facd806e4a
Parent:
174:b96e65c34a4d 
going on the robot.  fixed a dumb bug in float_to_uint

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*******************************************************************************
<> 149:156823d33999 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 149:156823d33999 5 * copy of this software and associated documentation files (the "Software"),
<> 149:156823d33999 6 * to deal in the Software without restriction, including without limitation
<> 149:156823d33999 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 149:156823d33999 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 149:156823d33999 9 * Software is furnished to do so, subject to the following conditions:
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * The above copyright notice and this permission notice shall be included
<> 149:156823d33999 12 * in all copies or substantial portions of the Software.
<> 149:156823d33999 13 *
<> 149:156823d33999 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 149:156823d33999 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 149:156823d33999 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 149:156823d33999 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 149:156823d33999 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 149:156823d33999 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 149:156823d33999 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 149:156823d33999 21 *
<> 149:156823d33999 22 * Except as contained in this notice, the name of Maxim Integrated
<> 149:156823d33999 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 149:156823d33999 24 * Products, Inc. Branding Policy.
<> 149:156823d33999 25 *
<> 149:156823d33999 26 * The mere transfer of this software does not imply any licenses
<> 149:156823d33999 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 149:156823d33999 28 * trademarks, maskwork rights, or any other form of intellectual
<> 149:156823d33999 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 149:156823d33999 30 * ownership rights.
<> 149:156823d33999 31 *******************************************************************************
<> 149:156823d33999 32 */
<> 149:156823d33999 33
<> 149:156823d33999 34 #include "mbed_error.h"
<> 149:156823d33999 35 #include "us_ticker_api.h"
<> 149:156823d33999 36 #include "PeripheralNames.h"
<> 149:156823d33999 37 #include "tmr_regs.h"
<> 149:156823d33999 38 #include "clkman_regs.h"
<> 149:156823d33999 39
<> 149:156823d33999 40 #define US_TIMER MXC_TMR0
<> 149:156823d33999 41 #define US_TIMER_IRQn TMR0_0_IRQn
<> 149:156823d33999 42
<> 149:156823d33999 43 /**
<> 149:156823d33999 44 * Defines timer modes for 16 and 32-bit timers
<> 149:156823d33999 45 */
<> 149:156823d33999 46 typedef enum {
<> 149:156823d33999 47 /** 32-bit or 16-bit timer one-shot mode */
<> 149:156823d33999 48 MXC_E_TMR_MODE_ONE_SHOT = 0,
<> 149:156823d33999 49 /** 32-bit or 16-bit timer one-shot mode */
<> 149:156823d33999 50 MXC_E_TMR_MODE_CONTINUOUS,
<> 149:156823d33999 51 /** 32-bit timer counter mode */
<> 149:156823d33999 52 MXC_E_TMR_MODE_COUNTER,
<> 149:156823d33999 53 /** 32-bit timer pulse width modulation mode */
<> 149:156823d33999 54 MXC_E_TMR_MODE_PWM,
<> 149:156823d33999 55 /** 32-bit timer capture mode */
<> 149:156823d33999 56 MXC_E_TMR_MODE_CAPTURE,
<> 149:156823d33999 57 /** 32-bit timer compare mode */
<> 149:156823d33999 58 MXC_E_TMR_MODE_COMPARE,
<> 149:156823d33999 59 /** 32-bit timer gated mode */
<> 149:156823d33999 60 MXC_E_TMR_MODE_GATED,
<> 149:156823d33999 61 /** 32-bit timer measure mode */
<> 149:156823d33999 62 MXC_E_TMR_MODE_MEASURE
<> 149:156823d33999 63 } mxc_tmr_mode_t;
<> 149:156823d33999 64
<> 149:156823d33999 65 static int us_ticker_inited = 0;
<> 149:156823d33999 66 static uint32_t ticks_per_us;
<> 149:156823d33999 67 static uint32_t tick_win;
<> 149:156823d33999 68 static volatile uint64_t current_cnt; // Hold the current ticks
<> 149:156823d33999 69 static volatile uint64_t event_cnt; // Holds the value of the next event
<> 149:156823d33999 70
<> 149:156823d33999 71 #define ticks_to_us(ticks) ((ticks) / ticks_per_us);
<> 149:156823d33999 72 #define MAX_TICK_VAL ((uint64_t)0xFFFFFFFF * ticks_per_us)
<> 149:156823d33999 73
<> 149:156823d33999 74 //******************************************************************************
<> 149:156823d33999 75 static inline void inc_current_cnt(uint32_t inc)
<> 149:156823d33999 76 {
<> 149:156823d33999 77
<> 149:156823d33999 78 // Overflow the ticker when the us ticker overflows
<> 149:156823d33999 79 current_cnt += inc;
<> 149:156823d33999 80 if (current_cnt > MAX_TICK_VAL) {
<> 149:156823d33999 81 current_cnt -= (MAX_TICK_VAL + 1);
<> 149:156823d33999 82 }
<> 149:156823d33999 83 }
<> 149:156823d33999 84
<> 149:156823d33999 85 //******************************************************************************
<> 149:156823d33999 86 static inline int event_passed(uint64_t current, uint64_t event)
<> 149:156823d33999 87 {
<> 149:156823d33999 88
<> 149:156823d33999 89 // Determine if the event has already happened.
<> 149:156823d33999 90 // If the event is behind the current ticker, within a window,
<> 149:156823d33999 91 // then the event has already happened.
<> 149:156823d33999 92 if (((current < tick_win) && ((event < current) ||
<> 149:156823d33999 93 (event > (MAX_TICK_VAL - (tick_win - current))))) ||
<> 149:156823d33999 94 ((event < current) && (event > (current - tick_win)))) {
<> 149:156823d33999 95 return 1;
<> 149:156823d33999 96 }
<> 149:156823d33999 97
<> 149:156823d33999 98 return 0;
<> 149:156823d33999 99 }
<> 149:156823d33999 100
<> 149:156823d33999 101 //******************************************************************************
<> 149:156823d33999 102 static inline uint64_t event_diff(uint64_t current, uint64_t event)
<> 149:156823d33999 103 {
<> 149:156823d33999 104
<> 149:156823d33999 105 // Check to see if the ticker will overflow before the event
<> 149:156823d33999 106 if(current <= event) {
<> 149:156823d33999 107 return (event - current);
<> 149:156823d33999 108 }
<> 149:156823d33999 109
<> 149:156823d33999 110 return ((MAX_TICK_VAL - current) + event);
<> 149:156823d33999 111 }
<> 149:156823d33999 112
<> 149:156823d33999 113 //******************************************************************************
<> 149:156823d33999 114 static void tmr_handler(void)
<> 149:156823d33999 115 {
<> 149:156823d33999 116 uint32_t term_cnt32 = US_TIMER->term_cnt32;
<> 149:156823d33999 117 US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
<> 149:156823d33999 118 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 149:156823d33999 119 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 149:156823d33999 120
<> 149:156823d33999 121 inc_current_cnt(term_cnt32);
<> 149:156823d33999 122
<> 149:156823d33999 123 if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
<> 149:156823d33999 124 // the timestamp has expired
<> 149:156823d33999 125 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 149:156823d33999 126 us_ticker_irq_handler();
<> 149:156823d33999 127 } else {
<> 149:156823d33999 128
<> 149:156823d33999 129 uint64_t diff = event_diff(current_cnt, event_cnt);
<> 149:156823d33999 130 if (diff < (uint64_t)0xFFFFFFFF) {
<> 149:156823d33999 131 // the event occurs before the next overflow
<> 149:156823d33999 132 US_TIMER->term_cnt32 = diff;
<> 149:156823d33999 133
<> 149:156823d33999 134 // Since the timer keeps counting after the terminal value is reached, it is possible that the new
<> 149:156823d33999 135 // terminal value is in the past.
<> 149:156823d33999 136 if (US_TIMER->term_cnt32 < US_TIMER->count32) {
<> 149:156823d33999 137 // the timestamp has expired
<> 149:156823d33999 138 US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
<> 149:156823d33999 139 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 149:156823d33999 140 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 149:156823d33999 141 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 149:156823d33999 142 us_ticker_irq_handler();
<> 149:156823d33999 143 }
<> 149:156823d33999 144 }
<> 149:156823d33999 145 }
<> 149:156823d33999 146 }
<> 149:156823d33999 147
<> 149:156823d33999 148 //******************************************************************************
<> 149:156823d33999 149 void us_ticker_init(void)
<> 149:156823d33999 150 {
<> 149:156823d33999 151 if (us_ticker_inited)
<> 149:156823d33999 152 return;
<> 149:156823d33999 153 us_ticker_inited = 1;
<> 149:156823d33999 154
<> 149:156823d33999 155 /* Ensure that the TIMER0 clock is enabled */
<> 149:156823d33999 156 if (!(MXC_CLKMAN->clk_gate_ctrl1 & MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER)) {
<> 149:156823d33999 157 MXC_CLKMAN->clk_gate_ctrl1 |= (2 << MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER_POS);
<> 149:156823d33999 158 }
<> 149:156823d33999 159
<> 149:156823d33999 160 current_cnt = 0;
<> 149:156823d33999 161 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 149:156823d33999 162
<> 149:156823d33999 163 if (SystemCoreClock <= 1000000) {
<> 149:156823d33999 164 error("us_ticker cannot operate at this SystemCoreClock");
<> 149:156823d33999 165 return;
<> 149:156823d33999 166 }
<> 149:156823d33999 167
<> 149:156823d33999 168 // Configure timer for 32-bit continuous mode with /1 prescaler
<> 149:156823d33999 169 US_TIMER->ctrl = MXC_E_TMR_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS | (0 << MXC_F_TMR_CTRL_PRESCALE_POS);
<> 149:156823d33999 170 ticks_per_us = SystemCoreClock / 1000000;
<> 149:156823d33999 171
<> 149:156823d33999 172 // Set the tick window to 10ms
<> 149:156823d33999 173 tick_win = SystemCoreClock/100;
<> 149:156823d33999 174
<> 149:156823d33999 175 // Set timer overflow to the max
<> 149:156823d33999 176 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 149:156823d33999 177 US_TIMER->pwm_cap32 = 0xFFFFFFFF;
<> 149:156823d33999 178 US_TIMER->count32 = 0;
<> 149:156823d33999 179
<> 149:156823d33999 180 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear pending interrupts
<> 149:156823d33999 181
<> 149:156823d33999 182 NVIC_SetVector(US_TIMER_IRQn, (uint32_t)tmr_handler);
<> 149:156823d33999 183 NVIC_EnableIRQ(US_TIMER_IRQn);
<> 149:156823d33999 184
<> 149:156823d33999 185 US_TIMER->inten |= MXC_F_TMR_INTEN_TIMER0; // enable interrupts
<> 149:156823d33999 186 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 149:156823d33999 187 }
<> 149:156823d33999 188
<> 149:156823d33999 189 //******************************************************************************
<> 149:156823d33999 190 void us_ticker_deinit(void)
<> 149:156823d33999 191 {
<> 149:156823d33999 192 US_TIMER->ctrl = 0; // disable timer
<> 149:156823d33999 193 US_TIMER->inten = 0; // disable interrupts
<> 149:156823d33999 194 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupts
<> 149:156823d33999 195 us_ticker_inited = 0;
<> 149:156823d33999 196 }
<> 149:156823d33999 197
<> 149:156823d33999 198 //******************************************************************************
<> 149:156823d33999 199 uint32_t us_ticker_read(void)
<> 149:156823d33999 200 {
<> 149:156823d33999 201 uint64_t current_cnt1, current_cnt2;
<> 149:156823d33999 202 uint32_t term_cnt, tmr_cnt;
<> 149:156823d33999 203 uint32_t intfl1, intfl2;
<> 149:156823d33999 204
<> 149:156823d33999 205 if (!us_ticker_inited)
<> 149:156823d33999 206 us_ticker_init();
<> 149:156823d33999 207
<> 149:156823d33999 208 // Ensure coherency between current_cnt and US_TIMER->count32
<> 149:156823d33999 209 do {
<> 149:156823d33999 210 current_cnt1 = current_cnt;
<> 149:156823d33999 211 intfl1 = US_TIMER->intfl;
<> 149:156823d33999 212 term_cnt = US_TIMER->term_cnt32;
<> 149:156823d33999 213 tmr_cnt = US_TIMER->count32;
<> 149:156823d33999 214 intfl2 = US_TIMER->intfl;
<> 149:156823d33999 215 current_cnt2 = current_cnt;
<> 149:156823d33999 216 } while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2));
<> 149:156823d33999 217
<> 149:156823d33999 218 // Account for an unserviced interrupt
<> 149:156823d33999 219 if (intfl1) {
<> 149:156823d33999 220 current_cnt1 += term_cnt;
<> 149:156823d33999 221 }
<> 149:156823d33999 222
<> 149:156823d33999 223 current_cnt1 += tmr_cnt;
<> 149:156823d33999 224
<> 149:156823d33999 225 return (current_cnt1 / ticks_per_us);
<> 149:156823d33999 226 }
<> 149:156823d33999 227
<> 149:156823d33999 228 //******************************************************************************
<> 149:156823d33999 229 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 230 {
<> 149:156823d33999 231 // Note: interrupts are disabled before this function is called.
<> 149:156823d33999 232
<> 149:156823d33999 233 US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
<> 149:156823d33999 234
<> 149:156823d33999 235 if (US_TIMER->intfl) {
<> 149:156823d33999 236 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 149:156823d33999 237 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 149:156823d33999 238 inc_current_cnt(US_TIMER->term_cnt32);
<> 149:156823d33999 239 }
<> 149:156823d33999 240
<> 149:156823d33999 241 // add and reset the current count value
<> 149:156823d33999 242 inc_current_cnt(US_TIMER->count32);
<> 149:156823d33999 243 US_TIMER->count32 = 0;
<> 149:156823d33999 244
<> 149:156823d33999 245 // add the number of cycles that the timer is disabled here for
<> 149:156823d33999 246 inc_current_cnt(200);
<> 149:156823d33999 247
<> 149:156823d33999 248 event_cnt = (uint64_t)timestamp * ticks_per_us;
<> 149:156823d33999 249
<> 149:156823d33999 250 // Check to see if the event has already passed
<> 149:156823d33999 251 if (!event_passed(current_cnt, event_cnt)) {
<> 149:156823d33999 252 uint64_t diff = event_diff(current_cnt, event_cnt);
<> 149:156823d33999 253 if (diff < (uint64_t)0xFFFFFFFF) {
<> 149:156823d33999 254 // the event occurs before the next overflow
<> 149:156823d33999 255 US_TIMER->term_cnt32 = diff;
<> 149:156823d33999 256 } else {
<> 149:156823d33999 257 // the event occurs after the next overflow
<> 149:156823d33999 258 US_TIMER->term_cnt32 = 0xFFFFFFFF; // set to max
<> 149:156823d33999 259 }
<> 149:156823d33999 260 } else {
<> 149:156823d33999 261 // the requested timestamp occurs in the past
<> 149:156823d33999 262 // set the timer up to immediately expire
<> 149:156823d33999 263 US_TIMER->term_cnt32 = 1;
<> 149:156823d33999 264 }
<> 149:156823d33999 265 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 149:156823d33999 266 }
<> 149:156823d33999 267
AnnaBridge 174:b96e65c34a4d 268 void us_ticker_fire_interrupt(void)
AnnaBridge 174:b96e65c34a4d 269 {
AnnaBridge 174:b96e65c34a4d 270 NVIC_SetPendingIRQ(US_TIMER_IRQn);
AnnaBridge 174:b96e65c34a4d 271 }
AnnaBridge 174:b96e65c34a4d 272
<> 149:156823d33999 273 //******************************************************************************
<> 149:156823d33999 274 void us_ticker_disable_interrupt(void)
<> 149:156823d33999 275 {
<> 149:156823d33999 276 // There are no more events, set timer overflow to the max
<> 149:156823d33999 277 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 149:156823d33999 278 }
<> 149:156823d33999 279
<> 149:156823d33999 280 //******************************************************************************
<> 149:156823d33999 281 void us_ticker_clear_interrupt(void)
<> 149:156823d33999 282 {
<> 149:156823d33999 283 // cleared in the local handler
<> 149:156823d33999 284 }
<> 149:156823d33999 285
<> 149:156823d33999 286 //******************************************************************************
<> 149:156823d33999 287 void us_ticker_set(timestamp_t timestamp)
<> 149:156823d33999 288 {
<> 149:156823d33999 289 US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
<> 149:156823d33999 290 current_cnt = (uint64_t)timestamp * ticks_per_us;
<> 149:156823d33999 291 US_TIMER->count32 = 0;
<> 149:156823d33999 292 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 149:156823d33999 293 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 149:156823d33999 294
<> 149:156823d33999 295 if (((uint64_t)timestamp * ticks_per_us) >= event_cnt) {
<> 149:156823d33999 296 // The next timestamp has elapsed. Trigger the interrupt to handle it.
<> 149:156823d33999 297 NVIC_SetPendingIRQ(US_TIMER_IRQn);
<> 149:156823d33999 298 }
<> 149:156823d33999 299 }