Ben Katz / mbed-dev-f303

mbed library sources. Supersedes mbed-src.

Dependents:   Hobbyking_Cheetah_Compact Hobbyking_Cheetah_Compact_DRV8323_14bit Hobbyking_Cheetah_Compact_DRV8323_V51_201907 HKC_MiniCheetah ... more

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cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/cmsis_armclang.h@181:36facd806e4a, 2018-07-30 (annotated)

Committer:
benkatz
Date:
Mon Jul 30 20:31:44 2018 +0000
Revision:
181:36facd806e4a
Parent:
167:e84263d55307 
going on the robot.  fixed a dumb bug in float_to_uint

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /**************************************************************************//**
AnnaBridge 167:e84263d55307 2 * @file cmsis_armclang.h
AnnaBridge 167:e84263d55307 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 167:e84263d55307 4 * @version V5.0.3
AnnaBridge 167:e84263d55307 5 * @date 27. March 2017
AnnaBridge 167:e84263d55307 6 ******************************************************************************/
AnnaBridge 167:e84263d55307 7 /*
AnnaBridge 167:e84263d55307 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 167:e84263d55307 9 *
AnnaBridge 167:e84263d55307 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 167:e84263d55307 11 *
AnnaBridge 167:e84263d55307 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 167:e84263d55307 13 * not use this file except in compliance with the License.
AnnaBridge 167:e84263d55307 14 * You may obtain a copy of the License at
AnnaBridge 167:e84263d55307 15 *
AnnaBridge 167:e84263d55307 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 167:e84263d55307 17 *
AnnaBridge 167:e84263d55307 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 167:e84263d55307 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 167:e84263d55307 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 167:e84263d55307 21 * See the License for the specific language governing permissions and
AnnaBridge 167:e84263d55307 22 * limitations under the License.
AnnaBridge 167:e84263d55307 23 */
AnnaBridge 167:e84263d55307 24
AnnaBridge 167:e84263d55307 25 //lint -esym(9058, IRQn) disable MISRA 2012 Rule 2.4 for IRQn
AnnaBridge 167:e84263d55307 26
AnnaBridge 167:e84263d55307 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 167:e84263d55307 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 167:e84263d55307 29
AnnaBridge 167:e84263d55307 30 #ifndef __ARM_COMPAT_H
AnnaBridge 167:e84263d55307 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 167:e84263d55307 32 #endif
AnnaBridge 167:e84263d55307 33
AnnaBridge 167:e84263d55307 34 /* CMSIS compiler specific defines */
AnnaBridge 167:e84263d55307 35 #ifndef __ASM
AnnaBridge 167:e84263d55307 36 #define __ASM __asm
AnnaBridge 167:e84263d55307 37 #endif
AnnaBridge 167:e84263d55307 38 #ifndef __INLINE
AnnaBridge 167:e84263d55307 39 #define __INLINE __inline
AnnaBridge 167:e84263d55307 40 #endif
AnnaBridge 167:e84263d55307 41 #ifndef __STATIC_INLINE
AnnaBridge 167:e84263d55307 42 #define __STATIC_INLINE static __inline
AnnaBridge 167:e84263d55307 43 #endif
AnnaBridge 167:e84263d55307 44 #ifndef __NO_RETURN
AnnaBridge 167:e84263d55307 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 167:e84263d55307 46 #endif
AnnaBridge 167:e84263d55307 47 #ifndef __USED
AnnaBridge 167:e84263d55307 48 #define __USED __attribute__((used))
AnnaBridge 167:e84263d55307 49 #endif
AnnaBridge 167:e84263d55307 50 #ifndef __WEAK
AnnaBridge 167:e84263d55307 51 #define __WEAK __attribute__((weak))
AnnaBridge 167:e84263d55307 52 #endif
AnnaBridge 167:e84263d55307 53 #ifndef __PACKED
AnnaBridge 167:e84263d55307 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 167:e84263d55307 55 #endif
AnnaBridge 167:e84263d55307 56 #ifndef __PACKED_STRUCT
AnnaBridge 167:e84263d55307 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 167:e84263d55307 58 #endif
AnnaBridge 167:e84263d55307 59 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 167:e84263d55307 60 #pragma clang diagnostic push
AnnaBridge 167:e84263d55307 61 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 167:e84263d55307 62 //lint -esym(9058, T_UINT32) disable MISRA 2012 Rule 2.4 for T_UINT32
AnnaBridge 167:e84263d55307 63 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 167:e84263d55307 64 #pragma clang diagnostic pop
AnnaBridge 167:e84263d55307 65 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 167:e84263d55307 66 #endif
AnnaBridge 167:e84263d55307 67 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 167:e84263d55307 68 #pragma clang diagnostic push
AnnaBridge 167:e84263d55307 69 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 167:e84263d55307 70 //lint -esym(9058, T_UINT16_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE
AnnaBridge 167:e84263d55307 71 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 167:e84263d55307 72 #pragma clang diagnostic pop
AnnaBridge 167:e84263d55307 73 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 167:e84263d55307 74 #endif
AnnaBridge 167:e84263d55307 75 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 167:e84263d55307 76 #pragma clang diagnostic push
AnnaBridge 167:e84263d55307 77 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 167:e84263d55307 78 //lint -esym(9058, T_UINT16_READ) disable MISRA 2012 Rule 2.4 for T_UINT16_READ
AnnaBridge 167:e84263d55307 79 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 167:e84263d55307 80 #pragma clang diagnostic pop
AnnaBridge 167:e84263d55307 81 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 167:e84263d55307 82 #endif
AnnaBridge 167:e84263d55307 83 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 167:e84263d55307 84 #pragma clang diagnostic push
AnnaBridge 167:e84263d55307 85 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 167:e84263d55307 86 //lint -esym(9058, T_UINT32_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE
AnnaBridge 167:e84263d55307 87 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 167:e84263d55307 88 #pragma clang diagnostic pop
AnnaBridge 167:e84263d55307 89 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 167:e84263d55307 90 #endif
AnnaBridge 167:e84263d55307 91 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 167:e84263d55307 92 #pragma clang diagnostic push
AnnaBridge 167:e84263d55307 93 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 167:e84263d55307 94 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 167:e84263d55307 95 #pragma clang diagnostic pop
AnnaBridge 167:e84263d55307 96 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 167:e84263d55307 97 #endif
AnnaBridge 167:e84263d55307 98 #ifndef __ALIGNED
AnnaBridge 167:e84263d55307 99 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 167:e84263d55307 100 #endif
AnnaBridge 167:e84263d55307 101
AnnaBridge 167:e84263d55307 102
AnnaBridge 167:e84263d55307 103 /* ########################### Core Function Access ########################### */
AnnaBridge 167:e84263d55307 104 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 167:e84263d55307 105 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 167:e84263d55307 106 @{
AnnaBridge 167:e84263d55307 107 */
AnnaBridge 167:e84263d55307 108
AnnaBridge 167:e84263d55307 109 /**
AnnaBridge 167:e84263d55307 110 \brief Enable IRQ Interrupts
AnnaBridge 167:e84263d55307 111 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 167:e84263d55307 112 Can only be executed in Privileged modes.
AnnaBridge 167:e84263d55307 113 */
AnnaBridge 167:e84263d55307 114 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 167:e84263d55307 115
AnnaBridge 167:e84263d55307 116
AnnaBridge 167:e84263d55307 117 /**
AnnaBridge 167:e84263d55307 118 \brief Disable IRQ Interrupts
AnnaBridge 167:e84263d55307 119 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 167:e84263d55307 120 Can only be executed in Privileged modes.
AnnaBridge 167:e84263d55307 121 */
AnnaBridge 167:e84263d55307 122 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 167:e84263d55307 123
AnnaBridge 167:e84263d55307 124
AnnaBridge 167:e84263d55307 125 /**
AnnaBridge 167:e84263d55307 126 \brief Get Control Register
AnnaBridge 167:e84263d55307 127 \details Returns the content of the Control Register.
AnnaBridge 167:e84263d55307 128 \return Control Register value
AnnaBridge 167:e84263d55307 129 */
AnnaBridge 167:e84263d55307 130 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 167:e84263d55307 131 {
AnnaBridge 167:e84263d55307 132 uint32_t result;
AnnaBridge 167:e84263d55307 133
AnnaBridge 167:e84263d55307 134 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 167:e84263d55307 135 return(result);
AnnaBridge 167:e84263d55307 136 }
AnnaBridge 167:e84263d55307 137
AnnaBridge 167:e84263d55307 138
AnnaBridge 167:e84263d55307 139 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 140 /**
AnnaBridge 167:e84263d55307 141 \brief Get Control Register (non-secure)
AnnaBridge 167:e84263d55307 142 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 167:e84263d55307 143 \return non-secure Control Register value
AnnaBridge 167:e84263d55307 144 */
AnnaBridge 167:e84263d55307 145 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 167:e84263d55307 146 {
AnnaBridge 167:e84263d55307 147 uint32_t result;
AnnaBridge 167:e84263d55307 148
AnnaBridge 167:e84263d55307 149 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 150 return(result);
AnnaBridge 167:e84263d55307 151 }
AnnaBridge 167:e84263d55307 152 #endif
AnnaBridge 167:e84263d55307 153
AnnaBridge 167:e84263d55307 154
AnnaBridge 167:e84263d55307 155 /**
AnnaBridge 167:e84263d55307 156 \brief Set Control Register
AnnaBridge 167:e84263d55307 157 \details Writes the given value to the Control Register.
AnnaBridge 167:e84263d55307 158 \param [in] control Control Register value to set
AnnaBridge 167:e84263d55307 159 */
AnnaBridge 167:e84263d55307 160 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 167:e84263d55307 161 {
AnnaBridge 167:e84263d55307 162 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 167:e84263d55307 163 }
AnnaBridge 167:e84263d55307 164
AnnaBridge 167:e84263d55307 165
AnnaBridge 167:e84263d55307 166 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 167 /**
AnnaBridge 167:e84263d55307 168 \brief Set Control Register (non-secure)
AnnaBridge 167:e84263d55307 169 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 167:e84263d55307 170 \param [in] control Control Register value to set
AnnaBridge 167:e84263d55307 171 */
AnnaBridge 167:e84263d55307 172 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 167:e84263d55307 173 {
AnnaBridge 167:e84263d55307 174 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 167:e84263d55307 175 }
AnnaBridge 167:e84263d55307 176 #endif
AnnaBridge 167:e84263d55307 177
AnnaBridge 167:e84263d55307 178
AnnaBridge 167:e84263d55307 179 /**
AnnaBridge 167:e84263d55307 180 \brief Get IPSR Register
AnnaBridge 167:e84263d55307 181 \details Returns the content of the IPSR Register.
AnnaBridge 167:e84263d55307 182 \return IPSR Register value
AnnaBridge 167:e84263d55307 183 */
AnnaBridge 167:e84263d55307 184 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 167:e84263d55307 185 {
AnnaBridge 167:e84263d55307 186 uint32_t result;
AnnaBridge 167:e84263d55307 187
AnnaBridge 167:e84263d55307 188 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 167:e84263d55307 189 return(result);
AnnaBridge 167:e84263d55307 190 }
AnnaBridge 167:e84263d55307 191
AnnaBridge 167:e84263d55307 192
AnnaBridge 167:e84263d55307 193 /**
AnnaBridge 167:e84263d55307 194 \brief Get APSR Register
AnnaBridge 167:e84263d55307 195 \details Returns the content of the APSR Register.
AnnaBridge 167:e84263d55307 196 \return APSR Register value
AnnaBridge 167:e84263d55307 197 */
AnnaBridge 167:e84263d55307 198 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 167:e84263d55307 199 {
AnnaBridge 167:e84263d55307 200 uint32_t result;
AnnaBridge 167:e84263d55307 201
AnnaBridge 167:e84263d55307 202 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 167:e84263d55307 203 return(result);
AnnaBridge 167:e84263d55307 204 }
AnnaBridge 167:e84263d55307 205
AnnaBridge 167:e84263d55307 206
AnnaBridge 167:e84263d55307 207 /**
AnnaBridge 167:e84263d55307 208 \brief Get xPSR Register
AnnaBridge 167:e84263d55307 209 \details Returns the content of the xPSR Register.
AnnaBridge 167:e84263d55307 210 \return xPSR Register value
AnnaBridge 167:e84263d55307 211 */
AnnaBridge 167:e84263d55307 212 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 167:e84263d55307 213 {
AnnaBridge 167:e84263d55307 214 uint32_t result;
AnnaBridge 167:e84263d55307 215
AnnaBridge 167:e84263d55307 216 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 167:e84263d55307 217 return(result);
AnnaBridge 167:e84263d55307 218 }
AnnaBridge 167:e84263d55307 219
AnnaBridge 167:e84263d55307 220
AnnaBridge 167:e84263d55307 221 /**
AnnaBridge 167:e84263d55307 222 \brief Get Process Stack Pointer
AnnaBridge 167:e84263d55307 223 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 167:e84263d55307 224 \return PSP Register value
AnnaBridge 167:e84263d55307 225 */
AnnaBridge 167:e84263d55307 226 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 167:e84263d55307 227 {
AnnaBridge 167:e84263d55307 228 register uint32_t result;
AnnaBridge 167:e84263d55307 229
AnnaBridge 167:e84263d55307 230 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 167:e84263d55307 231 return(result);
AnnaBridge 167:e84263d55307 232 }
AnnaBridge 167:e84263d55307 233
AnnaBridge 167:e84263d55307 234
AnnaBridge 167:e84263d55307 235 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 236 /**
AnnaBridge 167:e84263d55307 237 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 238 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 167:e84263d55307 239 \return PSP Register value
AnnaBridge 167:e84263d55307 240 */
AnnaBridge 167:e84263d55307 241 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 167:e84263d55307 242 {
AnnaBridge 167:e84263d55307 243 register uint32_t result;
AnnaBridge 167:e84263d55307 244
AnnaBridge 167:e84263d55307 245 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 246 return(result);
AnnaBridge 167:e84263d55307 247 }
AnnaBridge 167:e84263d55307 248 #endif
AnnaBridge 167:e84263d55307 249
AnnaBridge 167:e84263d55307 250
AnnaBridge 167:e84263d55307 251 /**
AnnaBridge 167:e84263d55307 252 \brief Set Process Stack Pointer
AnnaBridge 167:e84263d55307 253 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 167:e84263d55307 254 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 167:e84263d55307 255 */
AnnaBridge 167:e84263d55307 256 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 167:e84263d55307 257 {
AnnaBridge 167:e84263d55307 258 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 167:e84263d55307 259 }
AnnaBridge 167:e84263d55307 260
AnnaBridge 167:e84263d55307 261
AnnaBridge 167:e84263d55307 262 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 263 /**
AnnaBridge 167:e84263d55307 264 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 265 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 167:e84263d55307 266 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 167:e84263d55307 267 */
AnnaBridge 167:e84263d55307 268 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 167:e84263d55307 269 {
AnnaBridge 167:e84263d55307 270 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 167:e84263d55307 271 }
AnnaBridge 167:e84263d55307 272 #endif
AnnaBridge 167:e84263d55307 273
AnnaBridge 167:e84263d55307 274
AnnaBridge 167:e84263d55307 275 /**
AnnaBridge 167:e84263d55307 276 \brief Get Main Stack Pointer
AnnaBridge 167:e84263d55307 277 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 167:e84263d55307 278 \return MSP Register value
AnnaBridge 167:e84263d55307 279 */
AnnaBridge 167:e84263d55307 280 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 167:e84263d55307 281 {
AnnaBridge 167:e84263d55307 282 register uint32_t result;
AnnaBridge 167:e84263d55307 283
AnnaBridge 167:e84263d55307 284 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 167:e84263d55307 285 return(result);
AnnaBridge 167:e84263d55307 286 }
AnnaBridge 167:e84263d55307 287
AnnaBridge 167:e84263d55307 288
AnnaBridge 167:e84263d55307 289 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 290 /**
AnnaBridge 167:e84263d55307 291 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 292 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 167:e84263d55307 293 \return MSP Register value
AnnaBridge 167:e84263d55307 294 */
AnnaBridge 167:e84263d55307 295 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 167:e84263d55307 296 {
AnnaBridge 167:e84263d55307 297 register uint32_t result;
AnnaBridge 167:e84263d55307 298
AnnaBridge 167:e84263d55307 299 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 300 return(result);
AnnaBridge 167:e84263d55307 301 }
AnnaBridge 167:e84263d55307 302 #endif
AnnaBridge 167:e84263d55307 303
AnnaBridge 167:e84263d55307 304
AnnaBridge 167:e84263d55307 305 /**
AnnaBridge 167:e84263d55307 306 \brief Set Main Stack Pointer
AnnaBridge 167:e84263d55307 307 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 167:e84263d55307 308 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 167:e84263d55307 309 */
AnnaBridge 167:e84263d55307 310 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 167:e84263d55307 311 {
AnnaBridge 167:e84263d55307 312 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 167:e84263d55307 313 }
AnnaBridge 167:e84263d55307 314
AnnaBridge 167:e84263d55307 315
AnnaBridge 167:e84263d55307 316 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 317 /**
AnnaBridge 167:e84263d55307 318 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 319 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 167:e84263d55307 320 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 167:e84263d55307 321 */
AnnaBridge 167:e84263d55307 322 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 167:e84263d55307 323 {
AnnaBridge 167:e84263d55307 324 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 167:e84263d55307 325 }
AnnaBridge 167:e84263d55307 326 #endif
AnnaBridge 167:e84263d55307 327
AnnaBridge 167:e84263d55307 328
AnnaBridge 167:e84263d55307 329 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 330 /**
AnnaBridge 167:e84263d55307 331 \brief Get Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 332 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 167:e84263d55307 333 \return SP Register value
AnnaBridge 167:e84263d55307 334 */
AnnaBridge 167:e84263d55307 335 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 167:e84263d55307 336 {
AnnaBridge 167:e84263d55307 337 register uint32_t result;
AnnaBridge 167:e84263d55307 338
AnnaBridge 167:e84263d55307 339 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 340 return(result);
AnnaBridge 167:e84263d55307 341 }
AnnaBridge 167:e84263d55307 342
AnnaBridge 167:e84263d55307 343
AnnaBridge 167:e84263d55307 344 /**
AnnaBridge 167:e84263d55307 345 \brief Set Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 346 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 167:e84263d55307 347 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 167:e84263d55307 348 */
AnnaBridge 167:e84263d55307 349 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 167:e84263d55307 350 {
AnnaBridge 167:e84263d55307 351 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 167:e84263d55307 352 }
AnnaBridge 167:e84263d55307 353 #endif
AnnaBridge 167:e84263d55307 354
AnnaBridge 167:e84263d55307 355
AnnaBridge 167:e84263d55307 356 /**
AnnaBridge 167:e84263d55307 357 \brief Get Priority Mask
AnnaBridge 167:e84263d55307 358 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 167:e84263d55307 359 \return Priority Mask value
AnnaBridge 167:e84263d55307 360 */
AnnaBridge 167:e84263d55307 361 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 167:e84263d55307 362 {
AnnaBridge 167:e84263d55307 363 uint32_t result;
AnnaBridge 167:e84263d55307 364
AnnaBridge 167:e84263d55307 365 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 167:e84263d55307 366 return(result);
AnnaBridge 167:e84263d55307 367 }
AnnaBridge 167:e84263d55307 368
AnnaBridge 167:e84263d55307 369
AnnaBridge 167:e84263d55307 370 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 371 /**
AnnaBridge 167:e84263d55307 372 \brief Get Priority Mask (non-secure)
AnnaBridge 167:e84263d55307 373 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 167:e84263d55307 374 \return Priority Mask value
AnnaBridge 167:e84263d55307 375 */
AnnaBridge 167:e84263d55307 376 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 167:e84263d55307 377 {
AnnaBridge 167:e84263d55307 378 uint32_t result;
AnnaBridge 167:e84263d55307 379
AnnaBridge 167:e84263d55307 380 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 381 return(result);
AnnaBridge 167:e84263d55307 382 }
AnnaBridge 167:e84263d55307 383 #endif
AnnaBridge 167:e84263d55307 384
AnnaBridge 167:e84263d55307 385
AnnaBridge 167:e84263d55307 386 /**
AnnaBridge 167:e84263d55307 387 \brief Set Priority Mask
AnnaBridge 167:e84263d55307 388 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 167:e84263d55307 389 \param [in] priMask Priority Mask
AnnaBridge 167:e84263d55307 390 */
AnnaBridge 167:e84263d55307 391 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 167:e84263d55307 392 {
AnnaBridge 167:e84263d55307 393 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 167:e84263d55307 394 }
AnnaBridge 167:e84263d55307 395
AnnaBridge 167:e84263d55307 396
AnnaBridge 167:e84263d55307 397 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 398 /**
AnnaBridge 167:e84263d55307 399 \brief Set Priority Mask (non-secure)
AnnaBridge 167:e84263d55307 400 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 167:e84263d55307 401 \param [in] priMask Priority Mask
AnnaBridge 167:e84263d55307 402 */
AnnaBridge 167:e84263d55307 403 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 167:e84263d55307 404 {
AnnaBridge 167:e84263d55307 405 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 167:e84263d55307 406 }
AnnaBridge 167:e84263d55307 407 #endif
AnnaBridge 167:e84263d55307 408
AnnaBridge 167:e84263d55307 409
AnnaBridge 167:e84263d55307 410 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 411 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 412 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 413 /**
AnnaBridge 167:e84263d55307 414 \brief Enable FIQ
AnnaBridge 167:e84263d55307 415 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 167:e84263d55307 416 Can only be executed in Privileged modes.
AnnaBridge 167:e84263d55307 417 */
AnnaBridge 167:e84263d55307 418 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 167:e84263d55307 419
AnnaBridge 167:e84263d55307 420
AnnaBridge 167:e84263d55307 421 /**
AnnaBridge 167:e84263d55307 422 \brief Disable FIQ
AnnaBridge 167:e84263d55307 423 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 167:e84263d55307 424 Can only be executed in Privileged modes.
AnnaBridge 167:e84263d55307 425 */
AnnaBridge 167:e84263d55307 426 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 167:e84263d55307 427
AnnaBridge 167:e84263d55307 428
AnnaBridge 167:e84263d55307 429 /**
AnnaBridge 167:e84263d55307 430 \brief Get Base Priority
AnnaBridge 167:e84263d55307 431 \details Returns the current value of the Base Priority register.
AnnaBridge 167:e84263d55307 432 \return Base Priority register value
AnnaBridge 167:e84263d55307 433 */
AnnaBridge 167:e84263d55307 434 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 167:e84263d55307 435 {
AnnaBridge 167:e84263d55307 436 uint32_t result;
AnnaBridge 167:e84263d55307 437
AnnaBridge 167:e84263d55307 438 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 167:e84263d55307 439 return(result);
AnnaBridge 167:e84263d55307 440 }
AnnaBridge 167:e84263d55307 441
AnnaBridge 167:e84263d55307 442
AnnaBridge 167:e84263d55307 443 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 444 /**
AnnaBridge 167:e84263d55307 445 \brief Get Base Priority (non-secure)
AnnaBridge 167:e84263d55307 446 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 167:e84263d55307 447 \return Base Priority register value
AnnaBridge 167:e84263d55307 448 */
AnnaBridge 167:e84263d55307 449 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 167:e84263d55307 450 {
AnnaBridge 167:e84263d55307 451 uint32_t result;
AnnaBridge 167:e84263d55307 452
AnnaBridge 167:e84263d55307 453 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 454 return(result);
AnnaBridge 167:e84263d55307 455 }
AnnaBridge 167:e84263d55307 456 #endif
AnnaBridge 167:e84263d55307 457
AnnaBridge 167:e84263d55307 458
AnnaBridge 167:e84263d55307 459 /**
AnnaBridge 167:e84263d55307 460 \brief Set Base Priority
AnnaBridge 167:e84263d55307 461 \details Assigns the given value to the Base Priority register.
AnnaBridge 167:e84263d55307 462 \param [in] basePri Base Priority value to set
AnnaBridge 167:e84263d55307 463 */
AnnaBridge 167:e84263d55307 464 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 167:e84263d55307 465 {
AnnaBridge 167:e84263d55307 466 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 167:e84263d55307 467 }
AnnaBridge 167:e84263d55307 468
AnnaBridge 167:e84263d55307 469
AnnaBridge 167:e84263d55307 470 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 471 /**
AnnaBridge 167:e84263d55307 472 \brief Set Base Priority (non-secure)
AnnaBridge 167:e84263d55307 473 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 167:e84263d55307 474 \param [in] basePri Base Priority value to set
AnnaBridge 167:e84263d55307 475 */
AnnaBridge 167:e84263d55307 476 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 167:e84263d55307 477 {
AnnaBridge 167:e84263d55307 478 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 167:e84263d55307 479 }
AnnaBridge 167:e84263d55307 480 #endif
AnnaBridge 167:e84263d55307 481
AnnaBridge 167:e84263d55307 482
AnnaBridge 167:e84263d55307 483 /**
AnnaBridge 167:e84263d55307 484 \brief Set Base Priority with condition
AnnaBridge 167:e84263d55307 485 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 167:e84263d55307 486 or the new value increases the BASEPRI priority level.
AnnaBridge 167:e84263d55307 487 \param [in] basePri Base Priority value to set
AnnaBridge 167:e84263d55307 488 */
AnnaBridge 167:e84263d55307 489 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 167:e84263d55307 490 {
AnnaBridge 167:e84263d55307 491 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 167:e84263d55307 492 }
AnnaBridge 167:e84263d55307 493
AnnaBridge 167:e84263d55307 494
AnnaBridge 167:e84263d55307 495 /**
AnnaBridge 167:e84263d55307 496 \brief Get Fault Mask
AnnaBridge 167:e84263d55307 497 \details Returns the current value of the Fault Mask register.
AnnaBridge 167:e84263d55307 498 \return Fault Mask register value
AnnaBridge 167:e84263d55307 499 */
AnnaBridge 167:e84263d55307 500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 167:e84263d55307 501 {
AnnaBridge 167:e84263d55307 502 uint32_t result;
AnnaBridge 167:e84263d55307 503
AnnaBridge 167:e84263d55307 504 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 167:e84263d55307 505 return(result);
AnnaBridge 167:e84263d55307 506 }
AnnaBridge 167:e84263d55307 507
AnnaBridge 167:e84263d55307 508
AnnaBridge 167:e84263d55307 509 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 510 /**
AnnaBridge 167:e84263d55307 511 \brief Get Fault Mask (non-secure)
AnnaBridge 167:e84263d55307 512 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 167:e84263d55307 513 \return Fault Mask register value
AnnaBridge 167:e84263d55307 514 */
AnnaBridge 167:e84263d55307 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 167:e84263d55307 516 {
AnnaBridge 167:e84263d55307 517 uint32_t result;
AnnaBridge 167:e84263d55307 518
AnnaBridge 167:e84263d55307 519 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 520 return(result);
AnnaBridge 167:e84263d55307 521 }
AnnaBridge 167:e84263d55307 522 #endif
AnnaBridge 167:e84263d55307 523
AnnaBridge 167:e84263d55307 524
AnnaBridge 167:e84263d55307 525 /**
AnnaBridge 167:e84263d55307 526 \brief Set Fault Mask
AnnaBridge 167:e84263d55307 527 \details Assigns the given value to the Fault Mask register.
AnnaBridge 167:e84263d55307 528 \param [in] faultMask Fault Mask value to set
AnnaBridge 167:e84263d55307 529 */
AnnaBridge 167:e84263d55307 530 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 167:e84263d55307 531 {
AnnaBridge 167:e84263d55307 532 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 167:e84263d55307 533 }
AnnaBridge 167:e84263d55307 534
AnnaBridge 167:e84263d55307 535
AnnaBridge 167:e84263d55307 536 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 167:e84263d55307 537 /**
AnnaBridge 167:e84263d55307 538 \brief Set Fault Mask (non-secure)
AnnaBridge 167:e84263d55307 539 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 167:e84263d55307 540 \param [in] faultMask Fault Mask value to set
AnnaBridge 167:e84263d55307 541 */
AnnaBridge 167:e84263d55307 542 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 167:e84263d55307 543 {
AnnaBridge 167:e84263d55307 544 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 167:e84263d55307 545 }
AnnaBridge 167:e84263d55307 546 #endif
AnnaBridge 167:e84263d55307 547
AnnaBridge 167:e84263d55307 548 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 549 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 550 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 167:e84263d55307 551
AnnaBridge 167:e84263d55307 552
AnnaBridge 167:e84263d55307 553 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 554 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 167:e84263d55307 555
AnnaBridge 167:e84263d55307 556 /**
AnnaBridge 167:e84263d55307 557 \brief Get Process Stack Pointer Limit
AnnaBridge 167:e84263d55307 558 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 167:e84263d55307 559 \return PSPLIM Register value
AnnaBridge 167:e84263d55307 560 */
AnnaBridge 167:e84263d55307 561 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 167:e84263d55307 562 {
AnnaBridge 167:e84263d55307 563 register uint32_t result;
AnnaBridge 167:e84263d55307 564
AnnaBridge 167:e84263d55307 565 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 167:e84263d55307 566 return(result);
AnnaBridge 167:e84263d55307 567 }
AnnaBridge 167:e84263d55307 568
AnnaBridge 167:e84263d55307 569
AnnaBridge 167:e84263d55307 570 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 167:e84263d55307 571 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 572 /**
AnnaBridge 167:e84263d55307 573 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 167:e84263d55307 574 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 167:e84263d55307 575 \return PSPLIM Register value
AnnaBridge 167:e84263d55307 576 */
AnnaBridge 167:e84263d55307 577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 167:e84263d55307 578 {
AnnaBridge 167:e84263d55307 579 register uint32_t result;
AnnaBridge 167:e84263d55307 580
AnnaBridge 167:e84263d55307 581 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 582 return(result);
AnnaBridge 167:e84263d55307 583 }
AnnaBridge 167:e84263d55307 584 #endif
AnnaBridge 167:e84263d55307 585
AnnaBridge 167:e84263d55307 586
AnnaBridge 167:e84263d55307 587 /**
AnnaBridge 167:e84263d55307 588 \brief Set Process Stack Pointer Limit
AnnaBridge 167:e84263d55307 589 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 167:e84263d55307 590 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 167:e84263d55307 591 */
AnnaBridge 167:e84263d55307 592 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 167:e84263d55307 593 {
AnnaBridge 167:e84263d55307 594 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 167:e84263d55307 595 }
AnnaBridge 167:e84263d55307 596
AnnaBridge 167:e84263d55307 597
AnnaBridge 167:e84263d55307 598 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 167:e84263d55307 599 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 600 /**
AnnaBridge 167:e84263d55307 601 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 167:e84263d55307 602 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 167:e84263d55307 603 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 167:e84263d55307 604 */
AnnaBridge 167:e84263d55307 605 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 167:e84263d55307 606 {
AnnaBridge 167:e84263d55307 607 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 167:e84263d55307 608 }
AnnaBridge 167:e84263d55307 609 #endif
AnnaBridge 167:e84263d55307 610
AnnaBridge 167:e84263d55307 611
AnnaBridge 167:e84263d55307 612 /**
AnnaBridge 167:e84263d55307 613 \brief Get Main Stack Pointer Limit
AnnaBridge 167:e84263d55307 614 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 167:e84263d55307 615 \return MSPLIM Register value
AnnaBridge 167:e84263d55307 616 */
AnnaBridge 167:e84263d55307 617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 167:e84263d55307 618 {
AnnaBridge 167:e84263d55307 619 register uint32_t result;
AnnaBridge 167:e84263d55307 620
AnnaBridge 167:e84263d55307 621 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 167:e84263d55307 622
AnnaBridge 167:e84263d55307 623 return(result);
AnnaBridge 167:e84263d55307 624 }
AnnaBridge 167:e84263d55307 625
AnnaBridge 167:e84263d55307 626
AnnaBridge 167:e84263d55307 627 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 167:e84263d55307 628 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 629 /**
AnnaBridge 167:e84263d55307 630 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 167:e84263d55307 631 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 167:e84263d55307 632 \return MSPLIM Register value
AnnaBridge 167:e84263d55307 633 */
AnnaBridge 167:e84263d55307 634 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 167:e84263d55307 635 {
AnnaBridge 167:e84263d55307 636 register uint32_t result;
AnnaBridge 167:e84263d55307 637
AnnaBridge 167:e84263d55307 638 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 167:e84263d55307 639 return(result);
AnnaBridge 167:e84263d55307 640 }
AnnaBridge 167:e84263d55307 641 #endif
AnnaBridge 167:e84263d55307 642
AnnaBridge 167:e84263d55307 643
AnnaBridge 167:e84263d55307 644 /**
AnnaBridge 167:e84263d55307 645 \brief Set Main Stack Pointer Limit
AnnaBridge 167:e84263d55307 646 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 167:e84263d55307 647 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 167:e84263d55307 648 */
AnnaBridge 167:e84263d55307 649 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 167:e84263d55307 650 {
AnnaBridge 167:e84263d55307 651 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 167:e84263d55307 652 }
AnnaBridge 167:e84263d55307 653
AnnaBridge 167:e84263d55307 654
AnnaBridge 167:e84263d55307 655 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 167:e84263d55307 656 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 657 /**
AnnaBridge 167:e84263d55307 658 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 167:e84263d55307 659 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 167:e84263d55307 660 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 167:e84263d55307 661 */
AnnaBridge 167:e84263d55307 662 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 167:e84263d55307 663 {
AnnaBridge 167:e84263d55307 664 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 167:e84263d55307 665 }
AnnaBridge 167:e84263d55307 666 #endif
AnnaBridge 167:e84263d55307 667
AnnaBridge 167:e84263d55307 668 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 669 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 167:e84263d55307 670
AnnaBridge 167:e84263d55307 671
AnnaBridge 167:e84263d55307 672 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 673 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 674
AnnaBridge 167:e84263d55307 675 /**
AnnaBridge 167:e84263d55307 676 \brief Get FPSCR
AnnaBridge 167:e84263d55307 677 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 167:e84263d55307 678 \return Floating Point Status/Control register value
AnnaBridge 167:e84263d55307 679 */
AnnaBridge 167:e84263d55307 680 /* #define __get_FPSCR __builtin_arm_get_fpscr */
AnnaBridge 167:e84263d55307 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 167:e84263d55307 682 {
AnnaBridge 167:e84263d55307 683 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 167:e84263d55307 684 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 167:e84263d55307 685 uint32_t result;
AnnaBridge 167:e84263d55307 686
AnnaBridge 167:e84263d55307 687 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 167:e84263d55307 688 return(result);
AnnaBridge 167:e84263d55307 689 #else
AnnaBridge 167:e84263d55307 690 return(0U);
AnnaBridge 167:e84263d55307 691 #endif
AnnaBridge 167:e84263d55307 692 }
AnnaBridge 167:e84263d55307 693
AnnaBridge 167:e84263d55307 694
AnnaBridge 167:e84263d55307 695 /**
AnnaBridge 167:e84263d55307 696 \brief Set FPSCR
AnnaBridge 167:e84263d55307 697 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 167:e84263d55307 698 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 167:e84263d55307 699 */
AnnaBridge 167:e84263d55307 700 /* #define __set_FPSCR __builtin_arm_set_fpscr */
AnnaBridge 167:e84263d55307 701 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 167:e84263d55307 702 {
AnnaBridge 167:e84263d55307 703 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 167:e84263d55307 704 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 167:e84263d55307 705 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "memory");
AnnaBridge 167:e84263d55307 706 #else
AnnaBridge 167:e84263d55307 707 (void)fpscr;
AnnaBridge 167:e84263d55307 708 #endif
AnnaBridge 167:e84263d55307 709 }
AnnaBridge 167:e84263d55307 710
AnnaBridge 167:e84263d55307 711 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 712 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 167:e84263d55307 713
AnnaBridge 167:e84263d55307 714
AnnaBridge 167:e84263d55307 715
AnnaBridge 167:e84263d55307 716 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 167:e84263d55307 717
AnnaBridge 167:e84263d55307 718
AnnaBridge 167:e84263d55307 719 /* ########################## Core Instruction Access ######################### */
AnnaBridge 167:e84263d55307 720 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 167:e84263d55307 721 Access to dedicated instructions
AnnaBridge 167:e84263d55307 722 @{
AnnaBridge 167:e84263d55307 723 */
AnnaBridge 167:e84263d55307 724
AnnaBridge 167:e84263d55307 725 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 167:e84263d55307 726 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 167:e84263d55307 727 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 167:e84263d55307 728 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 167:e84263d55307 729 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 167:e84263d55307 730 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 167:e84263d55307 731 #else
AnnaBridge 167:e84263d55307 732 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 167:e84263d55307 733 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 167:e84263d55307 734 #endif
AnnaBridge 167:e84263d55307 735
AnnaBridge 167:e84263d55307 736 /**
AnnaBridge 167:e84263d55307 737 \brief No Operation
AnnaBridge 167:e84263d55307 738 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 167:e84263d55307 739 */
AnnaBridge 167:e84263d55307 740 #define __NOP __builtin_arm_nop
AnnaBridge 167:e84263d55307 741
AnnaBridge 167:e84263d55307 742 /**
AnnaBridge 167:e84263d55307 743 \brief Wait For Interrupt
AnnaBridge 167:e84263d55307 744 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 167:e84263d55307 745 */
AnnaBridge 167:e84263d55307 746 #define __WFI __builtin_arm_wfi
AnnaBridge 167:e84263d55307 747
AnnaBridge 167:e84263d55307 748
AnnaBridge 167:e84263d55307 749 /**
AnnaBridge 167:e84263d55307 750 \brief Wait For Event
AnnaBridge 167:e84263d55307 751 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 167:e84263d55307 752 a low-power state until one of a number of events occurs.
AnnaBridge 167:e84263d55307 753 */
AnnaBridge 167:e84263d55307 754 #define __WFE __builtin_arm_wfe
AnnaBridge 167:e84263d55307 755
AnnaBridge 167:e84263d55307 756
AnnaBridge 167:e84263d55307 757 /**
AnnaBridge 167:e84263d55307 758 \brief Send Event
AnnaBridge 167:e84263d55307 759 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 167:e84263d55307 760 */
AnnaBridge 167:e84263d55307 761 #define __SEV __builtin_arm_sev
AnnaBridge 167:e84263d55307 762
AnnaBridge 167:e84263d55307 763
AnnaBridge 167:e84263d55307 764 /**
AnnaBridge 167:e84263d55307 765 \brief Instruction Synchronization Barrier
AnnaBridge 167:e84263d55307 766 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 167:e84263d55307 767 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 167:e84263d55307 768 after the instruction has been completed.
AnnaBridge 167:e84263d55307 769 */
AnnaBridge 167:e84263d55307 770 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 167:e84263d55307 771
AnnaBridge 167:e84263d55307 772 /**
AnnaBridge 167:e84263d55307 773 \brief Data Synchronization Barrier
AnnaBridge 167:e84263d55307 774 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 167:e84263d55307 775 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 167:e84263d55307 776 */
AnnaBridge 167:e84263d55307 777 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 167:e84263d55307 778
AnnaBridge 167:e84263d55307 779
AnnaBridge 167:e84263d55307 780 /**
AnnaBridge 167:e84263d55307 781 \brief Data Memory Barrier
AnnaBridge 167:e84263d55307 782 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 167:e84263d55307 783 and after the instruction, without ensuring their completion.
AnnaBridge 167:e84263d55307 784 */
AnnaBridge 167:e84263d55307 785 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 167:e84263d55307 786
AnnaBridge 167:e84263d55307 787
AnnaBridge 167:e84263d55307 788 /**
AnnaBridge 167:e84263d55307 789 \brief Reverse byte order (32 bit)
AnnaBridge 167:e84263d55307 790 \details Reverses the byte order in integer value.
AnnaBridge 167:e84263d55307 791 \param [in] value Value to reverse
AnnaBridge 167:e84263d55307 792 \return Reversed value
AnnaBridge 167:e84263d55307 793 */
AnnaBridge 167:e84263d55307 794 #define __REV __builtin_bswap32
AnnaBridge 167:e84263d55307 795
AnnaBridge 167:e84263d55307 796
AnnaBridge 167:e84263d55307 797 /**
AnnaBridge 167:e84263d55307 798 \brief Reverse byte order (16 bit)
AnnaBridge 167:e84263d55307 799 \details Reverses the byte order in two unsigned short values.
AnnaBridge 167:e84263d55307 800 \param [in] value Value to reverse
AnnaBridge 167:e84263d55307 801 \return Reversed value
AnnaBridge 167:e84263d55307 802 */
AnnaBridge 167:e84263d55307 803 #define __REV16 __builtin_bswap16 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 167:e84263d55307 804 #if 0
AnnaBridge 167:e84263d55307 805 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
AnnaBridge 167:e84263d55307 806 {
AnnaBridge 167:e84263d55307 807 uint32_t result;
AnnaBridge 167:e84263d55307 808
AnnaBridge 167:e84263d55307 809 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 167:e84263d55307 810 return(result);
AnnaBridge 167:e84263d55307 811 }
AnnaBridge 167:e84263d55307 812 #endif
AnnaBridge 167:e84263d55307 813
AnnaBridge 167:e84263d55307 814
AnnaBridge 167:e84263d55307 815 /**
AnnaBridge 167:e84263d55307 816 \brief Reverse byte order in signed short value
AnnaBridge 167:e84263d55307 817 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 167:e84263d55307 818 \param [in] value Value to reverse
AnnaBridge 167:e84263d55307 819 \return Reversed value
AnnaBridge 167:e84263d55307 820 */
AnnaBridge 167:e84263d55307 821 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 167:e84263d55307 822 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
AnnaBridge 167:e84263d55307 823 {
AnnaBridge 167:e84263d55307 824 int32_t result;
AnnaBridge 167:e84263d55307 825
AnnaBridge 167:e84263d55307 826 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 167:e84263d55307 827 return(result);
AnnaBridge 167:e84263d55307 828 }
AnnaBridge 167:e84263d55307 829
AnnaBridge 167:e84263d55307 830
AnnaBridge 167:e84263d55307 831 /**
AnnaBridge 167:e84263d55307 832 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 167:e84263d55307 833 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 167:e84263d55307 834 \param [in] op1 Value to rotate
AnnaBridge 167:e84263d55307 835 \param [in] op2 Number of Bits to rotate
AnnaBridge 167:e84263d55307 836 \return Rotated value
AnnaBridge 167:e84263d55307 837 */
AnnaBridge 167:e84263d55307 838 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 839 {
AnnaBridge 167:e84263d55307 840 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 167:e84263d55307 841 }
AnnaBridge 167:e84263d55307 842
AnnaBridge 167:e84263d55307 843
AnnaBridge 167:e84263d55307 844 /**
AnnaBridge 167:e84263d55307 845 \brief Breakpoint
AnnaBridge 167:e84263d55307 846 \details Causes the processor to enter Debug state.
AnnaBridge 167:e84263d55307 847 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 167:e84263d55307 848 \param [in] value is ignored by the processor.
AnnaBridge 167:e84263d55307 849 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 167:e84263d55307 850 */
AnnaBridge 167:e84263d55307 851 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 167:e84263d55307 852
AnnaBridge 167:e84263d55307 853
AnnaBridge 167:e84263d55307 854 /**
AnnaBridge 167:e84263d55307 855 \brief Reverse bit order of value
AnnaBridge 167:e84263d55307 856 \details Reverses the bit order of the given value.
AnnaBridge 167:e84263d55307 857 \param [in] value Value to reverse
AnnaBridge 167:e84263d55307 858 \return Reversed value
AnnaBridge 167:e84263d55307 859 */
AnnaBridge 167:e84263d55307 860 /* ToDo ARMCLANG: check if __builtin_arm_rbit is supported */
AnnaBridge 167:e84263d55307 861 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 167:e84263d55307 862 {
AnnaBridge 167:e84263d55307 863 uint32_t result;
AnnaBridge 167:e84263d55307 864
AnnaBridge 167:e84263d55307 865 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 866 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 867 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 868 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 167:e84263d55307 869 #else
AnnaBridge 167:e84263d55307 870 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
AnnaBridge 167:e84263d55307 871
AnnaBridge 167:e84263d55307 872 result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge 167:e84263d55307 873 for (value >>= 1U; value; value >>= 1U)
AnnaBridge 167:e84263d55307 874 {
AnnaBridge 167:e84263d55307 875 result <<= 1U;
AnnaBridge 167:e84263d55307 876 result |= value & 1U;
AnnaBridge 167:e84263d55307 877 s--;
AnnaBridge 167:e84263d55307 878 }
AnnaBridge 167:e84263d55307 879 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 167:e84263d55307 880 #endif
AnnaBridge 167:e84263d55307 881 return(result);
AnnaBridge 167:e84263d55307 882 }
AnnaBridge 167:e84263d55307 883
AnnaBridge 167:e84263d55307 884
AnnaBridge 167:e84263d55307 885 /**
AnnaBridge 167:e84263d55307 886 \brief Count leading zeros
AnnaBridge 167:e84263d55307 887 \details Counts the number of leading zeros of a data value.
AnnaBridge 167:e84263d55307 888 \param [in] value Value to count the leading zeros
AnnaBridge 167:e84263d55307 889 \return number of leading zeros in value
AnnaBridge 167:e84263d55307 890 */
AnnaBridge 167:e84263d55307 891 #define __CLZ __builtin_clz
AnnaBridge 167:e84263d55307 892
AnnaBridge 167:e84263d55307 893
AnnaBridge 167:e84263d55307 894 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 895 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 896 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 897 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 167:e84263d55307 898 /**
AnnaBridge 167:e84263d55307 899 \brief LDR Exclusive (8 bit)
AnnaBridge 167:e84263d55307 900 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 167:e84263d55307 901 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 902 \return value of type uint8_t at (*ptr)
AnnaBridge 167:e84263d55307 903 */
AnnaBridge 167:e84263d55307 904 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 167:e84263d55307 905
AnnaBridge 167:e84263d55307 906
AnnaBridge 167:e84263d55307 907 /**
AnnaBridge 167:e84263d55307 908 \brief LDR Exclusive (16 bit)
AnnaBridge 167:e84263d55307 909 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 167:e84263d55307 910 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 911 \return value of type uint16_t at (*ptr)
AnnaBridge 167:e84263d55307 912 */
AnnaBridge 167:e84263d55307 913 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 167:e84263d55307 914
AnnaBridge 167:e84263d55307 915
AnnaBridge 167:e84263d55307 916 /**
AnnaBridge 167:e84263d55307 917 \brief LDR Exclusive (32 bit)
AnnaBridge 167:e84263d55307 918 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 167:e84263d55307 919 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 920 \return value of type uint32_t at (*ptr)
AnnaBridge 167:e84263d55307 921 */
AnnaBridge 167:e84263d55307 922 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 167:e84263d55307 923
AnnaBridge 167:e84263d55307 924
AnnaBridge 167:e84263d55307 925 /**
AnnaBridge 167:e84263d55307 926 \brief STR Exclusive (8 bit)
AnnaBridge 167:e84263d55307 927 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 167:e84263d55307 928 \param [in] value Value to store
AnnaBridge 167:e84263d55307 929 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 930 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 931 \return 1 Function failed
AnnaBridge 167:e84263d55307 932 */
AnnaBridge 167:e84263d55307 933 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 167:e84263d55307 934
AnnaBridge 167:e84263d55307 935
AnnaBridge 167:e84263d55307 936 /**
AnnaBridge 167:e84263d55307 937 \brief STR Exclusive (16 bit)
AnnaBridge 167:e84263d55307 938 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 167:e84263d55307 939 \param [in] value Value to store
AnnaBridge 167:e84263d55307 940 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 941 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 942 \return 1 Function failed
AnnaBridge 167:e84263d55307 943 */
AnnaBridge 167:e84263d55307 944 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 167:e84263d55307 945
AnnaBridge 167:e84263d55307 946
AnnaBridge 167:e84263d55307 947 /**
AnnaBridge 167:e84263d55307 948 \brief STR Exclusive (32 bit)
AnnaBridge 167:e84263d55307 949 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 167:e84263d55307 950 \param [in] value Value to store
AnnaBridge 167:e84263d55307 951 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 952 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 953 \return 1 Function failed
AnnaBridge 167:e84263d55307 954 */
AnnaBridge 167:e84263d55307 955 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 167:e84263d55307 956
AnnaBridge 167:e84263d55307 957
AnnaBridge 167:e84263d55307 958 /**
AnnaBridge 167:e84263d55307 959 \brief Remove the exclusive lock
AnnaBridge 167:e84263d55307 960 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 167:e84263d55307 961 */
AnnaBridge 167:e84263d55307 962 #define __CLREX __builtin_arm_clrex
AnnaBridge 167:e84263d55307 963
AnnaBridge 167:e84263d55307 964 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 965 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 966 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 967 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 167:e84263d55307 968
AnnaBridge 167:e84263d55307 969
AnnaBridge 167:e84263d55307 970 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 971 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 972 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 167:e84263d55307 973 /**
AnnaBridge 167:e84263d55307 974 \brief Signed Saturate
AnnaBridge 167:e84263d55307 975 \details Saturates a signed value.
AnnaBridge 167:e84263d55307 976 \param [in] value Value to be saturated
AnnaBridge 167:e84263d55307 977 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 167:e84263d55307 978 \return Saturated value
AnnaBridge 167:e84263d55307 979 */
AnnaBridge 167:e84263d55307 980 #define __SSAT __builtin_arm_ssat
AnnaBridge 167:e84263d55307 981
AnnaBridge 167:e84263d55307 982
AnnaBridge 167:e84263d55307 983 /**
AnnaBridge 167:e84263d55307 984 \brief Unsigned Saturate
AnnaBridge 167:e84263d55307 985 \details Saturates an unsigned value.
AnnaBridge 167:e84263d55307 986 \param [in] value Value to be saturated
AnnaBridge 167:e84263d55307 987 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 167:e84263d55307 988 \return Saturated value
AnnaBridge 167:e84263d55307 989 */
AnnaBridge 167:e84263d55307 990 #define __USAT __builtin_arm_usat
AnnaBridge 167:e84263d55307 991
AnnaBridge 167:e84263d55307 992
AnnaBridge 167:e84263d55307 993 /**
AnnaBridge 167:e84263d55307 994 \brief Rotate Right with Extend (32 bit)
AnnaBridge 167:e84263d55307 995 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 167:e84263d55307 996 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 167:e84263d55307 997 \param [in] value Value to rotate
AnnaBridge 167:e84263d55307 998 \return Rotated value
AnnaBridge 167:e84263d55307 999 */
AnnaBridge 167:e84263d55307 1000 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 167:e84263d55307 1001 {
AnnaBridge 167:e84263d55307 1002 uint32_t result;
AnnaBridge 167:e84263d55307 1003
AnnaBridge 167:e84263d55307 1004 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 167:e84263d55307 1005 return(result);
AnnaBridge 167:e84263d55307 1006 }
AnnaBridge 167:e84263d55307 1007
AnnaBridge 167:e84263d55307 1008
AnnaBridge 167:e84263d55307 1009 /**
AnnaBridge 167:e84263d55307 1010 \brief LDRT Unprivileged (8 bit)
AnnaBridge 167:e84263d55307 1011 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 167:e84263d55307 1012 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1013 \return value of type uint8_t at (*ptr)
AnnaBridge 167:e84263d55307 1014 */
AnnaBridge 167:e84263d55307 1015 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 167:e84263d55307 1016 {
AnnaBridge 167:e84263d55307 1017 uint32_t result;
AnnaBridge 167:e84263d55307 1018
AnnaBridge 167:e84263d55307 1019 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1020 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 167:e84263d55307 1021 }
AnnaBridge 167:e84263d55307 1022
AnnaBridge 167:e84263d55307 1023
AnnaBridge 167:e84263d55307 1024 /**
AnnaBridge 167:e84263d55307 1025 \brief LDRT Unprivileged (16 bit)
AnnaBridge 167:e84263d55307 1026 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1027 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1028 \return value of type uint16_t at (*ptr)
AnnaBridge 167:e84263d55307 1029 */
AnnaBridge 167:e84263d55307 1030 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 167:e84263d55307 1031 {
AnnaBridge 167:e84263d55307 1032 uint32_t result;
AnnaBridge 167:e84263d55307 1033
AnnaBridge 167:e84263d55307 1034 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1035 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 167:e84263d55307 1036 }
AnnaBridge 167:e84263d55307 1037
AnnaBridge 167:e84263d55307 1038
AnnaBridge 167:e84263d55307 1039 /**
AnnaBridge 167:e84263d55307 1040 \brief LDRT Unprivileged (32 bit)
AnnaBridge 167:e84263d55307 1041 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1042 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1043 \return value of type uint32_t at (*ptr)
AnnaBridge 167:e84263d55307 1044 */
AnnaBridge 167:e84263d55307 1045 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 167:e84263d55307 1046 {
AnnaBridge 167:e84263d55307 1047 uint32_t result;
AnnaBridge 167:e84263d55307 1048
AnnaBridge 167:e84263d55307 1049 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1050 return(result);
AnnaBridge 167:e84263d55307 1051 }
AnnaBridge 167:e84263d55307 1052
AnnaBridge 167:e84263d55307 1053
AnnaBridge 167:e84263d55307 1054 /**
AnnaBridge 167:e84263d55307 1055 \brief STRT Unprivileged (8 bit)
AnnaBridge 167:e84263d55307 1056 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 167:e84263d55307 1057 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1058 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1059 */
AnnaBridge 167:e84263d55307 1060 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 167:e84263d55307 1061 {
AnnaBridge 167:e84263d55307 1062 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 167:e84263d55307 1063 }
AnnaBridge 167:e84263d55307 1064
AnnaBridge 167:e84263d55307 1065
AnnaBridge 167:e84263d55307 1066 /**
AnnaBridge 167:e84263d55307 1067 \brief STRT Unprivileged (16 bit)
AnnaBridge 167:e84263d55307 1068 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1069 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1070 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1071 */
AnnaBridge 167:e84263d55307 1072 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 167:e84263d55307 1073 {
AnnaBridge 167:e84263d55307 1074 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 167:e84263d55307 1075 }
AnnaBridge 167:e84263d55307 1076
AnnaBridge 167:e84263d55307 1077
AnnaBridge 167:e84263d55307 1078 /**
AnnaBridge 167:e84263d55307 1079 \brief STRT Unprivileged (32 bit)
AnnaBridge 167:e84263d55307 1080 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1081 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1082 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1083 */
AnnaBridge 167:e84263d55307 1084 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 167:e84263d55307 1085 {
AnnaBridge 167:e84263d55307 1086 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 167:e84263d55307 1087 }
AnnaBridge 167:e84263d55307 1088
AnnaBridge 167:e84263d55307 1089 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 167:e84263d55307 1090 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 167:e84263d55307 1091 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 167:e84263d55307 1092
AnnaBridge 167:e84263d55307 1093
AnnaBridge 167:e84263d55307 1094 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 1095 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 167:e84263d55307 1096 /**
AnnaBridge 167:e84263d55307 1097 \brief Load-Acquire (8 bit)
AnnaBridge 167:e84263d55307 1098 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 167:e84263d55307 1099 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1100 \return value of type uint8_t at (*ptr)
AnnaBridge 167:e84263d55307 1101 */
AnnaBridge 167:e84263d55307 1102 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 167:e84263d55307 1103 {
AnnaBridge 167:e84263d55307 1104 uint32_t result;
AnnaBridge 167:e84263d55307 1105
AnnaBridge 167:e84263d55307 1106 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1107 return ((uint8_t) result);
AnnaBridge 167:e84263d55307 1108 }
AnnaBridge 167:e84263d55307 1109
AnnaBridge 167:e84263d55307 1110
AnnaBridge 167:e84263d55307 1111 /**
AnnaBridge 167:e84263d55307 1112 \brief Load-Acquire (16 bit)
AnnaBridge 167:e84263d55307 1113 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1114 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1115 \return value of type uint16_t at (*ptr)
AnnaBridge 167:e84263d55307 1116 */
AnnaBridge 167:e84263d55307 1117 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 167:e84263d55307 1118 {
AnnaBridge 167:e84263d55307 1119 uint32_t result;
AnnaBridge 167:e84263d55307 1120
AnnaBridge 167:e84263d55307 1121 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1122 return ((uint16_t) result);
AnnaBridge 167:e84263d55307 1123 }
AnnaBridge 167:e84263d55307 1124
AnnaBridge 167:e84263d55307 1125
AnnaBridge 167:e84263d55307 1126 /**
AnnaBridge 167:e84263d55307 1127 \brief Load-Acquire (32 bit)
AnnaBridge 167:e84263d55307 1128 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1129 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1130 \return value of type uint32_t at (*ptr)
AnnaBridge 167:e84263d55307 1131 */
AnnaBridge 167:e84263d55307 1132 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 167:e84263d55307 1133 {
AnnaBridge 167:e84263d55307 1134 uint32_t result;
AnnaBridge 167:e84263d55307 1135
AnnaBridge 167:e84263d55307 1136 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 167:e84263d55307 1137 return(result);
AnnaBridge 167:e84263d55307 1138 }
AnnaBridge 167:e84263d55307 1139
AnnaBridge 167:e84263d55307 1140
AnnaBridge 167:e84263d55307 1141 /**
AnnaBridge 167:e84263d55307 1142 \brief Store-Release (8 bit)
AnnaBridge 167:e84263d55307 1143 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 167:e84263d55307 1144 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1145 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1146 */
AnnaBridge 167:e84263d55307 1147 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 167:e84263d55307 1148 {
AnnaBridge 167:e84263d55307 1149 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 167:e84263d55307 1150 }
AnnaBridge 167:e84263d55307 1151
AnnaBridge 167:e84263d55307 1152
AnnaBridge 167:e84263d55307 1153 /**
AnnaBridge 167:e84263d55307 1154 \brief Store-Release (16 bit)
AnnaBridge 167:e84263d55307 1155 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1156 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1157 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1158 */
AnnaBridge 167:e84263d55307 1159 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 167:e84263d55307 1160 {
AnnaBridge 167:e84263d55307 1161 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 167:e84263d55307 1162 }
AnnaBridge 167:e84263d55307 1163
AnnaBridge 167:e84263d55307 1164
AnnaBridge 167:e84263d55307 1165 /**
AnnaBridge 167:e84263d55307 1166 \brief Store-Release (32 bit)
AnnaBridge 167:e84263d55307 1167 \details Executes a STL instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1168 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1169 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1170 */
AnnaBridge 167:e84263d55307 1171 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 167:e84263d55307 1172 {
AnnaBridge 167:e84263d55307 1173 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 167:e84263d55307 1174 }
AnnaBridge 167:e84263d55307 1175
AnnaBridge 167:e84263d55307 1176
AnnaBridge 167:e84263d55307 1177 /**
AnnaBridge 167:e84263d55307 1178 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 167:e84263d55307 1179 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 167:e84263d55307 1180 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1181 \return value of type uint8_t at (*ptr)
AnnaBridge 167:e84263d55307 1182 */
AnnaBridge 167:e84263d55307 1183 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 167:e84263d55307 1184
AnnaBridge 167:e84263d55307 1185
AnnaBridge 167:e84263d55307 1186 /**
AnnaBridge 167:e84263d55307 1187 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 167:e84263d55307 1188 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1189 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1190 \return value of type uint16_t at (*ptr)
AnnaBridge 167:e84263d55307 1191 */
AnnaBridge 167:e84263d55307 1192 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 167:e84263d55307 1193
AnnaBridge 167:e84263d55307 1194
AnnaBridge 167:e84263d55307 1195 /**
AnnaBridge 167:e84263d55307 1196 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 167:e84263d55307 1197 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1198 \param [in] ptr Pointer to data
AnnaBridge 167:e84263d55307 1199 \return value of type uint32_t at (*ptr)
AnnaBridge 167:e84263d55307 1200 */
AnnaBridge 167:e84263d55307 1201 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 167:e84263d55307 1202
AnnaBridge 167:e84263d55307 1203
AnnaBridge 167:e84263d55307 1204 /**
AnnaBridge 167:e84263d55307 1205 \brief Store-Release Exclusive (8 bit)
AnnaBridge 167:e84263d55307 1206 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 167:e84263d55307 1207 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1208 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1209 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 1210 \return 1 Function failed
AnnaBridge 167:e84263d55307 1211 */
AnnaBridge 167:e84263d55307 1212 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 167:e84263d55307 1213
AnnaBridge 167:e84263d55307 1214
AnnaBridge 167:e84263d55307 1215 /**
AnnaBridge 167:e84263d55307 1216 \brief Store-Release Exclusive (16 bit)
AnnaBridge 167:e84263d55307 1217 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 167:e84263d55307 1218 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1219 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1220 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 1221 \return 1 Function failed
AnnaBridge 167:e84263d55307 1222 */
AnnaBridge 167:e84263d55307 1223 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 167:e84263d55307 1224
AnnaBridge 167:e84263d55307 1225
AnnaBridge 167:e84263d55307 1226 /**
AnnaBridge 167:e84263d55307 1227 \brief Store-Release Exclusive (32 bit)
AnnaBridge 167:e84263d55307 1228 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 167:e84263d55307 1229 \param [in] value Value to store
AnnaBridge 167:e84263d55307 1230 \param [in] ptr Pointer to location
AnnaBridge 167:e84263d55307 1231 \return 0 Function succeeded
AnnaBridge 167:e84263d55307 1232 \return 1 Function failed
AnnaBridge 167:e84263d55307 1233 */
AnnaBridge 167:e84263d55307 1234 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 167:e84263d55307 1235
AnnaBridge 167:e84263d55307 1236 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:e84263d55307 1237 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 167:e84263d55307 1238
AnnaBridge 167:e84263d55307 1239 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 167:e84263d55307 1240
AnnaBridge 167:e84263d55307 1241
AnnaBridge 167:e84263d55307 1242 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 167:e84263d55307 1243 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 167:e84263d55307 1244 Access to dedicated SIMD instructions
AnnaBridge 167:e84263d55307 1245 @{
AnnaBridge 167:e84263d55307 1246 */
AnnaBridge 167:e84263d55307 1247
AnnaBridge 167:e84263d55307 1248 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 167:e84263d55307 1249
AnnaBridge 167:e84263d55307 1250 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1251 {
AnnaBridge 167:e84263d55307 1252 uint32_t result;
AnnaBridge 167:e84263d55307 1253
AnnaBridge 167:e84263d55307 1254 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1255 return(result);
AnnaBridge 167:e84263d55307 1256 }
AnnaBridge 167:e84263d55307 1257
AnnaBridge 167:e84263d55307 1258 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1259 {
AnnaBridge 167:e84263d55307 1260 uint32_t result;
AnnaBridge 167:e84263d55307 1261
AnnaBridge 167:e84263d55307 1262 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1263 return(result);
AnnaBridge 167:e84263d55307 1264 }
AnnaBridge 167:e84263d55307 1265
AnnaBridge 167:e84263d55307 1266 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1267 {
AnnaBridge 167:e84263d55307 1268 uint32_t result;
AnnaBridge 167:e84263d55307 1269
AnnaBridge 167:e84263d55307 1270 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1271 return(result);
AnnaBridge 167:e84263d55307 1272 }
AnnaBridge 167:e84263d55307 1273
AnnaBridge 167:e84263d55307 1274 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1275 {
AnnaBridge 167:e84263d55307 1276 uint32_t result;
AnnaBridge 167:e84263d55307 1277
AnnaBridge 167:e84263d55307 1278 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1279 return(result);
AnnaBridge 167:e84263d55307 1280 }
AnnaBridge 167:e84263d55307 1281
AnnaBridge 167:e84263d55307 1282 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1283 {
AnnaBridge 167:e84263d55307 1284 uint32_t result;
AnnaBridge 167:e84263d55307 1285
AnnaBridge 167:e84263d55307 1286 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1287 return(result);
AnnaBridge 167:e84263d55307 1288 }
AnnaBridge 167:e84263d55307 1289
AnnaBridge 167:e84263d55307 1290 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1291 {
AnnaBridge 167:e84263d55307 1292 uint32_t result;
AnnaBridge 167:e84263d55307 1293
AnnaBridge 167:e84263d55307 1294 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1295 return(result);
AnnaBridge 167:e84263d55307 1296 }
AnnaBridge 167:e84263d55307 1297
AnnaBridge 167:e84263d55307 1298
AnnaBridge 167:e84263d55307 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1300 {
AnnaBridge 167:e84263d55307 1301 uint32_t result;
AnnaBridge 167:e84263d55307 1302
AnnaBridge 167:e84263d55307 1303 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1304 return(result);
AnnaBridge 167:e84263d55307 1305 }
AnnaBridge 167:e84263d55307 1306
AnnaBridge 167:e84263d55307 1307 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1308 {
AnnaBridge 167:e84263d55307 1309 uint32_t result;
AnnaBridge 167:e84263d55307 1310
AnnaBridge 167:e84263d55307 1311 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1312 return(result);
AnnaBridge 167:e84263d55307 1313 }
AnnaBridge 167:e84263d55307 1314
AnnaBridge 167:e84263d55307 1315 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1316 {
AnnaBridge 167:e84263d55307 1317 uint32_t result;
AnnaBridge 167:e84263d55307 1318
AnnaBridge 167:e84263d55307 1319 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1320 return(result);
AnnaBridge 167:e84263d55307 1321 }
AnnaBridge 167:e84263d55307 1322
AnnaBridge 167:e84263d55307 1323 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1324 {
AnnaBridge 167:e84263d55307 1325 uint32_t result;
AnnaBridge 167:e84263d55307 1326
AnnaBridge 167:e84263d55307 1327 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1328 return(result);
AnnaBridge 167:e84263d55307 1329 }
AnnaBridge 167:e84263d55307 1330
AnnaBridge 167:e84263d55307 1331 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1332 {
AnnaBridge 167:e84263d55307 1333 uint32_t result;
AnnaBridge 167:e84263d55307 1334
AnnaBridge 167:e84263d55307 1335 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1336 return(result);
AnnaBridge 167:e84263d55307 1337 }
AnnaBridge 167:e84263d55307 1338
AnnaBridge 167:e84263d55307 1339 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1340 {
AnnaBridge 167:e84263d55307 1341 uint32_t result;
AnnaBridge 167:e84263d55307 1342
AnnaBridge 167:e84263d55307 1343 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1344 return(result);
AnnaBridge 167:e84263d55307 1345 }
AnnaBridge 167:e84263d55307 1346
AnnaBridge 167:e84263d55307 1347
AnnaBridge 167:e84263d55307 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1349 {
AnnaBridge 167:e84263d55307 1350 uint32_t result;
AnnaBridge 167:e84263d55307 1351
AnnaBridge 167:e84263d55307 1352 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1353 return(result);
AnnaBridge 167:e84263d55307 1354 }
AnnaBridge 167:e84263d55307 1355
AnnaBridge 167:e84263d55307 1356 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1357 {
AnnaBridge 167:e84263d55307 1358 uint32_t result;
AnnaBridge 167:e84263d55307 1359
AnnaBridge 167:e84263d55307 1360 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1361 return(result);
AnnaBridge 167:e84263d55307 1362 }
AnnaBridge 167:e84263d55307 1363
AnnaBridge 167:e84263d55307 1364 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1365 {
AnnaBridge 167:e84263d55307 1366 uint32_t result;
AnnaBridge 167:e84263d55307 1367
AnnaBridge 167:e84263d55307 1368 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1369 return(result);
AnnaBridge 167:e84263d55307 1370 }
AnnaBridge 167:e84263d55307 1371
AnnaBridge 167:e84263d55307 1372 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1373 {
AnnaBridge 167:e84263d55307 1374 uint32_t result;
AnnaBridge 167:e84263d55307 1375
AnnaBridge 167:e84263d55307 1376 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1377 return(result);
AnnaBridge 167:e84263d55307 1378 }
AnnaBridge 167:e84263d55307 1379
AnnaBridge 167:e84263d55307 1380 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1381 {
AnnaBridge 167:e84263d55307 1382 uint32_t result;
AnnaBridge 167:e84263d55307 1383
AnnaBridge 167:e84263d55307 1384 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1385 return(result);
AnnaBridge 167:e84263d55307 1386 }
AnnaBridge 167:e84263d55307 1387
AnnaBridge 167:e84263d55307 1388 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1389 {
AnnaBridge 167:e84263d55307 1390 uint32_t result;
AnnaBridge 167:e84263d55307 1391
AnnaBridge 167:e84263d55307 1392 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1393 return(result);
AnnaBridge 167:e84263d55307 1394 }
AnnaBridge 167:e84263d55307 1395
AnnaBridge 167:e84263d55307 1396 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1397 {
AnnaBridge 167:e84263d55307 1398 uint32_t result;
AnnaBridge 167:e84263d55307 1399
AnnaBridge 167:e84263d55307 1400 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1401 return(result);
AnnaBridge 167:e84263d55307 1402 }
AnnaBridge 167:e84263d55307 1403
AnnaBridge 167:e84263d55307 1404 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1405 {
AnnaBridge 167:e84263d55307 1406 uint32_t result;
AnnaBridge 167:e84263d55307 1407
AnnaBridge 167:e84263d55307 1408 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1409 return(result);
AnnaBridge 167:e84263d55307 1410 }
AnnaBridge 167:e84263d55307 1411
AnnaBridge 167:e84263d55307 1412 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1413 {
AnnaBridge 167:e84263d55307 1414 uint32_t result;
AnnaBridge 167:e84263d55307 1415
AnnaBridge 167:e84263d55307 1416 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1417 return(result);
AnnaBridge 167:e84263d55307 1418 }
AnnaBridge 167:e84263d55307 1419
AnnaBridge 167:e84263d55307 1420 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1421 {
AnnaBridge 167:e84263d55307 1422 uint32_t result;
AnnaBridge 167:e84263d55307 1423
AnnaBridge 167:e84263d55307 1424 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1425 return(result);
AnnaBridge 167:e84263d55307 1426 }
AnnaBridge 167:e84263d55307 1427
AnnaBridge 167:e84263d55307 1428 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1429 {
AnnaBridge 167:e84263d55307 1430 uint32_t result;
AnnaBridge 167:e84263d55307 1431
AnnaBridge 167:e84263d55307 1432 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1433 return(result);
AnnaBridge 167:e84263d55307 1434 }
AnnaBridge 167:e84263d55307 1435
AnnaBridge 167:e84263d55307 1436 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1437 {
AnnaBridge 167:e84263d55307 1438 uint32_t result;
AnnaBridge 167:e84263d55307 1439
AnnaBridge 167:e84263d55307 1440 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1441 return(result);
AnnaBridge 167:e84263d55307 1442 }
AnnaBridge 167:e84263d55307 1443
AnnaBridge 167:e84263d55307 1444 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1445 {
AnnaBridge 167:e84263d55307 1446 uint32_t result;
AnnaBridge 167:e84263d55307 1447
AnnaBridge 167:e84263d55307 1448 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1449 return(result);
AnnaBridge 167:e84263d55307 1450 }
AnnaBridge 167:e84263d55307 1451
AnnaBridge 167:e84263d55307 1452 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1453 {
AnnaBridge 167:e84263d55307 1454 uint32_t result;
AnnaBridge 167:e84263d55307 1455
AnnaBridge 167:e84263d55307 1456 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1457 return(result);
AnnaBridge 167:e84263d55307 1458 }
AnnaBridge 167:e84263d55307 1459
AnnaBridge 167:e84263d55307 1460 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1461 {
AnnaBridge 167:e84263d55307 1462 uint32_t result;
AnnaBridge 167:e84263d55307 1463
AnnaBridge 167:e84263d55307 1464 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1465 return(result);
AnnaBridge 167:e84263d55307 1466 }
AnnaBridge 167:e84263d55307 1467
AnnaBridge 167:e84263d55307 1468 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1469 {
AnnaBridge 167:e84263d55307 1470 uint32_t result;
AnnaBridge 167:e84263d55307 1471
AnnaBridge 167:e84263d55307 1472 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1473 return(result);
AnnaBridge 167:e84263d55307 1474 }
AnnaBridge 167:e84263d55307 1475
AnnaBridge 167:e84263d55307 1476 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1477 {
AnnaBridge 167:e84263d55307 1478 uint32_t result;
AnnaBridge 167:e84263d55307 1479
AnnaBridge 167:e84263d55307 1480 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1481 return(result);
AnnaBridge 167:e84263d55307 1482 }
AnnaBridge 167:e84263d55307 1483
AnnaBridge 167:e84263d55307 1484 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1485 {
AnnaBridge 167:e84263d55307 1486 uint32_t result;
AnnaBridge 167:e84263d55307 1487
AnnaBridge 167:e84263d55307 1488 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1489 return(result);
AnnaBridge 167:e84263d55307 1490 }
AnnaBridge 167:e84263d55307 1491
AnnaBridge 167:e84263d55307 1492 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1493 {
AnnaBridge 167:e84263d55307 1494 uint32_t result;
AnnaBridge 167:e84263d55307 1495
AnnaBridge 167:e84263d55307 1496 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1497 return(result);
AnnaBridge 167:e84263d55307 1498 }
AnnaBridge 167:e84263d55307 1499
AnnaBridge 167:e84263d55307 1500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1501 {
AnnaBridge 167:e84263d55307 1502 uint32_t result;
AnnaBridge 167:e84263d55307 1503
AnnaBridge 167:e84263d55307 1504 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1505 return(result);
AnnaBridge 167:e84263d55307 1506 }
AnnaBridge 167:e84263d55307 1507
AnnaBridge 167:e84263d55307 1508 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1509 {
AnnaBridge 167:e84263d55307 1510 uint32_t result;
AnnaBridge 167:e84263d55307 1511
AnnaBridge 167:e84263d55307 1512 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1513 return(result);
AnnaBridge 167:e84263d55307 1514 }
AnnaBridge 167:e84263d55307 1515
AnnaBridge 167:e84263d55307 1516 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1517 {
AnnaBridge 167:e84263d55307 1518 uint32_t result;
AnnaBridge 167:e84263d55307 1519
AnnaBridge 167:e84263d55307 1520 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1521 return(result);
AnnaBridge 167:e84263d55307 1522 }
AnnaBridge 167:e84263d55307 1523
AnnaBridge 167:e84263d55307 1524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1525 {
AnnaBridge 167:e84263d55307 1526 uint32_t result;
AnnaBridge 167:e84263d55307 1527
AnnaBridge 167:e84263d55307 1528 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1529 return(result);
AnnaBridge 167:e84263d55307 1530 }
AnnaBridge 167:e84263d55307 1531
AnnaBridge 167:e84263d55307 1532 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1533 {
AnnaBridge 167:e84263d55307 1534 uint32_t result;
AnnaBridge 167:e84263d55307 1535
AnnaBridge 167:e84263d55307 1536 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1537 return(result);
AnnaBridge 167:e84263d55307 1538 }
AnnaBridge 167:e84263d55307 1539
AnnaBridge 167:e84263d55307 1540 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1541 {
AnnaBridge 167:e84263d55307 1542 uint32_t result;
AnnaBridge 167:e84263d55307 1543
AnnaBridge 167:e84263d55307 1544 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1545 return(result);
AnnaBridge 167:e84263d55307 1546 }
AnnaBridge 167:e84263d55307 1547
AnnaBridge 167:e84263d55307 1548 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 167:e84263d55307 1549 {
AnnaBridge 167:e84263d55307 1550 uint32_t result;
AnnaBridge 167:e84263d55307 1551
AnnaBridge 167:e84263d55307 1552 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1553 return(result);
AnnaBridge 167:e84263d55307 1554 }
AnnaBridge 167:e84263d55307 1555
AnnaBridge 167:e84263d55307 1556 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 167:e84263d55307 1557 ({ \
AnnaBridge 167:e84263d55307 1558 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 167:e84263d55307 1559 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 167:e84263d55307 1560 __RES; \
AnnaBridge 167:e84263d55307 1561 })
AnnaBridge 167:e84263d55307 1562
AnnaBridge 167:e84263d55307 1563 #define __USAT16(ARG1,ARG2) \
AnnaBridge 167:e84263d55307 1564 ({ \
AnnaBridge 167:e84263d55307 1565 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 167:e84263d55307 1566 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 167:e84263d55307 1567 __RES; \
AnnaBridge 167:e84263d55307 1568 })
AnnaBridge 167:e84263d55307 1569
AnnaBridge 167:e84263d55307 1570 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 167:e84263d55307 1571 {
AnnaBridge 167:e84263d55307 1572 uint32_t result;
AnnaBridge 167:e84263d55307 1573
AnnaBridge 167:e84263d55307 1574 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 167:e84263d55307 1575 return(result);
AnnaBridge 167:e84263d55307 1576 }
AnnaBridge 167:e84263d55307 1577
AnnaBridge 167:e84263d55307 1578 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1579 {
AnnaBridge 167:e84263d55307 1580 uint32_t result;
AnnaBridge 167:e84263d55307 1581
AnnaBridge 167:e84263d55307 1582 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1583 return(result);
AnnaBridge 167:e84263d55307 1584 }
AnnaBridge 167:e84263d55307 1585
AnnaBridge 167:e84263d55307 1586 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 167:e84263d55307 1587 {
AnnaBridge 167:e84263d55307 1588 uint32_t result;
AnnaBridge 167:e84263d55307 1589
AnnaBridge 167:e84263d55307 1590 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 167:e84263d55307 1591 return(result);
AnnaBridge 167:e84263d55307 1592 }
AnnaBridge 167:e84263d55307 1593
AnnaBridge 167:e84263d55307 1594 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1595 {
AnnaBridge 167:e84263d55307 1596 uint32_t result;
AnnaBridge 167:e84263d55307 1597
AnnaBridge 167:e84263d55307 1598 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1599 return(result);
AnnaBridge 167:e84263d55307 1600 }
AnnaBridge 167:e84263d55307 1601
AnnaBridge 167:e84263d55307 1602 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1603 {
AnnaBridge 167:e84263d55307 1604 uint32_t result;
AnnaBridge 167:e84263d55307 1605
AnnaBridge 167:e84263d55307 1606 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1607 return(result);
AnnaBridge 167:e84263d55307 1608 }
AnnaBridge 167:e84263d55307 1609
AnnaBridge 167:e84263d55307 1610 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1611 {
AnnaBridge 167:e84263d55307 1612 uint32_t result;
AnnaBridge 167:e84263d55307 1613
AnnaBridge 167:e84263d55307 1614 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1615 return(result);
AnnaBridge 167:e84263d55307 1616 }
AnnaBridge 167:e84263d55307 1617
AnnaBridge 167:e84263d55307 1618 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 167:e84263d55307 1619 {
AnnaBridge 167:e84263d55307 1620 uint32_t result;
AnnaBridge 167:e84263d55307 1621
AnnaBridge 167:e84263d55307 1622 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1623 return(result);
AnnaBridge 167:e84263d55307 1624 }
AnnaBridge 167:e84263d55307 1625
AnnaBridge 167:e84263d55307 1626 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 167:e84263d55307 1627 {
AnnaBridge 167:e84263d55307 1628 uint32_t result;
AnnaBridge 167:e84263d55307 1629
AnnaBridge 167:e84263d55307 1630 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1631 return(result);
AnnaBridge 167:e84263d55307 1632 }
AnnaBridge 167:e84263d55307 1633
AnnaBridge 167:e84263d55307 1634 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 167:e84263d55307 1635 {
AnnaBridge 167:e84263d55307 1636 union llreg_u{
AnnaBridge 167:e84263d55307 1637 uint32_t w32[2];
AnnaBridge 167:e84263d55307 1638 uint64_t w64;
AnnaBridge 167:e84263d55307 1639 } llr;
AnnaBridge 167:e84263d55307 1640 llr.w64 = acc;
AnnaBridge 167:e84263d55307 1641
AnnaBridge 167:e84263d55307 1642 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 167:e84263d55307 1643 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 167:e84263d55307 1644 #else /* Big endian */
AnnaBridge 167:e84263d55307 1645 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 167:e84263d55307 1646 #endif
AnnaBridge 167:e84263d55307 1647
AnnaBridge 167:e84263d55307 1648 return(llr.w64);
AnnaBridge 167:e84263d55307 1649 }
AnnaBridge 167:e84263d55307 1650
AnnaBridge 167:e84263d55307 1651 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 167:e84263d55307 1652 {
AnnaBridge 167:e84263d55307 1653 union llreg_u{
AnnaBridge 167:e84263d55307 1654 uint32_t w32[2];
AnnaBridge 167:e84263d55307 1655 uint64_t w64;
AnnaBridge 167:e84263d55307 1656 } llr;
AnnaBridge 167:e84263d55307 1657 llr.w64 = acc;
AnnaBridge 167:e84263d55307 1658
AnnaBridge 167:e84263d55307 1659 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 167:e84263d55307 1660 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 167:e84263d55307 1661 #else /* Big endian */
AnnaBridge 167:e84263d55307 1662 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 167:e84263d55307 1663 #endif
AnnaBridge 167:e84263d55307 1664
AnnaBridge 167:e84263d55307 1665 return(llr.w64);
AnnaBridge 167:e84263d55307 1666 }
AnnaBridge 167:e84263d55307 1667
AnnaBridge 167:e84263d55307 1668 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1669 {
AnnaBridge 167:e84263d55307 1670 uint32_t result;
AnnaBridge 167:e84263d55307 1671
AnnaBridge 167:e84263d55307 1672 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1673 return(result);
AnnaBridge 167:e84263d55307 1674 }
AnnaBridge 167:e84263d55307 1675
AnnaBridge 167:e84263d55307 1676 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1677 {
AnnaBridge 167:e84263d55307 1678 uint32_t result;
AnnaBridge 167:e84263d55307 1679
AnnaBridge 167:e84263d55307 1680 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1681 return(result);
AnnaBridge 167:e84263d55307 1682 }
AnnaBridge 167:e84263d55307 1683
AnnaBridge 167:e84263d55307 1684 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 167:e84263d55307 1685 {
AnnaBridge 167:e84263d55307 1686 uint32_t result;
AnnaBridge 167:e84263d55307 1687
AnnaBridge 167:e84263d55307 1688 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1689 return(result);
AnnaBridge 167:e84263d55307 1690 }
AnnaBridge 167:e84263d55307 1691
AnnaBridge 167:e84263d55307 1692 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 167:e84263d55307 1693 {
AnnaBridge 167:e84263d55307 1694 uint32_t result;
AnnaBridge 167:e84263d55307 1695
AnnaBridge 167:e84263d55307 1696 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1697 return(result);
AnnaBridge 167:e84263d55307 1698 }
AnnaBridge 167:e84263d55307 1699
AnnaBridge 167:e84263d55307 1700 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 167:e84263d55307 1701 {
AnnaBridge 167:e84263d55307 1702 union llreg_u{
AnnaBridge 167:e84263d55307 1703 uint32_t w32[2];
AnnaBridge 167:e84263d55307 1704 uint64_t w64;
AnnaBridge 167:e84263d55307 1705 } llr;
AnnaBridge 167:e84263d55307 1706 llr.w64 = acc;
AnnaBridge 167:e84263d55307 1707
AnnaBridge 167:e84263d55307 1708 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 167:e84263d55307 1709 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 167:e84263d55307 1710 #else /* Big endian */
AnnaBridge 167:e84263d55307 1711 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 167:e84263d55307 1712 #endif
AnnaBridge 167:e84263d55307 1713
AnnaBridge 167:e84263d55307 1714 return(llr.w64);
AnnaBridge 167:e84263d55307 1715 }
AnnaBridge 167:e84263d55307 1716
AnnaBridge 167:e84263d55307 1717 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 167:e84263d55307 1718 {
AnnaBridge 167:e84263d55307 1719 union llreg_u{
AnnaBridge 167:e84263d55307 1720 uint32_t w32[2];
AnnaBridge 167:e84263d55307 1721 uint64_t w64;
AnnaBridge 167:e84263d55307 1722 } llr;
AnnaBridge 167:e84263d55307 1723 llr.w64 = acc;
AnnaBridge 167:e84263d55307 1724
AnnaBridge 167:e84263d55307 1725 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 167:e84263d55307 1726 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 167:e84263d55307 1727 #else /* Big endian */
AnnaBridge 167:e84263d55307 1728 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 167:e84263d55307 1729 #endif
AnnaBridge 167:e84263d55307 1730
AnnaBridge 167:e84263d55307 1731 return(llr.w64);
AnnaBridge 167:e84263d55307 1732 }
AnnaBridge 167:e84263d55307 1733
AnnaBridge 167:e84263d55307 1734 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 167:e84263d55307 1735 {
AnnaBridge 167:e84263d55307 1736 uint32_t result;
AnnaBridge 167:e84263d55307 1737
AnnaBridge 167:e84263d55307 1738 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1739 return(result);
AnnaBridge 167:e84263d55307 1740 }
AnnaBridge 167:e84263d55307 1741
AnnaBridge 167:e84263d55307 1742 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 167:e84263d55307 1743 {
AnnaBridge 167:e84263d55307 1744 int32_t result;
AnnaBridge 167:e84263d55307 1745
AnnaBridge 167:e84263d55307 1746 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1747 return(result);
AnnaBridge 167:e84263d55307 1748 }
AnnaBridge 167:e84263d55307 1749
AnnaBridge 167:e84263d55307 1750 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 167:e84263d55307 1751 {
AnnaBridge 167:e84263d55307 1752 int32_t result;
AnnaBridge 167:e84263d55307 1753
AnnaBridge 167:e84263d55307 1754 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 167:e84263d55307 1755 return(result);
AnnaBridge 167:e84263d55307 1756 }
AnnaBridge 167:e84263d55307 1757
AnnaBridge 167:e84263d55307 1758 #if 0
AnnaBridge 167:e84263d55307 1759 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 167:e84263d55307 1760 ({ \
AnnaBridge 167:e84263d55307 1761 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 167:e84263d55307 1762 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 167:e84263d55307 1763 __RES; \
AnnaBridge 167:e84263d55307 1764 })
AnnaBridge 167:e84263d55307 1765
AnnaBridge 167:e84263d55307 1766 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 167:e84263d55307 1767 ({ \
AnnaBridge 167:e84263d55307 1768 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 167:e84263d55307 1769 if (ARG3 == 0) \
AnnaBridge 167:e84263d55307 1770 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 167:e84263d55307 1771 else \
AnnaBridge 167:e84263d55307 1772 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 167:e84263d55307 1773 __RES; \
AnnaBridge 167:e84263d55307 1774 })
AnnaBridge 167:e84263d55307 1775 #endif
AnnaBridge 167:e84263d55307 1776
AnnaBridge 167:e84263d55307 1777 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 167:e84263d55307 1778 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 167:e84263d55307 1779
AnnaBridge 167:e84263d55307 1780 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 167:e84263d55307 1781 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 167:e84263d55307 1782
AnnaBridge 167:e84263d55307 1783 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 167:e84263d55307 1784 {
AnnaBridge 167:e84263d55307 1785 int32_t result;
AnnaBridge 167:e84263d55307 1786
AnnaBridge 167:e84263d55307 1787 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 167:e84263d55307 1788 return(result);
AnnaBridge 167:e84263d55307 1789 }
AnnaBridge 167:e84263d55307 1790
AnnaBridge 167:e84263d55307 1791 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 167:e84263d55307 1792 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 167:e84263d55307 1793
AnnaBridge 167:e84263d55307 1794
AnnaBridge 167:e84263d55307 1795 #endif /* __CMSIS_ARMCLANG_H */